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path: root/linux/drivers/media/dvb/frontends/dib3000mc_priv.h
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Diffstat (limited to 'linux/drivers/media/dvb/frontends/dib3000mc_priv.h')
-rw-r--r--linux/drivers/media/dvb/frontends/dib3000mc_priv.h58
1 files changed, 29 insertions, 29 deletions
diff --git a/linux/drivers/media/dvb/frontends/dib3000mc_priv.h b/linux/drivers/media/dvb/frontends/dib3000mc_priv.h
index 178403da1..2930aac75 100644
--- a/linux/drivers/media/dvb/frontends/dib3000mc_priv.h
+++ b/linux/drivers/media/dvb/frontends/dib3000mc_priv.h
@@ -1,12 +1,12 @@
/*
* dib3000mc_priv.h
- *
+ *
* Copyright (C) 2004 Patrick Boettcher (patrick.boettcher@desy.de)
- *
+ *
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation, version 2.
- *
+ *
* for more information see dib3000mc.c .
*/
@@ -15,10 +15,10 @@
/*
* Demodulator parameters
- * reg: 0 1 1 1 11 11 111
+ * reg: 0 1 1 1 11 11 111
* | | | | | |
* | | | | | +-- alpha (000=0, 001=1, 010=2, 100=4)
- * | | | | +----- constellation (00=QPSK, 01=16QAM, 10=64QAM)
+ * | | | | +----- constellation (00=QPSK, 01=16QAM, 10=64QAM)
* | | | +-------- guard (00=1/32, 01=1/16, 10=1/8, 11=1/4)
* | | +----------- transmission mode (0=2k, 1=8k)
* | |
@@ -49,7 +49,7 @@
(0x1 & s) | \
((0x7 & f) << 1) | \
((0x1 & h) << 4) )
-
+
/* timeout ??? */
#define DIB3000MC_REG_UNK_1 ( 1)
#define DIB3000MC_UNK_1 ( 0x04)
@@ -74,16 +74,16 @@
#define DIB3000MC_IS_TPS(v) ((v << 8) & 0x1)
#define DIB3000MC_IS_AS(v) ((v >> 4) & 0xf)
-/* parameters for the bandwidth */
+/* parameters for the bandwidth */
#define DIB3000MC_REG_BW_TIMOUT_MSB ( 6)
#define DIB3000MC_REG_BW_TIMOUT_LSB ( 7)
static u16 dib3000mc_reg_bandwidth[] = { 6,7,8,9,10,11,16,17 };
-/*static u16 dib3000mc_bandwidth_5mhz[] =
+/*static u16 dib3000mc_bandwidth_5mhz[] =
{ 0x28, 0x9380, 0x87, 0x4100, 0x2a4, 0x4500, 0x1, 0xb0d0 };*/
-static u16 dib3000mc_bandwidth_6mhz[] =
+static u16 dib3000mc_bandwidth_6mhz[] =
{ 0x21, 0xd040, 0x70, 0xb62b, 0x233, 0x8ed5, 0x1, 0xb0d0 };
static u16 dib3000mc_bandwidth_7mhz[] =
@@ -107,7 +107,7 @@ static u16 dib3000mc_bandwidth_general[] = { 0x0000, 0x03e8, 0x0000, 0x03f2 };
#define DIB3000MC_REG_UNK_19 ( 19)
#define DIB3000MC_UNK_19 ( 0)
-/* DDS frequency value (IF position) and inversion bit */
+/* DDS frequency value (IF position) and inversion bit */
#define DIB3000MC_REG_INVERSION ( 21)
#define DIB3000MC_REG_SET_DDS_FREQ_MSB ( 21)
#define DIB3000MC_DDS_FREQ_MSB_INV_OFF (0x0164)
@@ -125,7 +125,7 @@ static u16 dib3000mc_bandwidth_general[] = { 0x0000, 0x03e8, 0x0000, 0x03f2 };
//static u16 dib3000mc_timing_freq[][2] = {
// { 0x69, 0x9f18 }, /* 5 MHz */
-// { 0x7e ,0xbee9 }, /* 6 MHz */
+// { 0x7e ,0xbee9 }, /* 6 MHz */
// { 0x93 ,0xdebb }, /* 7 MHz */
// { 0xa8 ,0xfe8c }, /* 8 MHz */
//};
@@ -155,7 +155,7 @@ static u16 dib3000mc_imp_noise_ctl[][2] = {
{ 0x1294, 0x1ff8 }, /* mode 4 */
};
-/* AGC registers */
+/* AGC registers */
static u16 dib3000mc_reg_agc[] = {
36,37,38,39,42,43,44,45,46,47,48,49
};
@@ -164,8 +164,8 @@ static u16 dib3000mc_agc_tuner[][12] = {
{ 0x0051, 0x301d, 0x0000, 0x1cc7, 0xcf5c, 0x6666,
0xbae1, 0xa148, 0x3b5e, 0x3c1c, 0x001a, 0x2019
}, /* TUNER_PANASONIC_ENV77H04D5, */
-
- { 0x0051, 0x301d, 0x0000, 0x1cc7, 0xdc29, 0x570a,
+
+ { 0x0051, 0x301d, 0x0000, 0x1cc7, 0xdc29, 0x570a,
0xbae1, 0x8ccd, 0x3b6d, 0x551d, 0x000a, 0x951e
}, /* TUNER_PANASONIC_ENV57H13D5, TUNER_PANASONIC_ENV57H12D5 */
@@ -184,10 +184,10 @@ static u16 dib3000mc_reg_agc_bandwidth[] = { 40,41 };
static u16 dib3000mc_agc_bandwidth[] = { 0x119,0x330 };
static u16 dib3000mc_reg_agc_bandwidth_general[] = { 50,51,52,53,54 };
-static u16 dib3000mc_agc_bandwidth_general[] =
+static u16 dib3000mc_agc_bandwidth_general[] =
{ 0x8000, 0x91ca, 0x01ba, 0x0087, 0x0087 };
-#define DIB3000MC_REG_IMP_NOISE_55 ( 55)
+#define DIB3000MC_REG_IMP_NOISE_55 ( 55)
#define DIB3000MC_IMP_NEW_ALGO(w) (w | (1<<10))
/* Impulse noise params */
@@ -202,26 +202,26 @@ static u16 dib3000mc_impluse_noise[][3] = {
static u16 dib3000mc_reg_fft[] = {
58,59,60,61,62,63,64,65,66,67,68,69,
70,71,72,73,74,75,76,77,78,79,80,81,
- 82,83,84,85,86
+ 82,83,84,85,86
};
static u16 dib3000mc_fft_modes[][29] = {
- { 0x38, 0x6d9, 0x3f28, 0x7a7, 0x3a74, 0x196, 0x32a, 0x48c,
- 0x3ffe, 0x7f3, 0x2d94, 0x76, 0x53d,
- 0x3ff8, 0x7e3, 0x3320, 0x76, 0x5b3,
- 0x3feb, 0x7d2, 0x365e, 0x76, 0x48c,
- 0x3ffe, 0x5b3, 0x3feb, 0x76, 0x0, 0xd
+ { 0x38, 0x6d9, 0x3f28, 0x7a7, 0x3a74, 0x196, 0x32a, 0x48c,
+ 0x3ffe, 0x7f3, 0x2d94, 0x76, 0x53d,
+ 0x3ff8, 0x7e3, 0x3320, 0x76, 0x5b3,
+ 0x3feb, 0x7d2, 0x365e, 0x76, 0x48c,
+ 0x3ffe, 0x5b3, 0x3feb, 0x76, 0x0, 0xd
}, /* fft mode 0 */
{ 0x3b, 0x6d9, 0x3f28, 0x7a7, 0x3a74, 0x196, 0x32a, 0x48c,
- 0x3ffe, 0x7f3, 0x2d94, 0x76, 0x53d,
- 0x3ff8, 0x7e3, 0x3320, 0x76, 0x5b3,
- 0x3feb, 0x7d2, 0x365e, 0x76, 0x48c,
- 0x3ffe, 0x5b3, 0x3feb, 0x0, 0x8200, 0xd
+ 0x3ffe, 0x7f3, 0x2d94, 0x76, 0x53d,
+ 0x3ff8, 0x7e3, 0x3320, 0x76, 0x5b3,
+ 0x3feb, 0x7d2, 0x365e, 0x76, 0x48c,
+ 0x3ffe, 0x5b3, 0x3feb, 0x0, 0x8200, 0xd
}, /* fft mode 1 */
};
#define DIB3000MC_REG_UNK_88 ( 88)
-#define DIB3000MC_UNK_88 (0x0410)
+#define DIB3000MC_UNK_88 (0x0410)
static u16 dib3000mc_reg_bw[] = { 93,94,95,96,97,98 };
static u16 dib3000mc_bw[][6] = {
@@ -261,7 +261,7 @@ static u16 dib3000mc_bw[][6] = {
/* adapter config for constellation */
static u16 dib3000mc_reg_adp_cfg[] = { 129, 130, 131, 132 };
-static u16 dib3000mc_adp_cfg[][4] = {
+static u16 dib3000mc_adp_cfg[][4] = {
{ 0x99a, 0x7fae, 0x333, 0x7ff0 }, /* QPSK */
{ 0x23d, 0x7fdf, 0x0a4, 0x7ff0 }, /* 16-QAM */
{ 0x148, 0x7ff0, 0x0a4, 0x7ff8 }, /* 64-QAM */
@@ -299,7 +299,7 @@ static u16 dib3000mc_mobile_mode[][5] = {
* |||| +---- fifo_ctrl (1 = inhibit (flushed), 0 = active (unflushed))
* |||+------ pid_parse (1 = enabled, 0 = disabled)
* ||+------- outp_188 (1 = TS packet size 188, 0 = packet size 204)
- * |+-------- unk
+ * |+-------- unk
* +--------- unk
*/
generated by cgit v1.2.3 (git 2.25.1) at 2025-10-05 01:54:27 +0000