diff options
Diffstat (limited to 'linux/drivers/media/video/hexium_gemini.h')
| -rw-r--r-- | linux/drivers/media/video/hexium_gemini.h | 330 |
1 files changed, 330 insertions, 0 deletions
diff --git a/linux/drivers/media/video/hexium_gemini.h b/linux/drivers/media/video/hexium_gemini.h new file mode 100644 index 000000000..d7a9627d4 --- /dev/null +++ b/linux/drivers/media/video/hexium_gemini.h @@ -0,0 +1,330 @@ +#ifndef __HEXIUM_GEMINI__ +#define __HEXIUM_GEMINI__ + +#include "hexium.h" + +static struct saa7146_extension_ioctls ioctls[] = { + { VIDIOC_G_INPUT, SAA7146_EXCLUSIVE }, + { VIDIOC_S_INPUT, SAA7146_EXCLUSIVE }, + { VIDIOC_QUERYCTRL, SAA7146_BEFORE }, + { VIDIOC_ENUMINPUT, SAA7146_EXCLUSIVE }, + { VIDIOC_S_STD, SAA7146_AFTER }, + { VIDIOC_G_CTRL, SAA7146_BEFORE }, + { VIDIOC_S_CTRL, SAA7146_BEFORE }, + { 0, 0 } +}; + +#define HEXIUM_CONTROLS 1 +static struct v4l2_queryctrl hexium_controls[] = { + { V4L2_CID_PRIVATE_BASE, V4L2_CTRL_TYPE_BOOLEAN, "B/W", 0, 1, 1, 0, 0 }, +}; + +#define HEXIUM_GEMUINI_V_1_0 1 +#define HEXIUM_GEMUINI_DUAL_V_1_0 2 + +struct hexium +{ + int type; + struct video_device video_dev; + struct i2c_adapter i2c_adapter; + + int cur_input; /* current input */ + v4l2_std_id cur_std; /* current standard */ + int cur_bw; /* current black/white status */ +}; + +/* Samsung KS0127B decoder default registers */ +static u8 hexium_ks0127b[0x100]={ +/*00*/ 0x00,0x52,0x30,0x40,0x01,0x0C,0x2A,0x10, +/*08*/ 0x00,0x00,0x00,0x60,0x00,0x00,0x0F,0x06, +/*10*/ 0x00,0x00,0xE4,0xC0,0x00,0x00,0x00,0x00, +/*18*/ 0x14,0x9B,0xFE,0xFF,0xFC,0xFF,0x03,0x22, +/*20*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/*28*/ 0x00,0x00,0x00,0x00,0x00,0x2C,0x9B,0x00, +/*30*/ 0x00,0x00,0x10,0x80,0x80,0x10,0x80,0x80, +/*38*/ 0x01,0x04,0x00,0x00,0x00,0x29,0xC0,0x00, +/*40*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/*48*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/*50*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/*58*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/*60*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/*68*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/*70*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/*78*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/*80*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/*88*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/*90*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/*98*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/*A0*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/*A8*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/*B0*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/*B8*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/*C0*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/*C8*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/*D0*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/*D8*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/*E0*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/*E8*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/*F0*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/*F8*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 +}; + +static struct hexium_data hexium_pal[] = { + { 0x01, 0x52 }, { 0x12, 0x64 }, { 0x2D, 0x2C }, { 0x2E, 0x9B }, { -1 , 0xFF } +}; + +static struct hexium_data hexium_pal_bw[] = { + { 0x01, 0x52 }, { 0x12, 0x64 }, { 0x2D, 0x2C }, { 0x2E, 0x9B }, { -1 , 0xFF } +}; + +static struct hexium_data hexium_ntsc[] = { + { 0x01, 0x53 }, { 0x12, 0x04 }, { 0x2D, 0x23 }, { 0x2E, 0x81 }, { -1 , 0xFF } +}; + +static struct hexium_data hexium_ntsc_bw[] = { + { 0x01, 0x53 }, { 0x12, 0x04 }, { 0x2D, 0x23 }, { 0x2E, 0x81 }, { -1 , 0xFF } +}; + +static struct hexium_data hexium_secam[] = { + { 0x01, 0x52 }, { 0x12, 0x64 }, { 0x2D, 0x2C }, { 0x2E, 0x9B }, { -1 , 0xFF } +}; + +static struct hexium_data hexium_input_select[] = { + { 0x02, 0x60 }, + { 0x02, 0x64 }, + { 0x02, 0x61 }, + { 0x02, 0x65 }, + { 0x02, 0x62 }, + { 0x02, 0x66 }, + { 0x02, 0x68 }, + { 0x02, 0x69 }, + { 0x02, 0x6A }, +}; + +#ifdef axa + +#define KS0127BINPUT_NONE SAA7110INPUT_NONE // input channel not specified +#define KS0127BINPUT_AY0 1 // 0127B input channel Y0 definition +#define KS0127BINPUT_AY1 2 // 0127B input channel Y1 definition +#define KS0127BINPUT_AY2 3 // 0127B input channel Y2 definition +#define KS0127BINPUT_AC0 4 // 0127B input channel C0 definition +#define KS0127BINPUT_AC1 5 // 0127B input channel C1 definition +#define KS0127BINPUT_AC2 6 // 0127B input channel C2 definition +static const INPUTMODE inputmode0127b[MODENUM]={ +{KS0127BINPUT_AY0,KS0127BINPUT_NONE}, // 0 CVBS1 +{KS0127BINPUT_AC0,KS0127BINPUT_NONE}, // 1 CVBS2 +{KS0127BINPUT_AY1,KS0127BINPUT_NONE}, // 2 CVBS3 +{KS0127BINPUT_AC1,KS0127BINPUT_NONE}, // 3 CVBS4 +{KS0127BINPUT_AY2,KS0127BINPUT_NONE}, // 4 CVBS5 +{KS0127BINPUT_AC2,KS0127BINPUT_NONE}, // 5 CVBS6 +{KS0127BINPUT_AY0,KS0127BINPUT_AC0}, // 6 CVBS1 +{KS0127BINPUT_AY1,KS0127BINPUT_AC1}, // 7 CVBS2 +{KS0127BINPUT_AY2,KS0127BINPUT_AC2}, // 8 CVBS3 +}; + +// ------------------------------------------------------------------------- +// AGC handling functions +// ------------------------------------------------------------------------- +BYTE SAA7146::ValidateReg0127(int regnum,BYTE Value) +{ +switch(regnum) { +case 0x02: +if (fAGC==false) Value|=0x10; // AGCFRZ AGCOFF +break; +case 0x12: +if (fAGC==false) Value|=0x00; // ACCFRZ AGCOFF +break; +case 0x15: +if (fAGC==false) Value|=0x80; // SATBIT AGCOFF +break; +case 0x29: +if (fAGC==false) Value|=0x40; // TSTCGN AGCOFF +break; +} +return(Value); +} + +#define SAA7110INPUT_NONE 0 /* input channel not specified */ +#define SAA7110INPUT_AI21 1 /* 7110 input channel AI21 definition */ +#define SAA7110INPUT_AI22 2 /* 7110 input channel AI22 definition */ +#define SAA7110INPUT_AI31 3 /* 7110 input channel AI31 definition */ +#define SAA7110INPUT_AI32 4 /* 7110 input channel AI32 definition */ +#define SAA7110INPUT_AI41 5 /* 7110 input channel AI41 definition */ +#define SAA7110INPUT_AI42 6 /* 7110 input channel AI42 definition */ + +static inputmode7110[MODENUM]={ + {SAA7110INPUT_AI21,SAA7110INPUT_NONE}, // 0 CVBS1 + {SAA7110INPUT_AI22,SAA7110INPUT_NONE}, // 1 CVBS2 + {SAA7110INPUT_AI31,SAA7110INPUT_NONE}, // 2 CVBS3 + {SAA7110INPUT_AI32,SAA7110INPUT_NONE}, // 3 CVBS4 + {SAA7110INPUT_AI41,SAA7110INPUT_NONE}, // 4 CVBS5 + {SAA7110INPUT_AI42,SAA7110INPUT_NONE}, // 5 CVBS6 + {SAA7110INPUT_AI21,SAA7110INPUT_AI42}, // 6 Y1,C1 + {SAA7110INPUT_AI31,SAA7110INPUT_AI22}, // 7 Y2,C2 + {SAA7110INPUT_AI41,SAA7110INPUT_AI32} // 8 Y3,C3 + +}; +// ------------------------------------------------------------------------- +// Camera select tables (based on SAA7110.pdf input modes) +// ------------------------------------------------------------------------- +typedef struct REGISTER { +//public: +int address; +BYTE value; +} _REGISTER; +static const REGISTER camtable7110_0[]={ // Mode 0 +{ 0x06, 0x00 }, +{ 0x20, 0xD9 }, +{ 0x21, 0x17 },//0x16, +{ 0x22, 0x40 }, +{ 0x2C, 0x03 }, +{ 0x30, 0x44 }, +{ 0x31, 0x75 }, //?? +{ 0x21, 0x16 }, //0x03, +{ -1 , 0xFF } +}; +static const REGISTER camtable7110_1[]={ // Mode 1 +{ 0x06, 0x00 }, +{ 0x20, 0xD8 }, +{ 0x21, 0x17 },//0x16, +{ 0x22, 0x40 }, +{ 0x2C, 0x03 }, +{ 0x30, 0x44 }, +{ 0x31, 0x75 }, //?? +{ 0x21, 0x16 },//0x03, +{ -1 , 0xFF } +}; +static const REGISTER camtable7110_2[]={ // Mode 2 +{ 0x06, 0x00 }, +{ 0x20, 0xBA }, +{ 0x21, 0x07 },//0x05, +{ 0x22, 0x91 }, +{ 0x2C, 0x03 }, +{ 0x30, 0x60 }, +{ 0x31, 0xB5 }, //?? +{ 0x21, 0x05 },//0x03, +{ -1 , 0xFF } +}; +static const REGISTER camtable7110_3[]={ // Mode 3 +{ 0x06, 0x00 }, +{ 0x20, 0xB8 }, +{ 0x21, 0x07 },//0x05, +{ 0x22, 0x91 }, +{ 0x2C, 0x03 }, +{ 0x30, 0x60 }, +{ 0x31, 0xB5 }, //?? +{ 0x21, 0x05 },//0x03, +{ -1 , 0xFF } +}; +static const REGISTER camtable7110_4[]={ // Mode 4 +{ 0x06, 0x00 }, +{ 0x20, 0x7C }, +{ 0x21, 0x07 }, // 0x03 +{ 0x22, 0xD2 }, +{ 0x2C, 0x83 }, +{ 0x30, 0x60 }, +{ 0x31, 0xB5 }, //? +{ 0x21, 0x03 }, +{ -1 , 0xFF } +}; +static const REGISTER camtable7110_5[]={ // Mode 5 +{ 0x06, 0x00 }, +{ 0x20, 0x78 }, +{ 0x21, 0x07 },//0x03, +{ 0x22, 0xD2 }, +{ 0x2C, 0x83 }, +{ 0x30, 0x60 }, +{ 0x31, 0xB5 }, //? +{ 0x21, 0x03 }, +{ -1 , 0xFF } +}; +static const REGISTER camtable7110_6[]={ // Mode 6 +{ 0x06, 0x80 }, +{ 0x20, 0x59 }, +{ 0x21, 0x17 }, +{ 0x22, 0x42 }, +{ 0x2C, 0xA3 }, +{ 0x30, 0x44 }, +{ 0x31, 0x75 }, +{ 0x21, 0x12 }, +{ -1 , 0xFF } +}; +static const REGISTER camtable7110_7[]={ // Mode 7 +{ 0x06, 0x80 }, +{ 0x20, 0x9A }, +{ 0x21, 0x17 }, +{ 0x22, 0xB1 }, +{ 0x2C, 0x13 }, +{ 0x30, 0x60 }, +{ 0x31, 0xB5 }, +{ 0x21, 0x14 }, +{ -1 , 0xFF } +}; +static const REGISTER camtable7110_8[]={ // Mode 8 +{ 0x06, 0x80 }, +{ 0x20, 0x3C }, +{ 0x21, 0x27 }, +{ 0x22, 0xC1 }, +{ 0x2C, 0x23 }, +{ 0x30, 0x44 }, +{ 0x31, 0x75 }, +{ 0x21, 0x21 }, +{ -1 , 0xFF } +}; +// Camera mode tables xref +static const REGISTER *camselect7110[MODENUM]={ +camtable7110_0, +camtable7110_1, +camtable7110_2, +camtable7110_3, +camtable7110_4, +camtable7110_5, +camtable7110_6, +camtable7110_7, +camtable7110_8 +}; +// Camera signal select tables (based on SAA7110 pdf) +// ------------------------------------------------------------------------- +static const REGISTER sigtable7110_bw60[]={ // B/W NTSC +{ 0x06, 0x80 }, +{ 0x2E, 0x81 }, +{ -1 , 0xFF } +}; +static const REGISTER sigtable7110_bw50[]={ // B/W PAL +{ 0x06, 0x80 }, +{ 0x2E, 0x9A }, +{ -1 , 0xFF } +}; +static const REGISTER sigtable7110_ntsc[]={ // Color NTSC +{ 0x0D, 0x86 }, +{ 0x11, 0x2C }, +{ 0x2E, 0x81 }, +{ -1 , 0xFF } +}; +static const REGISTER sigtable7110_pal[]={ // PAL +{ 0x0D, 0x86 }, +{ 0x11, 0x59 }, +{ 0x2E, 0x9A }, +{ -1 , 0xFF } +}; +static const REGISTER sigtable7110_secam[]={ // SECAM +{ 0x0D, 0x87 }, +{ 0x11, 0x59 }, +{ 0x2E, 0x9A }, +{ -1 , 0xFF } +}; +// ------------------------------------------------------------------------- +// AGC handling functions +// ------------------------------------------------------------------------- +BYTE SAA7146::ValidateReg7110(int regnum,BYTE Value) +{ +switch(regnum) { +case 0x22: +if (fAGC==false) Value&=0x3F; // AGC OFF +break; +} +return(Value); +} + +#endif +#endif |