From f42bba1bc814311cdd5852cec964d6ac5e59ec3b Mon Sep 17 00:00:00 2001
From: Patrick Boettcher <pboettcher@kernellabs.com>
Date: Mon, 3 Aug 2009 19:39:15 +0200
Subject: DVB-API: add support for ISDB-T and ISDB-Tsb (version 5.1)

From: Patrick Boettcher <pboettcher@dibcom.fr>

This patch increments the DVB-API to version 5.1 in order to reflect the addition of ISDB-T and ISDB-Tsb on Linux' DVB-API.

Changes in detail:
- added a small document to describe how to use the API to tune to an ISDB-T or ISDB-Tsb channel
- added necessary fields to dtv_frontend_cache
- added a smarter clear-cache function which resets all fields of the dtv_frontend_cache
- added a TRANSMISSION_MODE_4K to fe_transmit_mode_t

Priority: normal

Signed-off-by: Olivier Grenie <olgrenie@dibcom.fr>
Signed-off-by: Patrick Boettcher <pboettcher@dibcom.fr>
---
 linux/drivers/media/dvb/dvb-core/dvb_frontend.c | 306 +++++++++++++++---------
 linux/drivers/media/dvb/dvb-core/dvb_frontend.h |  26 +-
 2 files changed, 210 insertions(+), 122 deletions(-)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/dvb-core/dvb_frontend.c b/linux/drivers/media/dvb/dvb-core/dvb_frontend.c
index 41166d407..52b0baa52 100644
--- a/linux/drivers/media/dvb/dvb-core/dvb_frontend.c
+++ b/linux/drivers/media/dvb/dvb-core/dvb_frontend.c
@@ -837,6 +837,49 @@ static int dvb_frontend_check_parameters(struct dvb_frontend *fe,
 	return 0;
 }
 
+static int dvb_frontend_clear_cache(struct dvb_frontend *fe)
+{
+	int i;
+
+	memset(&(fe->dtv_property_cache), 0,
+			sizeof(struct dtv_frontend_properties));
+
+	fe->dtv_property_cache.state = DTV_CLEAR;
+	fe->dtv_property_cache.delivery_system = SYS_UNDEFINED;
+	fe->dtv_property_cache.inversion = INVERSION_AUTO;
+	fe->dtv_property_cache.fec_inner = FEC_AUTO;
+	fe->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_AUTO;
+	fe->dtv_property_cache.bandwidth_hz = BANDWIDTH_AUTO;
+	fe->dtv_property_cache.guard_interval = GUARD_INTERVAL_AUTO;
+	fe->dtv_property_cache.hierarchy = HIERARCHY_AUTO;
+	fe->dtv_property_cache.symbol_rate = QAM_AUTO;
+	fe->dtv_property_cache.code_rate_HP = FEC_AUTO;
+	fe->dtv_property_cache.code_rate_LP = FEC_AUTO;
+
+	fe->dtv_property_cache.isdbt_partial_reception = -1;
+	fe->dtv_property_cache.isdbt_sb_mode = -1;
+	fe->dtv_property_cache.isdbt_sb_subchannel = -1;
+	fe->dtv_property_cache.isdbt_sb_segment_idx = -1;
+	fe->dtv_property_cache.isdbt_sb_segment_count = -1;
+	fe->dtv_property_cache.isdbt_layer_enabled = 0x7;
+	for (i = 0; i < 3; i++) {
+		fe->dtv_property_cache.layer[i].fec = FEC_AUTO;
+		fe->dtv_property_cache.layer[i].modulation = QAM_AUTO;
+		fe->dtv_property_cache.layer[i].interleaving = -1;
+		fe->dtv_property_cache.layer[i].segment_count = -1;
+	}
+
+	return 0;
+}
+
+#define _DTV_CMD(n, s, b) \
+[n] = { \
+	.name = #n, \
+	.cmd  = n, \
+	.set  = s,\
+	.buffer = b \
+}
+
 static struct dtv_cmds_h dtv_cmds[] = {
 	[DTV_TUNE] = {
 		.name	= "DTV_TUNE",
@@ -916,18 +959,6 @@ static struct dtv_cmds_h dtv_cmds[] = {
 		.cmd	= DTV_HIERARCHY,
 		.set	= 1,
 	},
-#if 0
-	[DTV_ISDB_SEGMENT_IDX] = {
-		.name	= "DTV_ISDB_SEGMENT_IDX",
-		.cmd	= DTV_ISDB_SEGMENT_IDX,
-		.set	= 1,
-	},
-	[DTV_ISDB_SEGMENT_WIDTH] = {
-		.name	= "DTV_ISDB_SEGMENT_WIDTH",
-		.cmd	= DTV_ISDB_SEGMENT_WIDTH,
-		.set	= 1,
-	},
-#endif
 	[DTV_CODE_RATE_HP] = {
 		.name	= "DTV_CODE_RATE_HP",
 		.cmd	= DTV_CODE_RATE_HP,
@@ -948,6 +979,43 @@ static struct dtv_cmds_h dtv_cmds[] = {
 		.cmd	= DTV_TRANSMISSION_MODE,
 		.set	= 1,
 	},
+
+	_DTV_CMD(DTV_ISDBT_PARTIAL_RECEPTION, 1, 0),
+	_DTV_CMD(DTV_ISDBT_SOUND_BROADCASTING, 1, 0),
+	_DTV_CMD(DTV_ISDBT_SB_SUBCHANNEL_ID, 1, 0),
+	_DTV_CMD(DTV_ISDBT_SB_SEGMENT_IDX, 1, 0),
+	_DTV_CMD(DTV_ISDBT_SB_SEGMENT_COUNT, 1, 0),
+	_DTV_CMD(DTV_ISDBT_LAYERA_FEC, 1, 0),
+	_DTV_CMD(DTV_ISDBT_LAYERA_MODULATION, 1, 0),
+	_DTV_CMD(DTV_ISDBT_LAYERA_SEGMENT_COUNT, 1, 0),
+	_DTV_CMD(DTV_ISDBT_LAYERA_TIME_INTERLEAVING, 1, 0),
+	_DTV_CMD(DTV_ISDBT_LAYERB_FEC, 1, 0),
+	_DTV_CMD(DTV_ISDBT_LAYERB_MODULATION, 1, 0),
+	_DTV_CMD(DTV_ISDBT_LAYERB_SEGMENT_COUNT, 1, 0),
+	_DTV_CMD(DTV_ISDBT_LAYERB_TIME_INTERLEAVING, 1, 0),
+	_DTV_CMD(DTV_ISDBT_LAYERC_FEC, 1, 0),
+	_DTV_CMD(DTV_ISDBT_LAYERC_MODULATION, 1, 0),
+	_DTV_CMD(DTV_ISDBT_LAYERC_SEGMENT_COUNT, 1, 0),
+	_DTV_CMD(DTV_ISDBT_LAYERC_TIME_INTERLEAVING, 1, 0),
+
+	_DTV_CMD(DTV_ISDBT_PARTIAL_RECEPTION, 0, 0),
+	_DTV_CMD(DTV_ISDBT_SOUND_BROADCASTING, 0, 0),
+	_DTV_CMD(DTV_ISDBT_SB_SUBCHANNEL_ID, 0, 0),
+	_DTV_CMD(DTV_ISDBT_SB_SEGMENT_IDX, 0, 0),
+	_DTV_CMD(DTV_ISDBT_SB_SEGMENT_COUNT, 0, 0),
+	_DTV_CMD(DTV_ISDBT_LAYERA_FEC, 0, 0),
+	_DTV_CMD(DTV_ISDBT_LAYERA_MODULATION, 0, 0),
+	_DTV_CMD(DTV_ISDBT_LAYERA_SEGMENT_COUNT, 0, 0),
+	_DTV_CMD(DTV_ISDBT_LAYERA_TIME_INTERLEAVING, 0, 0),
+	_DTV_CMD(DTV_ISDBT_LAYERB_FEC, 0, 0),
+	_DTV_CMD(DTV_ISDBT_LAYERB_MODULATION, 0, 0),
+	_DTV_CMD(DTV_ISDBT_LAYERB_SEGMENT_COUNT, 0, 0),
+	_DTV_CMD(DTV_ISDBT_LAYERB_TIME_INTERLEAVING, 0, 0),
+	_DTV_CMD(DTV_ISDBT_LAYERC_FEC, 0, 0),
+	_DTV_CMD(DTV_ISDBT_LAYERC_MODULATION, 0, 0),
+	_DTV_CMD(DTV_ISDBT_LAYERC_SEGMENT_COUNT, 0, 0),
+	_DTV_CMD(DTV_ISDBT_LAYERC_TIME_INTERLEAVING, 0, 0),
+
 	/* Get */
 	[DTV_DISEQC_SLAVE_REPLY] = {
 		.name	= "DTV_DISEQC_SLAVE_REPLY",
@@ -955,53 +1023,7 @@ static struct dtv_cmds_h dtv_cmds[] = {
 		.set	= 0,
 		.buffer	= 1,
 	},
-#if 0
-	[DTV_ISDB_LAYERA_FEC] = {
-		.name	= "DTV_ISDB_LAYERA_FEC",
-		.cmd	= DTV_ISDB_LAYERA_FEC,
-		.set	= 0,
-	},
-	[DTV_ISDB_LAYERA_MODULATION] = {
-		.name	= "DTV_ISDB_LAYERA_MODULATION",
-		.cmd	= DTV_ISDB_LAYERA_MODULATION,
-		.set	= 0,
-	},
-	[DTV_ISDB_LAYERA_SEGMENT_WIDTH] = {
-		.name	= "DTV_ISDB_LAYERA_SEGMENT_WIDTH",
-		.cmd	= DTV_ISDB_LAYERA_SEGMENT_WIDTH,
-		.set	= 0,
-	},
-	[DTV_ISDB_LAYERB_FEC] = {
-		.name	= "DTV_ISDB_LAYERB_FEC",
-		.cmd	= DTV_ISDB_LAYERB_FEC,
-		.set	= 0,
-	},
-	[DTV_ISDB_LAYERB_MODULATION] = {
-		.name	= "DTV_ISDB_LAYERB_MODULATION",
-		.cmd	= DTV_ISDB_LAYERB_MODULATION,
-		.set	= 0,
-	},
-	[DTV_ISDB_LAYERB_SEGMENT_WIDTH] = {
-		.name	= "DTV_ISDB_LAYERB_SEGMENT_WIDTH",
-		.cmd	= DTV_ISDB_LAYERB_SEGMENT_WIDTH,
-		.set	= 0,
-	},
-	[DTV_ISDB_LAYERC_FEC] = {
-		.name	= "DTV_ISDB_LAYERC_FEC",
-		.cmd	= DTV_ISDB_LAYERC_FEC,
-		.set	= 0,
-	},
-	[DTV_ISDB_LAYERC_MODULATION] = {
-		.name	= "DTV_ISDB_LAYERC_MODULATION",
-		.cmd	= DTV_ISDB_LAYERC_MODULATION,
-		.set	= 0,
-	},
-	[DTV_ISDB_LAYERC_SEGMENT_WIDTH] = {
-		.name	= "DTV_ISDB_LAYERC_SEGMENT_WIDTH",
-		.cmd	= DTV_ISDB_LAYERC_SEGMENT_WIDTH,
-		.set	= 0,
-	},
-#endif
+
 	[DTV_API_VERSION] = {
 		.name	= "DTV_API_VERSION",
 		.cmd	= DTV_API_VERSION,
@@ -1211,14 +1233,21 @@ static void dtv_property_adv_params_sync(struct dvb_frontend *fe)
 	if(c->delivery_system == SYS_ISDBT) {
 		/* Fake out a generic DVB-T request so we pass validation in the ioctl */
 		p->frequency = c->frequency;
-		p->inversion = INVERSION_AUTO;
+		p->inversion = c->inversion;
 		p->u.ofdm.constellation = QAM_AUTO;
 		p->u.ofdm.code_rate_HP = FEC_AUTO;
 		p->u.ofdm.code_rate_LP = FEC_AUTO;
-		p->u.ofdm.bandwidth = BANDWIDTH_AUTO;
 		p->u.ofdm.transmission_mode = TRANSMISSION_MODE_AUTO;
 		p->u.ofdm.guard_interval = GUARD_INTERVAL_AUTO;
 		p->u.ofdm.hierarchy_information = HIERARCHY_AUTO;
+		if (c->bandwidth_hz == 8000000)
+			p->u.ofdm.bandwidth = BANDWIDTH_8_MHZ;
+		else if (c->bandwidth_hz == 7000000)
+			p->u.ofdm.bandwidth = BANDWIDTH_7_MHZ;
+		else if (c->bandwidth_hz == 6000000)
+			p->u.ofdm.bandwidth = BANDWIDTH_6_MHZ;
+		else
+			p->u.ofdm.bandwidth = BANDWIDTH_AUTO;
 	}
 }
 
@@ -1296,42 +1325,6 @@ static int dtv_property_process_get(struct dvb_frontend *fe,
 	case DTV_DELIVERY_SYSTEM:
 		tvp->u.data = fe->dtv_property_cache.delivery_system;
 		break;
-#if 0
-	/* ISDB-T Support here */
-	case DTV_ISDB_SEGMENT_IDX:
-		tvp->u.data = fe->dtv_property_cache.isdb_segment_idx;
-		break;
-	case DTV_ISDB_SEGMENT_WIDTH:
-		tvp->u.data = fe->dtv_property_cache.isdb_segment_width;
-		break;
-	case DTV_ISDB_LAYERA_FEC:
-		tvp->u.data = fe->dtv_property_cache.isdb_layera_fec;
-		break;
-	case DTV_ISDB_LAYERA_MODULATION:
-		tvp->u.data = fe->dtv_property_cache.isdb_layera_modulation;
-		break;
-	case DTV_ISDB_LAYERA_SEGMENT_WIDTH:
-		tvp->u.data = fe->dtv_property_cache.isdb_layera_segment_width;
-		break;
-	case DTV_ISDB_LAYERB_FEC:
-		tvp->u.data = fe->dtv_property_cache.isdb_layerb_fec;
-		break;
-	case DTV_ISDB_LAYERB_MODULATION:
-		tvp->u.data = fe->dtv_property_cache.isdb_layerb_modulation;
-		break;
-	case DTV_ISDB_LAYERB_SEGMENT_WIDTH:
-		tvp->u.data = fe->dtv_property_cache.isdb_layerb_segment_width;
-		break;
-	case DTV_ISDB_LAYERC_FEC:
-		tvp->u.data = fe->dtv_property_cache.isdb_layerc_fec;
-		break;
-	case DTV_ISDB_LAYERC_MODULATION:
-		tvp->u.data = fe->dtv_property_cache.isdb_layerc_modulation;
-		break;
-	case DTV_ISDB_LAYERC_SEGMENT_WIDTH:
-		tvp->u.data = fe->dtv_property_cache.isdb_layerc_segment_width;
-		break;
-#endif
 	case DTV_VOLTAGE:
 		tvp->u.data = fe->dtv_property_cache.voltage;
 		break;
@@ -1356,6 +1349,59 @@ static int dtv_property_process_get(struct dvb_frontend *fe,
 	case DTV_HIERARCHY:
 		tvp->u.data = fe->dtv_property_cache.hierarchy;
 		break;
+
+	/* ISDB-T Support here */
+	case DTV_ISDBT_PARTIAL_RECEPTION:
+		tvp->u.data = fe->dtv_property_cache.isdbt_partial_reception;
+		break;
+	case DTV_ISDBT_SOUND_BROADCASTING:
+		tvp->u.data = fe->dtv_property_cache.isdbt_sb_mode;
+		break;
+	case DTV_ISDBT_SB_SUBCHANNEL_ID:
+		tvp->u.data = fe->dtv_property_cache.isdbt_sb_subchannel;
+		break;
+	case DTV_ISDBT_SB_SEGMENT_IDX:
+		tvp->u.data = fe->dtv_property_cache.isdbt_sb_segment_idx;
+		break;
+	case DTV_ISDBT_SB_SEGMENT_COUNT:
+		tvp->u.data = fe->dtv_property_cache.isdbt_sb_segment_count;
+		break;
+	case DTV_ISDBT_LAYERA_FEC:
+		tvp->u.data = fe->dtv_property_cache.layer[0].fec;
+		break;
+	case DTV_ISDBT_LAYERA_MODULATION:
+		tvp->u.data = fe->dtv_property_cache.layer[0].modulation;
+		break;
+	case DTV_ISDBT_LAYERA_SEGMENT_COUNT:
+		tvp->u.data = fe->dtv_property_cache.layer[0].segment_count;
+		break;
+	case DTV_ISDBT_LAYERA_TIME_INTERLEAVING:
+		tvp->u.data = fe->dtv_property_cache.layer[0].interleaving;
+		break;
+	case DTV_ISDBT_LAYERB_FEC:
+		tvp->u.data = fe->dtv_property_cache.layer[1].fec;
+		break;
+	case DTV_ISDBT_LAYERB_MODULATION:
+		tvp->u.data = fe->dtv_property_cache.layer[1].modulation;
+		break;
+	case DTV_ISDBT_LAYERB_SEGMENT_COUNT:
+		tvp->u.data = fe->dtv_property_cache.layer[1].segment_count;
+		break;
+	case DTV_ISDBT_LAYERB_TIME_INTERLEAVING:
+		tvp->u.data = fe->dtv_property_cache.layer[1].interleaving;
+		break;
+	case DTV_ISDBT_LAYERC_FEC:
+		tvp->u.data = fe->dtv_property_cache.layer[2].fec;
+		break;
+	case DTV_ISDBT_LAYERC_MODULATION:
+		tvp->u.data = fe->dtv_property_cache.layer[2].modulation;
+		break;
+	case DTV_ISDBT_LAYERC_SEGMENT_COUNT:
+		tvp->u.data = fe->dtv_property_cache.layer[2].segment_count;
+		break;
+	case DTV_ISDBT_LAYERC_TIME_INTERLEAVING:
+		tvp->u.data = fe->dtv_property_cache.layer[2].interleaving;
+		break;
 	default:
 		r = -1;
 	}
@@ -1384,10 +1430,8 @@ static int dtv_property_process_set(struct dvb_frontend *fe,
 		/* Reset a cache of data specific to the frontend here. This does
 		 * not effect hardware.
 		 */
+		dvb_frontend_clear_cache(fe);
 		dprintk("%s() Flushing property cache\n", __func__);
-		memset(&fe->dtv_property_cache, 0, sizeof(struct dtv_frontend_properties));
-		fe->dtv_property_cache.state = tvp->cmd;
-		fe->dtv_property_cache.delivery_system = SYS_UNDEFINED;
 		break;
 	case DTV_TUNE:
 		/* interpret the cache of data, build either a traditional frontend
@@ -1428,15 +1472,6 @@ static int dtv_property_process_set(struct dvb_frontend *fe,
 	case DTV_DELIVERY_SYSTEM:
 		fe->dtv_property_cache.delivery_system = tvp->u.data;
 		break;
-#if 0
-	/* ISDB-T Support here */
-	case DTV_ISDB_SEGMENT_IDX:
-		fe->dtv_property_cache.isdb_segment_idx = tvp->u.data;
-		break;
-	case DTV_ISDB_SEGMENT_WIDTH:
-		fe->dtv_property_cache.isdb_segment_width = tvp->u.data;
-		break;
-#endif
 	case DTV_VOLTAGE:
 		fe->dtv_property_cache.voltage = tvp->u.data;
 		r = dvb_frontend_ioctl_legacy(inode, file, FE_SET_VOLTAGE,
@@ -1462,6 +1497,59 @@ static int dtv_property_process_set(struct dvb_frontend *fe,
 	case DTV_HIERARCHY:
 		fe->dtv_property_cache.hierarchy = tvp->u.data;
 		break;
+
+	/* ISDB-T Support here */
+	case DTV_ISDBT_PARTIAL_RECEPTION:
+		fe->dtv_property_cache.isdbt_partial_reception = tvp->u.data;
+		break;
+	case DTV_ISDBT_SOUND_BROADCASTING:
+		fe->dtv_property_cache.isdbt_sb_mode = tvp->u.data;
+		break;
+	case DTV_ISDBT_SB_SUBCHANNEL_ID:
+		fe->dtv_property_cache.isdbt_sb_subchannel = tvp->u.data;
+		break;
+	case DTV_ISDBT_SB_SEGMENT_IDX:
+		fe->dtv_property_cache.isdbt_sb_segment_idx = tvp->u.data;
+		break;
+	case DTV_ISDBT_SB_SEGMENT_COUNT:
+		fe->dtv_property_cache.isdbt_sb_segment_count = tvp->u.data;
+		break;
+	case DTV_ISDBT_LAYERA_FEC:
+		fe->dtv_property_cache.layer[0].fec = tvp->u.data;
+		break;
+	case DTV_ISDBT_LAYERA_MODULATION:
+		fe->dtv_property_cache.layer[0].modulation = tvp->u.data;
+		break;
+	case DTV_ISDBT_LAYERA_SEGMENT_COUNT:
+		fe->dtv_property_cache.layer[0].segment_count = tvp->u.data;
+		break;
+	case DTV_ISDBT_LAYERA_TIME_INTERLEAVING:
+		fe->dtv_property_cache.layer[0].interleaving = tvp->u.data;
+		break;
+	case DTV_ISDBT_LAYERB_FEC:
+		fe->dtv_property_cache.layer[1].fec = tvp->u.data;
+		break;
+	case DTV_ISDBT_LAYERB_MODULATION:
+		fe->dtv_property_cache.layer[1].modulation = tvp->u.data;
+		break;
+	case DTV_ISDBT_LAYERB_SEGMENT_COUNT:
+		fe->dtv_property_cache.layer[1].segment_count = tvp->u.data;
+		break;
+	case DTV_ISDBT_LAYERB_TIME_INTERLEAVING:
+		fe->dtv_property_cache.layer[1].interleaving = tvp->u.data;
+		break;
+	case DTV_ISDBT_LAYERC_FEC:
+		fe->dtv_property_cache.layer[2].fec = tvp->u.data;
+		break;
+	case DTV_ISDBT_LAYERC_MODULATION:
+		fe->dtv_property_cache.layer[2].modulation = tvp->u.data;
+		break;
+	case DTV_ISDBT_LAYERC_SEGMENT_COUNT:
+		fe->dtv_property_cache.layer[2].segment_count = tvp->u.data;
+		break;
+	case DTV_ISDBT_LAYERC_TIME_INTERLEAVING:
+		fe->dtv_property_cache.layer[2].interleaving = tvp->u.data;
+		break;
 	default:
 		r = -1;
 	}
diff --git a/linux/drivers/media/dvb/dvb-core/dvb_frontend.h b/linux/drivers/media/dvb/dvb-core/dvb_frontend.h
index cff26dd66..9e46f1772 100644
--- a/linux/drivers/media/dvb/dvb-core/dvb_frontend.h
+++ b/linux/drivers/media/dvb/dvb-core/dvb_frontend.h
@@ -341,20 +341,20 @@ struct dtv_frontend_properties {
 	fe_rolloff_t		rolloff;
 
 	fe_delivery_system_t	delivery_system;
-#if 0
+
 	/* ISDB-T specifics */
-	u32			isdb_segment_idx;
-	u32			isdb_segment_width;
-	fe_code_rate_t		isdb_layera_fec;
-	fe_modulation_t		isdb_layera_modulation;
-	u32			isdb_layera_segment_width;
-	fe_code_rate_t		isdb_layerb_fec;
-	fe_modulation_t		isdb_layerb_modulation;
-	u32			isdb_layerb_segment_width;
-	fe_code_rate_t		isdb_layerc_fec;
-	fe_modulation_t		isdb_layerc_modulation;
-	u32			isdb_layerc_segment_width;
-#endif
+	u8			isdbt_partial_reception;
+	u8			isdbt_sb_mode;
+	u8			isdbt_sb_subchannel;
+	u32			isdbt_sb_segment_idx;
+	u32			isdbt_sb_segment_count;
+	u8			isdbt_layer_enabled;
+	struct {
+	    u8			segment_count;
+	    fe_code_rate_t	fec;
+	    fe_modulation_t	modulation;
+	    u8			interleaving;
+	} layer[3];
 };
 
 struct dvb_frontend {
-- 
cgit v1.2.3


From beae3fdb4940243ca65c75fea541535237e8e280 Mon Sep 17 00:00:00 2001
From: Patrick Boettcher <pboettcher@kernellabs.com>
Date: Fri, 14 Aug 2009 10:24:19 +0200
Subject: ISDB-T: add mapping of LAYER_ENABLED to frontend-cache

From: Patrick Boettcher <pboettcher@dibcom.fr>

It was forgotten to map the LAYER_ENABLED ioctl to the frontend-cache and back.

Priority: normal

Signed-off-by: Patrick Boettcher <pboettcher@dibcom.fr>
---
 linux/drivers/media/dvb/dvb-core/dvb_frontend.c | 8 ++++++++
 1 file changed, 8 insertions(+)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/dvb-core/dvb_frontend.c b/linux/drivers/media/dvb/dvb-core/dvb_frontend.c
index 52b0baa52..6f3491599 100644
--- a/linux/drivers/media/dvb/dvb-core/dvb_frontend.c
+++ b/linux/drivers/media/dvb/dvb-core/dvb_frontend.c
@@ -985,6 +985,7 @@ static struct dtv_cmds_h dtv_cmds[] = {
 	_DTV_CMD(DTV_ISDBT_SB_SUBCHANNEL_ID, 1, 0),
 	_DTV_CMD(DTV_ISDBT_SB_SEGMENT_IDX, 1, 0),
 	_DTV_CMD(DTV_ISDBT_SB_SEGMENT_COUNT, 1, 0),
+	_DTV_CMD(DTV_ISDBT_LAYER_ENABLED, 1, 0),
 	_DTV_CMD(DTV_ISDBT_LAYERA_FEC, 1, 0),
 	_DTV_CMD(DTV_ISDBT_LAYERA_MODULATION, 1, 0),
 	_DTV_CMD(DTV_ISDBT_LAYERA_SEGMENT_COUNT, 1, 0),
@@ -1003,6 +1004,7 @@ static struct dtv_cmds_h dtv_cmds[] = {
 	_DTV_CMD(DTV_ISDBT_SB_SUBCHANNEL_ID, 0, 0),
 	_DTV_CMD(DTV_ISDBT_SB_SEGMENT_IDX, 0, 0),
 	_DTV_CMD(DTV_ISDBT_SB_SEGMENT_COUNT, 0, 0),
+	_DTV_CMD(DTV_ISDBT_LAYER_ENABLED, 0, 0),
 	_DTV_CMD(DTV_ISDBT_LAYERA_FEC, 0, 0),
 	_DTV_CMD(DTV_ISDBT_LAYERA_MODULATION, 0, 0),
 	_DTV_CMD(DTV_ISDBT_LAYERA_SEGMENT_COUNT, 0, 0),
@@ -1366,6 +1368,9 @@ static int dtv_property_process_get(struct dvb_frontend *fe,
 	case DTV_ISDBT_SB_SEGMENT_COUNT:
 		tvp->u.data = fe->dtv_property_cache.isdbt_sb_segment_count;
 		break;
+	case DTV_ISDBT_LAYER_ENABLED:
+		tvp->u.data = fe->dtv_property_cache.isdbt_layer_enabled;
+		break;
 	case DTV_ISDBT_LAYERA_FEC:
 		tvp->u.data = fe->dtv_property_cache.layer[0].fec;
 		break;
@@ -1514,6 +1519,9 @@ static int dtv_property_process_set(struct dvb_frontend *fe,
 	case DTV_ISDBT_SB_SEGMENT_COUNT:
 		fe->dtv_property_cache.isdbt_sb_segment_count = tvp->u.data;
 		break;
+	case DTV_ISDBT_LAYER_ENABLED:
+		fe->dtv_property_cache.isdbt_layer_enabled = tvp->u.data;
+		break;
 	case DTV_ISDBT_LAYERA_FEC:
 		fe->dtv_property_cache.layer[0].fec = tvp->u.data;
 		break;
-- 
cgit v1.2.3


From dad399b7c716c3c9da58c47f1dca59627a7d23f5 Mon Sep 17 00:00:00 2001
From:  <>
Date: Mon, 3 Aug 2009 18:43:40 +0200
Subject: DiB0070: Update to latest internal release

From: Patrick Boettcher <Patrick.Boettcher@dibcom.fr>

General update of the dib0070-driver based on DiBcom's latest release.

New driver features can enable better performance in some reception situations.

Priority: normal

Signed-off-by: Patrick Boettcher <Patrick.Boettcher@dibcom.fr>
---
 linux/drivers/media/dvb/dvb-usb/dib0700_devices.c |   7 +-
 linux/drivers/media/dvb/frontends/dib0070.c       | 674 +++++++++++++---------
 linux/drivers/media/dvb/frontends/dib0070.h       |  11 +
 3 files changed, 407 insertions(+), 285 deletions(-)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c b/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c
index 81cda8061..216bdbbf7 100644
--- a/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c
+++ b/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c
@@ -1096,11 +1096,13 @@ static struct dibx000_agc_config dib7070_agc_config = {
 
 static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff)
 {
+	deb_info("reset: %d", onoff);
 	return dib7000p_set_gpio(fe, 8, 0, !onoff);
 }
 
 static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff)
 {
+	deb_info("sleep: %d", onoff);
 	return dib7000p_set_gpio(fe, 9, 0, onoff);
 }
 
@@ -1110,13 +1112,14 @@ static struct dib0070_config dib7070p_dib0070_config[2] = {
 		.reset = dib7070_tuner_reset,
 		.sleep = dib7070_tuner_sleep,
 		.clock_khz = 12000,
-		.clock_pad_drive = 4
+		.clock_pad_drive = 4,
+		.charge_pump = 2,
 	}, {
 		.i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
 		.reset = dib7070_tuner_reset,
 		.sleep = dib7070_tuner_sleep,
 		.clock_khz = 12000,
-
+		.charge_pump = 2,
 	}
 };
 
diff --git a/linux/drivers/media/dvb/frontends/dib0070.c b/linux/drivers/media/dvb/frontends/dib0070.c
index 7dd131fb3..4f06f4f64 100644
--- a/linux/drivers/media/dvb/frontends/dib0070.c
+++ b/linux/drivers/media/dvb/frontends/dib0070.c
@@ -1,15 +1,31 @@
 /*
  * Linux-DVB Driver for DiBcom's DiB0070 base-band RF Tuner.
  *
- * Copyright (C) 2005-7 DiBcom (http://www.dibcom.fr/)
+ * Copyright (C) 2005-9 DiBcom (http://www.dibcom.fr/)
  *
  * This program is free software; you can redistribute it and/or
- *	modify it under the terms of the GNU General Public License as
- *	published by the Free Software Foundation, version 2.
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ *
+ * This code is more or less generated from another driver, please
+ * excuse some codingstyle oddities.
+ *
  */
+
 #include <linux/kernel.h>
 #include <linux/i2c.h>
-#include "compat.h"
 
 #include "dvb_frontend.h"
 
@@ -20,19 +36,57 @@ static int debug;
 module_param(debug, int, 0644);
 MODULE_PARM_DESC(debug, "turn on debugging (default: 0)");
 
-#define dprintk(args...) do { if (debug) { printk(KERN_DEBUG "DiB0070: "); printk(args); printk("\n"); } } while (0)
+#define dprintk(args...) do { \
+	if (debug) { \
+		printk(KERN_DEBUG "DiB0070: "); \
+		printk(args); \
+		printk("\n"); \
+	} \
+} while (0)
 
 #define DIB0070_P1D  0x00
 #define DIB0070_P1F  0x01
 #define DIB0070_P1G  0x03
 #define DIB0070S_P1A 0x02
 
+enum frontend_tune_state {
+    CT_TUNER_START = 10,
+    CT_TUNER_STEP_0,
+    CT_TUNER_STEP_1,
+    CT_TUNER_STEP_2,
+    CT_TUNER_STEP_3,
+    CT_TUNER_STEP_4,
+    CT_TUNER_STEP_5,
+    CT_TUNER_STEP_6,
+    CT_TUNER_STEP_7,
+    CT_TUNER_STOP,
+};
+
+#define FE_CALLBACK_TIME_NEVER 0xffffffff
+
 struct dib0070_state {
 	struct i2c_adapter *i2c;
 	struct dvb_frontend *fe;
 	const struct dib0070_config *cfg;
 	u16 wbd_ff_offset;
 	u8 revision;
+
+    enum frontend_tune_state tune_state;
+    u32 current_rf;
+
+    /* for the captrim binary search */
+	s8 step;
+	u16 adc_diff;
+
+	s8 captrim;
+	s8 fcaptrim;
+	u16 lo4;
+
+	const struct dib0070_tuning *current_tune_table_index;
+	const struct dib0070_lna_match *lna_match;
+
+    u8  wbd_gain_current;
+	u16 wbd_offset_3_3[2];
 };
 
 static uint16_t dib0070_read_reg(struct dib0070_state *state, u8 reg)
@@ -60,55 +114,71 @@ static int dib0070_write_reg(struct dib0070_state *state, u8 reg, u16 val)
 	return 0;
 }
 
-#define HARD_RESET(state) do { if (state->cfg->reset) { state->cfg->reset(state->fe,1); msleep(10); state->cfg->reset(state->fe,0); msleep(10); } } while (0)
+#define HARD_RESET(state) do { \
+    state->cfg->sleep(state->fe, 0); \
+    if (state->cfg->reset) { \
+	state->cfg->reset(state->fe,1); msleep(10); \
+	state->cfg->reset(state->fe,0); msleep(10); \
+    } \
+} while (0)
 
 static int dib0070_set_bandwidth(struct dvb_frontend *fe, struct dvb_frontend_parameters *ch)
 {
-	struct dib0070_state *st = fe->tuner_priv;
-	u16 tmp = 0;
-	tmp = dib0070_read_reg(st, 0x02) & 0x3fff;
-
-    switch(BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth)) {
-		case  8000:
-			tmp |= (0 << 14);
-			break;
-		case  7000:
-			tmp |= (1 << 14);
-			break;
-	case  6000:
-			tmp |= (2 << 14);
-			break;
-	case 5000:
-		default:
-			tmp |= (3 << 14);
-			break;
-	}
-	dib0070_write_reg(st, 0x02, tmp);
+    struct dib0070_state *st = fe->tuner_priv;
+    u16 tmp = dib0070_read_reg(st, 0x02) & 0x3fff;
+
+    if (fe->dtv_property_cache.bandwidth_hz/1000 > 7000)
+	tmp |= (0 << 14);
+    else if (fe->dtv_property_cache.bandwidth_hz/1000 > 6000)
+	tmp |= (1 << 14);
+    else if (fe->dtv_property_cache.bandwidth_hz/1000 > 5000)
+	tmp |= (2 << 14);
+    else
+	tmp |= (3 << 14);
+
+    dib0070_write_reg(st, 0x02, tmp);
+
+    /* sharpen the BB filter in ISDB-T to have higher immunity to adjacent channels */
+    if (fe->dtv_property_cache.delivery_system == SYS_ISDBT) {
+	u16 value = dib0070_read_reg(st, 0x17);
+
+	dib0070_write_reg(st, 0x17, value & 0xfffc);
+	tmp = dib0070_read_reg(st, 0x01) & 0x01ff;
+	dib0070_write_reg(st, 0x01, tmp | (60 << 9));
+
+	dib0070_write_reg(st, 0x17, value);
+    }
 	return 0;
 }
 
-static void dib0070_captrim(struct dib0070_state *st, u16 LO4)
+static int dib0070_captrim(struct dib0070_state *st, enum frontend_tune_state *tune_state)
 {
-	int8_t captrim, fcaptrim, step_sign, step;
-	u16 adc, adc_diff = 3000;
+	int8_t step_sign;
+	u16 adc;
+	int ret = 0;
 
+	if (*tune_state == CT_TUNER_STEP_0) {
 
+		dib0070_write_reg(st, 0x0f, 0xed10);
+		dib0070_write_reg(st, 0x17,    0x0034);
 
-	dib0070_write_reg(st, 0x0f, 0xed10);
-	dib0070_write_reg(st, 0x17,    0x0034);
+		dib0070_write_reg(st, 0x18, 0x0032);
+		st->step = st->captrim = st->fcaptrim = 64;
+		st->adc_diff = 3000;
+		ret = 20;
 
-	dib0070_write_reg(st, 0x18, 0x0032);
-	msleep(2);
+	*tune_state = CT_TUNER_STEP_1;
+	} else if (*tune_state == CT_TUNER_STEP_1) {
+		st->step /= 2;
+		dib0070_write_reg(st, 0x14, st->lo4 | st->captrim);
+		ret = 15;
 
-	step = captrim = fcaptrim = 64;
+		*tune_state = CT_TUNER_STEP_2;
+	} else if (*tune_state == CT_TUNER_STEP_2) {
 
-	do {
-		step /= 2;
-		dib0070_write_reg(st, 0x14, LO4 | captrim);
-		msleep(1);
 		adc = dib0070_read_reg(st, 0x19);
 
-		dprintk( "CAPTRIM=%hd; ADC = %hd (ADC) & %dmV", captrim, adc, (u32) adc*(u32)1800/(u32)1024);
+		dprintk( "CAPTRIM=%hd; ADC = %hd (ADC) & %dmV", st->captrim, adc, (u32) adc*(u32)1800/(u32)1024);
 
 		if (adc >= 400) {
 			adc -= 400;
@@ -118,266 +188,305 @@ static void dib0070_captrim(struct dib0070_state *st, u16 LO4)
 			step_sign = 1;
 		}
 
-		if (adc < adc_diff) {
-			dprintk( "CAPTRIM=%hd is closer to target (%hd/%hd)", captrim, adc, adc_diff);
-			adc_diff = adc;
-			fcaptrim = captrim;
+		if (adc < st->adc_diff) {
+			dprintk( "CAPTRIM=%hd is closer to target (%hd/%hd)", st->captrim, adc, st->adc_diff);
+			st->adc_diff = adc;
+			st->fcaptrim = st->captrim;
 
 
 
 		}
-		captrim += (step_sign * step);
-	} while (step >= 1);
+		st->captrim += (step_sign * st->step);
+
+		if (st->step >= 1)
+			*tune_state = CT_TUNER_STEP_1;
+		else
+			*tune_state = CT_TUNER_STEP_3;
+
+	} else if (*tune_state == CT_TUNER_STEP_3) {
+		dib0070_write_reg(st, 0x14, st->lo4 | st->fcaptrim);
+		dib0070_write_reg(st, 0x18, 0x07ff);
+		*tune_state = CT_TUNER_STEP_4;
+	}
 
-	dib0070_write_reg(st, 0x14, LO4 | fcaptrim);
-	dib0070_write_reg(st, 0x18, 0x07ff);
+	return ret;
 }
 
-#define LPF	100                       // define for the loop filter 100kHz by default 16-07-06
-#define LO4_SET_VCO_HFDIV(l, v, h)   l |= ((v) << 11) | ((h) << 7)
-#define LO4_SET_SD(l, s)             l |= ((s) << 14) | ((s) << 12)
-#define LO4_SET_CTRIM(l, c)          l |=  (c) << 10
-static int dib0070_tune_digital(struct dvb_frontend *fe, struct dvb_frontend_parameters *ch)
+static int dib0070_set_ctrl_lo5(struct dvb_frontend *fe, u8 vco_bias_trim, u8 hf_div_trim, u8 cp_current, u8 third_order_filt)
 {
-	struct dib0070_state *st = fe->tuner_priv;
-	u32 freq = ch->frequency/1000 + (BAND_OF_FREQUENCY(ch->frequency/1000) == BAND_VHF ? st->cfg->freq_offset_khz_vhf : st->cfg->freq_offset_khz_uhf);
+	struct dib0070_state *state = fe->tuner_priv;
+    u16 lo5 = (third_order_filt << 14) | (0 << 13) | (1 << 12) | (3 << 9) | (cp_current << 6) | (hf_div_trim << 3) | (vco_bias_trim << 0);
+	dprintk( "CTRL_LO5: 0x%x", lo5);
+	return dib0070_write_reg(state, 0x15, lo5);
+}
 
-	u8 band = BAND_OF_FREQUENCY(freq), c;
+struct dib0070_tuning
+{
+    u32 max_freq; /* for every frequency less than or equal to that field: this information is correct */
+    u8 switch_trim;
+    u8 vco_band;
+    u8 hfdiv;
+    u8 vco_multi;
+    u8 presc;
+    u8 wbdmux;
+    u16 tuner_enable;
+};
 
-	/*******************VCO***********************************/
-	u16 lo4 = 0;
+struct dib0070_lna_match
+{
+    u32 max_freq; /* for every frequency less than or equal to that field: this information is correct */
+    u8 lna_band;
+};
 
-	u8 REFDIV, PRESC = 2;
-	u32 FBDiv, Rest, FREF, VCOF_kHz;
-	u16 Num, Den;
-	/*******************FrontEnd******************************/
-	u16 value = 0;
+static const struct dib0070_tuning dib0070s_tuning_table[] =
 
-	dprintk( "Tuning for Band: %hd (%d kHz)", band, freq);
+{
+    {     570000, 2, 1, 3, 6, 6, 2, 0x4000 | 0x0800 }, /* UHF */
+    {     700000, 2, 0, 2, 4, 2, 2, 0x4000 | 0x0800 },
+    {     863999, 2, 1, 2, 4, 2, 2, 0x4000 | 0x0800 },
+    {    1500000, 0, 1, 1, 2, 2, 4, 0x2000 | 0x0400 }, /* LBAND */
+    {    1600000, 0, 1, 1, 2, 2, 4, 0x2000 | 0x0400 },
+    {    2000000, 0, 1, 1, 2, 2, 4, 0x2000 | 0x0400 },
+    { 0xffffffff, 0, 0, 8, 1, 2, 1, 0x8000 | 0x1000 }, /* SBAND */
+};
 
+static const struct dib0070_tuning dib0070_tuning_table[] =
 
-	dib0070_write_reg(st, 0x17, 0x30);
+{
+    {     115000, 1, 0, 7, 24, 2, 1, 0x8000 | 0x1000 }, /* FM below 92MHz cannot be tuned */
+    {     179500, 1, 0, 3, 16, 2, 1, 0x8000 | 0x1000 }, /* VHF */
+    {     189999, 1, 1, 3, 16, 2, 1, 0x8000 | 0x1000 },
+    {     250000, 1, 0, 6, 12, 2, 1, 0x8000 | 0x1000 },
+    {     569999, 2, 1, 5,  6, 2, 2, 0x4000 | 0x0800 }, /* UHF */
+    {     699999, 2, 0 ,1,  4, 2, 2, 0x4000 | 0x0800 },
+    {     863999, 2, 1, 1,  4, 2, 2, 0x4000 | 0x0800 },
+    { 0xffffffff, 0, 1, 0,  2, 2, 4, 0x2000 | 0x0400 }, /* LBAND or everything higher than UHF */
+};
 
-	dib0070_set_bandwidth(fe, ch);	/* c is used as HF */
-	switch (st->revision) {
-		case DIB0070S_P1A:
-			switch (band) {
-				case BAND_LBAND:
-					LO4_SET_VCO_HFDIV(lo4, 1, 1);
-					c = 2;
-					break;
-				case BAND_SBAND:
-					LO4_SET_VCO_HFDIV(lo4, 0, 0);
-					LO4_SET_CTRIM(lo4, 1);
-					c = 1;
-					break;
-				case BAND_UHF:
-				default:
-					if (freq < 570000) {
-						LO4_SET_VCO_HFDIV(lo4, 1, 3);
-						PRESC = 6; c = 6;
-					} else if (freq < 680000) {
-						LO4_SET_VCO_HFDIV(lo4, 0, 2);
-						c = 4;
-					} else {
-						LO4_SET_VCO_HFDIV(lo4, 1, 2);
-						c = 4;
-					}
-					break;
-			} break;
-
-		case DIB0070_P1G:
-		case DIB0070_P1F:
-		default:
-			switch (band) {
-				case BAND_FM:
-						LO4_SET_VCO_HFDIV(lo4, 0, 7);
-						c = 24;
-					break;
-				case BAND_LBAND:
-						LO4_SET_VCO_HFDIV(lo4, 1, 0);
-						c = 2;
-					break;
-				case BAND_VHF:
-					if (freq < 180000) {
-						LO4_SET_VCO_HFDIV(lo4, 0, 3);
-						c = 16;
-					} else if (freq < 190000) {
-						LO4_SET_VCO_HFDIV(lo4, 1, 3);
-						c = 16;
-					} else {
-						LO4_SET_VCO_HFDIV(lo4, 0, 6);
-						c = 12;
-					}
-					break;
-
-				case BAND_UHF:
-				default:
-					if (freq < 570000) {
-						LO4_SET_VCO_HFDIV(lo4, 1, 5);
-						c = 6;
-					} else if (freq < 700000) {
-						LO4_SET_VCO_HFDIV(lo4, 0, 1);
-						c = 4;
-					} else {
-						LO4_SET_VCO_HFDIV(lo4, 1, 1);
-						c = 4;
-					}
-					break;
-			}
-		break;
-	}
+static const struct dib0070_lna_match dib0070_lna_flip_chip[] =
 
-	dprintk( "HFDIV code: %hd", (lo4 >> 7) & 0xf);
-	dprintk( "VCO = %hd", (lo4 >> 11) & 0x3);
+{
+    {     180000, 0 }, /* VHF */
+    {     188000, 1 },
+    {     196400, 2 },
+    {     250000, 3 },
+    {     550000, 0 }, /* UHF */
+    {     590000, 1 },
+    {     666000, 3 },
+    {     864000, 5 },
+    {    1500000, 0 }, /* LBAND or everything higher than UHF */
+    {    1600000, 1 },
+    {    2000000, 3 },
+    { 0xffffffff, 7 },
+};
 
+static const struct dib0070_lna_match dib0070_lna[] =
+
+{
+    {     180000, 0 }, /* VHF */
+    {     188000, 1 },
+    {     196400, 2 },
+    {     250000, 3 },
+    {     550000, 2 }, /* UHF */
+    {     650000, 3 },
+    {     750000, 5 },
+    {     850000, 6 },
+    {     864000, 7 },
+    {    1500000, 0 }, /* LBAND or everything higher than UHF */
+    {    1600000, 1 },
+    {    2000000, 3 },
+    { 0xffffffff, 7 },
+};
+
+#define LPF	100                       // define for the loop filter 100kHz by default 16-07-06
+static int dib0070_tune_digital(struct dvb_frontend *fe, struct dvb_frontend_parameters *ch)
+{
+    struct dib0070_state *st = fe->tuner_priv;
+
+    const struct dib0070_tuning *tune;
+    const struct dib0070_lna_match *lna_match;
+
+    enum frontend_tune_state *tune_state = &st->tune_state;
+    int ret = 10; /* 1ms is the default delay most of the time */
+
+    u8  band = (u8)BAND_OF_FREQUENCY(ch->frequency/1000);
+    u32 freq = ch->frequency/1000 + (band == BAND_VHF ? st->cfg->freq_offset_khz_vhf : st->cfg->freq_offset_khz_uhf);
 
-	VCOF_kHz = (c * freq) * 2;
-	dprintk( "VCOF in kHz: %d ((%hd*%d) << 1))",VCOF_kHz, c, freq);
 
-	switch (band) {
-		case BAND_VHF:
-			REFDIV = (u8) ((st->cfg->clock_khz + 9999) / 10000);
-			break;
-		case BAND_FM:
-			REFDIV = (u8) ((st->cfg->clock_khz) / 1000);
-			break;
-		default:
-			REFDIV = (u8) ( st->cfg->clock_khz  / 10000);
-			break;
-	}
-	FREF = st->cfg->clock_khz / REFDIV;
 
-	dprintk( "REFDIV: %hd, FREF: %d", REFDIV, FREF);
 
 
+#ifdef CONFIG_STANDARD_ISDBT
+    if (fe->dtv_property_cache.delivery_system == SYS_ISDBT && ch->u.isdbt.sb_mode == 1)
+	if ( ( (ch->u.isdbt.sb_conn_total_seg % 2)       && (ch->u.isdbt.sb_wanted_seg == ((ch->u.isdbt.sb_conn_total_seg/2) + 1) ) ) ||
+	   ( ( (ch->u.isdbt.sb_conn_total_seg % 2) == 0) && (ch->u.isdbt.sb_wanted_seg ==  (ch->u.isdbt.sb_conn_total_seg/2)      ) ) ||
+	   ( ( (ch->u.isdbt.sb_conn_total_seg % 2) == 0) && (ch->u.isdbt.sb_wanted_seg == ((ch->u.isdbt.sb_conn_total_seg/2)+1))) )
+	    freq += 850;
+#endif
+    if (st->current_rf != freq) {
 
 	switch (st->revision) {
-		case DIB0070S_P1A:
-			FBDiv = (VCOF_kHz / PRESC / FREF);
-			Rest  = (VCOF_kHz / PRESC) - FBDiv * FREF;
-			break;
-
-		case DIB0070_P1G:
-		case DIB0070_P1F:
-		default:
-			FBDiv = (freq / (FREF / 2));
-			Rest  = 2 * freq - FBDiv * FREF;
-			break;
+	case DIB0070S_P1A:
+	    tune = dib0070s_tuning_table;
+	    lna_match = dib0070_lna;
+	    break;
+	default:
+	    tune = dib0070_tuning_table;
+	    if (st->cfg->flip_chip)
+		lna_match = dib0070_lna_flip_chip;
+	    else
+		lna_match = dib0070_lna;
+	    break;
 	}
+	while (freq > tune->max_freq) /* find the right one */
+	    tune++;
+	while (freq > lna_match->max_freq) /* find the right one */
+	    lna_match++;
 
+	st->current_tune_table_index = tune;
+	st->lna_match = lna_match;
+    }
 
-	     if (Rest < LPF)              Rest = 0;
-	else if (Rest < 2 * LPF)          Rest = 2 * LPF;
-	else if (Rest > (FREF - LPF))   { Rest = 0 ; FBDiv += 1; }
-	else if (Rest > (FREF - 2 * LPF)) Rest = FREF - 2 * LPF;
-	Rest = (Rest * 6528) / (FREF / 10);
-	dprintk( "FBDIV: %d, Rest: %d", FBDiv, Rest);
+    if (*tune_state == CT_TUNER_START) {
+	dprintk( "Tuning for Band: %hd (%d kHz)", band, freq);
+	if (st->current_rf != freq) {
+	    u8 REFDIV;
+	    u32 FBDiv, Rest, FREF, VCOF_kHz;
+	    u8 Den;
 
-	Num = 0;
-	Den = 1;
+	    st->current_rf = freq;
+	    st->lo4 = (st->current_tune_table_index->vco_band << 11) | (st->current_tune_table_index->hfdiv << 7);
 
-	if (Rest > 0) {
-		LO4_SET_SD(lo4, 1);
-		Den = 255;
-		Num = (u16)Rest;
-	}
-	dprintk( "Num: %hd, Den: %hd, SD: %hd",Num, Den, (lo4 >> 12) & 0x1);
 
+	    dib0070_write_reg(st, 0x17, 0x30);
 
 
-	dib0070_write_reg(st, 0x11, (u16)FBDiv);
+	    VCOF_kHz = st->current_tune_table_index->vco_multi * freq * 2;
 
+	    switch (band) {
+	    case BAND_VHF:
+		REFDIV = (u8) ((st->cfg->clock_khz + 9999) / 10000);
+		break;
+	    case BAND_FM:
+		REFDIV = (u8) ((st->cfg->clock_khz) / 1000);
+		break;
+	    default:
+		REFDIV = (u8) ( st->cfg->clock_khz  / 10000);
+		break;
+	    }
+	    FREF = st->cfg->clock_khz / REFDIV;
 
-	dib0070_write_reg(st, 0x12, (Den << 8) | REFDIV);
 
 
-	dib0070_write_reg(st, 0x13, Num);
+	    switch (st->revision) {
+	    case DIB0070S_P1A:
+		FBDiv = (VCOF_kHz / st->current_tune_table_index->presc / FREF);
+		Rest  = (VCOF_kHz / st->current_tune_table_index->presc) - FBDiv * FREF;
+		break;
 
+	    case DIB0070_P1G:
+	    case DIB0070_P1F:
+	    default:
+		FBDiv = (freq / (FREF / 2));
+		Rest  = 2 * freq - FBDiv * FREF;
+		break;
+	    }
 
-	value = 0x0040 | 0x0020 | 0x0010 | 0x0008 | 0x0002 | 0x0001;
 
-	switch (band) {
-		case BAND_UHF:   value |= 0x4000 | 0x0800; break;
-		case BAND_LBAND: value |= 0x2000 | 0x0400; break;
-		default:         value |= 0x8000 | 0x1000; break;
-	}
-	dib0070_write_reg(st, 0x20, value);
+	    if (Rest < LPF)              Rest = 0;
+	    else if (Rest < 2 * LPF)          Rest = 2 * LPF;
+	    else if (Rest > (FREF - LPF))   { Rest = 0 ; FBDiv += 1; }
+	    else if (Rest > (FREF - 2 * LPF)) Rest = FREF - 2 * LPF;
+	    Rest = (Rest * 6528) / (FREF / 10);
 
-	dib0070_captrim(st, lo4);
-	if (st->revision == DIB0070S_P1A) {
-		if (band == BAND_SBAND)
-			dib0070_write_reg(st, 0x15, 0x16e2);
-		else
-			dib0070_write_reg(st, 0x15, 0x56e5);
-	}
+	    Den = 1;
+	    if (Rest > 0) {
+		st->lo4 |= (1 << 14) | (1 << 12);
+		Den = 255;
+	    }
 
 
+	    dib0070_write_reg(st, 0x11, (u16)FBDiv);
+	    dib0070_write_reg(st, 0x12, (Den << 8) | REFDIV);
+	    dib0070_write_reg(st, 0x13, (u16) Rest);
 
-	switch (band) {
-		case BAND_UHF:   value = 0x7c82; break;
-		case BAND_LBAND: value = 0x7c84; break;
-		default:         value = 0x7c81; break;
-	}
-	dib0070_write_reg(st, 0x0f, value);
-	dib0070_write_reg(st, 0x06, 0x3fff);
+	    if (st->revision == DIB0070S_P1A) {
 
-	/* Front End */
-	/* c == TUNE, value = SWITCH */
-	c = 0;
-	value = 0;
-	switch (band) {
-		case BAND_FM:
-			c = 0; value = 1;
-		break;
+		if (band == BAND_SBAND) {
+		    dib0070_set_ctrl_lo5(fe, 2, 4, 3, 0);
+		    dib0070_write_reg(st, 0x1d,0xFFFF);
+		} else
+		    dib0070_set_ctrl_lo5(fe, 5, 4, 3, 1);
+	    }
 
-		case BAND_VHF:
-			if (freq <= 180000) c = 0;
-			else if (freq <= 188200) c = 1;
-			else if (freq <= 196400) c = 2;
-			else c = 3;
-			value = 1;
-		break;
 
-		case BAND_LBAND:
-			if (freq <= 1500000) c = 0;
-			else if (freq <= 1600000) c = 1;
-			else c = 3;
-		break;
+	    dib0070_write_reg(st, 0x20, 0x0040 | 0x0020 | 0x0010 | 0x0008 | 0x0002 | 0x0001 | st->current_tune_table_index->tuner_enable);
 
-		case BAND_SBAND:
-			c = 7;
-			dib0070_write_reg(st, 0x1d,0xFFFF);
-		break;
+	    dprintk( "REFDIV: %hd, FREF: %d", REFDIV, FREF);
+	    dprintk( "FBDIV: %d, Rest: %d", FBDiv, Rest);
+	    dprintk( "Num: %hd, Den: %hd, SD: %hd",(u16) Rest, Den, (st->lo4 >> 12) & 0x1);
+	    dprintk( "HFDIV code: %hd", st->current_tune_table_index->hfdiv);
+	    dprintk( "VCO = %hd", st->current_tune_table_index->vco_band);
+	    dprintk( "VCOF: ((%hd*%d) << 1))", st->current_tune_table_index->vco_multi, freq);
 
-		case BAND_UHF:
-		default:
-			if (st->cfg->flip_chip) {
-				if (freq <= 550000) c = 0;
-				else if (freq <= 590000) c = 1;
-				else if (freq <= 666000) c = 3;
-				else c = 5;
-			} else {
-				if (freq <= 550000) c = 2;
-				else if (freq <= 650000) c = 3;
-				else if (freq <= 750000) c = 5;
-				else if (freq <= 850000) c = 6;
-				else c = 7;
-			}
-			value = 2;
-		break;
+	    *tune_state = CT_TUNER_STEP_0;
+	} else { /* we are already tuned to this frequency - the configuration is correct  */
+	    ret = 50; /* wakeup time */
+	    *tune_state = CT_TUNER_STEP_5;
+	}
+    } else if ((*tune_state > CT_TUNER_START) && (*tune_state < CT_TUNER_STEP_4)) {
+
+	ret = dib0070_captrim(st, tune_state);
+
+    } else if (*tune_state == CT_TUNER_STEP_4) {
+	const struct dib0070_wbd_gain_cfg *tmp = st->cfg->wbd_gain;
+	if (tmp != NULL) {
+	    while (freq/1000 > tmp->freq) /* find the right one */
+		tmp++;
+	    dib0070_write_reg(st, 0x0f, (0 << 15) | (1 << 14) | (3 << 12) | (tmp->wbd_gain_val << 9) | (0 << 8) | (1 << 7) | (st->current_tune_table_index->wbdmux << 0));
+	    st->wbd_gain_current = tmp->wbd_gain_val;
+	} else {
+	    dib0070_write_reg(st, 0x0f, (0 << 15) | (1 << 14) | (3 << 12) | (6 << 9) | (0 << 8) | (1 << 7) | (st->current_tune_table_index->wbdmux << 0));
+	    st->wbd_gain_current = 6;
 	}
 
-	/* default: LNA_MATCH=7, BIAS=3 */
-	dib0070_write_reg(st, 0x07, (value << 11) | (7 << 8) | (c << 3) | (3 << 0));
-	dib0070_write_reg(st, 0x08, (c << 10) | (3 << 7) | (127));
+	dib0070_write_reg(st, 0x06, 0x3fff);
+	dib0070_write_reg(st, 0x07, (st->current_tune_table_index->switch_trim << 11) | (7 << 8) | (st->lna_match->lna_band << 3) | (3 << 0));
+	dib0070_write_reg(st, 0x08, (st->lna_match->lna_band << 10) | (3 << 7) | (127));
 	dib0070_write_reg(st, 0x0d, 0x0d80);
 
 
 	dib0070_write_reg(st, 0x18,   0x07ff);
 	dib0070_write_reg(st, 0x17, 0x0033);
 
-	return 0;
+
+	*tune_state = CT_TUNER_STEP_5;
+    } else if (*tune_state == CT_TUNER_STEP_5) {
+	dib0070_set_bandwidth(fe, ch);
+	*tune_state = CT_TUNER_STOP;
+    } else {
+	ret = FE_CALLBACK_TIME_NEVER; /* tuner finished, time to call again infinite */
+    }
+    return ret;
+}
+
+
+static int dib0070_tune(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)
+{
+    struct dib0070_state *state = fe->tuner_priv;
+    uint32_t ret;
+
+    state->tune_state = CT_TUNER_START;
+
+    do {
+	ret = dib0070_tune_digital(fe, p);
+	if (ret != FE_CALLBACK_TIME_NEVER)
+	    msleep(ret/10);
+	else
+	    break;
+    } while (state->tune_state != CT_TUNER_STOP);
+
+    return 0;
 }
 
 static int dib0070_wakeup(struct dvb_frontend *fe)
@@ -396,7 +505,7 @@ static int dib0070_sleep(struct dvb_frontend *fe)
 	return 0;
 }
 
-static u16 dib0070_p1f_defaults[] =
+static const u16 dib0070_p1f_defaults[] =
 
 {
 	7, 0x02,
@@ -435,45 +544,40 @@ static u16 dib0070_p1f_defaults[] =
 	0,
 };
 
-static void dib0070_wbd_calibration(struct dvb_frontend *fe)
+static u16 dib0070_read_wbd_offset(struct dib0070_state *state, u8 gain)
 {
-	u16 wbd_offs;
-	struct dib0070_state *state = fe->tuner_priv;
-
-	if (state->cfg->sleep)
-		state->cfg->sleep(fe, 0);
-
-	dib0070_write_reg(state, 0x0f, 0x6d81);
-	dib0070_write_reg(state, 0x20, 0x0040 | 0x0020 | 0x0010 | 0x0008 | 0x0002 | 0x0001);
-	msleep(9);
-	wbd_offs = dib0070_read_reg(state, 0x19);
-	dib0070_write_reg(state, 0x20, 0);
-	state->wbd_ff_offset = ((wbd_offs * 8 * 18 / 33 + 1) / 2);
-	dprintk( "WBDStart = %d (Vargen) - FF = %hd", (u32) wbd_offs * 1800/1024, state->wbd_ff_offset);
-
-	if (state->cfg->sleep)
-		state->cfg->sleep(fe, 1);
+    u16 tuner_en = dib0070_read_reg(state, 0x20);
+    u16 offset;
+
+    dib0070_write_reg(state, 0x18, 0x07ff);
+    dib0070_write_reg(state, 0x20, 0x0800 | 0x4000 | 0x0040 | 0x0020 | 0x0010 | 0x0008 | 0x0002 | 0x0001);
+    dib0070_write_reg(state, 0x0f, (1 << 14) | (2 << 12) | (gain << 9) | (1 << 8) | (1 << 7) | (0 << 0));
+    msleep(9);
+    offset = dib0070_read_reg(state, 0x19);
+    dib0070_write_reg(state, 0x20, tuner_en);
+    return offset;
+}
 
+static void dib0070_wbd_offset_calibration(struct dib0070_state *state)
+{
+    u8 gain;
+    for (gain = 6; gain < 8; gain++) {
+	state->wbd_offset_3_3[gain - 6] = ((dib0070_read_wbd_offset(state, gain) * 8 * 18 / 33 + 1) / 2);
+	dprintk( "Gain: %d, WBDOffset (3.3V) = %hd", gain, state->wbd_offset_3_3[gain-6]);
+    }
 }
 
 u16 dib0070_wbd_offset(struct dvb_frontend *fe)
 {
 	struct dib0070_state *st = fe->tuner_priv;
-	return st->wbd_ff_offset;
+	return st->wbd_offset_3_3[st->wbd_gain_current - 6];
 }
 
 EXPORT_SYMBOL(dib0070_wbd_offset);
-static int dib0070_set_ctrl_lo5(struct dvb_frontend *fe, u8 vco_bias_trim, u8 hf_div_trim, u8 cp_current, u8 third_order_filt)
-{
-	struct dib0070_state *state = fe->tuner_priv;
-    u16 lo5 = (third_order_filt << 14) | (0 << 13) | (1 << 12) | (3 << 9) | (cp_current << 6) | (hf_div_trim << 3) | (vco_bias_trim << 0);
-	dprintk( "CTRL_LO5: 0x%x", lo5);
-	return dib0070_write_reg(state, 0x15, lo5);
-}
-
 #define pgm_read_word(w) (*w)
-static int dib0070_reset(struct dib0070_state *state)
+static int dib0070_reset(struct dvb_frontend *fe)
 {
+    struct dib0070_state *state = fe->tuner_priv;
 	u16 l, r, *n;
 
 	HARD_RESET(state);
@@ -483,6 +587,8 @@ static int dib0070_reset(struct dib0070_state *state)
 	if ((dib0070_read_reg(state, 0x22) >> 9) & 0x1)
 		state->revision = (dib0070_read_reg(state, 0x1f) >> 8) & 0xff;
 	else
+#else
+#warning forcing SBAND
 #endif
 		state->revision = DIB0070S_P1A;
 
@@ -512,21 +618,21 @@ static int dib0070_reset(struct dib0070_state *state)
 	else
 		r = 2;
 
+
 	r |= state->cfg->osc_buffer_state << 3;
 
 	dib0070_write_reg(state, 0x10, r);
-	dib0070_write_reg(state, 0x1f, (1 << 8) | ((state->cfg->clock_pad_drive & 0xf) << 4));
+	dib0070_write_reg(state, 0x1f, (1 << 8) | ((state->cfg->clock_pad_drive & 0xf) << 5));
 
 	if (state->cfg->invert_iq) {
 		r = dib0070_read_reg(state, 0x02) & 0xffdf;
 		dib0070_write_reg(state, 0x02, r | (1 << 5));
 	}
 
-
-	if (state->revision == DIB0070S_P1A)
-		dib0070_set_ctrl_lo5(state->fe, 4, 7, 3, 1);
-	else
-		dib0070_set_ctrl_lo5(state->fe, 4, 4, 2, 0);
+    if (state->revision == DIB0070S_P1A)
+	dib0070_set_ctrl_lo5(fe, 2, 4, 3, 0);
+    else
+		dib0070_set_ctrl_lo5(fe, 5, 4, state->cfg->charge_pump, state->cfg->enable_third_order_filter);
 
 #if 0
 	/* BBFilter calib disabled until further notice */
@@ -544,7 +650,10 @@ static int dib0070_reset(struct dib0070_state *state)
 #else
 	dib0070_write_reg(state, 0x01, (54 << 9) | 0xc8);
 #endif
-	return 0;
+
+    dib0070_wbd_offset_calibration(state);
+
+    return 0;
 }
 
 
@@ -555,7 +664,7 @@ static int dib0070_release(struct dvb_frontend *fe)
 	return 0;
 }
 
-static struct dvb_tuner_ops dib0070_ops = {
+static const struct dvb_tuner_ops dib0070_ops = {
 	.info = {
 		.name           = "DiBcom DiB0070",
 		.frequency_min  =  45000000,
@@ -566,7 +675,8 @@ static struct dvb_tuner_ops dib0070_ops = {
 
 	.init          = dib0070_wakeup,
 	.sleep         = dib0070_sleep,
-	.set_params    = dib0070_tune_digital,
+	.set_params    = dib0070_tune,
+
 //	.get_frequency = dib0070_get_frequency,
 //	.get_bandwidth = dib0070_get_bandwidth
 };
@@ -582,11 +692,9 @@ struct dvb_frontend * dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter
 	state->fe  = fe;
 	fe->tuner_priv = state;
 
-	if (dib0070_reset(state) != 0)
+	if (dib0070_reset(fe) != 0)
 		goto free_mem;
 
-	dib0070_wbd_calibration(fe);
-
 	printk(KERN_INFO "DiB0070: successfully identified\n");
 	memcpy(&fe->ops.tuner_ops, &dib0070_ops, sizeof(struct dvb_tuner_ops));
 
diff --git a/linux/drivers/media/dvb/frontends/dib0070.h b/linux/drivers/media/dvb/frontends/dib0070.h
index 9670f5d20..8c1c51cfa 100644
--- a/linux/drivers/media/dvb/frontends/dib0070.h
+++ b/linux/drivers/media/dvb/frontends/dib0070.h
@@ -15,6 +15,11 @@ struct i2c_adapter;
 
 #define DEFAULT_DIB0070_I2C_ADDRESS 0x60
 
+struct dib0070_wbd_gain_cfg {
+    u16 freq;
+    u16 wbd_gain_val;
+};
+
 struct dib0070_config {
 	u8 i2c_address;
 
@@ -35,6 +40,12 @@ struct dib0070_config {
 	u8 force_crystal_mode; /* if == 0 -> decision is made in the driver default: <24 -> 2, >=24 -> 1 */
 
 	u8 flip_chip;
+    u8 enable_third_order_filter;
+    u8 charge_pump;
+
+	const struct dib0070_wbd_gain_cfg * wbd_gain;
+
+    u8 vga_filter;
 };
 
 #if defined(CONFIG_DVB_TUNER_DIB0070) || (defined(CONFIG_DVB_TUNER_DIB0070_MODULE) && defined(MODULE))
-- 
cgit v1.2.3


From 3218818d07892e9fd082cf1b3165164eae279bb5 Mon Sep 17 00:00:00 2001
From: Janne Grunau <j@jannau.net>
Date: Wed, 2 Sep 2009 00:15:39 +0200
Subject: DVB: make DVB_MAX_ADAPTERS configurable

From: Janne Grunau <j@jannau.net>

Support for more than 8 DVB devices is requested regularly so make it
a kconfig variable instead of a header define. Values in the range 4-32
are tested.

Priority: normal

Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Michael Krufky <mkrufky@kernellabs.com>
---
 linux/drivers/media/dvb/Kconfig           | 13 +++++++++++++
 linux/drivers/media/dvb/dvb-core/dvbdev.h |  5 +++++
 2 files changed, 18 insertions(+)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/Kconfig b/linux/drivers/media/dvb/Kconfig
index b01986918..1d0e4b1ef 100644
--- a/linux/drivers/media/dvb/Kconfig
+++ b/linux/drivers/media/dvb/Kconfig
@@ -2,6 +2,19 @@
 # DVB device configuration
 #
 
+config DVB_MAX_ADAPTERS
+	int "maximum number of DVB/ATSC adapters"
+	depends on DVB_CORE
+	default 8
+	range 1 255
+	help
+	  Maximum number of DVB/ATSC adapters. Increasing this number
+	  increases the memory consumption of the DVB subsystem even
+	  if a much lower number of DVB/ATSC adapters is present.
+	  Only values in the range 4-32 are tested.
+
+	  If you are unsure about this, use the default value 8
+
 config DVB_DYNAMIC_MINORS
 	bool "Dynamic DVB minor allocation"
 	depends on DVB_CORE
diff --git a/linux/drivers/media/dvb/dvb-core/dvbdev.h b/linux/drivers/media/dvb/dvb-core/dvbdev.h
index 487919bea..895e2efca 100644
--- a/linux/drivers/media/dvb/dvb-core/dvbdev.h
+++ b/linux/drivers/media/dvb/dvb-core/dvbdev.h
@@ -30,7 +30,12 @@
 
 #define DVB_MAJOR 212
 
+#if defined(CONFIG_DVB_MAX_ADAPTERS) && CONFIG_DVB_MAX_ADAPTERS > 0
+#define DVB_MAX_ADAPTERS CONFIG_DVB_MAX_ADAPTERS
+#else
+#warning invalid CONFIG_DVB_MAX_ADAPTERS value
 #define DVB_MAX_ADAPTERS 8
+#endif
 
 #define DVB_UNSET (-1)
 
-- 
cgit v1.2.3


From 39c7c8c56d56cc3a3fd5128d0598944303a929df Mon Sep 17 00:00:00 2001
From: Janne Grunau <j@jannau.net>
Date: Wed, 2 Sep 2009 00:23:09 +0200
Subject: dvb-core: check fe->ops.set_frontend return value

From: Janne Grunau <j@jannau.net>

Various frontend driver have parameter checks in their set_frontend
functions and return an error if the parameters are not supported,
tda10021 and cx24116 to name two.

The tuning ioctls FE_SET_FRONTEND/FE_SET_PROPERTY only change values
in the property cache and return before set_frontend is called. If a
set_frontend call in software zigzag algorithm fails and the card was
previously locked it will report a lock and the new parameters but is
still tuned to the old transport. This is not detectable from
userspace.

This change checks the return values of fe->ops.set_frontend and
changes the state to the added FESTATE_ERROR for software zigzag.
No lock will be reported to userspace if the State is FESTATE_ERROR.

Priority: normal

Signed-off-by: Janne Grunau <j@jannau.net>
---
 linux/drivers/media/dvb/dvb-core/dvb_frontend.c | 26 ++++++++++++++++++++-----
 1 file changed, 21 insertions(+), 5 deletions(-)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/dvb-core/dvb_frontend.c b/linux/drivers/media/dvb/dvb-core/dvb_frontend.c
index 41166d407..fbfccbd91 100644
--- a/linux/drivers/media/dvb/dvb-core/dvb_frontend.c
+++ b/linux/drivers/media/dvb/dvb-core/dvb_frontend.c
@@ -77,6 +77,7 @@ MODULE_PARM_DESC(dvb_mfe_wait_time, "Wait up to <mfe_wait_time> seconds on open(
 #define FESTATE_ZIGZAG_FAST 32
 #define FESTATE_ZIGZAG_SLOW 64
 #define FESTATE_DISEQC 128
+#define FESTATE_ERROR 256
 #define FESTATE_WAITFORLOCK (FESTATE_TUNING_FAST | FESTATE_TUNING_SLOW | FESTATE_ZIGZAG_FAST | FESTATE_ZIGZAG_SLOW | FESTATE_DISEQC)
 #define FESTATE_SEARCHING_FAST (FESTATE_TUNING_FAST | FESTATE_ZIGZAG_FAST)
 #define FESTATE_SEARCHING_SLOW (FESTATE_TUNING_SLOW | FESTATE_ZIGZAG_SLOW)
@@ -274,6 +275,7 @@ static int dvb_frontend_swzigzag_autotune(struct dvb_frontend *fe, int check_wra
 {
 	int autoinversion;
 	int ready = 0;
+	int fe_set_err = 0;
 	struct dvb_frontend_private *fepriv = fe->frontend_priv;
 	int original_inversion = fepriv->parameters.inversion;
 	u32 original_frequency = fepriv->parameters.frequency;
@@ -350,7 +352,11 @@ static int dvb_frontend_swzigzag_autotune(struct dvb_frontend *fe, int check_wra
 	if (autoinversion)
 		fepriv->parameters.inversion = fepriv->inversion;
 	if (fe->ops.set_frontend)
-		fe->ops.set_frontend(fe, &fepriv->parameters);
+		fe_set_err = fe->ops.set_frontend(fe, &fepriv->parameters);
+	if (fe_set_err < 0) {
+		fepriv->state = FESTATE_ERROR;
+		return fe_set_err;
+	}
 
 	fepriv->parameters.frequency = original_frequency;
 	fepriv->parameters.inversion = original_inversion;
@@ -362,6 +368,7 @@ static int dvb_frontend_swzigzag_autotune(struct dvb_frontend *fe, int check_wra
 static void dvb_frontend_swzigzag(struct dvb_frontend *fe)
 {
 	fe_status_t s = 0;
+	int retval = 0;
 	struct dvb_frontend_private *fepriv = fe->frontend_priv;
 
 	/* if we've got no parameters, just keep idling */
@@ -375,8 +382,12 @@ static void dvb_frontend_swzigzag(struct dvb_frontend *fe)
 	if (fepriv->tune_mode_flags & FE_TUNE_MODE_ONESHOT) {
 		if (fepriv->state & FESTATE_RETUNE) {
 			if (fe->ops.set_frontend)
-				fe->ops.set_frontend(fe, &fepriv->parameters);
-			fepriv->state = FESTATE_TUNED;
+				retval = fe->ops.set_frontend(fe,
+							&fepriv->parameters);
+			if (retval < 0)
+				fepriv->state = FESTATE_ERROR;
+			else
+				fepriv->state = FESTATE_TUNED;
 		}
 		fepriv->delay = 3*HZ;
 		fepriv->quality = 0;
@@ -454,7 +465,11 @@ static void dvb_frontend_swzigzag(struct dvb_frontend *fe)
 		fepriv->delay = fepriv->min_delay;
 
 		/* peform a tune */
-		if (dvb_frontend_swzigzag_autotune(fe, fepriv->check_wrapped)) {
+		retval = dvb_frontend_swzigzag_autotune(fe,
+							fepriv->check_wrapped);
+		if (retval < 0) {
+			return;
+		} else if (retval) {
 			/* OK, if we've run out of trials at the fast speed.
 			 * Drop back to slow for the _next_ attempt */
 			fepriv->state = FESTATE_SEARCHING_SLOW;
@@ -1614,7 +1629,8 @@ static int dvb_frontend_ioctl_legacy(struct inode *inode, struct file *file,
 
 		/* if retune was requested but hasn't occured yet, prevent
 		 * that user get signal state from previous tuning */
-		if(fepriv->state == FESTATE_RETUNE) {
+		if (fepriv->state == FESTATE_RETUNE ||
+		    fepriv->state == FESTATE_ERROR) {
 			err=0;
 			*status = 0;
 			break;
-- 
cgit v1.2.3


From 47515034f52a7a8848e3636668e31e1af4a79fbe Mon Sep 17 00:00:00 2001
From: Janne Grunau <j@jannau.net>
Date: Wed, 2 Sep 2009 00:24:08 +0200
Subject: dvb-core: check supported QAM modulations

From: Janne Grunau <j@jannau.net>

Check the modulation in dvb_frontend_check_parameters against
frontend's capabilties for FE_QAM devices.

Priority: normal

Signed-off-by: Janne Grunau <j@jannau.net>
---
 linux/drivers/media/dvb/dvb-core/dvb_frontend.c | 9 +++++++++
 1 file changed, 9 insertions(+)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/dvb-core/dvb_frontend.c b/linux/drivers/media/dvb/dvb-core/dvb_frontend.c
index fbfccbd91..56a11d32a 100644
--- a/linux/drivers/media/dvb/dvb-core/dvb_frontend.c
+++ b/linux/drivers/media/dvb/dvb-core/dvb_frontend.c
@@ -849,6 +849,15 @@ static int dvb_frontend_check_parameters(struct dvb_frontend *fe,
 		}
 	}
 
+	/* check for supported modulation */
+	if (fe->ops.info.type == FE_QAM &&
+	    (parms->u.qam.modulation > QAM_AUTO ||
+	     !((1 << (parms->u.qam.modulation + 10)) & fe->ops.info.caps))) {
+		printk(KERN_WARNING "DVB: adapter %i frontend %i modulation %u not supported\n",
+		       fe->dvb->num, fe->id, parms->u.qam.modulation);
+			return -EINVAL;
+	}
+
 	return 0;
 }
 
-- 
cgit v1.2.3


From f3fb970832182809d9bf8b397fe34f70404e51fd Mon Sep 17 00:00:00 2001
From: Mauro Carvalho Chehab <mchehab@redhat.com>
Date: Mon, 7 Sep 2009 12:38:46 -0300
Subject: building system: fix compilation with kernels older than 2.6.30

From: Mauro Carvalho Chehab <mchehab@redhat.com>

Priority: normal

Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
---
 linux/drivers/media/dvb/dvb-usb/dvb-usb-remote.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/dvb-usb/dvb-usb-remote.c b/linux/drivers/media/dvb/dvb-usb/dvb-usb-remote.c
index df72c8637..76c281b9d 100644
--- a/linux/drivers/media/dvb/dvb-usb/dvb-usb-remote.c
+++ b/linux/drivers/media/dvb/dvb-usb/dvb-usb-remote.c
@@ -12,6 +12,7 @@
 #include <linux/usb_input.h>
 #endif
 
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 22)
 static int dvb_usb_getkeycode(struct input_dev *dev,
 				    int scancode, int *keycode)
 {
@@ -76,6 +77,7 @@ static int dvb_usb_setkeycode(struct input_dev *dev,
 
 	return -EINVAL;
 }
+#endif
 
 /* Remote-control poll function - called every dib->rc_query_interval ms to see
  * whether the remote control has received anything.
@@ -189,11 +191,11 @@ int dvb_usb_remote_init(struct dvb_usb_device *d)
 	usb_to_input_id(d->udev, &input_dev->id);
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
 	input_dev->dev.parent = &d->udev->dev;
+	input_dev->getkeycode = dvb_usb_getkeycode;
+	input_dev->setkeycode = dvb_usb_setkeycode;
 #else
 	input_dev->cdev.dev = &d->udev->dev;
 #endif
-	input_dev->getkeycode = dvb_usb_getkeycode;
-	input_dev->setkeycode = dvb_usb_setkeycode;
 
 	/* set the bits for the keys */
 	deb_rc("key map size: %d\n", d->props.rc_key_map_size);
@@ -211,7 +213,9 @@ int dvb_usb_remote_init(struct dvb_usb_device *d)
 	input_dev->rep[REP_PERIOD] = d->props.rc_interval;
 	input_dev->rep[REP_DELAY]  = d->props.rc_interval + 150;
 
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
 	input_set_drvdata(input_dev, d);
+#endif
 
 	err = input_register_device(input_dev);
 	if (err) {
-- 
cgit v1.2.3


From bf4883355d6f095a2fe03131f766f658203ded79 Mon Sep 17 00:00:00 2001
From: Antti Palosaari <crope@iki.fi>
Date: Sat, 12 Sep 2009 15:51:36 +0300
Subject: af9015: [1/2] fix USB TS configuration

From: Jose Alberto Reguero <jareguero@telefonica.net>

Fix wrongly configured USB2.0 TS EP.

Priority: high

Signed-off-by: Jose Alberto Reguero <jareguero@telefonica.net>
Signed-off-by: Antti Palosaari <crope@iki.fi>
---
 linux/drivers/media/dvb/dvb-usb/af9015.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/dvb-usb/af9015.c b/linux/drivers/media/dvb/dvb-usb/af9015.c
index aeb10db0b..dd7070821 100644
--- a/linux/drivers/media/dvb/dvb-usb/af9015.c
+++ b/linux/drivers/media/dvb/dvb-usb/af9015.c
@@ -877,7 +877,7 @@ static int af9015_read_config(struct usb_device *udev)
 			af9015_config.dual_mode = 0;
 		} else {
 			af9015_properties[i].adapter[0].stream.u.bulk.buffersize
-				= TS_USB20_MAX_PACKET_SIZE;
+				= TS_USB20_FRAME_SIZE;
 		}
 	}
 
@@ -1313,7 +1313,7 @@ static struct dvb_usb_device_properties af9015_properties[] = {
 					.u = {
 						.bulk = {
 							.buffersize =
-						TS_USB20_MAX_PACKET_SIZE,
+						TS_USB20_FRAME_SIZE,
 						}
 					}
 				},
@@ -1419,7 +1419,7 @@ static struct dvb_usb_device_properties af9015_properties[] = {
 					.u = {
 						.bulk = {
 							.buffersize =
-						TS_USB20_MAX_PACKET_SIZE,
+						TS_USB20_FRAME_SIZE,
 						}
 					}
 				},
@@ -1525,7 +1525,7 @@ static struct dvb_usb_device_properties af9015_properties[] = {
 					.u = {
 						.bulk = {
 							.buffersize =
-						TS_USB20_MAX_PACKET_SIZE,
+						TS_USB20_FRAME_SIZE,
 						}
 					}
 				},
-- 
cgit v1.2.3


From ff680464a0d27db7be8755753e6b52bfa03d0035 Mon Sep 17 00:00:00 2001
From: Antti Palosaari <crope@iki.fi>
Date: Sat, 12 Sep 2009 19:35:29 +0300
Subject: af9015: [2/2] fix USB TS configuration

From: Antti Palosaari <crope@iki.fi>

Fix wrongly configured USB1.1 TS EP.

Patch serie also increases USB URB size to reduce wakeups.
USB1.1 URB size from 64 to 940 bytes
USB2.0 URB size from 512 to 16356 bytes

Priority: high

Signed-off-by: Antti Palosaari <crope@iki.fi>
---
 linux/drivers/media/dvb/dvb-usb/af9015.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/dvb-usb/af9015.c b/linux/drivers/media/dvb/dvb-usb/af9015.c
index dd7070821..723253c59 100644
--- a/linux/drivers/media/dvb/dvb-usb/af9015.c
+++ b/linux/drivers/media/dvb/dvb-usb/af9015.c
@@ -372,12 +372,14 @@ static int af9015_init_endpoint(struct dvb_usb_device *d)
 	u8  packet_size;
 	deb_info("%s: USB speed:%d\n", __func__, d->udev->speed);
 
+	/* Windows driver uses packet count 21 for USB1.1 and 348 for USB2.0.
+	   We use smaller - about 1/4 from the original, 5 and 87. */
 #define TS_PACKET_SIZE            188
 
-#define TS_USB20_PACKET_COUNT     348
+#define TS_USB20_PACKET_COUNT      87
 #define TS_USB20_FRAME_SIZE       (TS_PACKET_SIZE*TS_USB20_PACKET_COUNT)
 
-#define TS_USB11_PACKET_COUNT      21
+#define TS_USB11_PACKET_COUNT       5
 #define TS_USB11_FRAME_SIZE       (TS_PACKET_SIZE*TS_USB11_PACKET_COUNT)
 
 #define TS_USB20_MAX_PACKET_SIZE  512
@@ -871,7 +873,7 @@ static int af9015_read_config(struct usb_device *udev)
 		/* USB1.1 set smaller buffersize and disable 2nd adapter */
 		if (udev->speed == USB_SPEED_FULL) {
 			af9015_properties[i].adapter[0].stream.u.bulk.buffersize
-				= TS_USB11_MAX_PACKET_SIZE;
+				= TS_USB11_FRAME_SIZE;
 			/* disable 2nd adapter because we don't have
 			   PID-filters */
 			af9015_config.dual_mode = 0;
-- 
cgit v1.2.3


From 74c8a615523ef5d42b617ab521fa1c6a01da0cd9 Mon Sep 17 00:00:00 2001
From: Mauro Carvalho Chehab <mchehab@redhat.com>
Date: Sat, 12 Sep 2009 14:18:18 -0300
Subject: backport commit 8a8bdcc7533b104d789d9bb3ed90da9352515e21

From: Mauro Carvalho Chehab <mchehab@redhat.com>

kernel-sync:
    Author: Kay Sievers <kay.sievers@vrfy.org>
    Date:   Thu Apr 30 15:23:42 2009 +0200

    Driver Core: dvb: add nodename for dvb drivers

    This adds support to the dvb core to report the proper device name to
    userspace for their devices.

Priority: normal

Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
---
 linux/drivers/media/dvb/dvb-core/dvbdev.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/dvb-core/dvbdev.c b/linux/drivers/media/dvb/dvb-core/dvbdev.c
index f6084e19d..2028be23d 100644
--- a/linux/drivers/media/dvb/dvb-core/dvbdev.c
+++ b/linux/drivers/media/dvb/dvb-core/dvbdev.c
@@ -472,6 +472,17 @@ static int dvb_uevent(struct device *dev, struct kobj_uevent_env *env)
 }
 #endif
 
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 31)
+static char *dvb_nodename(struct device *dev)
+{
+	struct dvb_device *dvbdev = dev_get_drvdata(dev);
+
+	return kasprintf(GFP_KERNEL, "dvb/adapter%d/%s%d",
+		dvbdev->adapter->num, dnames[dvbdev->type], dvbdev->id);
+}
+
+
+#endif
 static int __init init_dvbdev(void)
 {
 	int retval;
@@ -500,6 +511,9 @@ static int __init init_dvbdev(void)
 	}
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 27)
 	dvb_class->dev_uevent = dvb_uevent;
+#endif
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 31)
+	dvb_class->nodename = dvb_nodename;
 #endif
 	return 0;
 
-- 
cgit v1.2.3


From 89522ac35d478d8c4f06e6ae1723925d20e3eca7 Mon Sep 17 00:00:00 2001
From: Mauro Carvalho Chehab <mchehab@redhat.com>
Date: Sat, 12 Sep 2009 14:26:01 -0300
Subject: siano/Kconfig: a driver shouldn't be selected by default

From: Mauro Carvalho Chehab <mchehab@redhat.com>

Priority: normal

Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
---
 linux/drivers/media/dvb/siano/Kconfig | 1 -
 1 file changed, 1 deletion(-)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/siano/Kconfig b/linux/drivers/media/dvb/siano/Kconfig
index ff297ceaf..8c1aed77e 100644
--- a/linux/drivers/media/dvb/siano/Kconfig
+++ b/linux/drivers/media/dvb/siano/Kconfig
@@ -28,7 +28,6 @@ config SMS_USB_DRV
 config SMS_SDIO_DRV
 	tristate "SDIO interface support"
 	depends on DVB_CORE && MMC
-	default m
 	---help---
 	  Choose if you would like to have Siano's support for SDIO interface
 endmenu
-- 
cgit v1.2.3


From 75bdd4882db874690382f633b28f5b3f7d5ff54c Mon Sep 17 00:00:00 2001
From: Mauro Carvalho Chehab <mchehab@redhat.com>
Date: Sat, 12 Sep 2009 14:28:58 -0300
Subject: af9015: revert changeset: 12588:184e9d1d8707

From: Mauro Carvalho Chehab <mchehab@redhat.com>

Revert this patch as requested by the patch author.

Priority: normal

Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
---
 linux/drivers/media/dvb/dvb-usb/af9015.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/dvb-usb/af9015.c b/linux/drivers/media/dvb/dvb-usb/af9015.c
index aeb10db0b..69a00d610 100644
--- a/linux/drivers/media/dvb/dvb-usb/af9015.c
+++ b/linux/drivers/media/dvb/dvb-usb/af9015.c
@@ -108,7 +108,7 @@ static int af9015_rw_udev(struct usb_device *udev, struct req_t *req)
 	}
 
 	/* write requested */
-	if (write && req->data_len) {
+	if (write) {
 		memcpy(&buf[8], req->data, req->data_len);
 		msg_len += req->data_len;
 	}
-- 
cgit v1.2.3


From f919ed55d0ece48afb66100dce56494c346879c5 Mon Sep 17 00:00:00 2001
From: Antti Palosaari <crope@iki.fi>
Date: Sun, 13 Sep 2009 02:46:30 +0300
Subject: af9015: improve usb control message function slightly

From: Antti Palosaari <crope@iki.fi>

* define names for few values
* decrease buffer len by one byte which was not used
* add check for buffer overflow for sure
* indentation fixes
* remove useless 0 len check from memcpy
It should not happen and if it happens memcpy should not do anything.

Priority: normal

Signed-off-by: Antti Palosaari <crope@iki.fi>
---
 linux/drivers/media/dvb/dvb-usb/af9015.c | 34 +++++++++++++++++++++++---------
 1 file changed, 25 insertions(+), 9 deletions(-)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/dvb-usb/af9015.c b/linux/drivers/media/dvb/dvb-usb/af9015.c
index 723253c59..44eb7e46f 100644
--- a/linux/drivers/media/dvb/dvb-usb/af9015.c
+++ b/linux/drivers/media/dvb/dvb-usb/af9015.c
@@ -61,10 +61,13 @@ static struct af9013_config af9015_af9013_config[] = {
 
 static int af9015_rw_udev(struct usb_device *udev, struct req_t *req)
 {
+#define BUF_LEN 63
+#define REQ_HDR_LEN 8 /* send header size */
+#define ACK_HDR_LEN 2 /* rece header size */
 	int act_len, ret;
-	u8 buf[64];
+	u8 buf[BUF_LEN];
 	u8 write = 1;
-	u8 msg_len = 8;
+	u8 msg_len = REQ_HDR_LEN;
 	static u8 seq; /* packet sequence number */
 
 	if (mutex_lock_interruptible(&af9015_usb_mutex) < 0)
@@ -107,17 +110,26 @@ static int af9015_rw_udev(struct usb_device *udev, struct req_t *req)
 		goto error_unlock;
 	}
 
+	/* buffer overflow check */
+	if ((write && (req->data_len > BUF_LEN - REQ_HDR_LEN)) ||
+		(!write && (req->data_len > BUF_LEN - ACK_HDR_LEN))) {
+		err("too much data; cmd:%d len:%d", req->cmd, req->data_len);
+		ret = -EINVAL;
+		goto error_unlock;
+	}
+
 	/* write requested */
-	if (write && req->data_len) {
-		memcpy(&buf[8], req->data, req->data_len);
+	if (write) {
+		memcpy(&buf[REQ_HDR_LEN], req->data, req->data_len);
 		msg_len += req->data_len;
 	}
+
 	deb_xfer(">>> ");
 	debug_dump(buf, msg_len, deb_xfer);
 
 	/* send req */
 	ret = usb_bulk_msg(udev, usb_sndbulkpipe(udev, 0x02), buf, msg_len,
-	&act_len, AF9015_USB_TIMEOUT);
+		&act_len, AF9015_USB_TIMEOUT);
 	if (ret)
 		err("bulk message failed:%d (%d/%d)", ret, msg_len, act_len);
 	else
@@ -130,10 +142,14 @@ static int af9015_rw_udev(struct usb_device *udev, struct req_t *req)
 	if (req->cmd == DOWNLOAD_FIRMWARE || req->cmd == RECONNECT_USB)
 		goto exit_unlock;
 
-	/* receive ack and data if read req */
-	msg_len = 1 + 1 + req->data_len;  /* seq + status + data len */
+	/* write receives seq + status = 2 bytes
+	   read receives seq + status + data = 2 + N bytes */
+	msg_len = ACK_HDR_LEN;
+	if (!write)
+		msg_len += req->data_len;
+
 	ret = usb_bulk_msg(udev, usb_rcvbulkpipe(udev, 0x81), buf, msg_len,
-			   &act_len, AF9015_USB_TIMEOUT);
+		&act_len, AF9015_USB_TIMEOUT);
 	if (ret) {
 		err("recv bulk message failed:%d", ret);
 		ret = -1;
@@ -159,7 +175,7 @@ static int af9015_rw_udev(struct usb_device *udev, struct req_t *req)
 
 	/* read request, copy returned data to return buf */
 	if (!write)
-		memcpy(req->data, &buf[2], req->data_len);
+		memcpy(req->data, &buf[ACK_HDR_LEN], req->data_len);
 
 error_unlock:
 exit_unlock:
-- 
cgit v1.2.3


From d65762ce274a5e3cfe393763b41e518ec26a5974 Mon Sep 17 00:00:00 2001
From: Antti Palosaari <crope@iki.fi>
Date: Sun, 13 Sep 2009 03:25:59 +0300
Subject: af9015: fix typo in register compare

From: Antti Palosaari <crope@iki.fi>

And mask should be 0xff00 instead of 0xae00.

Thanks to Jochen Friedrich <jochen@scram.de> for pointing this.

Priority: normal

Signed-off-by: Antti Palosaari <crope@iki.fi>
Cc: Jochen Friedrich <jochen@scram.de>
---
 linux/drivers/media/dvb/dvb-usb/af9015.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/dvb-usb/af9015.c b/linux/drivers/media/dvb/dvb-usb/af9015.c
index 44eb7e46f..ab505a268 100644
--- a/linux/drivers/media/dvb/dvb-usb/af9015.c
+++ b/linux/drivers/media/dvb/dvb-usb/af9015.c
@@ -97,7 +97,7 @@ static int af9015_rw_udev(struct usb_device *udev, struct req_t *req)
 		break;
 	case WRITE_MEMORY:
 		if (((req->addr & 0xff00) == 0xff00) ||
-		    ((req->addr & 0xae00) == 0xae00))
+		    ((req->addr & 0xff00) == 0xae00))
 			buf[0] = WRITE_VIRTUAL_MEMORY;
 	case WRITE_VIRTUAL_MEMORY:
 	case COPY_FIRMWARE:
-- 
cgit v1.2.3


From 0c4a5353777fc980ecca21e8e0dfb2559e94b651 Mon Sep 17 00:00:00 2001
From:  <>
Date: Wed, 2 Sep 2009 13:19:19 +0200
Subject: Added new Pinnacle USB devices

From: Olivier Grenie <olivier.grenie@dibcom.fr>

Added Pinnacle PCTV USB devices based on PCTV 73e.

Priority: normal

Signed-off-by: Olivier Grenie <olivier.grenie@dibcom.fr>
Signed-off-by: Patrick Boettcher <patrick.boettcher@dibcom.fr>
---
 linux/drivers/media/dvb/dvb-usb/dib0700_devices.c | 40 ++++++++++++++++++++++-
 linux/drivers/media/dvb/dvb-usb/dvb-usb-ids.h     |  3 ++
 2 files changed, 42 insertions(+), 1 deletion(-)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c b/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c
index d4da73e7f..d6ae20c16 100644
--- a/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c
+++ b/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c
@@ -1504,7 +1504,10 @@ struct usb_device_id dib0700_usb_id_table[] = {
 	{ USB_DEVICE(USB_VID_TERRATEC,	USB_PID_TERRATEC_T3) },
 	{ USB_DEVICE(USB_VID_TERRATEC,	USB_PID_TERRATEC_T5) },
 	{ USB_DEVICE(USB_VID_YUAN,      USB_PID_YUAN_STK7700D) },
-	{ USB_DEVICE(USB_VID_YUAN,	USB_PID_YUAN_STK7700D_2) },
+/* 55 */{ USB_DEVICE(USB_VID_YUAN,	USB_PID_YUAN_STK7700D_2) },
+	{ USB_DEVICE(USB_VID_PINNACLE,	USB_PID_PINNACLE_PCTV73A) },
+	{ USB_DEVICE(USB_VID_PINNACLE,	USB_PID_PINNACLE_PCTV73ESE) },
+	{ USB_DEVICE(USB_VID_PINNACLE,	USB_PID_PINNACLE_PCTV282E) },
 	{ 0 }		/* Terminating entry */
 };
 MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);
@@ -1766,6 +1769,41 @@ struct dvb_usb_device_properties dib0700_devices[] = {
 		.rc_key_map_size  = ARRAY_SIZE(dib0700_rc_keys),
 		.rc_query         = dib0700_rc_query
 
+	}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
+
+		.num_adapters = 1,
+		.adapter = {
+			{
+				.frontend_attach  = stk7070p_frontend_attach,
+				.tuner_attach     = dib7070p_tuner_attach,
+
+				DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
+
+				.size_of_priv     = sizeof(struct dib0700_adapter_state),
+			},
+		},
+
+		.num_device_descs = 3,
+		.devices = {
+			{   "Pinnacle PCTV 73A",
+				{ &dib0700_usb_id_table[56], NULL },
+				{ NULL },
+			},
+			{   "Pinnacle PCTV 73e SE",
+				{ &dib0700_usb_id_table[57], NULL },
+				{ NULL },
+			},
+			{   "Pinnacle PCTV 282e",
+				{ &dib0700_usb_id_table[58], NULL },
+				{ NULL },
+			},
+		},
+
+		.rc_interval      = DEFAULT_RC_INTERVAL,
+		.rc_key_map       = dib0700_rc_keys,
+		.rc_key_map_size  = ARRAY_SIZE(dib0700_rc_keys),
+		.rc_query         = dib0700_rc_query
+
 	}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
 
 		.num_adapters = 2,
diff --git a/linux/drivers/media/dvb/dvb-usb/dvb-usb-ids.h b/linux/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
index 185a5069b..eec5604dc 100644
--- a/linux/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
+++ b/linux/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
@@ -195,6 +195,9 @@
 #define USB_PID_PINNACLE_PCTV73E			0x0237
 #define USB_PID_PINNACLE_PCTV801E			0x023a
 #define USB_PID_PINNACLE_PCTV801E_SE			0x023b
+#define USB_PID_PINNACLE_PCTV73A			0x0243
+#define USB_PID_PINNACLE_PCTV73ESE			0x0245
+#define USB_PID_PINNACLE_PCTV282E			0x0248
 #define USB_PID_PCTV_200E				0x020e
 #define USB_PID_PCTV_400E				0x020f
 #define USB_PID_PCTV_450E				0x0222
-- 
cgit v1.2.3


From d399ab0908845ddbf3faf0116d9b477497fb4756 Mon Sep 17 00:00:00 2001
From: Patrick Boettcher <pboettcher@kernellabs.com>
Date: Mon, 17 Aug 2009 10:13:28 +0200
Subject: DiB0070: Indenting driver with indent -linux

From: Patrick Boettcher <pboettcher@kernellabs.com>

In order to follow a little bit the kernel coding style from now on
after the generation of that driver file and indent -linux call is
emitted.

Priority: normal

Signed-off-by: Patrick Boettcher <pboettcher@kernellabs.com>
---
 linux/drivers/media/dvb/frontends/dib0070.c | 768 ++++++++++++++--------------
 linux/drivers/media/dvb/frontends/dib0070.h |  31 +-
 2 files changed, 405 insertions(+), 394 deletions(-)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/frontends/dib0070.c b/linux/drivers/media/dvb/frontends/dib0070.c
index 4f06f4f64..102b163b2 100644
--- a/linux/drivers/media/dvb/frontends/dib0070.c
+++ b/linux/drivers/media/dvb/frontends/dib0070.c
@@ -50,16 +50,16 @@ MODULE_PARM_DESC(debug, "turn on debugging (default: 0)");
 #define DIB0070S_P1A 0x02
 
 enum frontend_tune_state {
-    CT_TUNER_START = 10,
-    CT_TUNER_STEP_0,
-    CT_TUNER_STEP_1,
-    CT_TUNER_STEP_2,
-    CT_TUNER_STEP_3,
-    CT_TUNER_STEP_4,
-    CT_TUNER_STEP_5,
-    CT_TUNER_STEP_6,
-    CT_TUNER_STEP_7,
-    CT_TUNER_STOP,
+	CT_TUNER_START = 10,
+	CT_TUNER_STEP_0,
+	CT_TUNER_STEP_1,
+	CT_TUNER_STEP_2,
+	CT_TUNER_STEP_3,
+	CT_TUNER_STEP_4,
+	CT_TUNER_STEP_5,
+	CT_TUNER_STEP_6,
+	CT_TUNER_STEP_7,
+	CT_TUNER_STOP,
 };
 
 #define FE_CALLBACK_TIME_NEVER 0xffffffff
@@ -71,10 +71,10 @@ struct dib0070_state {
 	u16 wbd_ff_offset;
 	u8 revision;
 
-    enum frontend_tune_state tune_state;
-    u32 current_rf;
+	enum frontend_tune_state tune_state;
+	u32 current_rf;
 
-    /* for the captrim binary search */
+	/* for the captrim binary search */
 	s8 step;
 	u16 adc_diff;
 
@@ -85,7 +85,7 @@ struct dib0070_state {
 	const struct dib0070_tuning *current_tune_table_index;
 	const struct dib0070_lna_match *lna_match;
 
-    u8  wbd_gain_current;
+	u8 wbd_gain_current;
 	u16 wbd_offset_3_3[2];
 };
 
@@ -93,8 +93,8 @@ static uint16_t dib0070_read_reg(struct dib0070_state *state, u8 reg)
 {
 	u8 b[2];
 	struct i2c_msg msg[2] = {
-		{ .addr = state->cfg->i2c_address, .flags = 0,        .buf = &reg, .len = 1 },
-		{ .addr = state->cfg->i2c_address, .flags = I2C_M_RD, .buf = b,  .len = 2 },
+		{.addr = state->cfg->i2c_address,.flags = 0,.buf = &reg,.len = 1},
+		{.addr = state->cfg->i2c_address,.flags = I2C_M_RD,.buf = b,.len = 2},
 	};
 	if (i2c_transfer(state->i2c, msg, 2) != 2) {
 		printk(KERN_WARNING "DiB0070 I2C read failed\n");
@@ -106,7 +106,7 @@ static uint16_t dib0070_read_reg(struct dib0070_state *state, u8 reg)
 static int dib0070_write_reg(struct dib0070_state *state, u8 reg, u16 val)
 {
 	u8 b[3] = { reg, val >> 8, val & 0xff };
-	struct i2c_msg msg = { .addr = state->cfg->i2c_address, .flags = 0, .buf = b, .len = 3 };
+	struct i2c_msg msg = {.addr = state->cfg->i2c_address,.flags = 0,.buf = b,.len = 3 };
 	if (i2c_transfer(state->i2c, &msg, 1) != 1) {
 		printk(KERN_WARNING "DiB0070 I2C write failed\n");
 		return -EREMOTEIO;
@@ -124,34 +124,34 @@ static int dib0070_write_reg(struct dib0070_state *state, u8 reg, u16 val)
 
 static int dib0070_set_bandwidth(struct dvb_frontend *fe, struct dvb_frontend_parameters *ch)
 {
-    struct dib0070_state *st = fe->tuner_priv;
-    u16 tmp = dib0070_read_reg(st, 0x02) & 0x3fff;
-
-    if (fe->dtv_property_cache.bandwidth_hz/1000 > 7000)
-	tmp |= (0 << 14);
-    else if (fe->dtv_property_cache.bandwidth_hz/1000 > 6000)
-	tmp |= (1 << 14);
-    else if (fe->dtv_property_cache.bandwidth_hz/1000 > 5000)
-	tmp |= (2 << 14);
-    else
-	tmp |= (3 << 14);
-
-    dib0070_write_reg(st, 0x02, tmp);
-
-    /* sharpen the BB filter in ISDB-T to have higher immunity to adjacent channels */
-    if (fe->dtv_property_cache.delivery_system == SYS_ISDBT) {
-	u16 value = dib0070_read_reg(st, 0x17);
-
-	dib0070_write_reg(st, 0x17, value & 0xfffc);
-	tmp = dib0070_read_reg(st, 0x01) & 0x01ff;
-	dib0070_write_reg(st, 0x01, tmp | (60 << 9));
-
-	dib0070_write_reg(st, 0x17, value);
-    }
+	struct dib0070_state *state = fe->tuner_priv;
+	u16 tmp = dib0070_read_reg(state, 0x02) & 0x3fff;
+
+	if (state->fe->dtv_property_cache.bandwidth_hz / 1000 > 7000)
+		tmp |= (0 << 14);
+	else if (state->fe->dtv_property_cache.bandwidth_hz / 1000 > 6000)
+		tmp |= (1 << 14);
+	else if (state->fe->dtv_property_cache.bandwidth_hz / 1000 > 5000)
+		tmp |= (2 << 14);
+	else
+		tmp |= (3 << 14);
+
+	dib0070_write_reg(state, 0x02, tmp);
+
+	/* sharpen the BB filter in ISDB-T to have higher immunity to adjacent channels */
+	if (state->fe->dtv_property_cache.delivery_system == SYS_ISDBT) {
+		u16 value = dib0070_read_reg(state, 0x17);
+
+		dib0070_write_reg(state, 0x17, value & 0xfffc);
+		tmp = dib0070_read_reg(state, 0x01) & 0x01ff;
+		dib0070_write_reg(state, 0x01, tmp | (60 << 9));
+
+		dib0070_write_reg(state, 0x17, value);
+	}
 	return 0;
 }
 
-static int dib0070_captrim(struct dib0070_state *st, enum frontend_tune_state *tune_state)
+static int dib0070_captrim(struct dib0070_state *state, enum frontend_tune_state *tune_state)
 {
 	int8_t step_sign;
 	u16 adc;
@@ -159,26 +159,26 @@ static int dib0070_captrim(struct dib0070_state *st, enum frontend_tune_state *t
 
 	if (*tune_state == CT_TUNER_STEP_0) {
 
-		dib0070_write_reg(st, 0x0f, 0xed10);
-		dib0070_write_reg(st, 0x17,    0x0034);
+		dib0070_write_reg(state, 0x0f, 0xed10);
+		dib0070_write_reg(state, 0x17, 0x0034);
 
-		dib0070_write_reg(st, 0x18, 0x0032);
-		st->step = st->captrim = st->fcaptrim = 64;
-		st->adc_diff = 3000;
+		dib0070_write_reg(state, 0x18, 0x0032);
+		state->step = state->captrim = state->fcaptrim = 64;
+		state->adc_diff = 3000;
 		ret = 20;
 
-	*tune_state = CT_TUNER_STEP_1;
+		*tune_state = CT_TUNER_STEP_1;
 	} else if (*tune_state == CT_TUNER_STEP_1) {
-		st->step /= 2;
-		dib0070_write_reg(st, 0x14, st->lo4 | st->captrim);
+		state->step /= 2;
+		dib0070_write_reg(state, 0x14, state->lo4 | state->captrim);
 		ret = 15;
 
 		*tune_state = CT_TUNER_STEP_2;
 	} else if (*tune_state == CT_TUNER_STEP_2) {
 
-		adc = dib0070_read_reg(st, 0x19);
+		adc = dib0070_read_reg(state, 0x19);
 
-		dprintk( "CAPTRIM=%hd; ADC = %hd (ADC) & %dmV", st->captrim, adc, (u32) adc*(u32)1800/(u32)1024);
+		dprintk("CAPTRIM=%hd; ADC = %hd (ADC) & %dmV", state->captrim, adc, (u32) adc * (u32) 1800 / (u32) 1024);
 
 		if (adc >= 400) {
 			adc -= 400;
@@ -188,24 +188,22 @@ static int dib0070_captrim(struct dib0070_state *st, enum frontend_tune_state *t
 			step_sign = 1;
 		}
 
-		if (adc < st->adc_diff) {
-			dprintk( "CAPTRIM=%hd is closer to target (%hd/%hd)", st->captrim, adc, st->adc_diff);
-			st->adc_diff = adc;
-			st->fcaptrim = st->captrim;
-
-
+		if (adc < state->adc_diff) {
+			dprintk("CAPTRIM=%hd is closer to target (%hd/%hd)", state->captrim, adc, state->adc_diff);
+			state->adc_diff = adc;
+			state->fcaptrim = state->captrim;
 
 		}
-		st->captrim += (step_sign * st->step);
+		state->captrim += (step_sign * state->step);
 
-		if (st->step >= 1)
+		if (state->step >= 1)
 			*tune_state = CT_TUNER_STEP_1;
 		else
 			*tune_state = CT_TUNER_STEP_3;
 
 	} else if (*tune_state == CT_TUNER_STEP_3) {
-		dib0070_write_reg(st, 0x14, st->lo4 | st->fcaptrim);
-		dib0070_write_reg(st, 0x18, 0x07ff);
+		dib0070_write_reg(state, 0x14, state->lo4 | state->fcaptrim);
+		dib0070_write_reg(state, 0x18, 0x07ff);
 		*tune_state = CT_TUNER_STEP_4;
 	}
 
@@ -215,374 +213,391 @@ static int dib0070_captrim(struct dib0070_state *st, enum frontend_tune_state *t
 static int dib0070_set_ctrl_lo5(struct dvb_frontend *fe, u8 vco_bias_trim, u8 hf_div_trim, u8 cp_current, u8 third_order_filt)
 {
 	struct dib0070_state *state = fe->tuner_priv;
-    u16 lo5 = (third_order_filt << 14) | (0 << 13) | (1 << 12) | (3 << 9) | (cp_current << 6) | (hf_div_trim << 3) | (vco_bias_trim << 0);
-	dprintk( "CTRL_LO5: 0x%x", lo5);
+	u16 lo5 = (third_order_filt << 14) | (0 << 13) | (1 << 12) | (3 << 9) | (cp_current << 6) | (hf_div_trim << 3) | (vco_bias_trim << 0);
+	dprintk("CTRL_LO5: 0x%x", lo5);
 	return dib0070_write_reg(state, 0x15, lo5);
 }
 
-struct dib0070_tuning
-{
-    u32 max_freq; /* for every frequency less than or equal to that field: this information is correct */
-    u8 switch_trim;
-    u8 vco_band;
-    u8 hfdiv;
-    u8 vco_multi;
-    u8 presc;
-    u8 wbdmux;
-    u16 tuner_enable;
-};
-
-struct dib0070_lna_match
+void dib0070_ctrl_agc_filter(struct dvb_frontend *fe, u8 open)
 {
-    u32 max_freq; /* for every frequency less than or equal to that field: this information is correct */
-    u8 lna_band;
-};
+	struct dib0070_state *state = fe->tuner_priv;
 
-static const struct dib0070_tuning dib0070s_tuning_table[] =
+	if (open) {
+		dib0070_write_reg(state, 0x1b, 0xff00);
+		dib0070_write_reg(state, 0x1a, 0x0000);
+	} else {
+		dib0070_write_reg(state, 0x1b, 0x4112);
+		if (state->cfg->vga_filter != 0) {
+			dib0070_write_reg(state, 0x1a, state->cfg->vga_filter);
+			dprintk("vga filter register is set to %x", state->cfg->vga_filter);
+		} else
+			dib0070_write_reg(state, 0x1a, 0x0009);
+	}
+}
 
-{
-    {     570000, 2, 1, 3, 6, 6, 2, 0x4000 | 0x0800 }, /* UHF */
-    {     700000, 2, 0, 2, 4, 2, 2, 0x4000 | 0x0800 },
-    {     863999, 2, 1, 2, 4, 2, 2, 0x4000 | 0x0800 },
-    {    1500000, 0, 1, 1, 2, 2, 4, 0x2000 | 0x0400 }, /* LBAND */
-    {    1600000, 0, 1, 1, 2, 2, 4, 0x2000 | 0x0400 },
-    {    2000000, 0, 1, 1, 2, 2, 4, 0x2000 | 0x0400 },
-    { 0xffffffff, 0, 0, 8, 1, 2, 1, 0x8000 | 0x1000 }, /* SBAND */
+EXPORT_SYMBOL(dib0070_ctrl_agc_filter);
+struct dib0070_tuning {
+	u32 max_freq;		/* for every frequency less than or equal to that field: this information is correct */
+	u8 switch_trim;
+	u8 vco_band;
+	u8 hfdiv;
+	u8 vco_multi;
+	u8 presc;
+	u8 wbdmux;
+	u16 tuner_enable;
 };
 
-static const struct dib0070_tuning dib0070_tuning_table[] =
-
-{
-    {     115000, 1, 0, 7, 24, 2, 1, 0x8000 | 0x1000 }, /* FM below 92MHz cannot be tuned */
-    {     179500, 1, 0, 3, 16, 2, 1, 0x8000 | 0x1000 }, /* VHF */
-    {     189999, 1, 1, 3, 16, 2, 1, 0x8000 | 0x1000 },
-    {     250000, 1, 0, 6, 12, 2, 1, 0x8000 | 0x1000 },
-    {     569999, 2, 1, 5,  6, 2, 2, 0x4000 | 0x0800 }, /* UHF */
-    {     699999, 2, 0 ,1,  4, 2, 2, 0x4000 | 0x0800 },
-    {     863999, 2, 1, 1,  4, 2, 2, 0x4000 | 0x0800 },
-    { 0xffffffff, 0, 1, 0,  2, 2, 4, 0x2000 | 0x0400 }, /* LBAND or everything higher than UHF */
+struct dib0070_lna_match {
+	u32 max_freq;		/* for every frequency less than or equal to that field: this information is correct */
+	u8 lna_band;
 };
 
-static const struct dib0070_lna_match dib0070_lna_flip_chip[] =
+static const struct dib0070_tuning dib0070s_tuning_table[] = {
+	{570000, 2, 1, 3, 6, 6, 2, 0x4000 | 0x0800},	/* UHF */
+	{700000, 2, 0, 2, 4, 2, 2, 0x4000 | 0x0800},
+	{863999, 2, 1, 2, 4, 2, 2, 0x4000 | 0x0800},
+	{1500000, 0, 1, 1, 2, 2, 4, 0x2000 | 0x0400},	/* LBAND */
+	{1600000, 0, 1, 1, 2, 2, 4, 0x2000 | 0x0400},
+	{2000000, 0, 1, 1, 2, 2, 4, 0x2000 | 0x0400},
+	{0xffffffff, 0, 0, 8, 1, 2, 1, 0x8000 | 0x1000},	/* SBAND */
+};
 
-{
-    {     180000, 0 }, /* VHF */
-    {     188000, 1 },
-    {     196400, 2 },
-    {     250000, 3 },
-    {     550000, 0 }, /* UHF */
-    {     590000, 1 },
-    {     666000, 3 },
-    {     864000, 5 },
-    {    1500000, 0 }, /* LBAND or everything higher than UHF */
-    {    1600000, 1 },
-    {    2000000, 3 },
-    { 0xffffffff, 7 },
+static const struct dib0070_tuning dib0070_tuning_table[] = {
+	{115000, 1, 0, 7, 24, 2, 1, 0x8000 | 0x1000},	/* FM below 92MHz cannot be tuned */
+	{179500, 1, 0, 3, 16, 2, 1, 0x8000 | 0x1000},	/* VHF */
+	{189999, 1, 1, 3, 16, 2, 1, 0x8000 | 0x1000},
+	{250000, 1, 0, 6, 12, 2, 1, 0x8000 | 0x1000},
+	{569999, 2, 1, 5, 6, 2, 2, 0x4000 | 0x0800},	/* UHF */
+	{699999, 2, 0, 1, 4, 2, 2, 0x4000 | 0x0800},
+	{863999, 2, 1, 1, 4, 2, 2, 0x4000 | 0x0800},
+	{0xffffffff, 0, 1, 0, 2, 2, 4, 0x2000 | 0x0400},	/* LBAND or everything higher than UHF */
 };
 
-static const struct dib0070_lna_match dib0070_lna[] =
+static const struct dib0070_lna_match dib0070_lna_flip_chip[] = {
+	{180000, 0},		/* VHF */
+	{188000, 1},
+	{196400, 2},
+	{250000, 3},
+	{550000, 0},		/* UHF */
+	{590000, 1},
+	{666000, 3},
+	{864000, 5},
+	{1500000, 0},		/* LBAND or everything higher than UHF */
+	{1600000, 1},
+	{2000000, 3},
+	{0xffffffff, 7},
+};
 
-{
-    {     180000, 0 }, /* VHF */
-    {     188000, 1 },
-    {     196400, 2 },
-    {     250000, 3 },
-    {     550000, 2 }, /* UHF */
-    {     650000, 3 },
-    {     750000, 5 },
-    {     850000, 6 },
-    {     864000, 7 },
-    {    1500000, 0 }, /* LBAND or everything higher than UHF */
-    {    1600000, 1 },
-    {    2000000, 3 },
-    { 0xffffffff, 7 },
+static const struct dib0070_lna_match dib0070_lna[] = {
+	{180000, 0},		/* VHF */
+	{188000, 1},
+	{196400, 2},
+	{250000, 3},
+	{550000, 2},		/* UHF */
+	{650000, 3},
+	{750000, 5},
+	{850000, 6},
+	{864000, 7},
+	{1500000, 0},		/* LBAND or everything higher than UHF */
+	{1600000, 1},
+	{2000000, 3},
+	{0xffffffff, 7},
 };
 
-#define LPF	100                       // define for the loop filter 100kHz by default 16-07-06
+#define LPF	100		// define for the loop filter 100kHz by default 16-07-06
 static int dib0070_tune_digital(struct dvb_frontend *fe, struct dvb_frontend_parameters *ch)
 {
-    struct dib0070_state *st = fe->tuner_priv;
-
-    const struct dib0070_tuning *tune;
-    const struct dib0070_lna_match *lna_match;
-
-    enum frontend_tune_state *tune_state = &st->tune_state;
-    int ret = 10; /* 1ms is the default delay most of the time */
-
-    u8  band = (u8)BAND_OF_FREQUENCY(ch->frequency/1000);
-    u32 freq = ch->frequency/1000 + (band == BAND_VHF ? st->cfg->freq_offset_khz_vhf : st->cfg->freq_offset_khz_uhf);
-
-
-
+	struct dib0070_state *state = fe->tuner_priv;
 
+	const struct dib0070_tuning *tune;
+	const struct dib0070_lna_match *lna_match;
 
-#ifdef CONFIG_STANDARD_ISDBT
-    if (fe->dtv_property_cache.delivery_system == SYS_ISDBT && ch->u.isdbt.sb_mode == 1)
-	if ( ( (ch->u.isdbt.sb_conn_total_seg % 2)       && (ch->u.isdbt.sb_wanted_seg == ((ch->u.isdbt.sb_conn_total_seg/2) + 1) ) ) ||
-	   ( ( (ch->u.isdbt.sb_conn_total_seg % 2) == 0) && (ch->u.isdbt.sb_wanted_seg ==  (ch->u.isdbt.sb_conn_total_seg/2)      ) ) ||
-	   ( ( (ch->u.isdbt.sb_conn_total_seg % 2) == 0) && (ch->u.isdbt.sb_wanted_seg == ((ch->u.isdbt.sb_conn_total_seg/2)+1))) )
-	    freq += 850;
+	enum frontend_tune_state *tune_state = &state->tune_state;
+	int ret = 10;		/* 1ms is the default delay most of the time */
+
+	u8 band = (u8) BAND_OF_FREQUENCY(fe->dtv_property_cache.frequency / 1000);
+	u32 freq = fe->dtv_property_cache.frequency / 1000 + (band == BAND_VHF ? state->cfg->freq_offset_khz_vhf : state->cfg->freq_offset_khz_uhf);
+
+#ifdef CONFIG_SYS_ISDBT
+	if (state->fe->dtv_property_cache.delivery_system == SYS_ISDBT && state->fe->dtv_property_cache.isdbt_sb_mode == 1)
+		if (((state->fe->dtv_property_cache.isdbt_sb_segment_count % 2)
+		     && (state->fe->dtv_property_cache.isdbt_sb_segment_idx == ((state->fe->dtv_property_cache.isdbt_sb_segment_count / 2) + 1)))
+		    || (((state->fe->dtv_property_cache.isdbt_sb_segment_count % 2) == 0)
+			&& (state->fe->dtv_property_cache.isdbt_sb_segment_idx == (state->fe->dtv_property_cache.isdbt_sb_segment_count / 2)))
+		    || (((state->fe->dtv_property_cache.isdbt_sb_segment_count % 2) == 0)
+			&& (state->fe->dtv_property_cache.isdbt_sb_segment_idx == ((state->fe->dtv_property_cache.isdbt_sb_segment_count / 2) + 1))))
+			freq += 850;
 #endif
-    if (st->current_rf != freq) {
-
-	switch (st->revision) {
-	case DIB0070S_P1A:
-	    tune = dib0070s_tuning_table;
-	    lna_match = dib0070_lna;
-	    break;
-	default:
-	    tune = dib0070_tuning_table;
-	    if (st->cfg->flip_chip)
-		lna_match = dib0070_lna_flip_chip;
-	    else
-		lna_match = dib0070_lna;
-	    break;
-	}
-	while (freq > tune->max_freq) /* find the right one */
-	    tune++;
-	while (freq > lna_match->max_freq) /* find the right one */
-	    lna_match++;
-
-	st->current_tune_table_index = tune;
-	st->lna_match = lna_match;
-    }
-
-    if (*tune_state == CT_TUNER_START) {
-	dprintk( "Tuning for Band: %hd (%d kHz)", band, freq);
-	if (st->current_rf != freq) {
-	    u8 REFDIV;
-	    u32 FBDiv, Rest, FREF, VCOF_kHz;
-	    u8 Den;
-
-	    st->current_rf = freq;
-	    st->lo4 = (st->current_tune_table_index->vco_band << 11) | (st->current_tune_table_index->hfdiv << 7);
-
-
-	    dib0070_write_reg(st, 0x17, 0x30);
-
-
-	    VCOF_kHz = st->current_tune_table_index->vco_multi * freq * 2;
-
-	    switch (band) {
-	    case BAND_VHF:
-		REFDIV = (u8) ((st->cfg->clock_khz + 9999) / 10000);
-		break;
-	    case BAND_FM:
-		REFDIV = (u8) ((st->cfg->clock_khz) / 1000);
-		break;
-	    default:
-		REFDIV = (u8) ( st->cfg->clock_khz  / 10000);
-		break;
-	    }
-	    FREF = st->cfg->clock_khz / REFDIV;
-
-
-
-	    switch (st->revision) {
-	    case DIB0070S_P1A:
-		FBDiv = (VCOF_kHz / st->current_tune_table_index->presc / FREF);
-		Rest  = (VCOF_kHz / st->current_tune_table_index->presc) - FBDiv * FREF;
-		break;
-
-	    case DIB0070_P1G:
-	    case DIB0070_P1F:
-	    default:
-		FBDiv = (freq / (FREF / 2));
-		Rest  = 2 * freq - FBDiv * FREF;
-		break;
-	    }
-
-
-	    if (Rest < LPF)              Rest = 0;
-	    else if (Rest < 2 * LPF)          Rest = 2 * LPF;
-	    else if (Rest > (FREF - LPF))   { Rest = 0 ; FBDiv += 1; }
-	    else if (Rest > (FREF - 2 * LPF)) Rest = FREF - 2 * LPF;
-	    Rest = (Rest * 6528) / (FREF / 10);
-
-	    Den = 1;
-	    if (Rest > 0) {
-		st->lo4 |= (1 << 14) | (1 << 12);
-		Den = 255;
-	    }
-
-
-	    dib0070_write_reg(st, 0x11, (u16)FBDiv);
-	    dib0070_write_reg(st, 0x12, (Den << 8) | REFDIV);
-	    dib0070_write_reg(st, 0x13, (u16) Rest);
-
-	    if (st->revision == DIB0070S_P1A) {
-
-		if (band == BAND_SBAND) {
-		    dib0070_set_ctrl_lo5(fe, 2, 4, 3, 0);
-		    dib0070_write_reg(st, 0x1d,0xFFFF);
-		} else
-		    dib0070_set_ctrl_lo5(fe, 5, 4, 3, 1);
-	    }
-
+	if (state->current_rf != freq) {
+
+		switch (state->revision) {
+		case DIB0070S_P1A:
+			tune = dib0070s_tuning_table;
+			lna_match = dib0070_lna;
+			break;
+		default:
+			tune = dib0070_tuning_table;
+			if (state->cfg->flip_chip)
+				lna_match = dib0070_lna_flip_chip;
+			else
+				lna_match = dib0070_lna;
+			break;
+		}
+		while (freq > tune->max_freq)	/* find the right one */
+			tune++;
+		while (freq > lna_match->max_freq)	/* find the right one */
+			lna_match++;
 
-	    dib0070_write_reg(st, 0x20, 0x0040 | 0x0020 | 0x0010 | 0x0008 | 0x0002 | 0x0001 | st->current_tune_table_index->tuner_enable);
+		state->current_tune_table_index = tune;
+		state->lna_match = lna_match;
+	}
 
-	    dprintk( "REFDIV: %hd, FREF: %d", REFDIV, FREF);
-	    dprintk( "FBDIV: %d, Rest: %d", FBDiv, Rest);
-	    dprintk( "Num: %hd, Den: %hd, SD: %hd",(u16) Rest, Den, (st->lo4 >> 12) & 0x1);
-	    dprintk( "HFDIV code: %hd", st->current_tune_table_index->hfdiv);
-	    dprintk( "VCO = %hd", st->current_tune_table_index->vco_band);
-	    dprintk( "VCOF: ((%hd*%d) << 1))", st->current_tune_table_index->vco_multi, freq);
+	if (*tune_state == CT_TUNER_START) {
+		dprintk("Tuning for Band: %hd (%d kHz)", band, freq);
+		if (state->current_rf != freq) {
+			u8 REFDIV;
+			u32 FBDiv, Rest, FREF, VCOF_kHz;
+			u8 Den;
+
+			state->current_rf = freq;
+			state->lo4 = (state->current_tune_table_index->vco_band << 11) | (state->current_tune_table_index->hfdiv << 7);
+
+			dib0070_write_reg(state, 0x17, 0x30);
+
+			VCOF_kHz = state->current_tune_table_index->vco_multi * freq * 2;
+
+			switch (band) {
+			case BAND_VHF:
+				REFDIV = (u8) ((state->cfg->clock_khz + 9999) / 10000);
+				break;
+			case BAND_FM:
+				REFDIV = (u8) ((state->cfg->clock_khz) / 1000);
+				break;
+			default:
+				REFDIV = (u8) (state->cfg->clock_khz / 10000);
+				break;
+			}
+			FREF = state->cfg->clock_khz / REFDIV;
+
+			switch (state->revision) {
+			case DIB0070S_P1A:
+				FBDiv = (VCOF_kHz / state->current_tune_table_index->presc / FREF);
+				Rest = (VCOF_kHz / state->current_tune_table_index->presc) - FBDiv * FREF;
+				break;
+
+			case DIB0070_P1G:
+			case DIB0070_P1F:
+			default:
+				FBDiv = (freq / (FREF / 2));
+				Rest = 2 * freq - FBDiv * FREF;
+				break;
+			}
+
+			if (Rest < LPF)
+				Rest = 0;
+			else if (Rest < 2 * LPF)
+				Rest = 2 * LPF;
+			else if (Rest > (FREF - LPF)) {
+				Rest = 0;
+				FBDiv += 1;
+			} else if (Rest > (FREF - 2 * LPF))
+				Rest = FREF - 2 * LPF;
+			Rest = (Rest * 6528) / (FREF / 10);
+
+			Den = 1;
+			if (Rest > 0) {
+				state->lo4 |= (1 << 14) | (1 << 12);
+				Den = 255;
+			}
+
+			dib0070_write_reg(state, 0x11, (u16) FBDiv);
+			dib0070_write_reg(state, 0x12, (Den << 8) | REFDIV);
+			dib0070_write_reg(state, 0x13, (u16) Rest);
+
+			if (state->revision == DIB0070S_P1A) {
+
+				if (band == BAND_SBAND) {
+					dib0070_set_ctrl_lo5(fe, 2, 4, 3, 0);
+					dib0070_write_reg(state, 0x1d, 0xFFFF);
+				} else
+					dib0070_set_ctrl_lo5(fe, 5, 4, 3, 1);
+			}
+
+			dib0070_write_reg(state, 0x20,
+					  0x0040 | 0x0020 | 0x0010 | 0x0008 | 0x0002 | 0x0001 | state->current_tune_table_index->tuner_enable);
+
+			dprintk("REFDIV: %hd, FREF: %d", REFDIV, FREF);
+			dprintk("FBDIV: %d, Rest: %d", FBDiv, Rest);
+			dprintk("Num: %hd, Den: %hd, SD: %hd", (u16) Rest, Den, (state->lo4 >> 12) & 0x1);
+			dprintk("HFDIV code: %hd", state->current_tune_table_index->hfdiv);
+			dprintk("VCO = %hd", state->current_tune_table_index->vco_band);
+			dprintk("VCOF: ((%hd*%d) << 1))", state->current_tune_table_index->vco_multi, freq);
+
+			*tune_state = CT_TUNER_STEP_0;
+		} else {	/* we are already tuned to this frequency - the configuration is correct  */
+			ret = 50;	/* wakeup time */
+			*tune_state = CT_TUNER_STEP_5;
+		}
+	} else if ((*tune_state > CT_TUNER_START) && (*tune_state < CT_TUNER_STEP_4)) {
+
+		ret = dib0070_captrim(state, tune_state);
+
+	} else if (*tune_state == CT_TUNER_STEP_4) {
+		const struct dib0070_wbd_gain_cfg *tmp = state->cfg->wbd_gain;
+		if (tmp != NULL) {
+			while (freq / 1000 > tmp->freq)	/* find the right one */
+				tmp++;
+			dib0070_write_reg(state, 0x0f,
+					  (0 << 15) | (1 << 14) | (3 << 12) | (tmp->wbd_gain_val << 9) | (0 << 8) | (1 << 7) | (state->
+																current_tune_table_index->
+																wbdmux << 0));
+			state->wbd_gain_current = tmp->wbd_gain_val;
+		} else {
+			dib0070_write_reg(state, 0x0f,
+					  (0 << 15) | (1 << 14) | (3 << 12) | (6 << 9) | (0 << 8) | (1 << 7) | (state->current_tune_table_index->
+														wbdmux << 0));
+			state->wbd_gain_current = 6;
+		}
 
-	    *tune_state = CT_TUNER_STEP_0;
-	} else { /* we are already tuned to this frequency - the configuration is correct  */
-	    ret = 50; /* wakeup time */
-	    *tune_state = CT_TUNER_STEP_5;
-	}
-    } else if ((*tune_state > CT_TUNER_START) && (*tune_state < CT_TUNER_STEP_4)) {
+		dib0070_write_reg(state, 0x06, 0x3fff);
+		dib0070_write_reg(state, 0x07,
+				  (state->current_tune_table_index->switch_trim << 11) | (7 << 8) | (state->lna_match->lna_band << 3) | (3 << 0));
+		dib0070_write_reg(state, 0x08, (state->lna_match->lna_band << 10) | (3 << 7) | (127));
+		dib0070_write_reg(state, 0x0d, 0x0d80);
 
-	ret = dib0070_captrim(st, tune_state);
+		dib0070_write_reg(state, 0x18, 0x07ff);
+		dib0070_write_reg(state, 0x17, 0x0033);
 
-    } else if (*tune_state == CT_TUNER_STEP_4) {
-	const struct dib0070_wbd_gain_cfg *tmp = st->cfg->wbd_gain;
-	if (tmp != NULL) {
-	    while (freq/1000 > tmp->freq) /* find the right one */
-		tmp++;
-	    dib0070_write_reg(st, 0x0f, (0 << 15) | (1 << 14) | (3 << 12) | (tmp->wbd_gain_val << 9) | (0 << 8) | (1 << 7) | (st->current_tune_table_index->wbdmux << 0));
-	    st->wbd_gain_current = tmp->wbd_gain_val;
+		*tune_state = CT_TUNER_STEP_5;
+	} else if (*tune_state == CT_TUNER_STEP_5) {
+		dib0070_set_bandwidth(fe, ch);
+		*tune_state = CT_TUNER_STOP;
 	} else {
-	    dib0070_write_reg(st, 0x0f, (0 << 15) | (1 << 14) | (3 << 12) | (6 << 9) | (0 << 8) | (1 << 7) | (st->current_tune_table_index->wbdmux << 0));
-	    st->wbd_gain_current = 6;
+		ret = FE_CALLBACK_TIME_NEVER;	/* tuner finished, time to call again infinite */
 	}
-
-	dib0070_write_reg(st, 0x06, 0x3fff);
-	dib0070_write_reg(st, 0x07, (st->current_tune_table_index->switch_trim << 11) | (7 << 8) | (st->lna_match->lna_band << 3) | (3 << 0));
-	dib0070_write_reg(st, 0x08, (st->lna_match->lna_band << 10) | (3 << 7) | (127));
-	dib0070_write_reg(st, 0x0d, 0x0d80);
-
-
-	dib0070_write_reg(st, 0x18,   0x07ff);
-	dib0070_write_reg(st, 0x17, 0x0033);
-
-
-	*tune_state = CT_TUNER_STEP_5;
-    } else if (*tune_state == CT_TUNER_STEP_5) {
-	dib0070_set_bandwidth(fe, ch);
-	*tune_state = CT_TUNER_STOP;
-    } else {
-	ret = FE_CALLBACK_TIME_NEVER; /* tuner finished, time to call again infinite */
-    }
-    return ret;
+	return ret;
 }
 
-
 static int dib0070_tune(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)
 {
-    struct dib0070_state *state = fe->tuner_priv;
-    uint32_t ret;
+	struct dib0070_state *state = fe->tuner_priv;
+	uint32_t ret;
 
-    state->tune_state = CT_TUNER_START;
+	state->tune_state = CT_TUNER_START;
 
-    do {
-	ret = dib0070_tune_digital(fe, p);
-	if (ret != FE_CALLBACK_TIME_NEVER)
-	    msleep(ret/10);
-	else
-	    break;
-    } while (state->tune_state != CT_TUNER_STOP);
+	do {
+		ret = dib0070_tune_digital(fe, p);
+		if (ret != FE_CALLBACK_TIME_NEVER)
+			msleep(ret / 10);
+		else
+			break;
+	} while (state->tune_state != CT_TUNER_STOP);
 
-    return 0;
+	return 0;
 }
 
 static int dib0070_wakeup(struct dvb_frontend *fe)
 {
-	struct dib0070_state *st = fe->tuner_priv;
-	if (st->cfg->sleep)
-		st->cfg->sleep(fe, 0);
+	struct dib0070_state *state = fe->tuner_priv;
+	if (state->cfg->sleep)
+		state->cfg->sleep(fe, 0);
 	return 0;
 }
 
 static int dib0070_sleep(struct dvb_frontend *fe)
 {
-	struct dib0070_state *st = fe->tuner_priv;
-	if (st->cfg->sleep)
-		st->cfg->sleep(fe, 1);
+	struct dib0070_state *state = fe->tuner_priv;
+	if (state->cfg->sleep)
+		state->cfg->sleep(fe, 1);
 	return 0;
 }
 
-static const u16 dib0070_p1f_defaults[] =
-
-{
+static const u16 dib0070_p1f_defaults[] = {
 	7, 0x02,
-		0x0008,
-		0x0000,
-		0x0000,
-		0x0000,
-		0x0000,
-		0x0002,
-		0x0100,
+	0x0008,
+	0x0000,
+	0x0000,
+	0x0000,
+	0x0000,
+	0x0002,
+	0x0100,
 
 	3, 0x0d,
-		0x0d80,
-		0x0001,
-		0x0000,
+	0x0d80,
+	0x0001,
+	0x0000,
 
 	4, 0x11,
-		0x0000,
-		0x0103,
-		0x0000,
-		0x0000,
+	0x0000,
+	0x0103,
+	0x0000,
+	0x0000,
 
 	3, 0x16,
-		0x0004 | 0x0040,
-		0x0030,
-		0x07ff,
+	0x0004 | 0x0040,
+	0x0030,
+	0x07ff,
 
 	6, 0x1b,
-		0x4112,
-		0xff00,
-		0xc07f,
-		0x0000,
-		0x0180,
-		0x4000 | 0x0800 | 0x0040 | 0x0020 | 0x0010 | 0x0008 | 0x0002 | 0x0001,
+	0x4112,
+	0xff00,
+	0xc07f,
+	0x0000,
+	0x0180,
+	0x4000 | 0x0800 | 0x0040 | 0x0020 | 0x0010 | 0x0008 | 0x0002 | 0x0001,
 
 	0,
 };
 
 static u16 dib0070_read_wbd_offset(struct dib0070_state *state, u8 gain)
 {
-    u16 tuner_en = dib0070_read_reg(state, 0x20);
-    u16 offset;
-
-    dib0070_write_reg(state, 0x18, 0x07ff);
-    dib0070_write_reg(state, 0x20, 0x0800 | 0x4000 | 0x0040 | 0x0020 | 0x0010 | 0x0008 | 0x0002 | 0x0001);
-    dib0070_write_reg(state, 0x0f, (1 << 14) | (2 << 12) | (gain << 9) | (1 << 8) | (1 << 7) | (0 << 0));
-    msleep(9);
-    offset = dib0070_read_reg(state, 0x19);
-    dib0070_write_reg(state, 0x20, tuner_en);
-    return offset;
+	u16 tuner_en = dib0070_read_reg(state, 0x20);
+	u16 offset;
+
+	dib0070_write_reg(state, 0x18, 0x07ff);
+	dib0070_write_reg(state, 0x20, 0x0800 | 0x4000 | 0x0040 | 0x0020 | 0x0010 | 0x0008 | 0x0002 | 0x0001);
+	dib0070_write_reg(state, 0x0f, (1 << 14) | (2 << 12) | (gain << 9) | (1 << 8) | (1 << 7) | (0 << 0));
+	msleep(9);
+	offset = dib0070_read_reg(state, 0x19);
+	dib0070_write_reg(state, 0x20, tuner_en);
+	return offset;
 }
 
 static void dib0070_wbd_offset_calibration(struct dib0070_state *state)
 {
-    u8 gain;
-    for (gain = 6; gain < 8; gain++) {
-	state->wbd_offset_3_3[gain - 6] = ((dib0070_read_wbd_offset(state, gain) * 8 * 18 / 33 + 1) / 2);
-	dprintk( "Gain: %d, WBDOffset (3.3V) = %hd", gain, state->wbd_offset_3_3[gain-6]);
-    }
+	u8 gain;
+	for (gain = 6; gain < 8; gain++) {
+		state->wbd_offset_3_3[gain - 6] = ((dib0070_read_wbd_offset(state, gain) * 8 * 18 / 33 + 1) / 2);
+		dprintk("Gain: %d, WBDOffset (3.3V) = %hd", gain, state->wbd_offset_3_3[gain - 6]);
+	}
 }
 
 u16 dib0070_wbd_offset(struct dvb_frontend *fe)
 {
-	struct dib0070_state *st = fe->tuner_priv;
-	return st->wbd_offset_3_3[st->wbd_gain_current - 6];
+	struct dib0070_state *state = fe->tuner_priv;
+	const struct dib0070_wbd_gain_cfg *tmp = state->cfg->wbd_gain;
+	u32 freq = fe->dtv_property_cache.frequency / 1000;
+
+	if (tmp != NULL) {
+		while (freq / 1000 > tmp->freq)	/* find the right one */
+			tmp++;
+		state->wbd_gain_current = tmp->wbd_gain_val;
+	} else
+		state->wbd_gain_current = 6;
+
+	return state->wbd_offset_3_3[state->wbd_gain_current - 6];
 }
 
 EXPORT_SYMBOL(dib0070_wbd_offset);
+
 #define pgm_read_word(w) (*w)
 static int dib0070_reset(struct dvb_frontend *fe)
 {
-    struct dib0070_state *state = fe->tuner_priv;
+	struct dib0070_state *state = fe->tuner_priv;
 	u16 l, r, *n;
 
 	HARD_RESET(state);
 
-
 #ifndef FORCE_SBAND_TUNER
 	if ((dib0070_read_reg(state, 0x22) >> 9) & 0x1)
 		state->revision = (dib0070_read_reg(state, 0x1f) >> 8) & 0xff;
@@ -590,13 +605,13 @@ static int dib0070_reset(struct dvb_frontend *fe)
 #else
 #warning forcing SBAND
 #endif
-		state->revision = DIB0070S_P1A;
+	state->revision = DIB0070S_P1A;
 
 	/* P1F or not */
-	dprintk( "Revision: %x", state->revision);
+	dprintk("Revision: %x", state->revision);
 
 	if (state->revision == DIB0070_P1D) {
-		dprintk( "Error: this driver is not to be used meant for P1D or earlier");
+		dprintk("Error: this driver is not to be used meant for P1D or earlier");
 		return -EINVAL;
 	}
 
@@ -605,7 +620,7 @@ static int dib0070_reset(struct dvb_frontend *fe)
 	while (l) {
 		r = pgm_read_word(n++);
 		do {
-			dib0070_write_reg(state, (u8)r, pgm_read_word(n++));
+			dib0070_write_reg(state, (u8) r, pgm_read_word(n++));
 			r++;
 		} while (--l);
 		l = pgm_read_word(n++);
@@ -618,7 +633,6 @@ static int dib0070_reset(struct dvb_frontend *fe)
 	else
 		r = 2;
 
-
 	r |= state->cfg->osc_buffer_state << 3;
 
 	dib0070_write_reg(state, 0x10, r);
@@ -629,9 +643,9 @@ static int dib0070_reset(struct dvb_frontend *fe)
 		dib0070_write_reg(state, 0x02, r | (1 << 5));
 	}
 
-    if (state->revision == DIB0070S_P1A)
-	dib0070_set_ctrl_lo5(fe, 2, 4, 3, 0);
-    else
+	if (state->revision == DIB0070S_P1A)
+		dib0070_set_ctrl_lo5(fe, 2, 4, 3, 0);
+	else
 		dib0070_set_ctrl_lo5(fe, 5, 4, state->cfg->charge_pump, state->cfg->enable_third_order_filter);
 
 #if 0
@@ -651,12 +665,11 @@ static int dib0070_reset(struct dvb_frontend *fe)
 	dib0070_write_reg(state, 0x01, (54 << 9) | 0xc8);
 #endif
 
-    dib0070_wbd_offset_calibration(state);
+	dib0070_wbd_offset_calibration(state);
 
-    return 0;
+	return 0;
 }
 
-
 static int dib0070_release(struct dvb_frontend *fe)
 {
 	kfree(fe->tuner_priv);
@@ -666,22 +679,22 @@ static int dib0070_release(struct dvb_frontend *fe)
 
 static const struct dvb_tuner_ops dib0070_ops = {
 	.info = {
-		.name           = "DiBcom DiB0070",
-		.frequency_min  =  45000000,
-		.frequency_max  = 860000000,
-		.frequency_step =      1000,
-	},
-	.release       = dib0070_release,
-
-	.init          = dib0070_wakeup,
-	.sleep         = dib0070_sleep,
-	.set_params    = dib0070_tune,
-
-//	.get_frequency = dib0070_get_frequency,
-//	.get_bandwidth = dib0070_get_bandwidth
+		 .name = "DiBcom DiB0070",
+		 .frequency_min = 45000000,
+		 .frequency_max = 860000000,
+		 .frequency_step = 1000,
+		 },
+	.release = dib0070_release,
+
+	.init = dib0070_wakeup,
+	.sleep = dib0070_sleep,
+	.set_params = dib0070_tune,
+
+//      .get_frequency = dib0070_get_frequency,
+//      .get_bandwidth = dib0070_get_bandwidth
 };
 
-struct dvb_frontend * dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg)
+struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg)
 {
 	struct dib0070_state *state = kzalloc(sizeof(struct dib0070_state), GFP_KERNEL);
 	if (state == NULL)
@@ -689,7 +702,7 @@ struct dvb_frontend * dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter
 
 	state->cfg = cfg;
 	state->i2c = i2c;
-	state->fe  = fe;
+	state->fe = fe;
 	fe->tuner_priv = state;
 
 	if (dib0070_reset(fe) != 0)
@@ -701,11 +714,12 @@ struct dvb_frontend * dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter
 	fe->tuner_priv = state;
 	return fe;
 
-free_mem:
+ free_mem:
 	kfree(state);
 	fe->tuner_priv = NULL;
 	return NULL;
 }
+
 EXPORT_SYMBOL(dib0070_attach);
 
 MODULE_AUTHOR("Patrick Boettcher <pboettcher@dibcom.fr>");
diff --git a/linux/drivers/media/dvb/frontends/dib0070.h b/linux/drivers/media/dvb/frontends/dib0070.h
index 8c1c51cfa..8a2e1e710 100644
--- a/linux/drivers/media/dvb/frontends/dib0070.h
+++ b/linux/drivers/media/dvb/frontends/dib0070.h
@@ -16,8 +16,8 @@ struct i2c_adapter;
 #define DEFAULT_DIB0070_I2C_ADDRESS 0x60
 
 struct dib0070_wbd_gain_cfg {
-    u16 freq;
-    u16 wbd_gain_val;
+	u16 freq;
+	u16 wbd_gain_val;
 };
 
 struct dib0070_config {
@@ -31,32 +31,28 @@ struct dib0070_config {
 	int freq_offset_khz_uhf;
 	int freq_offset_khz_vhf;
 
-	u8 osc_buffer_state; /* 0= normal, 1= tri-state */
-	u32  clock_khz;
-	u8 clock_pad_drive; /* (Drive + 1) * 2mA */
+	u8 osc_buffer_state;	/* 0= normal, 1= tri-state */
+	u32 clock_khz;
+	u8 clock_pad_drive;	/* (Drive + 1) * 2mA */
 
-	u8 invert_iq; /* invert Q - in case I or Q is inverted on the board */
+	u8 invert_iq;		/* invert Q - in case I or Q is inverted on the board */
 
-	u8 force_crystal_mode; /* if == 0 -> decision is made in the driver default: <24 -> 2, >=24 -> 1 */
+	u8 force_crystal_mode;	/* if == 0 -> decision is made in the driver default: <24 -> 2, >=24 -> 1 */
 
 	u8 flip_chip;
-    u8 enable_third_order_filter;
-    u8 charge_pump;
+	u8 enable_third_order_filter;
+	u8 charge_pump;
 
-	const struct dib0070_wbd_gain_cfg * wbd_gain;
+	const struct dib0070_wbd_gain_cfg *wbd_gain;
 
-    u8 vga_filter;
+	u8 vga_filter;
 };
 
 #if defined(CONFIG_DVB_TUNER_DIB0070) || (defined(CONFIG_DVB_TUNER_DIB0070_MODULE) && defined(MODULE))
-extern struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe,
-					   struct i2c_adapter *i2c,
-					   struct dib0070_config *cfg);
+extern struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg);
 extern u16 dib0070_wbd_offset(struct dvb_frontend *);
 #else
-static inline struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe,
-						  struct i2c_adapter *i2c,
-						  struct dib0070_config *cfg)
+static inline struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg)
 {
 	printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
 	return NULL;
@@ -68,5 +64,6 @@ static inline u16 dib0070_wbd_offset(struct dvb_frontend *fe)
 	return -ENODEV;
 }
 #endif
+extern void dib0070_ctrl_agc_filter(struct dvb_frontend *, u8 open);
 
 #endif
-- 
cgit v1.2.3


From 5cff02002fb10cd0c91a87a8587f20c19951cb4e Mon Sep 17 00:00:00 2001
From: Patrick Boettcher <pboettcher@kernellabs.com>
Date: Mon, 17 Aug 2009 12:01:10 +0200
Subject: DiB8000: added support for DiBcom ISDB-T/ISDB-Tsb demodulator DiB8000

From: Patrick Boettcher <pboettcher@dibcom.fr>

This commit adds support for the DiB8000 ISDB-T demodulator made by DiBcom.

Priority: normal

Signed-off-by: Olivier Grenie <Olivier.Grenie@dibcom.fr>
Signed-off-by: Patrick Boettcher <pboettcher@dibcom.fr>
---
 linux/drivers/media/dvb/dvb-usb/Kconfig            |    3 +-
 linux/drivers/media/dvb/frontends/Kconfig          |    8 +
 linux/drivers/media/dvb/frontends/Makefile         |    1 +
 linux/drivers/media/dvb/frontends/dib8000.c        | 2280 ++++++++++++++++++++
 linux/drivers/media/dvb/frontends/dib8000.h        |   79 +
 linux/drivers/media/dvb/frontends/dibx000_common.c |  130 +-
 linux/drivers/media/dvb/frontends/dibx000_common.h |   31 +-
 7 files changed, 2467 insertions(+), 65 deletions(-)
 create mode 100644 linux/drivers/media/dvb/frontends/dib8000.c
 create mode 100644 linux/drivers/media/dvb/frontends/dib8000.h

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/dvb-usb/Kconfig b/linux/drivers/media/dvb/dvb-usb/Kconfig
index 496c1a370..2197b7161 100644
--- a/linux/drivers/media/dvb/dvb-usb/Kconfig
+++ b/linux/drivers/media/dvb/dvb-usb/Kconfig
@@ -71,6 +71,7 @@ config DVB_USB_DIB0700
 	depends on DVB_USB
 	select DVB_DIB7000P if !DVB_FE_CUSTOMISE
 	select DVB_DIB7000M if !DVB_FE_CUSTOMISE
+	select DVB_DIB8000 if !DVB_FE_CUSTOMISE
 	select DVB_DIB3000MC if !DVB_FE_CUSTOMISE
 	select DVB_S5H1411 if !DVB_FE_CUSTOMISE
 	select DVB_LGDT3305 if !DVB_FE_CUSTOMISE
@@ -87,7 +88,7 @@ config DVB_USB_DIB0700
 	  Avermedia and other big and small companies.
 
 	  For an up-to-date list of devices supported by this driver, have a look
-	  on the Linux-DVB Wiki at www.linuxtv.org.
+	  on the LinuxTV Wiki at www.linuxtv.org.
 
 	  Say Y if you own such a device and want to use it. You should build it as
 	  a module.
diff --git a/linux/drivers/media/dvb/frontends/Kconfig b/linux/drivers/media/dvb/frontends/Kconfig
index be967ac09..1f43f9af8 100644
--- a/linux/drivers/media/dvb/frontends/Kconfig
+++ b/linux/drivers/media/dvb/frontends/Kconfig
@@ -477,6 +477,14 @@ config DVB_S921
 	  AN ISDB-T DQPSK, QPSK, 16QAM and 64QAM 1seg tuner module.
 	  Say Y when you want to support this frontend.
 
+config DVB_DIB8000
+	tristate "DiBcom 8000MB/MC"
+	depends on DVB_CORE && I2C
+	default m if DVB_FE_CUSTOMISE
+	help
+	  A driver for DiBcom's DiB8000 ISDB-T/ISDB-Tsb demodulator.
+	  Say Y when you want to support this frontend.
+
 comment "Digital terrestrial only tuners/PLL"
 	depends on DVB_CORE
 
diff --git a/linux/drivers/media/dvb/frontends/Makefile b/linux/drivers/media/dvb/frontends/Makefile
index 832473c1e..fa65868d7 100644
--- a/linux/drivers/media/dvb/frontends/Makefile
+++ b/linux/drivers/media/dvb/frontends/Makefile
@@ -23,6 +23,7 @@ obj-$(CONFIG_DVB_DIB3000MB) += dib3000mb.o
 obj-$(CONFIG_DVB_DIB3000MC) += dib3000mc.o dibx000_common.o
 obj-$(CONFIG_DVB_DIB7000M) += dib7000m.o dibx000_common.o
 obj-$(CONFIG_DVB_DIB7000P) += dib7000p.o dibx000_common.o
+obj-$(CONFIG_DVB_DIB8000) += dib8000.o dibx000_common.o
 obj-$(CONFIG_DVB_MT312) += mt312.o
 obj-$(CONFIG_DVB_VES1820) += ves1820.o
 obj-$(CONFIG_DVB_VES1X93) += ves1x93.o
diff --git a/linux/drivers/media/dvb/frontends/dib8000.c b/linux/drivers/media/dvb/frontends/dib8000.c
new file mode 100644
index 000000000..cc2fae3be
--- /dev/null
+++ b/linux/drivers/media/dvb/frontends/dib8000.c
@@ -0,0 +1,2280 @@
+/*
+ * Linux-DVB Driver for DiBcom's DiB8000 chip (ISDB-T).
+ *
+ * Copyright (C) 2009 DiBcom (http://www.dibcom.fr/)
+ *
+ * This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License as
+ *  published by the Free Software Foundation, version 2.
+ */
+#include <linux/kernel.h>
+#include <linux/i2c.h>
+#include "dvb_math.h"
+#include "compat.h"
+
+#include "dvb_frontend.h"
+
+#include "dib8000.h"
+
+#define LAYER_ALL -1
+#define LAYER_A   1
+#define LAYER_B   2
+#define LAYER_C   3
+
+#define FE_CALLBACK_TIME_NEVER 0xffffffff
+
+static int debug = 0;
+module_param(debug, int, 0644);
+MODULE_PARM_DESC(debug, "turn on debugging (default: 0)");
+
+#define dprintk(args...) do { if (debug) { printk(KERN_DEBUG "DiB8000: "); printk(args); printk("\n"); } } while (0)
+
+enum frontend_tune_state {
+	CT_AGC_START = 20,
+	CT_AGC_STEP_0,
+	CT_AGC_STEP_1,
+	CT_AGC_STEP_2,
+	CT_AGC_STEP_3,
+	CT_AGC_STEP_4,
+	CT_AGC_STOP,
+
+	CT_DEMOD_START = 30,
+};
+
+#define FE_STATUS_TUNE_FAILED 0
+
+struct i2c_device {
+	struct i2c_adapter *adap;
+	u8 addr;
+};
+
+struct dib8000_state {
+	struct dvb_frontend fe;
+	struct dib8000_config cfg;
+
+	struct i2c_device i2c;
+
+	struct dibx000_i2c_master i2c_master;
+
+	u16 wbd_ref;
+
+	u8 current_band;
+	u32 current_bandwidth;
+	struct dibx000_agc_config *current_agc;
+	u32 timf;
+	u32 timf_default;
+
+	u8 div_force_off:1;
+	u8 div_state:1;
+	u16 div_sync_wait;
+
+	u8 agc_state;
+	u8 differential_constellation;
+	u8 diversity_onoff;
+
+	s16 ber_monitored_layer;
+	u16 gpio_dir;
+	u16 gpio_val;
+
+	u16 revision;
+	u8 isdbt_cfg_loaded;
+	enum frontend_tune_state tune_state;
+	u32 status;
+};
+
+enum dib8000_power_mode {
+	DIB8000M_POWER_ALL = 0,
+	DIB8000M_POWER_INTERFACE_ONLY,
+};
+
+static u16 dib8000_i2c_read16(struct i2c_device *i2c, u16 reg)
+{
+	u8 wb[2] = { reg >> 8, reg & 0xff };
+	u8 rb[2];
+	struct i2c_msg msg[2] = {
+		{.addr = i2c->addr >> 1,.flags = 0,.buf = wb,.len = 2},
+		{.addr = i2c->addr >> 1,.flags = I2C_M_RD,.buf = rb,.len = 2},
+	};
+
+	if (i2c_transfer(i2c->adap, msg, 2) != 2)
+		dprintk("i2c read error on %d", reg);
+
+	return (rb[0] << 8) | rb[1];
+}
+
+static u16 dib8000_read_word(struct dib8000_state *state, u16 reg)
+{
+	return dib8000_i2c_read16(&state->i2c, reg);
+}
+
+static u32 dib8000_read32(struct dib8000_state *state, u16 reg)
+{
+	u16 rw[2];
+
+	rw[0] = dib8000_read_word(state, reg + 0);
+	rw[1] = dib8000_read_word(state, reg + 1);
+
+	return ((rw[0] << 16) | (rw[1]));
+}
+
+static int dib8000_i2c_write16(struct i2c_device *i2c, u16 reg, u16 val)
+{
+	u8 b[4] = {
+		(reg >> 8) & 0xff, reg & 0xff,
+		(val >> 8) & 0xff, val & 0xff,
+	};
+	struct i2c_msg msg = {
+		.addr = i2c->addr >> 1,.flags = 0,.buf = b,.len = 4
+	};
+	return i2c_transfer(i2c->adap, &msg, 1) != 1 ? -EREMOTEIO : 0;
+}
+
+static int dib8000_write_word(struct dib8000_state *state, u16 reg, u16 val)
+{
+	return dib8000_i2c_write16(&state->i2c, reg, val);
+}
+
+const int16_t coeff_2k_sb_1seg_dqpsk[8] = {
+	(769 << 5) | 0x0a, (745 << 5) | 0x03, (595 << 5) | 0x0d, (769 << 5) | 0x0a, (920 << 5) | 0x09, (784 << 5) | 0x02, (519 << 5) | 0x0c,
+	    (920 << 5) | 0x09
+};
+
+const int16_t coeff_2k_sb_1seg[8] = {
+	(692 << 5) | 0x0b, (683 << 5) | 0x01, (519 << 5) | 0x09, (692 << 5) | 0x0b, 0 | 0x1f, 0 | 0x1f, 0 | 0x1f, 0 | 0x1f
+};
+
+const int16_t coeff_2k_sb_3seg_0dqpsk_1dqpsk[8] = {
+	(832 << 5) | 0x10, (912 << 5) | 0x05, (900 << 5) | 0x12, (832 << 5) | 0x10, (-931 << 5) | 0x0f, (912 << 5) | 0x04, (807 << 5) | 0x11,
+	    (-931 << 5) | 0x0f
+};
+
+const int16_t coeff_2k_sb_3seg_0dqpsk[8] = {
+	(622 << 5) | 0x0c, (941 << 5) | 0x04, (796 << 5) | 0x10, (622 << 5) | 0x0c, (982 << 5) | 0x0c, (519 << 5) | 0x02, (572 << 5) | 0x0e,
+	    (982 << 5) | 0x0c
+};
+
+const int16_t coeff_2k_sb_3seg_1dqpsk[8] = {
+	(699 << 5) | 0x14, (607 << 5) | 0x04, (944 << 5) | 0x13, (699 << 5) | 0x14, (-720 << 5) | 0x0d, (640 << 5) | 0x03, (866 << 5) | 0x12,
+	    (-720 << 5) | 0x0d
+};
+
+const int16_t coeff_2k_sb_3seg[8] = {
+	(664 << 5) | 0x0c, (925 << 5) | 0x03, (937 << 5) | 0x10, (664 << 5) | 0x0c, (-610 << 5) | 0x0a, (697 << 5) | 0x01, (836 << 5) | 0x0e,
+	    (-610 << 5) | 0x0a
+};
+
+const int16_t coeff_4k_sb_1seg_dqpsk[8] = {
+	(-955 << 5) | 0x0e, (687 << 5) | 0x04, (818 << 5) | 0x10, (-955 << 5) | 0x0e, (-922 << 5) | 0x0d, (750 << 5) | 0x03, (665 << 5) | 0x0f,
+	    (-922 << 5) | 0x0d
+};
+
+const int16_t coeff_4k_sb_1seg[8] = {
+	(638 << 5) | 0x0d, (683 << 5) | 0x02, (638 << 5) | 0x0d, (638 << 5) | 0x0d, (-655 << 5) | 0x0a, (517 << 5) | 0x00, (698 << 5) | 0x0d,
+	    (-655 << 5) | 0x0a
+};
+
+const int16_t coeff_4k_sb_3seg_0dqpsk_1dqpsk[8] = {
+	(-707 << 5) | 0x14, (910 << 5) | 0x06, (889 << 5) | 0x16, (-707 << 5) | 0x14, (-958 << 5) | 0x13, (993 << 5) | 0x05, (523 << 5) | 0x14,
+	    (-958 << 5) | 0x13
+};
+
+const int16_t coeff_4k_sb_3seg_0dqpsk[8] = {
+	(-723 << 5) | 0x13, (910 << 5) | 0x05, (777 << 5) | 0x14, (-723 << 5) | 0x13, (-568 << 5) | 0x0f, (547 << 5) | 0x03, (696 << 5) | 0x12,
+	    (-568 << 5) | 0x0f
+};
+
+const int16_t coeff_4k_sb_3seg_1dqpsk[8] = {
+	(-940 << 5) | 0x15, (607 << 5) | 0x05, (915 << 5) | 0x16, (-940 << 5) | 0x15, (-848 << 5) | 0x13, (683 << 5) | 0x04, (543 << 5) | 0x14,
+	    (-848 << 5) | 0x13
+};
+
+const int16_t coeff_4k_sb_3seg[8] = {
+	(612 << 5) | 0x12, (910 << 5) | 0x04, (864 << 5) | 0x14, (612 << 5) | 0x12, (-869 << 5) | 0x13, (683 << 5) | 0x02, (869 << 5) | 0x12,
+	    (-869 << 5) | 0x13
+};
+
+const int16_t coeff_8k_sb_1seg_dqpsk[8] = {
+	(-835 << 5) | 0x12, (684 << 5) | 0x05, (735 << 5) | 0x14, (-835 << 5) | 0x12, (-598 << 5) | 0x10, (781 << 5) | 0x04, (739 << 5) | 0x13,
+	    (-598 << 5) | 0x10
+};
+
+const int16_t coeff_8k_sb_1seg[8] = {
+	(673 << 5) | 0x0f, (683 << 5) | 0x03, (808 << 5) | 0x12, (673 << 5) | 0x0f, (585 << 5) | 0x0f, (512 << 5) | 0x01, (780 << 5) | 0x0f,
+	    (585 << 5) | 0x0f
+};
+
+const int16_t coeff_8k_sb_3seg_0dqpsk_1dqpsk[8] = {
+	(863 << 5) | 0x17, (930 << 5) | 0x07, (878 << 5) | 0x19, (863 << 5) | 0x17, (0 << 5) | 0x14, (521 << 5) | 0x05, (980 << 5) | 0x18,
+	    (0 << 5) | 0x14
+};
+
+const int16_t coeff_8k_sb_3seg_0dqpsk[8] = {
+	(-924 << 5) | 0x17, (910 << 5) | 0x06, (774 << 5) | 0x17, (-924 << 5) | 0x17, (-877 << 5) | 0x15, (565 << 5) | 0x04, (553 << 5) | 0x15,
+	    (-877 << 5) | 0x15
+};
+
+const int16_t coeff_8k_sb_3seg_1dqpsk[8] = {
+	(-921 << 5) | 0x19, (607 << 5) | 0x06, (881 << 5) | 0x19, (-921 << 5) | 0x19, (-921 << 5) | 0x14, (713 << 5) | 0x05, (1018 << 5) | 0x18,
+	    (-921 << 5) | 0x14
+};
+
+const int16_t coeff_8k_sb_3seg[8] = {
+	(514 << 5) | 0x14, (910 << 5) | 0x05, (861 << 5) | 0x17, (514 << 5) | 0x14, (690 << 5) | 0x14, (683 << 5) | 0x03, (662 << 5) | 0x15,
+	    (690 << 5) | 0x14
+};
+
+const int16_t ana_fe_coeff_3seg[24] = {
+	81, 80, 78, 74, 68, 61, 54, 45, 37, 28, 19, 11, 4, 1022, 1017, 1013, 1010, 1008, 1008, 1008, 1008, 1010, 1014, 1017
+};
+
+const int16_t ana_fe_coeff_1seg[24] = {
+	249, 226, 164, 82, 5, 981, 970, 988, 1018, 20, 31, 26, 8, 1012, 1000, 1018, 1012, 8, 15, 14, 9, 3, 1017, 1003
+};
+
+const int16_t ana_fe_coeff_13seg[24] = {
+	396, 305, 105, -51, -77, -12, 41, 31, -11, -30, -11, 14, 15, -2, -13, -7, 5, 8, 1, -6, -7, -3, 0, 1
+};
+
+static u16 fft_to_mode(struct dib8000_state *state)
+{
+	u16 mode;
+	switch (state->fe.dtv_property_cache.transmission_mode) {
+	case TRANSMISSION_MODE_2K:
+		mode = 1;
+		break;
+	case TRANSMISSION_MODE_4K:
+		mode = 2;
+		break;
+	default:
+	case TRANSMISSION_MODE_AUTO:
+	case TRANSMISSION_MODE_8K:
+		mode = 3;
+		break;
+	}
+	return mode;
+}
+
+static void dib8000_set_acquisition_mode(struct dib8000_state *state)
+{
+	u16 nud = dib8000_read_word(state, 298);
+	nud |= (1 << 3) | (1 << 0);
+	dprintk("acquisition mode activated");
+	dib8000_write_word(state, 298, nud);
+}
+
+static int dib8000_set_output_mode(struct dib8000_state *state, int mode)
+{
+	u16 outreg, fifo_threshold, smo_mode, sram = 0x0205;	/* by default SDRAM deintlv is enabled */
+
+	outreg = 0;
+	fifo_threshold = 1792;
+	smo_mode = (dib8000_read_word(state, 299) & 0x0050) | (1 << 1);
+
+	dprintk("-I-  Setting output mode for demod %p to %d", &state->fe, mode);
+
+	switch (mode) {
+	case OUTMODE_MPEG2_PAR_GATED_CLK:	// STBs with parallel gated clock
+		outreg = (1 << 10);	/* 0x0400 */
+		break;
+	case OUTMODE_MPEG2_PAR_CONT_CLK:	// STBs with parallel continues clock
+		outreg = (1 << 10) | (1 << 6);	/* 0x0440 */
+		break;
+	case OUTMODE_MPEG2_SERIAL:	// STBs with serial input
+		outreg = (1 << 10) | (2 << 6) | (0 << 1);	/* 0x0482 */
+		break;
+	case OUTMODE_DIVERSITY:
+		if (state->cfg.hostbus_diversity) {
+			outreg = (1 << 10) | (4 << 6);	/* 0x0500 */
+			sram &= 0xfdff;
+		} else
+			sram |= 0x0c00;
+		break;
+	case OUTMODE_MPEG2_FIFO:	// e.g. USB feeding
+		smo_mode |= (3 << 1);
+		fifo_threshold = 512;
+		outreg = (1 << 10) | (5 << 6);
+		break;
+	case OUTMODE_HIGH_Z:	// disable
+		outreg = 0;
+		break;
+
+	case OUTMODE_ANALOG_ADC:
+		outreg = (1 << 10) | (3 << 6);
+		dib8000_set_acquisition_mode(state);
+		break;
+
+	default:
+		dprintk("Unhandled output_mode passed to be set for demod %p", &state->fe);
+		return -EINVAL;
+	}
+
+	if (state->cfg.output_mpeg2_in_188_bytes)
+		smo_mode |= (1 << 5);
+
+	dib8000_write_word(state, 299, smo_mode);
+	dib8000_write_word(state, 300, fifo_threshold);	/* synchronous fread */
+	dib8000_write_word(state, 1286, outreg);
+	dib8000_write_word(state, 1291, sram);
+
+	return 0;
+}
+
+static int dib8000_set_diversity_in(struct dvb_frontend *fe, int onoff)
+{
+	struct dib8000_state *state = fe->demodulator_priv;
+	u16 sync_wait = dib8000_read_word(state, 273) & 0xfff0;
+
+	if (!state->differential_constellation) {
+		dib8000_write_word(state, 272, 1 << 9);	//dvsy_off_lmod4 = 1
+		dib8000_write_word(state, 273, sync_wait | (1 << 2) | 2);	// sync_enable = 1; comb_mode = 2
+	} else {
+		dib8000_write_word(state, 272, 0);	//dvsy_off_lmod4 = 0
+		dib8000_write_word(state, 273, sync_wait);	// sync_enable = 0; comb_mode = 0
+	}
+	state->diversity_onoff = onoff;
+
+	switch (onoff) {
+	case 0:		/* only use the internal way - not the diversity input */
+		dib8000_write_word(state, 270, 1);
+		dib8000_write_word(state, 271, 0);
+		break;
+	case 1:		/* both ways */
+		dib8000_write_word(state, 270, 6);
+		dib8000_write_word(state, 271, 6);
+		break;
+	case 2:		/* only the diversity input */
+		dib8000_write_word(state, 270, 0);
+		dib8000_write_word(state, 271, 1);
+		break;
+	}
+	return 0;
+}
+
+static void dib8000_set_power_mode(struct dib8000_state *state, enum dib8000_power_mode mode)
+{
+	/* by default everything is going to be powered off */
+	u16 reg_774 = 0x3fff, reg_775 = 0xffff, reg_776 = 0xffff,
+	    reg_900 = (dib8000_read_word(state, 900) & 0xfffc) | 0x3, reg_1280 = (dib8000_read_word(state, 1280) & 0x00ff) | 0xff00;
+
+	/* now, depending on the requested mode, we power on */
+	switch (mode) {
+		/* power up everything in the demod */
+	case DIB8000M_POWER_ALL:
+		reg_774 = 0x0000;
+		reg_775 = 0x0000;
+		reg_776 = 0x0000;
+		reg_900 &= 0xfffc;
+		reg_1280 &= 0x00ff;
+		break;
+	case DIB8000M_POWER_INTERFACE_ONLY:
+		reg_1280 &= 0x00ff;
+		break;
+	}
+
+	dprintk("powermode : 774 : %x ; 775 : %x; 776 : %x ; 900 : %x; 1280 : %x", reg_774, reg_775, reg_776, reg_900, reg_1280);
+	dib8000_write_word(state, 774, reg_774);
+	dib8000_write_word(state, 775, reg_775);
+	dib8000_write_word(state, 776, reg_776);
+	dib8000_write_word(state, 900, reg_900);
+	dib8000_write_word(state, 1280, reg_1280);
+}
+
+static int dib8000_set_adc_state(struct dib8000_state *state, enum dibx000_adc_states no)
+{
+	int ret = 0;
+	u16 reg_907 = dib8000_read_word(state, 907), reg_908 = dib8000_read_word(state, 908);
+
+	switch (no) {
+	case DIBX000_SLOW_ADC_ON:
+		reg_908 |= (1 << 1) | (1 << 0);
+		ret |= dib8000_write_word(state, 908, reg_908);
+		reg_908 &= ~(1 << 1);
+		break;
+
+	case DIBX000_SLOW_ADC_OFF:
+		reg_908 |= (1 << 1) | (1 << 0);
+		break;
+
+	case DIBX000_ADC_ON:
+		reg_907 &= 0x0fff;
+		reg_908 &= 0x0003;
+		break;
+
+	case DIBX000_ADC_OFF:	// leave the VBG voltage on
+		reg_907 |= (1 << 14) | (1 << 13) | (1 << 12);
+		reg_908 |= (1 << 5) | (1 << 4) | (1 << 3) | (1 << 2);
+		break;
+
+	case DIBX000_VBG_ENABLE:
+		reg_907 &= ~(1 << 15);
+		break;
+
+	case DIBX000_VBG_DISABLE:
+		reg_907 |= (1 << 15);
+		break;
+
+	default:
+		break;
+	}
+
+	ret |= dib8000_write_word(state, 907, reg_907);
+	ret |= dib8000_write_word(state, 908, reg_908);
+
+	return ret;
+}
+
+static int dib8000_set_bandwidth(struct dib8000_state *state, u32 bw)
+{
+	u32 timf;
+
+	if (bw == 0)
+		bw = 6000;
+
+	if (state->timf == 0) {
+		dprintk("using default timf");
+		timf = state->timf_default;
+	} else {
+		dprintk("using updated timf");
+		timf = state->timf;
+	}
+
+	dib8000_write_word(state, 29, (u16) ((timf >> 16) & 0xffff));
+	dib8000_write_word(state, 30, (u16) ((timf) & 0xffff));
+
+	return 0;
+}
+
+static int dib8000_sad_calib(struct dib8000_state *state)
+{
+/* internal */
+	dib8000_write_word(state, 923, (0 << 1) | (0 << 0));
+	dib8000_write_word(state, 924, 776);	// 0.625*3.3 / 4096
+
+	/* do the calibration */
+	dib8000_write_word(state, 923, (1 << 0));
+	dib8000_write_word(state, 923, (0 << 0));
+
+	msleep(1);
+	return 0;
+}
+
+int dib8000_set_wbd_ref(struct dvb_frontend *fe, u16 value)
+{
+	struct dib8000_state *state = fe->demodulator_priv;
+	if (value > 4095)
+		value = 4095;
+	state->wbd_ref = value;
+	return dib8000_write_word(state, 106, value);
+}
+
+EXPORT_SYMBOL(dib8000_set_wbd_ref);
+static void dib8000_reset_pll_common(struct dib8000_state *state, const struct dibx000_bandwidth_config *bw)
+{
+	dprintk("ifreq: %d %x, inversion: %d", bw->ifreq, bw->ifreq, bw->ifreq >> 25);
+	dib8000_write_word(state, 23, (u16) (((bw->internal * 1000) >> 16) & 0xffff));	/* P_sec_len */
+	dib8000_write_word(state, 24, (u16) ((bw->internal * 1000) & 0xffff));
+	dib8000_write_word(state, 27, (u16) ((bw->ifreq >> 16) & 0x01ff));
+	dib8000_write_word(state, 28, (u16) (bw->ifreq & 0xffff));
+	dib8000_write_word(state, 26, (u16) ((bw->ifreq >> 25) & 0x0003));
+
+	dib8000_write_word(state, 922, bw->sad_cfg);
+}
+
+static void dib8000_reset_pll(struct dib8000_state *state)
+{
+	const struct dibx000_bandwidth_config *pll = state->cfg.pll;
+	u16 clk_cfg1;
+
+	// clk_cfg0
+	dib8000_write_word(state, 901, (pll->pll_prediv << 8) | (pll->pll_ratio << 0));
+
+	// clk_cfg1
+	clk_cfg1 = (1 << 10) | (0 << 9) | (pll->IO_CLK_en_core << 8) |
+	    (pll->bypclk_div << 5) | (pll->enable_refdiv << 4) | (1 << 3) | (pll->pll_range << 1) | (pll->pll_reset << 0);
+
+	dib8000_write_word(state, 902, clk_cfg1);
+	clk_cfg1 = (clk_cfg1 & 0xfff7) | (pll->pll_bypass << 3);
+	dib8000_write_word(state, 902, clk_cfg1);
+
+	dprintk("clk_cfg1: 0x%04x", clk_cfg1);	/* 0x507 1 0 1 000 0 0 11 1 */
+
+	/* smpl_cfg: P_refclksel=2, P_ensmplsel=1 nodivsmpl=1 */
+	if (state->cfg.pll->ADClkSrc == 0)
+		dib8000_write_word(state, 904, (0 << 15) | (0 << 12) | (0 << 10) | (pll->modulo << 8) | (pll->ADClkSrc << 7) | (0 << 1));
+	else if (state->cfg.refclksel != 0)
+		dib8000_write_word(state, 904,
+				   (0 << 15) | (1 << 12) | ((state->cfg.refclksel & 0x3) << 10) | (pll->modulo << 8) | (pll->
+															ADClkSrc << 7) | (0 << 1));
+	else
+		dib8000_write_word(state, 904, (0 << 15) | (1 << 12) | (3 << 10) | (pll->modulo << 8) | (pll->ADClkSrc << 7) | (0 << 1));
+
+	dib8000_reset_pll_common(state, pll);
+}
+
+static int dib8000_reset_gpio(struct dib8000_state *st)
+{
+	/* reset the GPIOs */
+	dib8000_write_word(st, 1029, st->cfg.gpio_dir);
+	dib8000_write_word(st, 1030, st->cfg.gpio_val);
+
+	/* TODO 782 is P_gpio_od */
+
+	dib8000_write_word(st, 1032, st->cfg.gpio_pwm_pos);
+
+	dib8000_write_word(st, 1037, st->cfg.pwm_freq_div);
+	return 0;
+}
+
+static int dib8000_cfg_gpio(struct dib8000_state *st, u8 num, u8 dir, u8 val)
+{
+	st->cfg.gpio_dir = dib8000_read_word(st, 1029);
+	st->cfg.gpio_dir &= ~(1 << num);	/* reset the direction bit */
+	st->cfg.gpio_dir |= (dir & 0x1) << num;	/* set the new direction */
+	dib8000_write_word(st, 1029, st->cfg.gpio_dir);
+
+	st->cfg.gpio_val = dib8000_read_word(st, 1030);
+	st->cfg.gpio_val &= ~(1 << num);	/* reset the direction bit */
+	st->cfg.gpio_val |= (val & 0x01) << num;	/* set the new value */
+	dib8000_write_word(st, 1030, st->cfg.gpio_val);
+
+	dprintk("gpio dir: %x: gpio val: %x", st->cfg.gpio_dir, st->cfg.gpio_val);
+
+	return 0;
+}
+
+int dib8000_set_gpio(struct dvb_frontend *fe, u8 num, u8 dir, u8 val)
+{
+	struct dib8000_state *state = fe->demodulator_priv;
+	return dib8000_cfg_gpio(state, num, dir, val);
+}
+
+EXPORT_SYMBOL(dib8000_set_gpio);
+static const u16 dib8000_defaults[] = {
+	/* auto search configuration - lock0 by default waiting
+	 * for cpil_lock; lock1 cpil_lock; lock2 tmcc_sync_lock */
+	3, 7,
+	0x0004,
+	0x0400,
+	0x0814,
+
+	12, 11,
+	0x001b,
+	0x7740,
+	0x005b,
+	0x8d80,
+	0x01c9,
+	0xc380,
+	0x0000,
+	0x0080,
+	0x0000,
+	0x0090,
+	0x0001,
+	0xd4c0,
+
+	/*1, 32,
+	   0x6680 // P_corm_thres Lock algorithms configuration */
+
+	11, 80,			/* set ADC level to -16 */
+	(1 << 13) - 825 - 117,
+	(1 << 13) - 837 - 117,
+	(1 << 13) - 811 - 117,
+	(1 << 13) - 766 - 117,
+	(1 << 13) - 737 - 117,
+	(1 << 13) - 693 - 117,
+	(1 << 13) - 648 - 117,
+	(1 << 13) - 619 - 117,
+	(1 << 13) - 575 - 117,
+	(1 << 13) - 531 - 117,
+	(1 << 13) - 501 - 117,
+
+	4, 108,
+	0,
+	0,
+	0,
+	0,
+
+	1, 175,
+	0x0410,
+	1, 179,
+	8192,			// P_fft_nb_to_cut
+
+	6, 181,
+	0x2800,			// P_coff_corthres_ ( 2k 4k 8k ) 0x2800
+	0x2800,
+	0x2800,
+	0x2800,			// P_coff_cpilthres_ ( 2k 4k 8k ) 0x2800
+	0x2800,
+	0x2800,
+
+	2, 193,
+	0x0666,			// P_pha3_thres
+	0x0000,			// P_cti_use_cpe, P_cti_use_prog
+
+	2, 205,
+	0x200f,			// P_cspu_regul, P_cspu_win_cut
+	0x000f,			// P_des_shift_work
+
+	5, 215,
+	0x023d,			// P_adp_regul_cnt
+	0x00a4,			// P_adp_noise_cnt
+	0x00a4,			// P_adp_regul_ext
+	0x7ff0,			// P_adp_noise_ext
+	0x3ccc,			// P_adp_fil
+
+	1, 230,
+	0x0000,			// P_2d_byp_ti_num
+
+	1, 263,
+	0x800,			//P_equal_thres_wgn
+
+	1, 268,
+	(2 << 9) | 39,		// P_equal_ctrl_synchro, P_equal_speedmode
+
+	1, 270,
+	0x0001,			// P_div_lock0_wait
+	1, 285,
+	0x0020,			//p_fec_
+	1, 299,
+	0x0062,			// P_smo_mode, P_smo_rs_discard, P_smo_fifo_flush, P_smo_pid_parse, P_smo_error_discard
+
+	1, 338,
+	(1 << 12) |		// P_ctrl_corm_thres4pre_freq_inh=1
+	    (1 << 10) |		// P_ctrl_pre_freq_mode_sat=1
+	    (0 << 9) |		// P_ctrl_pre_freq_inh=0
+	    (3 << 5) |		// P_ctrl_pre_freq_step=3
+	    (1 << 0),		// P_pre_freq_win_len=1
+
+	1, 903,
+	(0 << 4) | 2,		// P_divclksel=0 P_divbitsel=2 (was clk=3,bit=1 for MPW)
+
+	0,
+};
+
+static u16 dib8000_identify(struct i2c_device *client)
+{
+	u16 value;
+
+	//because of glitches sometimes
+	value = dib8000_i2c_read16(client, 896);
+
+	if ((value = dib8000_i2c_read16(client, 896)) != 0x01b3) {
+		dprintk("wrong Vendor ID (read=0x%x)", value);
+		return 0;
+	}
+
+	value = dib8000_i2c_read16(client, 897);
+	if (value != 0x8000 && value != 0x8001 && value != 0x8002) {
+		dprintk("wrong Device ID (%x)", value);
+		return 0;
+	}
+
+	switch (value) {
+	case 0x8000:
+		dprintk("found DiB8000A");
+		break;
+	case 0x8001:
+		dprintk("found DiB8000B");
+		break;
+	case 0x8002:
+		dprintk("found DiB8000C");
+		break;
+	}
+	return value;
+}
+
+static int dib8000_reset(struct dvb_frontend *fe)
+{
+	struct dib8000_state *state = fe->demodulator_priv;
+
+	dib8000_write_word(state, 1287, 0x0003);	/* sram lead in, rdy */
+
+	if ((state->revision = dib8000_identify(&state->i2c)) == 0)
+		return -EINVAL;
+
+	if (state->revision == 0x8000)
+		dprintk("error : dib8000 MA not supported");
+
+	dibx000_reset_i2c_master(&state->i2c_master);
+
+	dib8000_set_power_mode(state, DIB8000M_POWER_ALL);
+
+	/* always leave the VBG voltage on - it consumes almost nothing but takes a long time to start */
+	dib8000_set_adc_state(state, DIBX000_VBG_ENABLE);
+
+	/* restart all parts */
+	dib8000_write_word(state, 770, 0xffff);
+	dib8000_write_word(state, 771, 0xffff);
+	dib8000_write_word(state, 772, 0xfffc);
+	dib8000_write_word(state, 898, 0x000c);	// sad
+	dib8000_write_word(state, 1280, 0x004d);
+	dib8000_write_word(state, 1281, 0x000c);
+
+	dib8000_write_word(state, 770, 0x0000);
+	dib8000_write_word(state, 771, 0x0000);
+	dib8000_write_word(state, 772, 0x0000);
+	dib8000_write_word(state, 898, 0x0004);	// sad
+	dib8000_write_word(state, 1280, 0x0000);
+	dib8000_write_word(state, 1281, 0x0000);
+
+	/* drives */
+	if (state->cfg.drives)
+		dib8000_write_word(state, 906, state->cfg.drives);
+	else {
+		dprintk("using standard PAD-drive-settings, please adjust settings in config-struct to be optimal.");
+		dib8000_write_word(state, 906, 0x2d98);	// min drive SDRAM - not optimal - adjust
+	}
+
+	dib8000_reset_pll(state);
+
+	if (dib8000_reset_gpio(state) != 0)
+		dprintk("GPIO reset was not successful.");
+
+	if (dib8000_set_output_mode(state, OUTMODE_HIGH_Z) != 0)
+		dprintk("OUTPUT_MODE could not be resetted.");
+
+	state->current_agc = NULL;
+
+	// P_iqc_alpha_pha, P_iqc_alpha_amp, P_iqc_dcc_alpha, ...
+	/* P_iqc_ca2 = 0; P_iqc_impnc_on = 0; P_iqc_mode = 0; */
+	if (state->cfg.pll->ifreq == 0)
+		dib8000_write_word(state, 40, 0x0755);	/* P_iqc_corr_inh = 0 enable IQcorr block */
+	else
+		dib8000_write_word(state, 40, 0x1f55);	/* P_iqc_corr_inh = 1 disable IQcorr block */
+
+	{
+		u16 l = 0, r;
+		const u16 *n;
+		n = dib8000_defaults;
+		l = *n++;
+		while (l) {
+			r = *n++;
+			do {
+				dib8000_write_word(state, r, *n++);
+				r++;
+			} while (--l);
+			l = *n++;
+		}
+	}
+	state->isdbt_cfg_loaded = 0;
+
+	//div_cfg override for special configs
+	if (state->cfg.div_cfg != 0)
+		dib8000_write_word(state, 903, state->cfg.div_cfg);
+
+	/* unforce divstr regardless whether i2c enumeration was done or not */
+	dib8000_write_word(state, 1285, dib8000_read_word(state, 1285) & ~(1 << 1));
+
+	dib8000_set_bandwidth(state, 6000);
+
+	dib8000_set_adc_state(state, DIBX000_SLOW_ADC_ON);
+	dib8000_sad_calib(state);
+	dib8000_set_adc_state(state, DIBX000_SLOW_ADC_OFF);
+
+	dib8000_set_power_mode(state, DIB8000M_POWER_INTERFACE_ONLY);
+
+	return 0;
+}
+
+static void dib8000_restart_agc(struct dib8000_state *state)
+{
+	// P_restart_iqc & P_restart_agc
+	dib8000_write_word(state, 770, 0x0a00);
+	dib8000_write_word(state, 770, 0x0000);
+}
+
+static int dib8000_update_lna(struct dib8000_state *state)
+{
+	u16 dyn_gain;
+
+	if (state->cfg.update_lna) {
+		// read dyn_gain here (because it is demod-dependent and not tuner)
+		dyn_gain = dib8000_read_word(state, 390);
+
+		if (state->cfg.update_lna(&state->fe, dyn_gain)) {	// LNA has changed
+			dib8000_restart_agc(state);
+			return 1;
+		}
+	}
+	return 0;
+}
+
+static int dib8000_set_agc_config(struct dib8000_state *state, u8 band)
+{
+	struct dibx000_agc_config *agc = NULL;
+	int i;
+	if (state->current_band == band && state->current_agc != NULL)
+		return 0;
+	state->current_band = band;
+
+	for (i = 0; i < state->cfg.agc_config_count; i++)
+		if (state->cfg.agc[i].band_caps & band) {
+			agc = &state->cfg.agc[i];
+			break;
+		}
+
+	if (agc == NULL) {
+		dprintk("no valid AGC configuration found for band 0x%02x", band);
+		return -EINVAL;
+	}
+
+	state->current_agc = agc;
+
+	/* AGC */
+	dib8000_write_word(state, 76, agc->setup);
+	dib8000_write_word(state, 77, agc->inv_gain);
+	dib8000_write_word(state, 78, agc->time_stabiliz);
+	dib8000_write_word(state, 101, (agc->alpha_level << 12) | agc->thlock);
+
+	// Demod AGC loop configuration
+	dib8000_write_word(state, 102, (agc->alpha_mant << 5) | agc->alpha_exp);
+	dib8000_write_word(state, 103, (agc->beta_mant << 6) | agc->beta_exp);
+
+	dprintk("WBD: ref: %d, sel: %d, active: %d, alpha: %d",
+		state->wbd_ref != 0 ? state->wbd_ref : agc->wbd_ref, agc->wbd_sel, !agc->perform_agc_softsplit, agc->wbd_sel);
+
+	/* AGC continued */
+	if (state->wbd_ref != 0)
+		dib8000_write_word(state, 106, state->wbd_ref);
+	else			// use default
+		dib8000_write_word(state, 106, agc->wbd_ref);
+	dib8000_write_word(state, 107, (agc->wbd_alpha << 9) | (agc->perform_agc_softsplit << 8));
+	dib8000_write_word(state, 108, agc->agc1_max);
+	dib8000_write_word(state, 109, agc->agc1_min);
+	dib8000_write_word(state, 110, agc->agc2_max);
+	dib8000_write_word(state, 111, agc->agc2_min);
+	dib8000_write_word(state, 112, (agc->agc1_pt1 << 8) | agc->agc1_pt2);
+	dib8000_write_word(state, 113, (agc->agc1_slope1 << 8) | agc->agc1_slope2);
+	dib8000_write_word(state, 114, (agc->agc2_pt1 << 8) | agc->agc2_pt2);
+	dib8000_write_word(state, 115, (agc->agc2_slope1 << 8) | agc->agc2_slope2);
+
+	dib8000_write_word(state, 75, agc->agc1_pt3);
+	dib8000_write_word(state, 923, (dib8000_read_word(state, 923) & 0xffe3) | (agc->wbd_inv << 4) | (agc->wbd_sel << 2));	/*LB : 929 -> 923 */
+
+	return 0;
+}
+
+static int dib8000_agc_soft_split(struct dib8000_state *state)
+{
+	u16 agc, split_offset;
+
+	if (!state->current_agc || !state->current_agc->perform_agc_softsplit || state->current_agc->split.max == 0)
+		return FE_CALLBACK_TIME_NEVER;
+
+	// n_agc_global
+	agc = dib8000_read_word(state, 390);
+
+	if (agc > state->current_agc->split.min_thres)
+		split_offset = state->current_agc->split.min;
+	else if (agc < state->current_agc->split.max_thres)
+		split_offset = state->current_agc->split.max;
+	else
+		split_offset = state->current_agc->split.max *
+		    (agc - state->current_agc->split.min_thres) / (state->current_agc->split.max_thres - state->current_agc->split.min_thres);
+
+	dprintk("AGC split_offset: %d", split_offset);
+
+	// P_agc_force_split and P_agc_split_offset
+	dib8000_write_word(state, 107, (dib8000_read_word(state, 107) & 0xff00) | split_offset);
+	return 5000;
+}
+
+static int dib8000_agc_startup(struct dvb_frontend *fe)
+{
+	struct dib8000_state *state = fe->demodulator_priv;
+	enum frontend_tune_state *tune_state = &state->tune_state;
+
+	int ret = 0;
+
+	switch (*tune_state) {
+	case CT_AGC_START:
+		// set power-up level: interf+analog+AGC
+
+		dib8000_set_adc_state(state, DIBX000_ADC_ON);
+
+		if (dib8000_set_agc_config(state, (unsigned char)(BAND_OF_FREQUENCY(fe->dtv_property_cache.frequency / 1000))) != 0) {
+			*tune_state = CT_AGC_STOP;
+			state->status = FE_STATUS_TUNE_FAILED;
+			break;
+		}
+
+		ret = 70;
+		*tune_state = CT_AGC_STEP_0;
+		break;
+
+	case CT_AGC_STEP_0:
+		//AGC initialization
+		if (state->cfg.agc_control)
+			state->cfg.agc_control(&state->fe, 1);
+
+		dib8000_restart_agc(state);
+
+		// wait AGC rough lock time
+		ret = 50;
+		*tune_state = CT_AGC_STEP_1;
+		break;
+
+	case CT_AGC_STEP_1:
+		// wait AGC accurate lock time
+		ret = 70;
+
+		if (dib8000_update_lna(state))
+			// wait only AGC rough lock time
+			ret = 50;
+		else
+			*tune_state = CT_AGC_STEP_2;
+		break;
+
+	case CT_AGC_STEP_2:
+		dib8000_agc_soft_split(state);
+
+		if (state->cfg.agc_control)
+			state->cfg.agc_control(&state->fe, 0);
+
+		*tune_state = CT_AGC_STOP;
+		break;
+	default:
+		ret = dib8000_agc_soft_split(state);
+		break;
+	}
+	return ret;
+
+}
+
+static void dib8000_update_timf(struct dib8000_state *state)
+{
+	u32 timf = state->timf = dib8000_read32(state, 435);
+
+	dib8000_write_word(state, 29, (u16) (timf >> 16));
+	dib8000_write_word(state, 30, (u16) (timf & 0xffff));
+	dprintk("Updated timing frequency: %d (default: %d)", state->timf, state->timf_default);
+}
+
+static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosearching)
+{
+	u16 mode, max_constellation, seg_diff_mask = 0, nbseg_diff = 0;
+	u8 guard, crate, constellation, timeI;
+	u8 permu_seg[] = { 6, 5, 7, 4, 8, 3, 9, 2, 10, 1, 11, 0, 12 };
+	u16 i, coeff[4], P_cfr_left_edge = 0, P_cfr_right_edge = 0, seg_mask13 = 0x1fff;	// All 13 segments enabled
+	const s16 *ncoeff, *ana_fe;
+	u16 tmcc_pow = 0;
+	u16 coff_pow = 0x2800;
+	u16 init_prbs = 0xfff;
+	u16 ana_gain = 0;
+	u16 adc_target_16dB[11] = {
+		(1 << 13) - 825 - 117,
+		(1 << 13) - 837 - 117,
+		(1 << 13) - 811 - 117,
+		(1 << 13) - 766 - 117,
+		(1 << 13) - 737 - 117,
+		(1 << 13) - 693 - 117,
+		(1 << 13) - 648 - 117,
+		(1 << 13) - 619 - 117,
+		(1 << 13) - 575 - 117,
+		(1 << 13) - 531 - 117,
+		(1 << 13) - 501 - 117
+	};
+
+	if (state->ber_monitored_layer != LAYER_ALL)
+		dib8000_write_word(state, 285, (dib8000_read_word(state, 285) & 0x60) | state->ber_monitored_layer);
+	else
+		dib8000_write_word(state, 285, dib8000_read_word(state, 285) & 0x60);
+
+	i = dib8000_read_word(state, 26) & 1;	// P_dds_invspec
+	dib8000_write_word(state, 26, state->fe.dtv_property_cache.inversion ^ i);
+
+	if (state->fe.dtv_property_cache.isdbt_sb_mode) {
+		//compute new dds_freq for the seg and adjust prbs
+		int seg_offset =
+		    state->fe.dtv_property_cache.isdbt_sb_segment_idx - (state->fe.dtv_property_cache.isdbt_sb_segment_count / 2) -
+		    (state->fe.dtv_property_cache.isdbt_sb_segment_count % 2);
+		int clk = state->cfg.pll->internal;
+		u32 segtodds = ((u32) (430 << 23) / clk) << 3;	// segtodds = SegBW / Fclk * pow(2,26)
+		int dds_offset = seg_offset * segtodds;
+		int new_dds, sub_channel;
+		if ((state->fe.dtv_property_cache.isdbt_sb_segment_count % 2) == 0)	// if even
+			dds_offset -= (int)(segtodds / 2);
+
+		if (state->cfg.pll->ifreq == 0) {
+			if ((state->fe.dtv_property_cache.inversion ^ i) == 0) {
+				dib8000_write_word(state, 26, dib8000_read_word(state, 26) | 1);
+				new_dds = dds_offset;
+			} else
+				new_dds = dds_offset;
+
+			// We shift tuning frequency if the wanted segment is :
+			//  - the segment of center frequency with an odd total number of segments
+			//  - the segment to the left of center frequency with an even total number of segments
+			//  - the segment to the right of center frequency with an even total number of segments
+			if ((state->fe.dtv_property_cache.delivery_system == SYS_ISDBT) && (state->fe.dtv_property_cache.isdbt_sb_mode == 1)
+			    &&
+			    (((state->fe.dtv_property_cache.isdbt_sb_segment_count % 2)
+			      && (state->fe.dtv_property_cache.isdbt_sb_segment_idx ==
+				  ((state->fe.dtv_property_cache.isdbt_sb_segment_count / 2) + 1)))
+			     || (((state->fe.dtv_property_cache.isdbt_sb_segment_count % 2) == 0)
+				 && (state->fe.dtv_property_cache.isdbt_sb_segment_idx == (state->fe.dtv_property_cache.isdbt_sb_segment_count / 2)))
+			     || (((state->fe.dtv_property_cache.isdbt_sb_segment_count % 2) == 0)
+				 && (state->fe.dtv_property_cache.isdbt_sb_segment_idx ==
+				     ((state->fe.dtv_property_cache.isdbt_sb_segment_count / 2) + 1)))
+			    )) {
+				new_dds -= ((u32) (850 << 22) / clk) << 4;	// new_dds = 850 (freq shift in KHz) / Fclk * pow(2,26)
+			}
+		} else {
+			if ((state->fe.dtv_property_cache.inversion ^ i) == 0)
+				new_dds = state->cfg.pll->ifreq - dds_offset;
+			else
+				new_dds = state->cfg.pll->ifreq + dds_offset;
+		}
+		dib8000_write_word(state, 27, (u16) ((new_dds >> 16) & 0x01ff));
+		dib8000_write_word(state, 28, (u16) (new_dds & 0xffff));
+		if (state->fe.dtv_property_cache.isdbt_sb_segment_count % 2)	// if odd
+			sub_channel = ((state->fe.dtv_property_cache.isdbt_sb_subchannel + (3 * seg_offset) + 1) % 41) / 3;
+		else		// if even
+			sub_channel = ((state->fe.dtv_property_cache.isdbt_sb_subchannel + (3 * seg_offset)) % 41) / 3;
+		sub_channel -= 6;
+
+		if (state->fe.dtv_property_cache.transmission_mode == TRANSMISSION_MODE_2K
+		    || state->fe.dtv_property_cache.transmission_mode == TRANSMISSION_MODE_4K) {
+			dib8000_write_word(state, 219, dib8000_read_word(state, 219) | 0x1);	//adp_pass =1
+			dib8000_write_word(state, 190, dib8000_read_word(state, 190) | (0x1 << 14));	//pha3_force_pha_shift = 1
+		} else {
+			dib8000_write_word(state, 219, dib8000_read_word(state, 219) & 0xfffe);	//adp_pass =0
+			dib8000_write_word(state, 190, dib8000_read_word(state, 190) & 0xbfff);	//pha3_force_pha_shift = 0
+		}
+
+		switch (state->fe.dtv_property_cache.transmission_mode) {
+		case TRANSMISSION_MODE_2K:
+			switch (sub_channel) {
+			case -6:
+				init_prbs = 0x0;
+				break;	// 41, 0, 1
+			case -5:
+				init_prbs = 0x423;
+				break;	// 02~04
+			case -4:
+				init_prbs = 0x9;
+				break;	// 05~07
+			case -3:
+				init_prbs = 0x5C7;
+				break;	// 08~10
+			case -2:
+				init_prbs = 0x7A6;
+				break;	// 11~13
+			case -1:
+				init_prbs = 0x3D8;
+				break;	// 14~16
+			case 0:
+				init_prbs = 0x527;
+				break;	// 17~19
+			case 1:
+				init_prbs = 0x7FF;
+				break;	// 20~22
+			case 2:
+				init_prbs = 0x79B;
+				break;	// 23~25
+			case 3:
+				init_prbs = 0x3D6;
+				break;	// 26~28
+			case 4:
+				init_prbs = 0x3A2;
+				break;	// 29~31
+			case 5:
+				init_prbs = 0x53B;
+				break;	// 32~34
+			case 6:
+				init_prbs = 0x2F4;
+				break;	// 35~37
+			default:
+			case 7:
+				init_prbs = 0x213;
+				break;	// 38~40
+			}
+			break;
+
+		case TRANSMISSION_MODE_4K:
+			switch (sub_channel) {
+			case -6:
+				init_prbs = 0x0;
+				break;	// 41, 0, 1
+			case -5:
+				init_prbs = 0x208;
+				break;	// 02~04
+			case -4:
+				init_prbs = 0xC3;
+				break;	// 05~07
+			case -3:
+				init_prbs = 0x7B9;
+				break;	// 08~10
+			case -2:
+				init_prbs = 0x423;
+				break;	// 11~13
+			case -1:
+				init_prbs = 0x5C7;
+				break;	// 14~16
+			case 0:
+				init_prbs = 0x3D8;
+				break;	// 17~19
+			case 1:
+				init_prbs = 0x7FF;
+				break;	// 20~22
+			case 2:
+				init_prbs = 0x3D6;
+				break;	// 23~25
+			case 3:
+				init_prbs = 0x53B;
+				break;	// 26~28
+			case 4:
+				init_prbs = 0x213;
+				break;	// 29~31
+			case 5:
+				init_prbs = 0x29;
+				break;	// 32~34
+			case 6:
+				init_prbs = 0xD0;
+				break;	// 35~37
+			default:
+			case 7:
+				init_prbs = 0x48E;
+				break;	// 38~40
+			}
+			break;
+
+		default:
+		case TRANSMISSION_MODE_8K:
+			switch (sub_channel) {
+			case -6:
+				init_prbs = 0x0;
+				break;	// 41, 0, 1
+			case -5:
+				init_prbs = 0x740;
+				break;	// 02~04
+			case -4:
+				init_prbs = 0x069;
+				break;	// 05~07
+			case -3:
+				init_prbs = 0x7DD;
+				break;	// 08~10
+			case -2:
+				init_prbs = 0x208;
+				break;	// 11~13
+			case -1:
+				init_prbs = 0x7B9;
+				break;	// 14~16
+			case 0:
+				init_prbs = 0x5C7;
+				break;	// 17~19
+			case 1:
+				init_prbs = 0x7FF;
+				break;	// 20~22
+			case 2:
+				init_prbs = 0x53B;
+				break;	// 23~25
+			case 3:
+				init_prbs = 0x29;
+				break;	// 26~28
+			case 4:
+				init_prbs = 0x48E;
+				break;	// 29~31
+			case 5:
+				init_prbs = 0x4C4;
+				break;	// 32~34
+			case 6:
+				init_prbs = 0x367;
+				break;	// 33~37
+			default:
+			case 7:
+				init_prbs = 0x684;
+				break;	// 38~40
+			}
+			break;
+		}
+	} else {		// if not state->fe.dtv_property_cache.isdbt_sb_mode
+		dib8000_write_word(state, 27, (u16) ((state->cfg.pll->ifreq >> 16) & 0x01ff));
+		dib8000_write_word(state, 28, (u16) (state->cfg.pll->ifreq & 0xffff));
+		dib8000_write_word(state, 26, (u16) ((state->cfg.pll->ifreq >> 25) & 0x0003));
+	}
+	/*P_mode == ?? */
+	dib8000_write_word(state, 10, (seq << 4));
+	//  dib8000_write_word(state, 287, (dib8000_read_word(state, 287) & 0xe000) | 0x1000);
+
+	switch (state->fe.dtv_property_cache.guard_interval) {
+	case GUARD_INTERVAL_1_32:
+		guard = 0;
+		break;
+	case GUARD_INTERVAL_1_16:
+		guard = 1;
+		break;
+	case GUARD_INTERVAL_1_8:
+		guard = 2;
+		break;
+	case GUARD_INTERVAL_1_4:
+	default:
+		guard = 3;
+		break;
+	}
+
+	dib8000_write_word(state, 1, (init_prbs << 2) | (guard & 0x3));	// ADDR 1
+
+	max_constellation = DQPSK;
+	for (i = 0; i < 3; i++) {
+		switch (state->fe.dtv_property_cache.layer[i].modulation) {
+		case DQPSK:
+			constellation = 0;
+			break;
+		case QPSK:
+			constellation = 1;
+			break;
+		case QAM_16:
+			constellation = 2;
+			break;
+		case QAM_64:
+		default:
+			constellation = 3;
+			break;
+		}
+
+		switch (state->fe.dtv_property_cache.layer[i].fec) {
+		case FEC_1_2:
+			crate = 1;
+			break;
+		case FEC_2_3:
+			crate = 2;
+			break;
+		case FEC_3_4:
+			crate = 3;
+			break;
+		case FEC_5_6:
+			crate = 5;
+			break;
+		case FEC_7_8:
+		default:
+			crate = 7;
+			break;
+		}
+
+		if ((state->fe.dtv_property_cache.layer[i].interleaving > 0) &&
+		    ((state->fe.dtv_property_cache.layer[i].interleaving <= 3) ||
+		     (state->fe.dtv_property_cache.layer[i].interleaving == 4 && state->fe.dtv_property_cache.isdbt_sb_mode == 1))
+		    )
+			timeI = state->fe.dtv_property_cache.layer[i].interleaving;
+		else
+			timeI = 0;
+		dib8000_write_word(state, 2 + i, (constellation << 10) | ((state->fe.dtv_property_cache.layer[i].segment_count & 0xf) << 6) |
+				   (crate << 3) | timeI);
+		if (state->fe.dtv_property_cache.layer[i].segment_count > 0) {
+			switch (max_constellation) {
+			case DQPSK:
+			case QPSK:
+				if (state->fe.dtv_property_cache.layer[i].modulation == QAM_16 ||
+				    state->fe.dtv_property_cache.layer[i].modulation == QAM_64)
+					max_constellation = state->fe.dtv_property_cache.layer[i].modulation;
+				break;
+			case QAM_16:
+				if (state->fe.dtv_property_cache.layer[i].modulation == QAM_64)
+					max_constellation = state->fe.dtv_property_cache.layer[i].modulation;
+				break;
+			}
+		}
+	}
+
+	mode = fft_to_mode(state);
+
+	//dib8000_write_word(state, 5, 13); /*p_last_seg = 13*/
+
+	dib8000_write_word(state, 274, (dib8000_read_word(state, 274) & 0xffcf) |
+			   ((state->fe.dtv_property_cache.isdbt_partial_reception & 1) << 5) | ((state->fe.dtv_property_cache.
+												 isdbt_sb_mode & 1) << 4));
+
+	dprintk("mode = %d ; guard = %d", mode, state->fe.dtv_property_cache.guard_interval);
+
+	/* signal optimization parameter */
+
+	if (state->fe.dtv_property_cache.isdbt_partial_reception) {
+		seg_diff_mask = (state->fe.dtv_property_cache.layer[0].modulation == DQPSK) << permu_seg[0];
+		for (i = 1; i < 3; i++)
+			nbseg_diff +=
+			    (state->fe.dtv_property_cache.layer[i].modulation == DQPSK) * state->fe.dtv_property_cache.layer[i].segment_count;
+		for (i = 0; i < nbseg_diff; i++)
+			seg_diff_mask |= 1 << permu_seg[i + 1];
+	} else {
+		for (i = 0; i < 3; i++)
+			nbseg_diff +=
+			    (state->fe.dtv_property_cache.layer[i].modulation == DQPSK) * state->fe.dtv_property_cache.layer[i].segment_count;
+		for (i = 0; i < nbseg_diff; i++)
+			seg_diff_mask |= 1 << permu_seg[i];
+	}
+	dprintk("nbseg_diff = %X (%d)", seg_diff_mask, seg_diff_mask);
+
+	state->differential_constellation = (seg_diff_mask != 0);
+	dib8000_set_diversity_in(&state->fe, state->diversity_onoff);
+
+	if (state->fe.dtv_property_cache.isdbt_sb_mode == 1) {	// ISDB-Tsb
+		if (state->fe.dtv_property_cache.isdbt_partial_reception == 1)	// 3-segments
+			seg_mask13 = 0x00E0;
+		else		// 1-segment
+			seg_mask13 = 0x0040;
+	} else
+		seg_mask13 = 0x1fff;
+
+	// WRITE: Mode & Diff mask
+	dib8000_write_word(state, 0, (mode << 13) | seg_diff_mask);
+
+	if ((seg_diff_mask) || (state->fe.dtv_property_cache.isdbt_sb_mode))
+		dib8000_write_word(state, 268, (dib8000_read_word(state, 268) & 0xF9FF) | 0x0200);
+	else
+		dib8000_write_word(state, 268, (2 << 9) | 39);	//init value
+
+	// ---- SMALL ----
+	// P_small_seg_diff
+	dib8000_write_word(state, 352, seg_diff_mask);	// ADDR 352
+
+	dib8000_write_word(state, 353, seg_mask13);	// ADDR 353
+
+/*     // P_small_narrow_band=0, P_small_last_seg=13, P_small_offset_num_car=5 */
+	// dib8000_write_word(state, 351, (state->fe.dtv_property_cache.isdbt_sb_mode << 8) | (13 << 4) | 5 );
+
+	// ---- SMALL ----
+	if (state->fe.dtv_property_cache.isdbt_sb_mode == 1) {
+		switch (state->fe.dtv_property_cache.transmission_mode) {
+		case TRANSMISSION_MODE_2K:
+			if (state->fe.dtv_property_cache.isdbt_partial_reception == 0) {	// 1-seg
+				if (state->fe.dtv_property_cache.layer[0].modulation == DQPSK)	// DQPSK
+					ncoeff = coeff_2k_sb_1seg_dqpsk;
+				else	// QPSK or QAM
+					ncoeff = coeff_2k_sb_1seg;
+			} else {	// 3-segments
+				if (state->fe.dtv_property_cache.layer[0].modulation == DQPSK) {	// DQPSK on central segment
+					if (state->fe.dtv_property_cache.layer[1].modulation == DQPSK)	// DQPSK on external segments
+						ncoeff = coeff_2k_sb_3seg_0dqpsk_1dqpsk;
+					else	// QPSK or QAM on external segments
+						ncoeff = coeff_2k_sb_3seg_0dqpsk;
+				} else {	// QPSK or QAM on central segment
+					if (state->fe.dtv_property_cache.layer[1].modulation == DQPSK)	// DQPSK on external segments
+						ncoeff = coeff_2k_sb_3seg_1dqpsk;
+					else	// QPSK or QAM on external segments
+						ncoeff = coeff_2k_sb_3seg;
+				}
+			}
+			break;
+
+		case TRANSMISSION_MODE_4K:
+			if (state->fe.dtv_property_cache.isdbt_partial_reception == 0) {	// 1-seg
+				if (state->fe.dtv_property_cache.layer[0].modulation == DQPSK)	// DQPSK
+					ncoeff = coeff_4k_sb_1seg_dqpsk;
+				else	// QPSK or QAM
+					ncoeff = coeff_4k_sb_1seg;
+			} else {	// 3-segments
+				if (state->fe.dtv_property_cache.layer[0].modulation == DQPSK) {	// DQPSK on central segment
+					if (state->fe.dtv_property_cache.layer[1].modulation == DQPSK) {	// DQPSK on external segments
+						ncoeff = coeff_4k_sb_3seg_0dqpsk_1dqpsk;
+					} else {	// QPSK or QAM on external segments
+						ncoeff = coeff_4k_sb_3seg_0dqpsk;
+					}
+				} else {	// QPSK or QAM on central segment
+					if (state->fe.dtv_property_cache.layer[1].modulation == DQPSK) {	// DQPSK on external segments
+						ncoeff = coeff_4k_sb_3seg_1dqpsk;
+					} else	// QPSK or QAM on external segments
+						ncoeff = coeff_4k_sb_3seg;
+				}
+			}
+			break;
+
+		case TRANSMISSION_MODE_AUTO:
+		case TRANSMISSION_MODE_8K:
+		default:
+			if (state->fe.dtv_property_cache.isdbt_partial_reception == 0) {	// 1-seg
+				if (state->fe.dtv_property_cache.layer[0].modulation == DQPSK)	// DQPSK
+					ncoeff = coeff_8k_sb_1seg_dqpsk;
+				else	// QPSK or QAM
+					ncoeff = coeff_8k_sb_1seg;
+			} else {	// 3-segments
+				if (state->fe.dtv_property_cache.layer[0].modulation == DQPSK) {	// DQPSK on central segment
+					if (state->fe.dtv_property_cache.layer[1].modulation == DQPSK) {	// DQPSK on external segments
+						ncoeff = coeff_8k_sb_3seg_0dqpsk_1dqpsk;
+					} else {	// QPSK or QAM on external segments
+						ncoeff = coeff_8k_sb_3seg_0dqpsk;
+					}
+				} else {	// QPSK or QAM on central segment
+					if (state->fe.dtv_property_cache.layer[1].modulation == DQPSK) {	// DQPSK on external segments
+						ncoeff = coeff_8k_sb_3seg_1dqpsk;
+					} else	// QPSK or QAM on external segments
+						ncoeff = coeff_8k_sb_3seg;
+				}
+			}
+			break;
+		}
+	}
+	if (state->fe.dtv_property_cache.isdbt_sb_mode == 1)
+		for (i = 0; i < 8; i++)
+			dib8000_write_word(state, 343 + i, ncoeff[i]);
+
+	// P_small_coef_ext_enable=ISDB-Tsb, P_small_narrow_band=ISDB-Tsb, P_small_last_seg=13, P_small_offset_num_car=5
+	dib8000_write_word(state, 351,
+			   (state->fe.dtv_property_cache.isdbt_sb_mode << 9) | (state->fe.dtv_property_cache.isdbt_sb_mode << 8) | (13 << 4) | 5);
+
+	// ---- COFF ----
+	// Carloff, the most robust
+	if (state->fe.dtv_property_cache.isdbt_sb_mode == 1) {	// Sound Broadcasting mode - use both TMCC and AC pilots
+
+		// P_coff_cpil_alpha=4, P_coff_inh=0, P_coff_cpil_winlen=64
+		// P_coff_narrow_band=1, P_coff_square_val=1, P_coff_one_seg=~partial_rcpt, P_coff_use_tmcc=1, P_coff_use_ac=1
+		dib8000_write_word(state, 187,
+				   (4 << 12) | (0 << 11) | (63 << 5) | (0x3 << 3) | ((~state->fe.dtv_property_cache.isdbt_partial_reception & 1) << 2)
+				   | 0x3);
+
+/*             // P_small_coef_ext_enable = 1 */
+/*             dib8000_write_word(state, 351, dib8000_read_word(state, 351) | 0x200); */
+
+		if (state->fe.dtv_property_cache.isdbt_partial_reception == 0) {	// Sound Broadcasting mode 1 seg
+
+			// P_coff_winlen=63, P_coff_thres_lock=15, P_coff_one_seg_width= (P_mode == 3) , P_coff_one_seg_sym= (P_mode-1)
+			if (mode == 3)
+				dib8000_write_word(state, 180, 0x1fcf | ((mode - 1) << 14));
+			else
+				dib8000_write_word(state, 180, 0x0fcf | ((mode - 1) << 14));
+			// P_ctrl_corm_thres4pre_freq_inh=1,P_ctrl_pre_freq_mode_sat=1,
+			// P_ctrl_pre_freq_inh=0, P_ctrl_pre_freq_step = 5, P_pre_freq_win_len=4
+			dib8000_write_word(state, 338, (1 << 12) | (1 << 10) | (0 << 9) | (5 << 5) | 4);
+			// P_ctrl_pre_freq_win_len=16, P_ctrl_pre_freq_thres_lockin=8
+			dib8000_write_word(state, 340, (16 << 6) | (8 << 0));
+			// P_ctrl_pre_freq_thres_lockout=6, P_small_use_tmcc/ac/cp=1
+			dib8000_write_word(state, 341, (6 << 3) | (1 << 2) | (1 << 1) | (1 << 0));
+
+			// P_coff_corthres_8k, 4k, 2k and P_coff_cpilthres_8k, 4k, 2k
+			dib8000_write_word(state, 181, 300);
+			dib8000_write_word(state, 182, 150);
+			dib8000_write_word(state, 183, 80);
+			dib8000_write_word(state, 184, 300);
+			dib8000_write_word(state, 185, 150);
+			dib8000_write_word(state, 186, 80);
+		} else {	// Sound Broadcasting mode 3 seg
+			// P_coff_one_seg_sym= 1, P_coff_one_seg_width= 1, P_coff_winlen=63, P_coff_thres_lock=15
+			/*                 if (mode == 3) */
+			/*                     dib8000_write_word(state, 180, 0x2fca | ((0) << 14)); */
+			/*                 else */
+			/*                     dib8000_write_word(state, 180, 0x2fca | ((1) << 14)); */
+			dib8000_write_word(state, 180, 0x1fcf | (1 << 14));
+
+			// P_ctrl_corm_thres4pre_freq_inh = 1, P_ctrl_pre_freq_mode_sat=1,
+			// P_ctrl_pre_freq_inh=0, P_ctrl_pre_freq_step = 4, P_pre_freq_win_len=4
+			dib8000_write_word(state, 338, (1 << 12) | (1 << 10) | (0 << 9) | (4 << 5) | 4);
+			// P_ctrl_pre_freq_win_len=16, P_ctrl_pre_freq_thres_lockin=8
+			dib8000_write_word(state, 340, (16 << 6) | (8 << 0));
+			//P_ctrl_pre_freq_thres_lockout=6, P_small_use_tmcc/ac/cp=1
+			dib8000_write_word(state, 341, (6 << 3) | (1 << 2) | (1 << 1) | (1 << 0));
+
+			// P_coff_corthres_8k, 4k, 2k and P_coff_cpilthres_8k, 4k, 2k
+			dib8000_write_word(state, 181, 350);
+			dib8000_write_word(state, 182, 300);
+			dib8000_write_word(state, 183, 250);
+			dib8000_write_word(state, 184, 350);
+			dib8000_write_word(state, 185, 300);
+			dib8000_write_word(state, 186, 250);
+		}
+
+	} else if (state->isdbt_cfg_loaded == 0) {	// if not Sound Broadcasting mode : put default values for 13 segments
+		dib8000_write_word(state, 180, (16 << 6) | 9);
+		dib8000_write_word(state, 187, (4 << 12) | (8 << 5) | 0x2);
+		coff_pow = 0x2800;
+		for (i = 0; i < 6; i++)
+			dib8000_write_word(state, 181 + i, coff_pow);
+
+		// P_ctrl_corm_thres4pre_freq_inh=1, P_ctrl_pre_freq_mode_sat=1,
+		// P_ctrl_pre_freq_mode_sat=1, P_ctrl_pre_freq_inh=0, P_ctrl_pre_freq_step = 3, P_pre_freq_win_len=1
+		dib8000_write_word(state, 338, (1 << 12) | (1 << 10) | (0 << 9) | (3 << 5) | 1);
+
+		// P_ctrl_pre_freq_win_len=8, P_ctrl_pre_freq_thres_lockin=6
+		dib8000_write_word(state, 340, (8 << 6) | (6 << 0));
+		// P_ctrl_pre_freq_thres_lockout=4, P_small_use_tmcc/ac/cp=1
+		dib8000_write_word(state, 341, (4 << 3) | (1 << 2) | (1 << 1) | (1 << 0));
+	}
+	// ---- FFT ----
+	if (state->fe.dtv_property_cache.isdbt_sb_mode == 1 && state->fe.dtv_property_cache.isdbt_partial_reception == 0)	// 1-seg
+		dib8000_write_word(state, 178, 64);	// P_fft_powrange=64
+	else
+		dib8000_write_word(state, 178, 32);	// P_fft_powrange=32
+
+	/* make the cpil_coff_lock more robust but slower p_coff_winlen
+	 * 6bits; p_coff_thres_lock 6bits (for coff lock if needed)
+	 */
+	/* if ( ( nbseg_diff>0)&&(nbseg_diff<13))
+	   dib8000_write_word(state, 187, (dib8000_read_word(state, 187) & 0xfffb) | (1 << 3)); */
+
+	dib8000_write_word(state, 189, ~seg_mask13 | seg_diff_mask);	/* P_lmod4_seg_inh       */
+	dib8000_write_word(state, 192, ~seg_mask13 | seg_diff_mask);	/* P_pha3_seg_inh        */
+	dib8000_write_word(state, 225, ~seg_mask13 | seg_diff_mask);	/* P_tac_seg_inh         */
+	if ((!state->fe.dtv_property_cache.isdbt_sb_mode) && (state->cfg.pll->ifreq == 0))
+		dib8000_write_word(state, 266, ~seg_mask13 | seg_diff_mask | 0x40);	/* P_equal_noise_seg_inh */
+	else
+		dib8000_write_word(state, 266, ~seg_mask13 | seg_diff_mask);	/* P_equal_noise_seg_inh */
+	dib8000_write_word(state, 287, ~seg_mask13 | 0x1000);	/* P_tmcc_seg_inh        */
+	//dib8000_write_word(state, 288, ~seg_mask13 | seg_diff_mask); /* P_tmcc_seg_eq_inh */
+	if (!autosearching)
+		dib8000_write_word(state, 288, (~seg_mask13 | seg_diff_mask) & 0x1fff);	/* P_tmcc_seg_eq_inh */
+	else
+		dib8000_write_word(state, 288, 0x1fff);	//disable equalisation of the tmcc when autosearch to be able to find the DQPSK channels.
+	dprintk("287 = %X (%d)", ~seg_mask13 | 0x1000, ~seg_mask13 | 0x1000);
+
+	dib8000_write_word(state, 211, seg_mask13 & (~seg_diff_mask));	/* P_des_seg_enabled     */
+
+	/* offset loop parameters */
+	if (state->fe.dtv_property_cache.isdbt_sb_mode == 1) {
+		if (state->fe.dtv_property_cache.isdbt_partial_reception == 0)	// Sound Broadcasting mode 1 seg
+			/* P_timf_alpha = (11-P_mode), P_corm_alpha=6, P_corm_thres=0x80 */
+			dib8000_write_word(state, 32, ((11 - mode) << 12) | (6 << 8) | 0x40);
+
+		else		// Sound Broadcasting mode 3 seg
+			/* P_timf_alpha = (10-P_mode), P_corm_alpha=6, P_corm_thres=0x80 */
+			dib8000_write_word(state, 32, ((10 - mode) << 12) | (6 << 8) | 0x60);
+	} else
+		// TODO in 13 seg, timf_alpha can always be the same or not ?
+		/* P_timf_alpha = (9-P_mode, P_corm_alpha=6, P_corm_thres=0x80 */
+		dib8000_write_word(state, 32, ((9 - mode) << 12) | (6 << 8) | 0x80);
+
+	if (state->fe.dtv_property_cache.isdbt_sb_mode == 1) {
+		if (state->fe.dtv_property_cache.isdbt_partial_reception == 0)	// Sound Broadcasting mode 1 seg
+			/* P_ctrl_pha_off_max=3   P_ctrl_sfreq_inh =0  P_ctrl_sfreq_step = (11-P_mode)  */
+			dib8000_write_word(state, 37, (3 << 5) | (0 << 4) | (10 - mode));
+
+		else		// Sound Broadcasting mode 3 seg
+			/* P_ctrl_pha_off_max=3   P_ctrl_sfreq_inh =0  P_ctrl_sfreq_step = (10-P_mode)  */
+			dib8000_write_word(state, 37, (3 << 5) | (0 << 4) | (9 - mode));
+	} else
+		/* P_ctrl_pha_off_max=3   P_ctrl_sfreq_inh =0  P_ctrl_sfreq_step = 9  */
+		dib8000_write_word(state, 37, (3 << 5) | (0 << 4) | (8 - mode));
+
+	/* P_dvsy_sync_wait - reuse mode */
+	switch (state->fe.dtv_property_cache.transmission_mode) {
+	case TRANSMISSION_MODE_8K:
+		mode = 256;
+		break;
+	case TRANSMISSION_MODE_4K:
+		mode = 128;
+		break;
+	default:
+	case TRANSMISSION_MODE_2K:
+		mode = 64;
+		break;
+	}
+	if (state->cfg.diversity_delay == 0)
+		mode = (mode * (1 << (guard)) * 3) / 2 + 48;	// add 50% SFN margin + compensate for one DVSY-fifo
+	else
+		mode = (mode * (1 << (guard)) * 3) / 2 + state->cfg.diversity_delay;	// add 50% SFN margin + compensate for DVSY-fifo
+	mode <<= 4;
+	dib8000_write_word(state, 273, (dib8000_read_word(state, 273) & 0x000f) | mode);
+
+	/* channel estimation fine configuration */
+	switch (max_constellation) {
+	case QAM_64:
+		ana_gain = 0x7;	// -1 : avoid def_est saturation when ADC target is -16dB
+		coeff[0] = 0x0148;	/* P_adp_regul_cnt 0.04 */
+		coeff[1] = 0xfff0;	/* P_adp_noise_cnt -0.002 */
+		coeff[2] = 0x00a4;	/* P_adp_regul_ext 0.02 */
+		coeff[3] = 0xfff8;	/* P_adp_noise_ext -0.001 */
+		//if (!state->cfg.hostbus_diversity) //if diversity, we should prehaps use the configuration of the max_constallation -1
+		break;
+	case QAM_16:
+		ana_gain = 0x7;	// -1 : avoid def_est saturation when ADC target is -16dB
+		coeff[0] = 0x023d;	/* P_adp_regul_cnt 0.07 */
+		coeff[1] = 0xffdf;	/* P_adp_noise_cnt -0.004 */
+		coeff[2] = 0x00a4;	/* P_adp_regul_ext 0.02 */
+		coeff[3] = 0xfff0;	/* P_adp_noise_ext -0.002 */
+		//if (!((state->cfg.hostbus_diversity) && (max_constellation == QAM_16)))
+		break;
+	default:
+		ana_gain = 0;	// 0 : goes along with ADC target at -22dB to keep good mobile performance and lock at sensitivity level
+		coeff[0] = 0x099a;	/* P_adp_regul_cnt 0.3 */
+		coeff[1] = 0xffae;	/* P_adp_noise_cnt -0.01 */
+		coeff[2] = 0x0333;	/* P_adp_regul_ext 0.1 */
+		coeff[3] = 0xfff8;	/* P_adp_noise_ext -0.002 */
+		break;
+	}
+	for (mode = 0; mode < 4; mode++)
+		dib8000_write_word(state, 215 + mode, coeff[mode]);
+
+	// update ana_gain depending on max constellation
+	dib8000_write_word(state, 116, ana_gain);
+	// update ADC target depending on ana_gain
+	if (ana_gain) {		// set -16dB ADC target for ana_gain=-1
+		for (i = 0; i < 10; i++)
+			dib8000_write_word(state, 80 + i, adc_target_16dB[i]);
+	} else {		// set -22dB ADC target for ana_gain=0
+		for (i = 0; i < 10; i++)
+			dib8000_write_word(state, 80 + i, adc_target_16dB[i] - 355);
+	}
+
+	// ---- ANA_FE ----
+	if (state->fe.dtv_property_cache.isdbt_sb_mode) {
+		if (state->fe.dtv_property_cache.isdbt_partial_reception == 1)	// 3-segments
+			ana_fe = ana_fe_coeff_3seg;
+		else		// 1-segment
+			ana_fe = ana_fe_coeff_1seg;
+	} else
+		ana_fe = ana_fe_coeff_13seg;
+
+	if (state->fe.dtv_property_cache.isdbt_sb_mode == 1 || state->isdbt_cfg_loaded == 0)
+		for (mode = 0; mode < 24; mode++)
+			dib8000_write_word(state, 117 + mode, ana_fe[mode]);
+
+	// ---- CHAN_BLK ----
+	for (i = 0; i < 13; i++) {
+		if ((((~seg_diff_mask) >> i) & 1) == 1) {
+			P_cfr_left_edge += (1 << i) * ((i == 0) || ((((seg_mask13 & (~seg_diff_mask)) >> (i - 1)) & 1) == 0));
+			P_cfr_right_edge += (1 << i) * ((i == 12) || ((((seg_mask13 & (~seg_diff_mask)) >> (i + 1)) & 1) == 0));
+		}
+	}
+	dib8000_write_word(state, 222, P_cfr_left_edge);	// P_cfr_left_edge
+	dib8000_write_word(state, 223, P_cfr_right_edge);	// P_cfr_right_edge
+	// "P_cspu_left_edge"  not used => do not care
+	// "P_cspu_right_edge" not used => do not care
+
+	if (state->fe.dtv_property_cache.isdbt_sb_mode == 1) {	// ISDB-Tsb
+		dib8000_write_word(state, 228, 1);	// P_2d_mode_byp=1
+		dib8000_write_word(state, 205, dib8000_read_word(state, 205) & 0xfff0);	// P_cspu_win_cut = 0
+		if (state->fe.dtv_property_cache.isdbt_partial_reception == 0	// 1-segment
+		    && state->fe.dtv_property_cache.transmission_mode == TRANSMISSION_MODE_2K) {
+			//dib8000_write_word(state, 219, dib8000_read_word(state, 219) & 0xfffe); // P_adp_pass = 0
+			dib8000_write_word(state, 265, 15);	// P_equal_noise_sel = 15
+		}
+	} else if (state->isdbt_cfg_loaded == 0) {
+		dib8000_write_word(state, 228, 0);	// default value
+		dib8000_write_word(state, 265, 31);	// default value
+		dib8000_write_word(state, 205, 0x200f);	// init value
+	}
+	// ---- TMCC ----
+	for (i = 0; i < 3; i++)
+		tmcc_pow +=
+		    (((state->fe.dtv_property_cache.layer[i].modulation == DQPSK) * 4 + 1) * state->fe.dtv_property_cache.layer[i].segment_count);
+	// Quantif of "P_tmcc_dec_thres_?k" is (0, 5+mode, 9);
+	// Threshold is set at 1/4 of max power.
+	tmcc_pow *= (1 << (9 - 2));
+
+	dib8000_write_word(state, 290, tmcc_pow);	// P_tmcc_dec_thres_2k
+	dib8000_write_word(state, 291, tmcc_pow);	// P_tmcc_dec_thres_4k
+	dib8000_write_word(state, 292, tmcc_pow);	// P_tmcc_dec_thres_8k
+	//dib8000_write_word(state, 287, (1 << 13) | 0x1000 );
+	// ---- PHA3 ----
+
+	if (state->isdbt_cfg_loaded == 0)
+		dib8000_write_word(state, 250, 3285);	/*p_2d_hspeed_thr0 */
+
+	if (state->fe.dtv_property_cache.isdbt_sb_mode == 1)
+		state->isdbt_cfg_loaded = 0;
+	else
+		state->isdbt_cfg_loaded = 1;
+
+}
+
+static int dib8000_autosearch_start(struct dvb_frontend *fe)
+{
+	u8 factor;
+	u32 value;
+	struct dib8000_state *state = fe->demodulator_priv;
+
+	int slist = 0;
+
+	state->fe.dtv_property_cache.transmission_mode = TRANSMISSION_MODE_8K;
+	state->fe.dtv_property_cache.guard_interval = GUARD_INTERVAL_1_8;
+	//state->fe.dtv_property_cache.isdbt_sb_mode                = 0;
+	//state->fe.dtv_property_cache.isdbt_partial_reception      = 0;
+	state->fe.dtv_property_cache.inversion = 0;
+	if (!state->fe.dtv_property_cache.isdbt_sb_mode)
+		state->fe.dtv_property_cache.layer[0].segment_count = 13;
+	state->fe.dtv_property_cache.layer[0].modulation = QAM_64;
+	state->fe.dtv_property_cache.layer[0].fec = FEC_2_3;
+	state->fe.dtv_property_cache.layer[0].interleaving = 0;
+
+	//choose the right list, in sb, always do everything
+	if (state->fe.dtv_property_cache.isdbt_sb_mode) {
+		slist = 7;
+		dib8000_write_word(state, 0, (dib8000_read_word(state, 0) & 0x9fff) | (1 << 13));
+	} else {
+		if (state->fe.dtv_property_cache.guard_interval == GUARD_INTERVAL_AUTO) {
+			if (state->fe.dtv_property_cache.transmission_mode == TRANSMISSION_MODE_AUTO) {
+				slist = 7;
+				dib8000_write_word(state, 0, (dib8000_read_word(state, 0) & 0x9fff) | (1 << 13));	// P_mode = 1 to have autosearch start ok with mode2
+			} else {
+				slist = 3;
+				state->fe.dtv_property_cache.transmission_mode = state->fe.dtv_property_cache.transmission_mode;
+			}
+		} else {
+			if (state->fe.dtv_property_cache.transmission_mode == TRANSMISSION_MODE_AUTO) {
+				slist = 2;
+				state->fe.dtv_property_cache.guard_interval = state->fe.dtv_property_cache.guard_interval;
+				dib8000_write_word(state, 0, (dib8000_read_word(state, 0) & 0x9fff) | (1 << 13));	// P_mode = 1
+			} else {
+				slist = 0;
+				state->fe.dtv_property_cache.transmission_mode = state->fe.dtv_property_cache.transmission_mode;
+				state->fe.dtv_property_cache.guard_interval = state->fe.dtv_property_cache.guard_interval;
+			}
+		}
+
+		dprintk("using list for autosearch : %d", slist);
+		dib8000_set_channel(state, (unsigned char)slist, 1);
+		//dib8000_write_word(state, 0, (dib8000_read_word(state, 0) & 0x9fff) | (1 << 13));  // P_mode = 1
+
+		factor = 1;
+
+		//set lock_mask values
+		dib8000_write_word(state, 6, 0x4);
+		dib8000_write_word(state, 7, 0x8);
+		dib8000_write_word(state, 8, 0x1000);
+
+		//set lock_mask wait time values
+		value = 50 * state->cfg.pll->internal * factor;
+		dib8000_write_word(state, 11, (u16) ((value >> 16) & 0xffff));	// lock0 wait time
+		dib8000_write_word(state, 12, (u16) (value & 0xffff));	// lock0 wait time
+		value = 100 * state->cfg.pll->internal * factor;
+		dib8000_write_word(state, 13, (u16) ((value >> 16) & 0xffff));	// lock1 wait time
+		dib8000_write_word(state, 14, (u16) (value & 0xffff));	// lock1 wait time
+		value = 1000 * state->cfg.pll->internal * factor;
+		dib8000_write_word(state, 15, (u16) ((value >> 16) & 0xffff));	// lock2 wait time
+		dib8000_write_word(state, 16, (u16) (value & 0xffff));	// lock2 wait time
+
+		value = dib8000_read_word(state, 0);
+		dib8000_write_word(state, 0, (u16) ((1 << 15) | value));
+		dib8000_read_word(state, 1284);	// reset the INT. n_irq_pending
+		dib8000_write_word(state, 0, (u16) value);
+	}
+
+	return 0;
+}
+
+static int dib8000_autosearch_irq(struct dvb_frontend *fe)
+{
+	struct dib8000_state *state = fe->demodulator_priv;
+	u16 irq_pending = dib8000_read_word(state, 1284);
+
+	if (irq_pending & 0x1) {	// failed
+		dprintk("dib8000_autosearch_irq failed");
+		return 1;
+	}
+
+	if (irq_pending & 0x2) {	// succeeded
+		dprintk("dib8000_autosearch_irq succeeded");
+		return 2;
+	}
+
+	return 0;		// still pending
+}
+
+static int dib8000_tune(struct dvb_frontend *fe)
+{
+	struct dib8000_state *state = fe->demodulator_priv;
+	int ret = 0;
+	u16 value, mode = fft_to_mode(state);
+
+	// we are already tuned - just resuming from suspend
+	if (state == NULL)
+		return -EINVAL;
+
+	dib8000_set_bandwidth(state, state->fe.dtv_property_cache.bandwidth_hz / 1000);
+	dib8000_set_channel(state, 0, 0);
+
+	// restart demod
+	ret |= dib8000_write_word(state, 770, 0x4000);
+	ret |= dib8000_write_word(state, 770, 0x0000);
+	msleep(45);
+
+	/* P_ctrl_inh_cor=0, P_ctrl_alpha_cor=4, P_ctrl_inh_isi=0, P_ctrl_alpha_isi=3 */
+	/*  ret |= dib8000_write_word(state, 29, (0 << 9) | (4 << 5) | (0 << 4) | (3 << 0) );  workaround inh_isi stays at 1 */
+
+	// never achieved a lock before - wait for timfreq to update
+	if (state->timf == 0) {
+		if (state->fe.dtv_property_cache.isdbt_sb_mode == 1) {
+			if (state->fe.dtv_property_cache.isdbt_partial_reception == 0)	// Sound Broadcasting mode 1 seg
+				msleep(300);
+			else	// Sound Broadcasting mode 3 seg
+				msleep(500);
+		} else		// 13 seg
+			msleep(200);
+	}
+	//dump_reg(state);
+	if (state->fe.dtv_property_cache.isdbt_sb_mode == 1) {
+		if (state->fe.dtv_property_cache.isdbt_partial_reception == 0) {	// Sound Broadcasting mode 1 seg
+
+			/* P_timf_alpha = (13-P_mode) , P_corm_alpha=6, P_corm_thres=0x40  alpha to check on board */
+			dib8000_write_word(state, 32, ((13 - mode) << 12) | (6 << 8) | 0x40);
+			//dib8000_write_word(state, 32, (8 << 12) | (6 << 8) | 0x80);
+
+			/*  P_ctrl_sfreq_step= (12-P_mode)   P_ctrl_sfreq_inh =0     P_ctrl_pha_off_max  */
+			ret |= dib8000_write_word(state, 37, (12 - mode) | ((5 + mode) << 5));
+
+		} else {	// Sound Broadcasting mode 3 seg
+
+			/* P_timf_alpha = (12-P_mode) , P_corm_alpha=6, P_corm_thres=0x60  alpha to check on board */
+			dib8000_write_word(state, 32, ((12 - mode) << 12) | (6 << 8) | 0x60);
+
+			ret |= dib8000_write_word(state, 37, (11 - mode) | ((5 + mode) << 5));
+		}
+
+	} else {		// 13 seg
+		/* P_timf_alpha = 8 , P_corm_alpha=6, P_corm_thres=0x80  alpha to check on board */
+		dib8000_write_word(state, 32, ((11 - mode) << 12) | (6 << 8) | 0x80);
+
+		ret |= dib8000_write_word(state, 37, (10 - mode) | ((5 + mode) << 5));
+
+	}
+
+	// we achieved a coff_cpil_lock - it's time to update the timf
+	if ((dib8000_read_word(state, 568) >> 11) & 0x1)
+		dib8000_update_timf(state);
+
+	//now that tune is finished, lock0 should lock on fec_mpeg to output this lock on MP_LOCK. It's changed in autosearch start
+	dib8000_write_word(state, 6, 0x200);
+
+	if (state->revision == 0x8002) {
+		value = dib8000_read_word(state, 903);
+		dib8000_write_word(state, 903, value & ~(1 << 3));
+		msleep(1);
+		dib8000_write_word(state, 903, value | (1 << 3));
+	}
+
+	return ret;
+}
+
+static int dib8000_wakeup(struct dvb_frontend *fe)
+{
+	struct dib8000_state *state = fe->demodulator_priv;
+
+	dib8000_set_power_mode(state, DIB8000M_POWER_ALL);
+	dib8000_set_adc_state(state, DIBX000_ADC_ON);
+	if (dib8000_set_adc_state(state, DIBX000_SLOW_ADC_ON) != 0)
+		dprintk("could not start Slow ADC");
+
+	return 0;
+}
+
+static int dib8000_sleep(struct dvb_frontend *fe)
+{
+	struct dib8000_state *st = fe->demodulator_priv;
+	if (1) {
+		dib8000_set_output_mode(st, OUTMODE_HIGH_Z);
+		dib8000_set_power_mode(st, DIB8000M_POWER_INTERFACE_ONLY);
+		return dib8000_set_adc_state(st, DIBX000_SLOW_ADC_OFF) | dib8000_set_adc_state(st, DIBX000_ADC_OFF);
+	} else {
+
+		return 0;
+	}
+}
+
+static int dib8000_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *fep)
+{
+	struct dib8000_state *state = fe->demodulator_priv;
+	u16 i, val = 0;
+
+	fe->dtv_property_cache.bandwidth_hz = 6000000;
+
+	fe->dtv_property_cache.isdbt_sb_mode = dib8000_read_word(state, 508) & 0x1;
+
+	val = dib8000_read_word(state, 570);
+	fe->dtv_property_cache.inversion = (val & 0x40) >> 6;
+	switch ((val & 0x30) >> 4) {
+	case 1:
+		fe->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_2K;
+		break;
+	case 3:
+	default:
+		fe->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_8K;
+		break;
+	}
+
+	switch (val & 0x3) {
+	case 0:
+		fe->dtv_property_cache.guard_interval = GUARD_INTERVAL_1_32;
+		dprintk("dib8000_get_frontend GI = 1/32 ");
+		break;
+	case 1:
+		fe->dtv_property_cache.guard_interval = GUARD_INTERVAL_1_16;
+		dprintk("dib8000_get_frontend GI = 1/16 ");
+		break;
+	case 2:
+		dprintk("dib8000_get_frontend GI = 1/8 ");
+		fe->dtv_property_cache.guard_interval = GUARD_INTERVAL_1_8;
+		break;
+	case 3:
+		dprintk("dib8000_get_frontend GI = 1/4 ");
+		fe->dtv_property_cache.guard_interval = GUARD_INTERVAL_1_4;
+		break;
+	}
+
+	val = dib8000_read_word(state, 505);
+	fe->dtv_property_cache.isdbt_partial_reception = val & 1;
+	dprintk("dib8000_get_frontend : partial_reception = %d ", fe->dtv_property_cache.isdbt_partial_reception);
+
+	for (i = 0; i < 3; i++) {
+		val = dib8000_read_word(state, 493 + i);
+		fe->dtv_property_cache.layer[i].segment_count = val & 0x0F;
+		dprintk("dib8000_get_frontend : Layer %d segments = %d ", i, fe->dtv_property_cache.layer[i].segment_count);
+
+		val = dib8000_read_word(state, 499 + i);
+		fe->dtv_property_cache.layer[i].interleaving = val & 0x3;
+		dprintk("dib8000_get_frontend : Layer %d time_intlv = %d ", i, fe->dtv_property_cache.layer[i].interleaving);
+
+		val = dib8000_read_word(state, 481 + i);
+		switch (val & 0x7) {
+		case 1:
+			fe->dtv_property_cache.layer[i].fec = FEC_1_2;
+			dprintk("dib8000_get_frontend : Layer %d Code Rate = 1/2 ", i);
+			break;
+		case 2:
+			fe->dtv_property_cache.layer[i].fec = FEC_2_3;
+			dprintk("dib8000_get_frontend : Layer %d Code Rate = 2/3 ", i);
+			break;
+		case 3:
+			fe->dtv_property_cache.layer[i].fec = FEC_3_4;
+			dprintk("dib8000_get_frontend : Layer %d Code Rate = 3/4 ", i);
+			break;
+		case 5:
+			fe->dtv_property_cache.layer[i].fec = FEC_5_6;
+			dprintk("dib8000_get_frontend : Layer %d Code Rate = 5/6 ", i);
+			break;
+		default:
+			fe->dtv_property_cache.layer[i].fec = FEC_7_8;
+			dprintk("dib8000_get_frontend : Layer %d Code Rate = 7/8 ", i);
+			break;
+		}
+
+		val = dib8000_read_word(state, 487 + i);
+		switch (val & 0x3) {
+		case 0:
+			dprintk("dib8000_get_frontend : Layer %d DQPSK ", i);
+			fe->dtv_property_cache.layer[i].modulation = DQPSK;
+			break;
+		case 1:
+			fe->dtv_property_cache.layer[i].modulation = QPSK;
+			dprintk("dib8000_get_frontend : Layer %d QPSK ", i);
+			break;
+		case 2:
+			fe->dtv_property_cache.layer[i].modulation = QAM_16;
+			dprintk("dib8000_get_frontend : Layer %d QAM16 ", i);
+			break;
+		case 3:
+		default:
+			dprintk("dib8000_get_frontend : Layer %d QAM64 ", i);
+			fe->dtv_property_cache.layer[i].modulation = QAM_64;
+			break;
+		}
+	}
+	return 0;
+}
+
+static int dib8000_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *fep)
+{
+	struct dib8000_state *state = fe->demodulator_priv;
+	int time, ret;
+
+	dib8000_set_output_mode(state, OUTMODE_HIGH_Z);
+
+	if (fe->ops.tuner_ops.set_params)
+		fe->ops.tuner_ops.set_params(fe, fep);
+
+	/* start up the AGC */
+	state->tune_state = CT_AGC_START;
+	do {
+		time = dib8000_agc_startup(fe);
+		if (time != FE_CALLBACK_TIME_NEVER)
+			msleep(time / 10);
+		else
+			break;
+	} while (state->tune_state != CT_AGC_STOP);
+
+	if (state->fe.dtv_property_cache.frequency == 0) {
+		dprintk("dib8000: must at least specify frequency ");
+		return 0;
+	}
+
+	if (state->fe.dtv_property_cache.bandwidth_hz == 0) {
+		dprintk("dib8000: no bandwidth specified, set to default ");
+		state->fe.dtv_property_cache.bandwidth_hz = 6000000;
+	}
+
+	state->tune_state = CT_DEMOD_START;
+
+	if ((state->fe.dtv_property_cache.delivery_system != SYS_ISDBT) ||
+	    (state->fe.dtv_property_cache.inversion == INVERSION_AUTO) ||
+	    (state->fe.dtv_property_cache.transmission_mode == TRANSMISSION_MODE_AUTO) ||
+	    (state->fe.dtv_property_cache.guard_interval == GUARD_INTERVAL_AUTO) ||
+	    (((state->fe.dtv_property_cache.isdbt_layer_enabled & (1 << 0)) != 0) &&
+	     (state->fe.dtv_property_cache.layer[0].segment_count != 0xff) &&
+	     (state->fe.dtv_property_cache.layer[0].segment_count != 0) &&
+	     ((state->fe.dtv_property_cache.layer[0].modulation == QAM_AUTO) ||
+	      (state->fe.dtv_property_cache.layer[0].fec == FEC_AUTO))) ||
+	    (((state->fe.dtv_property_cache.isdbt_layer_enabled & (1 << 1)) != 0) &&
+	     (state->fe.dtv_property_cache.layer[1].segment_count != 0xff) &&
+	     (state->fe.dtv_property_cache.layer[1].segment_count != 0) &&
+	     ((state->fe.dtv_property_cache.layer[1].modulation == QAM_AUTO) ||
+	      (state->fe.dtv_property_cache.layer[1].fec == FEC_AUTO))) ||
+	    (((state->fe.dtv_property_cache.isdbt_layer_enabled & (1 << 2)) != 0) &&
+	     (state->fe.dtv_property_cache.layer[2].segment_count != 0xff) &&
+	     (state->fe.dtv_property_cache.layer[2].segment_count != 0) &&
+	     ((state->fe.dtv_property_cache.layer[2].modulation == QAM_AUTO) ||
+	      (state->fe.dtv_property_cache.layer[2].fec == FEC_AUTO))) ||
+	    (((state->fe.dtv_property_cache.layer[0].segment_count == 0) ||
+	      ((state->fe.dtv_property_cache.isdbt_layer_enabled & (1 << 0)) == 0)) &&
+	     ((state->fe.dtv_property_cache.layer[1].segment_count == 0) ||
+	      ((state->fe.dtv_property_cache.isdbt_layer_enabled & (2 << 0)) == 0)) &&
+	     ((state->fe.dtv_property_cache.layer[2].segment_count == 0) || ((state->fe.dtv_property_cache.isdbt_layer_enabled & (3 << 0)) == 0)))) {
+		int i = 800, found;
+
+		dib8000_set_bandwidth(state, fe->dtv_property_cache.bandwidth_hz / 1000);
+		dib8000_autosearch_start(fe);
+		do {
+			msleep(10);
+			found = dib8000_autosearch_irq(fe);
+		} while (found == 0 && i--);
+
+		dprintk("Frequency %d Hz, autosearch returns: %d", fep->frequency, found);
+
+		if (found == 0 || found == 1)
+			return 0;	// no channel found
+
+		dib8000_get_frontend(fe, fep);
+	}
+
+	ret = dib8000_tune(fe);
+
+	/* make this a config parameter */
+	dib8000_set_output_mode(state, state->cfg.output_mode);
+
+	return ret;
+}
+
+static int dib8000_read_status(struct dvb_frontend *fe, fe_status_t * stat)
+{
+	struct dib8000_state *state = fe->demodulator_priv;
+	u16 lock = dib8000_read_word(state, 568);
+
+	*stat = 0;
+
+	if ((lock >> 14) & 1)	// AGC
+		*stat |= FE_HAS_SIGNAL;
+
+	if ((lock >> 8) & 1)	// Equal
+		*stat |= FE_HAS_CARRIER;
+
+	if ((lock >> 3) & 1)	// TMCC_SYNC
+		*stat |= FE_HAS_SYNC;
+
+	if ((lock >> 5) & 7)	// FEC MPEG
+		*stat |= FE_HAS_LOCK;
+
+	lock = dib8000_read_word(state, 554);	// Viterbi Layer A
+	if (lock & 0x01)
+		*stat |= FE_HAS_VITERBI;
+
+	lock = dib8000_read_word(state, 555);	// Viterbi Layer B
+	if (lock & 0x01)
+		*stat |= FE_HAS_VITERBI;
+
+	lock = dib8000_read_word(state, 556);	// Viterbi Layer C
+	if (lock & 0x01)
+		*stat |= FE_HAS_VITERBI;
+
+	return 0;
+}
+
+static int dib8000_read_ber(struct dvb_frontend *fe, u32 * ber)
+{
+	struct dib8000_state *state = fe->demodulator_priv;
+	*ber = (dib8000_read_word(state, 560) << 16) | dib8000_read_word(state, 561);	// 13 segments
+	return 0;
+}
+
+static int dib8000_read_unc_blocks(struct dvb_frontend *fe, u32 * unc)
+{
+	struct dib8000_state *state = fe->demodulator_priv;
+	*unc = dib8000_read_word(state, 565);	// packet error on 13 seg
+	return 0;
+}
+
+static int dib8000_read_signal_strength(struct dvb_frontend *fe, u16 * strength)
+{
+	struct dib8000_state *state = fe->demodulator_priv;
+	u16 val = dib8000_read_word(state, 390);
+	*strength = 65535 - val;
+	return 0;
+}
+
+static int dib8000_read_snr(struct dvb_frontend *fe, u16 * snr)
+{
+	struct dib8000_state *state = fe->demodulator_priv;
+	u16 val;
+	s32 signal_mant, signal_exp, noise_mant, noise_exp;
+	u32 result = 0;
+
+	val = dib8000_read_word(state, 542);
+	noise_mant = (val >> 6) & 0xff;
+	noise_exp = (val & 0x3f);
+
+	val = dib8000_read_word(state, 543);
+	signal_mant = (val >> 6) & 0xff;
+	signal_exp = (val & 0x3f);
+
+	if ((noise_exp & 0x20) != 0)
+		noise_exp -= 0x40;
+	if ((signal_exp & 0x20) != 0)
+		signal_exp -= 0x40;
+
+	if (signal_mant != 0)
+		result = intlog10(2) * 10 * signal_exp + 10 * intlog10(signal_mant);
+	else
+		result = intlog10(2) * 10 * signal_exp - 100;
+	if (noise_mant != 0)
+		result -= intlog10(2) * 10 * noise_exp + 10 * intlog10(noise_mant);
+	else
+		result -= intlog10(2) * 10 * noise_exp - 100;
+
+	*snr = result / (1 << 24);
+	return 0;
+}
+
+int dib8000_i2c_enumeration(struct i2c_adapter *host, int no_of_demods, u8 default_addr, u8 first_addr)
+{
+	int k = 0;
+	u8 new_addr = 0;
+	struct i2c_device client = {.adap = host };
+
+	for (k = no_of_demods - 1; k >= 0; k--) {
+		/* designated i2c address */
+		new_addr = first_addr + (k << 1);
+
+		client.addr = new_addr;
+		dib8000_i2c_write16(&client, 1287, 0x0003);	/* sram lead in, rdy */
+		if (dib8000_identify(&client) == 0) {
+			dib8000_i2c_write16(&client, 1287, 0x0003);	/* sram lead in, rdy */
+			client.addr = default_addr;
+			if (dib8000_identify(&client) == 0) {
+				dprintk("#%d: not identified", k);
+				return -EINVAL;
+			}
+		}
+
+		/* start diversity to pull_down div_str - just for i2c-enumeration */
+		dib8000_i2c_write16(&client, 1286, (1 << 10) | (4 << 6));
+
+		/* set new i2c address and force divstart */
+		dib8000_i2c_write16(&client, 1285, (new_addr << 2) | 0x2);
+		client.addr = new_addr;
+		dib8000_identify(&client);
+
+		dprintk("IC %d initialized (to i2c_address 0x%x)", k, new_addr);
+	}
+
+	for (k = 0; k < no_of_demods; k++) {
+		new_addr = first_addr | (k << 1);
+		client.addr = new_addr;
+
+		// unforce divstr
+		dib8000_i2c_write16(&client, 1285, new_addr << 2);
+
+		/* deactivate div - it was just for i2c-enumeration */
+		dib8000_i2c_write16(&client, 1286, 0);
+	}
+
+	return 0;
+}
+
+EXPORT_SYMBOL(dib8000_i2c_enumeration);
+static int dib8000_fe_get_tune_settings(struct dvb_frontend *fe, struct dvb_frontend_tune_settings *tune)
+{
+	tune->min_delay_ms = 1000;
+	tune->step_size = 0;
+	tune->max_drift = 0;
+	return 0;
+}
+
+static void dib8000_release(struct dvb_frontend *fe)
+{
+	struct dib8000_state *st = fe->demodulator_priv;
+	dibx000_exit_i2c_master(&st->i2c_master);
+	kfree(st);
+}
+
+struct i2c_adapter *dib8000_get_i2c_master(struct dvb_frontend *fe, enum dibx000_i2c_interface intf, int gating)
+{
+	struct dib8000_state *st = fe->demodulator_priv;
+	return dibx000_get_i2c_adapter(&st->i2c_master, intf, gating);
+}
+
+EXPORT_SYMBOL(dib8000_get_i2c_master);
+
+static const struct dvb_frontend_ops dib8000_ops = {
+	.info = {
+		 .name = "DiBcom 8000 ISDB-T",
+		 .type = FE_OFDM,
+		 .frequency_min = 44250000,
+		 .frequency_max = 867250000,
+		 .frequency_stepsize = 62500,
+		 .caps = FE_CAN_INVERSION_AUTO |
+		 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
+		 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
+		 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
+		 FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_GUARD_INTERVAL_AUTO | FE_CAN_RECOVER | FE_CAN_HIERARCHY_AUTO,
+		 },
+
+	.release = dib8000_release,
+
+	.init = dib8000_wakeup,
+	.sleep = dib8000_sleep,
+
+	.set_frontend = dib8000_set_frontend,
+	.get_tune_settings = dib8000_fe_get_tune_settings,
+	.get_frontend = dib8000_get_frontend,
+
+	.read_status = dib8000_read_status,
+	.read_ber = dib8000_read_ber,
+	.read_signal_strength = dib8000_read_signal_strength,
+	.read_snr = dib8000_read_snr,
+	.read_ucblocks = dib8000_read_unc_blocks,
+};
+
+struct dvb_frontend *dib8000_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, struct dib8000_config *cfg)
+{
+	struct dvb_frontend *fe;
+	struct dib8000_state *state;
+
+	dprintk("dib8000_attach");
+
+	state = kzalloc(sizeof(struct dib8000_state), GFP_KERNEL);
+	if (state == NULL)
+		return NULL;
+
+	memcpy(&state->cfg, cfg, sizeof(struct dib8000_config));
+	state->i2c.adap = i2c_adap;
+	state->i2c.addr = i2c_addr;
+	state->gpio_val = cfg->gpio_val;
+	state->gpio_dir = cfg->gpio_dir;
+
+	/* Ensure the output mode remains at the previous default if it's
+	 * not specifically set by the caller.
+	 */
+	if ((state->cfg.output_mode != OUTMODE_MPEG2_SERIAL) && (state->cfg.output_mode != OUTMODE_MPEG2_PAR_GATED_CLK))
+		state->cfg.output_mode = OUTMODE_MPEG2_FIFO;
+
+	fe = &state->fe;
+	fe->demodulator_priv = state;
+	memcpy(&state->fe.ops, &dib8000_ops, sizeof(struct dvb_frontend_ops));
+
+	state->timf_default = cfg->pll->timf;
+
+	if (dib8000_identify(&state->i2c) == 0)
+		goto error;
+
+	dibx000_init_i2c_master(&state->i2c_master, DIB8000, state->i2c.adap, state->i2c.addr);
+
+	dib8000_reset(fe);
+
+	dib8000_write_word(state, 285, (dib8000_read_word(state, 285) & ~0x60) | (3 << 5));	/* ber_rs_len = 3 */
+
+	return fe;
+
+ error:
+	kfree(state);
+	return NULL;
+}
+
+EXPORT_SYMBOL(dib8000_attach);
+
+MODULE_AUTHOR("Olivier Grenie <Olivier.Grenie@dibcom.fr, " "Patrick Boettcher <pboettcher@dibcom.fr>");
+MODULE_DESCRIPTION("Driver for the DiBcom 8000 ISDB-T demodulator");
+MODULE_LICENSE("GPL");
diff --git a/linux/drivers/media/dvb/frontends/dib8000.h b/linux/drivers/media/dvb/frontends/dib8000.h
new file mode 100644
index 000000000..a86de340d
--- /dev/null
+++ b/linux/drivers/media/dvb/frontends/dib8000.h
@@ -0,0 +1,79 @@
+#ifndef DIB8000_H
+#define DIB8000_H
+
+#include "dibx000_common.h"
+
+struct dib8000_config {
+	u8 output_mpeg2_in_188_bytes;
+	u8 hostbus_diversity;
+	u8 tuner_is_baseband;
+	int (*update_lna) (struct dvb_frontend *, u16 agc_global);
+
+	u8 agc_config_count;
+	struct dibx000_agc_config *agc;
+	struct dibx000_bandwidth_config *pll;
+
+#define DIB8000_GPIO_DEFAULT_DIRECTIONS 0xffff
+	u16 gpio_dir;
+#define DIB8000_GPIO_DEFAULT_VALUES     0x0000
+	u16 gpio_val;
+#define DIB8000_GPIO_PWM_POS0(v)        ((v & 0xf) << 12)
+#define DIB8000_GPIO_PWM_POS1(v)        ((v & 0xf) << 8 )
+#define DIB8000_GPIO_PWM_POS2(v)        ((v & 0xf) << 4 )
+#define DIB8000_GPIO_PWM_POS3(v)         (v & 0xf)
+#define DIB8000_GPIO_DEFAULT_PWM_POS    0xffff
+	u16 gpio_pwm_pos;
+	u16 pwm_freq_div;
+
+	void (*agc_control) (struct dvb_frontend *, u8 before);
+
+	u16 drives;
+	u16 diversity_delay;
+	u8 div_cfg;
+	u8 output_mode;
+	u8 refclksel;
+};
+
+#define DEFAULT_DIB8000_I2C_ADDRESS 18
+
+#if defined(CONFIG_DVB_DIB8000) || (defined(CONFIG_DVB_DIB8000_MODULE) && defined(MODULE))
+extern struct dvb_frontend *dib8000_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, struct dib8000_config *cfg);
+extern struct i2c_adapter *dib8000_get_i2c_master(struct dvb_frontend *, enum dibx000_i2c_interface, int);
+
+extern int dib8000_i2c_enumeration(struct i2c_adapter *host, int no_of_demods, u8 default_addr, u8 first_addr);
+
+extern int dib8000_set_gpio(struct dvb_frontend *, u8 num, u8 dir, u8 val);
+extern int dib8000_set_wbd_ref(struct dvb_frontend *, u16 value);
+#else
+static inline struct dvb_frontend *dib8000_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, struct dib8000_config *cfg)
+{
+	printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+	return NULL;
+}
+
+static inline struct i2c_adapter *dib8000_get_i2c_master(struct dvb_frontend *fe, enum dibx000_i2c_interface i, int x)
+{
+	printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+	return NULL;
+}
+
+int dib8000_i2c_enumeration(struct i2c_adapter *host, int no_of_demods, u8 default_addr, u8 first_addr)
+{
+	printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+	return -ENODEV;
+}
+
+int dib8000_set_gpio(struct dvb_frontend *fe, u8 num, u8 dir, u8 val)
+{
+	printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+	return -ENODEV;
+}
+
+int dib8000_set_wbd_ref(struct dvb_frontend *fe, u16 value)
+{
+	printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+	return -ENODEV;
+}
+#endif
+
+#endif
diff --git a/linux/drivers/media/dvb/frontends/dibx000_common.c b/linux/drivers/media/dvb/frontends/dibx000_common.c
index 6f1f41ae3..db7a1b9b4 100644
--- a/linux/drivers/media/dvb/frontends/dibx000_common.c
+++ b/linux/drivers/media/dvb/frontends/dibx000_common.c
@@ -16,7 +16,7 @@ static int dibx000_write_word(struct dibx000_i2c_master *mst, u16 reg, u16 val)
 		(val >> 8) & 0xff, val & 0xff,
 	};
 	struct i2c_msg msg = {
-		.addr = mst->i2c_addr, .flags = 0, .buf = b, .len = 4
+		.addr = mst->i2c_addr,.flags = 0,.buf = b,.len = 4
 	};
 	return i2c_transfer(mst->i2c_adap, &msg, 1) != 1 ? -EREMOTEIO : 0;
 }
@@ -27,28 +27,30 @@ static u16 dibx000_read_word(struct dibx000_i2c_master *mst, u16 reg)
 	u8 wb[2] = { (reg >> 8) | 0x80, reg & 0xff };
 	u8 rb[2];
 	struct i2c_msg msg[2] = {
-		{ .addr = mst->i2c_addr, .flags = 0,        .buf = wb, .len = 2 },
-		{ .addr = mst->i2c_addr, .flags = I2C_M_RD, .buf = rb, .len = 2 },
+		{.addr = mst->i2c_addr,.flags = 0,.buf = wb,.len = 2},
+		{.addr = mst->i2c_addr,.flags = I2C_M_RD,.buf = rb,.len = 2},
 	};
 
 	if (i2c_transfer(mst->i2c_adap, msg, 2) != 2)
-		dprintk("i2c read error on %d\\n",reg);
+		dprintk("i2c read error on %d\\n", reg);
 
 	return (rb[0] << 8) | rb[1];
 }
 #endif
 
-static int dibx000_i2c_select_interface(struct dibx000_i2c_master *mst, enum dibx000_i2c_interface intf)
+static int dibx000_i2c_select_interface(struct dibx000_i2c_master *mst,
+					enum dibx000_i2c_interface intf)
 {
 	if (mst->device_rev > DIB3000MC && mst->selected_interface != intf) {
-		dprintk("selecting interface: %d\n",intf);
+		dprintk("selecting interface: %d\n", intf);
 		mst->selected_interface = intf;
 		return dibx000_write_word(mst, mst->base_reg + 4, intf);
 	}
 	return 0;
 }
 
-static int dibx000_i2c_gate_ctrl(struct dibx000_i2c_master *mst, u8 tx[4], u8 addr, int onoff)
+static int dibx000_i2c_gate_ctrl(struct dibx000_i2c_master *mst, u8 tx[4],
+				 u8 addr, int onoff)
 {
 	u16 val;
 
@@ -60,7 +62,7 @@ static int dibx000_i2c_gate_ctrl(struct dibx000_i2c_master *mst, u8 tx[4], u8 ad
 #endif
 
 	if (onoff)
-		val = addr << 8; // bit 7 = use master or not, if 0, the gate is open
+		val = addr << 8;	// bit 7 = use master or not, if 0, the gate is open
 	else
 		val = 1 << 7;
 
@@ -68,7 +70,7 @@ static int dibx000_i2c_gate_ctrl(struct dibx000_i2c_master *mst, u8 tx[4], u8 ad
 		val <<= 1;
 
 	tx[0] = (((mst->base_reg + 1) >> 8) & 0xff);
-	tx[1] = ( (mst->base_reg + 1)       & 0xff);
+	tx[1] = ((mst->base_reg + 1) & 0xff);
 	tx[2] = val >> 8;
 	tx[3] = val & 0xff;
 
@@ -80,79 +82,97 @@ static u32 dibx000_i2c_func(struct i2c_adapter *adapter)
 	return I2C_FUNC_I2C;
 }
 
-static int dibx000_i2c_gated_tuner_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg msg[], int num)
+static int dibx000_i2c_gated_tuner_xfer(struct i2c_adapter *i2c_adap,
+					struct i2c_msg msg[], int num)
 {
 	struct dibx000_i2c_master *mst = i2c_get_adapdata(i2c_adap);
 	struct i2c_msg m[2 + num];
 	u8 tx_open[4], tx_close[4];
 
-	memset(m,0, sizeof(struct i2c_msg) * (2 + num));
+	memset(m, 0, sizeof(struct i2c_msg) * (2 + num));
 
 	dibx000_i2c_select_interface(mst, DIBX000_I2C_INTERFACE_TUNER);
 
-	dibx000_i2c_gate_ctrl(mst, tx_open,  msg[0].addr, 1);
+	dibx000_i2c_gate_ctrl(mst, tx_open, msg[0].addr, 1);
 	m[0].addr = mst->i2c_addr;
-	m[0].buf  = tx_open;
-	m[0].len  = 4;
+	m[0].buf = tx_open;
+	m[0].len = 4;
 
 	memcpy(&m[1], msg, sizeof(struct i2c_msg) * num);
 
 	dibx000_i2c_gate_ctrl(mst, tx_close, 0, 0);
-	m[num+1].addr = mst->i2c_addr;
-	m[num+1].buf  = tx_close;
-	m[num+1].len  = 4;
+	m[num + 1].addr = mst->i2c_addr;
+	m[num + 1].buf = tx_close;
+	m[num + 1].len = 4;
 
-	return i2c_transfer(mst->i2c_adap, m, 2+num) == 2 + num ? num : -EIO;
+	return i2c_transfer(mst->i2c_adap, m, 2 + num) == 2 + num ? num : -EIO;
 }
 
 static struct i2c_algorithm dibx000_i2c_gated_tuner_algo = {
-	.master_xfer   = dibx000_i2c_gated_tuner_xfer,
+	.master_xfer = dibx000_i2c_gated_tuner_xfer,
 	.functionality = dibx000_i2c_func,
 #ifdef NEED_ALGO_CONTROL
 	.algo_control = dummy_algo_control,
 #endif
 };
 
-struct i2c_adapter * dibx000_get_i2c_adapter(struct dibx000_i2c_master *mst, enum dibx000_i2c_interface intf, int gating)
+struct i2c_adapter *dibx000_get_i2c_adapter(struct dibx000_i2c_master *mst,
+					    enum dibx000_i2c_interface intf,
+					    int gating)
 {
 	struct i2c_adapter *i2c = NULL;
 
 	switch (intf) {
-		case DIBX000_I2C_INTERFACE_TUNER:
-			if (gating)
-				i2c = &mst->gated_tuner_i2c_adap;
-			break;
+	case DIBX000_I2C_INTERFACE_TUNER:
+		if (gating)
+			i2c = &mst->gated_tuner_i2c_adap;
 #if 0
-			else
-				i2c = &mst->tuner_i2c_adap;
-			break;
-		case DIBX000_I2C_INTERFACE_GPIO_1_2:
-			if (gating)
-				i2c = &mst->gated_gpio_1_2_i2c_adap;
-			else
-				i2c = &mst->gpio_1_2_i2c_adap;
-			break;
-		case DIBX000_I2C_INTERFACE_GPIO_3_4:
-			if (gating)
-				i2c = &mst->gated_gpio_3_4_i2c_adap;
-			else
-				i2c = &mst->gpio_3_4_i2c_adap;
-			break;
+		else
+			i2c = &mst->tuner_i2c_adap;
+		break;
+	case DIBX000_I2C_INTERFACE_GPIO_1_2:
+		if (gating)
+			i2c = &mst->gated_gpio_1_2_i2c_adap;
+		else
+			i2c = &mst->gpio_1_2_i2c_adap;
+		break;
+	case DIBX000_I2C_INTERFACE_GPIO_3_4:
+		if (gating)
+			i2c = &mst->gated_gpio_3_4_i2c_adap;
+		else
+			i2c = &mst->gpio_3_4_i2c_adap;
 #endif
-		default:
-			printk(KERN_ERR "DiBX000: incorrect I2C interface selected\n");
-			break;
+		break;
+	default:
+		printk(KERN_ERR "DiBX000: incorrect I2C interface selected\n");
+		break;
 	}
 
 	return i2c;
 }
+
 EXPORT_SYMBOL(dibx000_get_i2c_adapter);
 
-static int i2c_adapter_init(struct i2c_adapter *i2c_adap, struct i2c_algorithm *algo, const char *name, struct dibx000_i2c_master *mst)
+void dibx000_reset_i2c_master(struct dibx000_i2c_master *mst)
+{
+	/* initialize the i2c-master by closing the gate */
+	u8 tx[4];
+	struct i2c_msg m = {.addr = mst->i2c_addr,.buf = tx,.len = 4 };
+
+	dibx000_i2c_gate_ctrl(mst, tx, 0, 0);
+	i2c_transfer(mst->i2c_adap, &m, 1);
+	mst->selected_interface = 0xff;	// the first time force a select of the I2C
+	dibx000_i2c_select_interface(mst, DIBX000_I2C_INTERFACE_TUNER);
+}
+
+EXPORT_SYMBOL(dibx000_reset_i2c_master);
+
+static int i2c_adapter_init(struct i2c_adapter *i2c_adap,
+			    struct i2c_algorithm *algo, const char *name,
+			    struct dibx000_i2c_master *mst)
 {
 	strncpy(i2c_adap->name, name, sizeof(i2c_adap->name));
-	i2c_adap->class     = I2C_CLASS_TV_DIGITAL,
-	i2c_adap->algo      = algo;
+	i2c_adap->class = I2C_CLASS_TV_DIGITAL, i2c_adap->algo = algo;
 	i2c_adap->algo_data = NULL;
 	i2c_set_adapdata(i2c_adap, mst);
 	if (i2c_add_adapter(i2c_adap) < 0)
@@ -160,34 +180,40 @@ static int i2c_adapter_init(struct i2c_adapter *i2c_adap, struct i2c_algorithm *
 	return 0;
 }
 
-int dibx000_init_i2c_master(struct dibx000_i2c_master *mst, u16 device_rev, struct i2c_adapter *i2c_adap, u8 i2c_addr)
+int dibx000_init_i2c_master(struct dibx000_i2c_master *mst, u16 device_rev,
+			    struct i2c_adapter *i2c_adap, u8 i2c_addr)
 {
 	u8 tx[4];
-	struct i2c_msg m = { .addr = i2c_addr >> 1, .buf = tx, .len = 4 };
+	struct i2c_msg m = {.addr = i2c_addr >> 1,.buf = tx,.len = 4 };
 
 	mst->device_rev = device_rev;
-	mst->i2c_adap   = i2c_adap;
-	mst->i2c_addr   = i2c_addr >> 1;
+	mst->i2c_adap = i2c_adap;
+	mst->i2c_addr = i2c_addr >> 1;
 
-	if (device_rev == DIB7000P)
+	if (device_rev == DIB7000P || device_rev == DIB8000)
 		mst->base_reg = 1024;
 	else
 		mst->base_reg = 768;
 
-    if (i2c_adapter_init(&mst->gated_tuner_i2c_adap, &dibx000_i2c_gated_tuner_algo, "DiBX000 tuner I2C bus", mst) != 0)
-		printk(KERN_ERR "DiBX000: could not initialize the tuner i2c_adapter\n");
+	if (i2c_adapter_init
+	    (&mst->gated_tuner_i2c_adap, &dibx000_i2c_gated_tuner_algo,
+	     "DiBX000 tuner I2C bus", mst) != 0)
+		printk(KERN_ERR
+		       "DiBX000: could not initialize the tuner i2c_adapter\n");
 
 	/* initialize the i2c-master by closing the gate */
 	dibx000_i2c_gate_ctrl(mst, tx, 0, 0);
 
 	return i2c_transfer(i2c_adap, &m, 1) == 1;
 }
+
 EXPORT_SYMBOL(dibx000_init_i2c_master);
 
 void dibx000_exit_i2c_master(struct dibx000_i2c_master *mst)
 {
 	i2c_del_adapter(&mst->gated_tuner_i2c_adap);
 }
+
 EXPORT_SYMBOL(dibx000_exit_i2c_master);
 
 MODULE_AUTHOR("Patrick Boettcher <pboettcher@dibcom.fr>");
diff --git a/linux/drivers/media/dvb/frontends/dibx000_common.h b/linux/drivers/media/dvb/frontends/dibx000_common.h
index 84e4d5362..5be10eca0 100644
--- a/linux/drivers/media/dvb/frontends/dibx000_common.h
+++ b/linux/drivers/media/dvb/frontends/dibx000_common.h
@@ -2,7 +2,7 @@
 #define DIBX000_COMMON_H
 
 enum dibx000_i2c_interface {
-	DIBX000_I2C_INTERFACE_TUNER    = 0,
+	DIBX000_I2C_INTERFACE_TUNER = 0,
 	DIBX000_I2C_INTERFACE_GPIO_1_2 = 1,
 	DIBX000_I2C_INTERFACE_GPIO_3_4 = 2
 };
@@ -12,22 +12,29 @@ struct dibx000_i2c_master {
 #define DIB7000   2
 #define DIB7000P  11
 #define DIB7000MC 12
+#define DIB8000   13
 	u16 device_rev;
 
 	enum dibx000_i2c_interface selected_interface;
 
-//	struct i2c_adapter  tuner_i2c_adap;
-	struct i2c_adapter  gated_tuner_i2c_adap;
+//      struct i2c_adapter  tuner_i2c_adap;
+	struct i2c_adapter gated_tuner_i2c_adap;
 
 	struct i2c_adapter *i2c_adap;
-	u8                  i2c_addr;
+	u8 i2c_addr;
 
 	u16 base_reg;
 };
 
-extern int dibx000_init_i2c_master(struct dibx000_i2c_master *mst, u16 device_rev, struct i2c_adapter *i2c_adap, u8 i2c_addr);
-extern struct i2c_adapter * dibx000_get_i2c_adapter(struct dibx000_i2c_master *mst, enum dibx000_i2c_interface intf, int gating);
+extern int dibx000_init_i2c_master(struct dibx000_i2c_master *mst,
+				   u16 device_rev, struct i2c_adapter *i2c_adap,
+				   u8 i2c_addr);
+extern struct i2c_adapter *dibx000_get_i2c_adapter(struct dibx000_i2c_master
+						   *mst,
+						   enum dibx000_i2c_interface
+						   intf, int gating);
 extern void dibx000_exit_i2c_master(struct dibx000_i2c_master *mst);
+extern void dibx000_reset_i2c_master(struct dibx000_i2c_master *mst);
 
 #define BAND_LBAND 0x01
 #define BAND_UHF   0x02
@@ -41,18 +48,18 @@ extern void dibx000_exit_i2c_master(struct dibx000_i2c_master *mst);
 									(freq_kHz) <= 2000000 ? BAND_LBAND : BAND_SBAND )
 
 struct dibx000_agc_config {
-	/* defines the capabilities of this AGC-setting - using the BAND_-defines*/
-	u8  band_caps;
+	/* defines the capabilities of this AGC-setting - using the BAND_-defines */
+	u8 band_caps;
 
 	u16 setup;
 
 	u16 inv_gain;
 	u16 time_stabiliz;
 
-	u8  alpha_level;
+	u8 alpha_level;
 	u16 thlock;
 
-	u8  wbd_inv;
+	u8 wbd_inv;
 	u16 wbd_ref;
 	u8 wbd_sel;
 	u8 wbd_alpha;
@@ -92,8 +99,8 @@ struct dibx000_agc_config {
 };
 
 struct dibx000_bandwidth_config {
-	u32   internal;
-	u32   sampling;
+	u32 internal;
+	u32 sampling;
 
 	u8 pll_prediv;
 	u8 pll_ratio;
-- 
cgit v1.2.3


From c6051ce51f316c2822a103e227640f562fe8ef22 Mon Sep 17 00:00:00 2001
From: Patrick Boettcher <pboettcher@kernellabs.com>
Date: Mon, 17 Aug 2009 12:21:44 +0200
Subject: DiB0700: add support for STK807XP and STK807XPVR

From: Patrick Boettcher <pboettcher@dibcom.fr>

This patchs adds support for the DiB8000 based devices STK807xP and
STK807xPVR to the dib0700-device-tree.

Priority: normal

Signed-off-by: Olivier Grenie <Olivier.Grenie@dibcom.fr>
Signed-off-by: Patrick Boettcher <pboettcher@dibcom.fr>
---
 linux/drivers/media/dvb/dvb-usb/dib0700_devices.c | 369 +++++++++++++++++++++-
 linux/drivers/media/dvb/dvb-usb/dvb-usb-ids.h     |   2 +
 2 files changed, 369 insertions(+), 2 deletions(-)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c b/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c
index 216bdbbf7..1787f52d7 100644
--- a/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c
+++ b/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c
@@ -4,13 +4,14 @@
  *	under the terms of the GNU General Public License as published by the Free
  *	Software Foundation, version 2.
  *
- *  Copyright (C) 2005-7 DiBcom, SA
+ *  Copyright (C) 2005-9 DiBcom, SA et al
  */
 #include "dib0700.h"
 
 #include "dib3000mc.h"
 #include "dib7000m.h"
 #include "dib7000p.h"
+#include "dib8000.h"
 #include "mt2060.h"
 #include "mt2266.h"
 #include "tuner-xc2028.h"
@@ -1218,6 +1219,306 @@ static int stk7070p_frontend_attach(struct dvb_usb_adapter *adap)
 	return adap->fe == NULL ? -ENODEV : 0;
 }
 
+/* DIB807x generic */
+static struct dibx000_agc_config dib807x_agc_config[2] = {
+	{
+		BAND_VHF,
+		/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
+		 * P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
+		 * P_agc_inv_pwm2=0,P_agc_inh_dc_rv_est=0,
+		 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
+		 * P_agc_write=0 */
+		(0 << 15) | (0 << 14) | (7 << 11) | (0 << 10) | (0 << 9) |
+			(0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) |
+			(0 << 0), /* setup*/
+
+		600, /* inv_gain*/
+		10,  /* time_stabiliz*/
+
+		0,  /* alpha_level*/
+		118,  /* thlock*/
+
+		0,     /* wbd_inv*/
+		3530,  /* wbd_ref*/
+		1,     /* wbd_sel*/
+		5,     /* wbd_alpha*/
+
+		65535,  /* agc1_max*/
+		0,  /* agc1_min*/
+
+		65535,  /* agc2_max*/
+		0,      /* agc2_min*/
+
+		0,      /* agc1_pt1*/
+		40,     /* agc1_pt2*/
+		183,    /* agc1_pt3*/
+		206,    /* agc1_slope1*/
+		255,    /* agc1_slope2*/
+		72,     /* agc2_pt1*/
+		152,    /* agc2_pt2*/
+		88,     /* agc2_slope1*/
+		90,     /* agc2_slope2*/
+
+		17,  /* alpha_mant*/
+		27,  /* alpha_exp*/
+		23,  /* beta_mant*/
+		51,  /* beta_exp*/
+
+		0,  /* perform_agc_softsplit*/
+	}, {
+		BAND_UHF,
+		/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
+		 * P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
+		 * P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
+		 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
+		 * P_agc_write=0 */
+		(0 << 15) | (0 << 14) | (1 << 11) | (0 << 10) | (0 << 9) |
+			(0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) |
+			(0 << 0), /* setup */
+
+		600, /* inv_gain*/
+		10,  /* time_stabiliz*/
+
+		0,  /* alpha_level*/
+		118,  /* thlock*/
+
+		0,     /* wbd_inv*/
+		3530,  /* wbd_ref*/
+		1,     /* wbd_sel*/
+		5,     /* wbd_alpha*/
+
+		65535,  /* agc1_max*/
+		0,  /* agc1_min*/
+
+		65535,  /* agc2_max*/
+		0,      /* agc2_min*/
+
+		0,      /* agc1_pt1*/
+		40,     /* agc1_pt2*/
+		183,    /* agc1_pt3*/
+		206,    /* agc1_slope1*/
+		255,    /* agc1_slope2*/
+		72,     /* agc2_pt1*/
+		152,    /* agc2_pt2*/
+		88,     /* agc2_slope1*/
+		90,     /* agc2_slope2*/
+
+		17,  /* alpha_mant*/
+		27,  /* alpha_exp*/
+		23,  /* beta_mant*/
+		51,  /* beta_exp*/
+
+		0,  /* perform_agc_softsplit*/
+	}
+};
+
+static struct dibx000_bandwidth_config dib807x_bw_config_12_mhz = {
+	60000, 15000, /* internal, sampling*/
+	1, 20, 3, 1, 0, /* pll_cfg: prediv, ratio, range, reset, bypass*/
+	0, 0, 1, 1, 2, /* misc: refdiv, bypclk_div, IO_CLK_en_core,
+			  ADClkSrc, modulo */
+	(3 << 14) | (1 << 12) | (599 << 0), /* sad_cfg: refsel, sel, freq_15k*/
+	(0 << 25) | 0, /* ifreq = 0.000000 MHz*/
+	18179755, /* timf*/
+	12000000, /* xtal_hz*/
+};
+
+static struct dib8000_config dib807x_dib8000_config[2] = {
+	{
+		.output_mpeg2_in_188_bytes = 1,
+
+		.agc_config_count = 2,
+		.agc = dib807x_agc_config,
+		.pll = &dib807x_bw_config_12_mhz,
+		.tuner_is_baseband = 1,
+
+		.gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
+		.gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
+		.gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
+
+		.hostbus_diversity = 1,
+		.div_cfg = 1,
+		.agc_control = &dib0070_ctrl_agc_filter,
+		.output_mode = OUTMODE_MPEG2_FIFO,
+		.drives = 0x2d98,
+	}, {
+		.output_mpeg2_in_188_bytes = 1,
+
+		.agc_config_count = 2,
+		.agc = dib807x_agc_config,
+		.pll = &dib807x_bw_config_12_mhz,
+		.tuner_is_baseband = 1,
+
+		.gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
+		.gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
+		.gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
+
+		.hostbus_diversity = 1,
+		.agc_control = &dib0070_ctrl_agc_filter,
+		.output_mode = OUTMODE_MPEG2_FIFO,
+		.drives = 0x2d98,
+	}
+};
+
+static int dib807x_tuner_reset(struct dvb_frontend *fe, int onoff)
+{
+	return dib8000_set_gpio(fe, 5, 0, !onoff);
+}
+
+static int dib807x_tuner_sleep(struct dvb_frontend *fe, int onoff)
+{
+	return dib8000_set_gpio(fe, 0, 0, onoff);
+}
+
+static const struct dib0070_wbd_gain_cfg dib8070_wbd_gain_cfg[] = {
+    { 240,      7},
+    { 0xffff,   6},
+};
+
+static struct dib0070_config dib807x_dib0070_config[2] = {
+	{
+		.i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
+		.reset = dib807x_tuner_reset,
+		.sleep = dib807x_tuner_sleep,
+		.clock_khz = 12000,
+		.clock_pad_drive = 4,
+		.vga_filter = 1,
+		.force_crystal_mode = 1,
+		.enable_third_order_filter = 1,
+		.charge_pump = 0,
+		.wbd_gain = dib8070_wbd_gain_cfg,
+		.osc_buffer_state = 0,
+		.freq_offset_khz_uhf = -100,
+		.freq_offset_khz_vhf = -100,
+	}, {
+		.i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
+		.reset = dib807x_tuner_reset,
+		.sleep = dib807x_tuner_sleep,
+		.clock_khz = 12000,
+		.clock_pad_drive = 2,
+		.vga_filter = 1,
+		.force_crystal_mode = 1,
+		.enable_third_order_filter = 1,
+		.charge_pump = 0,
+		.wbd_gain = dib8070_wbd_gain_cfg,
+		.osc_buffer_state = 0,
+		.freq_offset_khz_uhf = -25,
+		.freq_offset_khz_vhf = -25,
+	}
+};
+
+static int dib807x_set_param_override(struct dvb_frontend *fe,
+		struct dvb_frontend_parameters *fep)
+{
+	struct dvb_usb_adapter *adap = fe->dvb->priv;
+	struct dib0700_adapter_state *state = adap->priv;
+
+	u16 offset = dib0070_wbd_offset(fe);
+	u8 band = BAND_OF_FREQUENCY(fep->frequency/1000);
+	switch (band) {
+	case BAND_VHF:
+		offset += 750;
+		break;
+	case BAND_UHF:  /* fall-thru wanted */
+	default:
+		offset += 250; break;
+	}
+	deb_info("WBD for DiB8000: %d\n", offset);
+	dib8000_set_wbd_ref(fe, offset);
+
+	return state->set_param_save(fe, fep);
+}
+
+static int dib807x_tuner_attach(struct dvb_usb_adapter *adap)
+{
+	struct dib0700_adapter_state *st = adap->priv;
+	struct i2c_adapter *tun_i2c = dib8000_get_i2c_master(adap->fe,
+			DIBX000_I2C_INTERFACE_TUNER, 1);
+
+	if (adap->id == 0) {
+		if (dvb_attach(dib0070_attach, adap->fe, tun_i2c,
+				&dib807x_dib0070_config[0]) == NULL)
+			return -ENODEV;
+	} else {
+		if (dvb_attach(dib0070_attach, adap->fe, tun_i2c,
+				&dib807x_dib0070_config[1]) == NULL)
+			return -ENODEV;
+	}
+
+	st->set_param_save = adap->fe->ops.tuner_ops.set_params;
+	adap->fe->ops.tuner_ops.set_params = dib807x_set_param_override;
+	return 0;
+}
+
+
+/* STK807x */
+static int stk807x_frontend_attach(struct dvb_usb_adapter *adap)
+{
+	dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
+	msleep(10);
+	dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
+	dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
+	dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
+
+	dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
+
+	dib0700_ctrl_clock(adap->dev, 72, 1);
+
+	msleep(10);
+	dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
+	msleep(10);
+	dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
+
+	dib8000_i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
+				0x80);
+
+	adap->fe = dvb_attach(dib8000_attach, &adap->dev->i2c_adap, 0x80,
+			      &dib807x_dib8000_config[0]);
+
+	return adap->fe == NULL ?  -ENODEV : 0;
+}
+
+/* STK807xPVR */
+static int stk807xpvr_frontend_attach0(struct dvb_usb_adapter *adap)
+{
+	dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
+	msleep(30);
+	dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
+	msleep(500);
+	dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
+	dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
+	dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
+
+	dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
+
+	dib0700_ctrl_clock(adap->dev, 72, 1);
+
+	msleep(10);
+	dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
+	msleep(10);
+	dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
+
+	/* initialize IC 0 */
+	dib8000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x12, 0x80);
+
+	adap->fe = dvb_attach(dib8000_attach, &adap->dev->i2c_adap, 0x80,
+			      &dib807x_dib8000_config[0]);
+
+	return adap->fe == NULL ? -ENODEV : 0;
+}
+
+static int stk807xpvr_frontend_attach1(struct dvb_usb_adapter *adap)
+{
+	/* initialize IC 1 */
+	dib8000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x22, 0x82);
+
+	adap->fe = dvb_attach(dib8000_attach, &adap->dev->i2c_adap, 0x82,
+			      &dib807x_dib8000_config[1]);
+
+	return adap->fe == NULL ? -ENODEV : 0;
+}
+
+
 /* STK7070PD */
 static struct dib7000p_config stk7070pd_dib7000p_config[2] = {
 	{
@@ -1505,7 +1806,9 @@ struct usb_device_id dib0700_usb_id_table[] = {
 	{ USB_DEVICE(USB_VID_TERRATEC,	USB_PID_TERRATEC_T3) },
 	{ USB_DEVICE(USB_VID_TERRATEC,	USB_PID_TERRATEC_T5) },
 	{ USB_DEVICE(USB_VID_YUAN,      USB_PID_YUAN_STK7700D) },
-	{ 0 }		/* Terminating entry */
+/* 55 */{ USB_DEVICE(USB_VID_DIBCOM,    USB_PID_DIBCOM_STK807XPVR) },
+	{ USB_DEVICE(USB_VID_DIBCOM,    USB_PID_DIBCOM_STK807XP) },
+{ 0 }		/* Terminating entry */
 };
 MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);
 
@@ -1927,6 +2230,68 @@ struct dvb_usb_device_properties dib0700_devices[] = {
 				{ NULL },
 			},
 		},
+	}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
+		.num_adapters = 1,
+		.adapter = {
+			{
+				.frontend_attach  = stk807x_frontend_attach,
+				.tuner_attach     = dib807x_tuner_attach,
+
+				DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
+
+				.size_of_priv =
+					sizeof(struct dib0700_adapter_state),
+			},
+		},
+
+		.num_device_descs = 1,
+		.devices = {
+			{   "DiBcom STK807xP reference design",
+				{ &dib0700_usb_id_table[56], NULL },
+				{ NULL },
+			},
+		},
+
+		.rc_interval      = DEFAULT_RC_INTERVAL,
+		.rc_key_map       = dib0700_rc_keys,
+		.rc_key_map_size  = ARRAY_SIZE(dib0700_rc_keys),
+		.rc_query         = dib0700_rc_query
+
+	}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
+		.num_adapters = 2,
+		.adapter = {
+			{
+				.frontend_attach  = stk807xpvr_frontend_attach0,
+				.tuner_attach     = dib807x_tuner_attach,
+
+				DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
+
+				.size_of_priv =
+					sizeof(struct dib0700_adapter_state),
+			},
+			{
+				.frontend_attach  = stk807xpvr_frontend_attach1,
+				.tuner_attach     = dib807x_tuner_attach,
+
+				DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
+
+				.size_of_priv =
+					sizeof(struct dib0700_adapter_state),
+			},
+		},
+
+		.num_device_descs = 1,
+		.devices = {
+			{   "DiBcom STK807xPVR reference design",
+				{ &dib0700_usb_id_table[55], NULL },
+				{ NULL },
+			},
+		},
+
+		.rc_interval      = DEFAULT_RC_INTERVAL,
+		.rc_key_map       = dib0700_rc_keys,
+		.rc_key_map_size  = ARRAY_SIZE(dib0700_rc_keys),
+		.rc_query         = dib0700_rc_query
 	},
 };
 
diff --git a/linux/drivers/media/dvb/dvb-usb/dvb-usb-ids.h b/linux/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
index 6eccce1a7..a515f4fb7 100644
--- a/linux/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
+++ b/linux/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
@@ -94,6 +94,8 @@
 #define USB_PID_DIBCOM_STK7700_U7000			0x7001
 #define USB_PID_DIBCOM_STK7070P				0x1ebc
 #define USB_PID_DIBCOM_STK7070PD			0x1ebe
+#define USB_PID_DIBCOM_STK807XP				0x1f90
+#define USB_PID_DIBCOM_STK807XPVR			0x1f98
 #define USB_PID_DIBCOM_ANCHOR_2135_COLD			0x2131
 #define USB_PID_DPOSH_M9206_COLD			0x9206
 #define USB_PID_DPOSH_M9206_WARM			0xa090
-- 
cgit v1.2.3


From eb80450edef873c9b5d0a839659da0a642e7716a Mon Sep 17 00:00:00 2001
From: Patrick Boettcher <pboettcher@kernellabs.com>
Date: Mon, 17 Aug 2009 17:53:51 +0200
Subject: DiB8000: fix channel search parameter initialization

From: Patrick Boettcher <pboettcher@dibcom.fr>

This patch is fixing the initialization of the channel search parameters.

Priority: normal

Signed-off-by: Olivier Grenie <olivier.grenie@dibcom.fr>
Signed-off-by: Patrick Boettcher <pboettcher@dibcom.fr>
---
 linux/drivers/media/dvb/frontends/dib8000.c | 24 +++++++++++-------------
 1 file changed, 11 insertions(+), 13 deletions(-)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/frontends/dib8000.c b/linux/drivers/media/dvb/frontends/dib8000.c
index cc2fae3be..bb16712a0 100644
--- a/linux/drivers/media/dvb/frontends/dib8000.c
+++ b/linux/drivers/media/dvb/frontends/dib8000.c
@@ -23,7 +23,7 @@
 
 #define FE_CALLBACK_TIME_NEVER 0xffffffff
 
-static int debug = 0;
+static int debug;
 module_param(debug, int, 0644);
 MODULE_PARM_DESC(debug, "turn on debugging (default: 0)");
 
@@ -1672,10 +1672,6 @@ static int dib8000_autosearch_start(struct dvb_frontend *fe)
 
 	int slist = 0;
 
-	state->fe.dtv_property_cache.transmission_mode = TRANSMISSION_MODE_8K;
-	state->fe.dtv_property_cache.guard_interval = GUARD_INTERVAL_1_8;
-	//state->fe.dtv_property_cache.isdbt_sb_mode                = 0;
-	//state->fe.dtv_property_cache.isdbt_partial_reception      = 0;
 	state->fe.dtv_property_cache.inversion = 0;
 	if (!state->fe.dtv_property_cache.isdbt_sb_mode)
 		state->fe.dtv_property_cache.layer[0].segment_count = 13;
@@ -1685,6 +1681,8 @@ static int dib8000_autosearch_start(struct dvb_frontend *fe)
 
 	//choose the right list, in sb, always do everything
 	if (state->fe.dtv_property_cache.isdbt_sb_mode) {
+		state->fe.dtv_property_cache.transmission_mode = TRANSMISSION_MODE_8K;
+		state->fe.dtv_property_cache.guard_interval = GUARD_INTERVAL_1_8;
 		slist = 7;
 		dib8000_write_word(state, 0, (dib8000_read_word(state, 0) & 0x9fff) | (1 << 13));
 	} else {
@@ -1692,22 +1690,21 @@ static int dib8000_autosearch_start(struct dvb_frontend *fe)
 			if (state->fe.dtv_property_cache.transmission_mode == TRANSMISSION_MODE_AUTO) {
 				slist = 7;
 				dib8000_write_word(state, 0, (dib8000_read_word(state, 0) & 0x9fff) | (1 << 13));	// P_mode = 1 to have autosearch start ok with mode2
-			} else {
+			} else
 				slist = 3;
-				state->fe.dtv_property_cache.transmission_mode = state->fe.dtv_property_cache.transmission_mode;
-			}
 		} else {
 			if (state->fe.dtv_property_cache.transmission_mode == TRANSMISSION_MODE_AUTO) {
 				slist = 2;
-				state->fe.dtv_property_cache.guard_interval = state->fe.dtv_property_cache.guard_interval;
 				dib8000_write_word(state, 0, (dib8000_read_word(state, 0) & 0x9fff) | (1 << 13));	// P_mode = 1
-			} else {
+			} else
 				slist = 0;
-				state->fe.dtv_property_cache.transmission_mode = state->fe.dtv_property_cache.transmission_mode;
-				state->fe.dtv_property_cache.guard_interval = state->fe.dtv_property_cache.guard_interval;
-			}
 		}
 
+		if (state->fe.dtv_property_cache.transmission_mode == TRANSMISSION_MODE_AUTO)
+			state->fe.dtv_property_cache.transmission_mode = TRANSMISSION_MODE_8K;
+		if (state->fe.dtv_property_cache.guard_interval == GUARD_INTERVAL_AUTO)
+			state->fe.dtv_property_cache.guard_interval = GUARD_INTERVAL_1_8;
+
 		dprintk("using list for autosearch : %d", slist);
 		dib8000_set_channel(state, (unsigned char)slist, 1);
 		//dib8000_write_word(state, 0, (dib8000_read_word(state, 0) & 0x9fff) | (1 << 13));  // P_mode = 1
@@ -1734,6 +1731,7 @@ static int dib8000_autosearch_start(struct dvb_frontend *fe)
 		dib8000_write_word(state, 0, (u16) ((1 << 15) | value));
 		dib8000_read_word(state, 1284);	// reset the INT. n_irq_pending
 		dib8000_write_word(state, 0, (u16) value);
+
 	}
 
 	return 0;
-- 
cgit v1.2.3


From 275f551d8e0c03884cd207fec2b627abf62da326 Mon Sep 17 00:00:00 2001
From: Patrick Boettcher <pboettcher@kernellabs.com>
Date: Tue, 15 Sep 2009 11:46:52 +0200
Subject: DIB7000P: SNR calcuation forr DiB7000P

From: Olivier Grenie <olivier.grenie@dibcom.fr>

Add the SNR monitoring for the dib7000p. The result is in dB.

Priority: normal

Signed-off-by: Olivier Grenie <olivier.grenie@dibcom.fr>
Signed-off-by: Patrick Boettcher <patrick.boettcher@dibcom.fr>
---
 linux/drivers/media/dvb/frontends/dib7000p.c | 33 +++++++++++++++++++++++++++-
 1 file changed, 32 insertions(+), 1 deletion(-)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/frontends/dib7000p.c b/linux/drivers/media/dvb/frontends/dib7000p.c
index d56de75db..57bee771c 100644
--- a/linux/drivers/media/dvb/frontends/dib7000p.c
+++ b/linux/drivers/media/dvb/frontends/dib7000p.c
@@ -11,6 +11,7 @@
 #include <linux/i2c.h>
 #include "compat.h"
 
+#include "dvb_math.h"
 #include "dvb_frontend.h"
 
 #include "dib7000p.h"
@@ -1243,7 +1244,37 @@ static int dib7000p_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
 
 static int dib7000p_read_snr(struct dvb_frontend* fe, u16 *snr)
 {
-	*snr = 0x0000;
+	struct dib7000p_state *state = fe->demodulator_priv;
+	u16 val;
+	s32 signal_mant, signal_exp, noise_mant, noise_exp;
+	u32 result = 0;
+
+	val = dib7000p_read_word(state, 479);
+	noise_mant = (val >> 4) & 0xff;
+	noise_exp = ((val & 0xf) << 2);
+	val = dib7000p_read_word(state, 480);
+	noise_exp += ((val >> 14) & 0x3);
+	if ((noise_exp & 0x20) != 0)
+		noise_exp -= 0x40;
+
+	signal_mant = (val >> 6) & 0xFF;
+	signal_exp  = (val & 0x3F);
+	if ((signal_exp & 0x20) != 0)
+		signal_exp -= 0x40;
+
+	if (signal_mant != 0)
+		result = intlog10(2) * 10 * signal_exp + 10 *
+			intlog10(signal_mant);
+	else
+		result = intlog10(2) * 10 * signal_exp - 100;
+
+	if (noise_mant != 0)
+		result -= intlog10(2) * 10 * noise_exp + 10 *
+			intlog10(noise_mant);
+	else
+		result -= intlog10(2) * 10 * noise_exp - 100;
+
+	*snr = result / ((1 << 24) / 10);
 	return 0;
 }
 
-- 
cgit v1.2.3


From c346c197df913c89e5334f18c92880fc503f18a7 Mon Sep 17 00:00:00 2001
From: Patrick Boettcher <pboettcher@kernellabs.com>
Date: Tue, 15 Sep 2009 11:55:35 +0200
Subject: STK7770P: Add support for STK7770P

From: Olivier Grenie <olivier.grenie@dibcom.fr>

Added support for the dib7770P and the STK7770P

Priority: normal

Signed-off-by: Olivier Grenie <olivier.grenie@dibcom.fr>
Signed-off-by: Patrick Boettcher <patrick.boettcher@dibcom.fr>
---
 linux/drivers/media/dvb/dvb-usb/dib0700_devices.c | 76 +++++++++++++++++++++++
 linux/drivers/media/dvb/dvb-usb/dvb-usb-ids.h     |  1 +
 2 files changed, 77 insertions(+)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c b/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c
index d6ae20c16..5eb29beca 100644
--- a/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c
+++ b/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c
@@ -1122,6 +1122,15 @@ static struct dib0070_config dib7070p_dib0070_config[2] = {
 	}
 };
 
+static struct dib0070_config dib7770p_dib0070_config = {
+	 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
+	 .reset = dib7070_tuner_reset,
+	 .sleep = dib7070_tuner_sleep,
+	 .clock_khz = 12000,
+	 .clock_pad_drive = 0,
+	 .flip_chip = 1,
+};
+
 static int dib7070_set_param_override(struct dvb_frontend *fe, struct dvb_frontend_parameters *fep)
 {
 	struct dvb_usb_adapter *adap = fe->dvb->priv;
@@ -1139,6 +1148,45 @@ static int dib7070_set_param_override(struct dvb_frontend *fe, struct dvb_fronte
 	return state->set_param_save(fe, fep);
 }
 
+static int dib7770_set_param_override(struct dvb_frontend *fe,
+		struct dvb_frontend_parameters *fep)
+{
+	 struct dvb_usb_adapter *adap = fe->dvb->priv;
+	 struct dib0700_adapter_state *state = adap->priv;
+
+	 u16 offset;
+	 u8 band = BAND_OF_FREQUENCY(fep->frequency/1000);
+	 switch (band) {
+	 case BAND_VHF:
+		  dib7000p_set_gpio(fe, 0, 0, 1);
+		  offset = 850;
+		  break;
+	 case BAND_UHF:
+	 default:
+		  dib7000p_set_gpio(fe, 0, 0, 0);
+		  offset = 250;
+		  break;
+	 }
+	 deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe));
+	 dib7000p_set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
+	 return state->set_param_save(fe, fep);
+}
+
+static int dib7770p_tuner_attach(struct dvb_usb_adapter *adap)
+{
+	 struct dib0700_adapter_state *st = adap->priv;
+	 struct i2c_adapter *tun_i2c = dib7000p_get_i2c_master(adap->fe,
+			 DIBX000_I2C_INTERFACE_TUNER, 1);
+
+	 if (dvb_attach(dib0070_attach, adap->fe, tun_i2c,
+				 &dib7770p_dib0070_config) == NULL)
+		 return -ENODEV;
+
+	 st->set_param_save = adap->fe->ops.tuner_ops.set_params;
+	 adap->fe->ops.tuner_ops.set_params = dib7770_set_param_override;
+	 return 0;
+}
+
 static int dib7070p_tuner_attach(struct dvb_usb_adapter *adap)
 {
 	struct dib0700_adapter_state *st = adap->priv;
@@ -1508,6 +1556,7 @@ struct usb_device_id dib0700_usb_id_table[] = {
 	{ USB_DEVICE(USB_VID_PINNACLE,	USB_PID_PINNACLE_PCTV73A) },
 	{ USB_DEVICE(USB_VID_PINNACLE,	USB_PID_PINNACLE_PCTV73ESE) },
 	{ USB_DEVICE(USB_VID_PINNACLE,	USB_PID_PINNACLE_PCTV282E) },
+	{ USB_DEVICE(USB_VID_DIBCOM,	USB_PID_DIBCOM_STK7770P) },
 	{ 0 }		/* Terminating entry */
 };
 MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);
@@ -1969,6 +2018,33 @@ struct dvb_usb_device_properties dib0700_devices[] = {
 				{ NULL },
 			},
 		},
+	}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
+
+		.num_adapters = 1,
+		.adapter = {
+			{
+				.frontend_attach  = stk7070p_frontend_attach,
+				.tuner_attach     = dib7770p_tuner_attach,
+
+				DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
+
+				.size_of_priv =
+                                        sizeof(struct dib0700_adapter_state),
+			},
+		},
+
+		.num_device_descs = 1,
+		.devices = {
+			{   "DiBcom STK7770P reference design",
+				{ &dib0700_usb_id_table[59], NULL },
+				{ NULL },
+			},
+		},
+
+		.rc_interval      = DEFAULT_RC_INTERVAL,
+		.rc_key_map       = dib0700_rc_keys,
+		.rc_key_map_size  = ARRAY_SIZE(dib0700_rc_keys),
+		.rc_query         = dib0700_rc_query
 	},
 };
 
diff --git a/linux/drivers/media/dvb/dvb-usb/dvb-usb-ids.h b/linux/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
index eec5604dc..a77d305e3 100644
--- a/linux/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
+++ b/linux/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
@@ -96,6 +96,7 @@
 #define USB_PID_DIBCOM_STK7070P				0x1ebc
 #define USB_PID_DIBCOM_STK7070PD			0x1ebe
 #define USB_PID_DIBCOM_ANCHOR_2135_COLD			0x2131
+#define USB_PID_DIBCOM_STK7770P			0x1e80
 #define USB_PID_DPOSH_M9206_COLD			0x9206
 #define USB_PID_DPOSH_M9206_WARM			0xa090
 #define USB_PID_UNIWILL_STK7700P			0x6003
-- 
cgit v1.2.3


From c158b8d33c3864fa02e353807cfe984b8edf08f4 Mon Sep 17 00:00:00 2001
From: Patrick Boettcher <pboettcher@kernellabs.com>
Date: Tue, 15 Sep 2009 12:16:51 +0200
Subject: DIB0700: added USB IDs for a Terratec DVB-T XXS

From: Patrick Boettcher <pboettcher@kernellabs.com>

Since there is now correct support for the DiB7770 the support for the
'Terratec Cinergy T USB XXS (HD)' can be added.

One USB-ID has been moved, another one has been added.

Priority: normal

Signed-off-by: Patrick Boettcher <pboettcher@kernellabs.com>
---
 linux/drivers/media/dvb/dvb-usb/dib0700_devices.c | 12 ++++++++----
 linux/drivers/media/dvb/dvb-usb/dvb-usb-ids.h     |  3 ++-
 2 files changed, 10 insertions(+), 5 deletions(-)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c b/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c
index 5eb29beca..c726bb463 100644
--- a/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c
+++ b/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c
@@ -1557,6 +1557,7 @@ struct usb_device_id dib0700_usb_id_table[] = {
 	{ USB_DEVICE(USB_VID_PINNACLE,	USB_PID_PINNACLE_PCTV73ESE) },
 	{ USB_DEVICE(USB_VID_PINNACLE,	USB_PID_PINNACLE_PCTV282E) },
 	{ USB_DEVICE(USB_VID_DIBCOM,	USB_PID_DIBCOM_STK7770P) },
+/* 60 */{ USB_DEVICE(USB_VID_TERRATEC,	USB_PID_TERRATEC_CINERGY_T_XXS_2) },
 	{ 0 }		/* Terminating entry */
 };
 MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);
@@ -1621,7 +1622,7 @@ struct dvb_usb_device_properties dib0700_devices[] = {
 				{ NULL },
 			},
 			{   "Leadtek Winfast DTV Dongle (STK7700P based)",
-				{ &dib0700_usb_id_table[8], &dib0700_usb_id_table[34] },
+				{ &dib0700_usb_id_table[8] },
 				{ NULL },
 			},
 			{   "AVerMedia AVerTV DVB-T Express",
@@ -2029,18 +2030,21 @@ struct dvb_usb_device_properties dib0700_devices[] = {
 				DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
 
 				.size_of_priv =
-                                        sizeof(struct dib0700_adapter_state),
+					sizeof(struct dib0700_adapter_state),
 			},
 		},
 
-		.num_device_descs = 1,
+		.num_device_descs = 2,
 		.devices = {
 			{   "DiBcom STK7770P reference design",
 				{ &dib0700_usb_id_table[59], NULL },
 				{ NULL },
 			},
+			{   "Terratec Cinergy T USB XXS (HD)",
+				{ &dib0700_usb_id_table[34], &dib0700_usb_id_table[60] },
+				{ NULL },
+			},
 		},
-
 		.rc_interval      = DEFAULT_RC_INTERVAL,
 		.rc_key_map       = dib0700_rc_keys,
 		.rc_key_map_size  = ARRAY_SIZE(dib0700_rc_keys),
diff --git a/linux/drivers/media/dvb/dvb-usb/dvb-usb-ids.h b/linux/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
index a77d305e3..a07959c1c 100644
--- a/linux/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
+++ b/linux/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
@@ -96,7 +96,7 @@
 #define USB_PID_DIBCOM_STK7070P				0x1ebc
 #define USB_PID_DIBCOM_STK7070PD			0x1ebe
 #define USB_PID_DIBCOM_ANCHOR_2135_COLD			0x2131
-#define USB_PID_DIBCOM_STK7770P			0x1e80
+#define USB_PID_DIBCOM_STK7770P				0x1e80
 #define USB_PID_DPOSH_M9206_COLD			0x9206
 #define USB_PID_DPOSH_M9206_WARM			0xa090
 #define USB_PID_UNIWILL_STK7700P			0x6003
@@ -185,6 +185,7 @@
 #define USB_PID_TERRATEC_CINERGY_HT_EXPRESS		0x0060
 #define USB_PID_TERRATEC_CINERGY_T_EXPRESS		0x0062
 #define USB_PID_TERRATEC_CINERGY_T_XXS			0x0078
+#define USB_PID_TERRATEC_CINERGY_T_XXS_2		0x00ab
 #define USB_PID_TERRATEC_T3				0x10a0
 #define USB_PID_TERRATEC_T5				0x10a1
 #define USB_PID_PINNACLE_EXPRESSCARD_320CX		0x022e
-- 
cgit v1.2.3


From ed4703877ac87e3131897353eeb13137182e5666 Mon Sep 17 00:00:00 2001
From: Mauro Carvalho Chehab <mchehab@redhat.com>
Date: Wed, 16 Sep 2009 09:05:55 -0300
Subject: dib0700_devices: Fix a merge conflict that lead to wrong entry values

From: Mauro Carvalho Chehab <mchehab@redhat.com>

Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
---
 linux/drivers/media/dvb/dvb-usb/dib0700_devices.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c b/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c
index 4d812ee73..cc4942c44 100644
--- a/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c
+++ b/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c
@@ -2372,7 +2372,7 @@ struct dvb_usb_device_properties dib0700_devices[] = {
 		.num_device_descs = 1,
 		.devices = {
 			{   "DiBcom STK807xP reference design",
-				{ &dib0700_usb_id_table[56], NULL },
+				{ &dib0700_usb_id_table[62], NULL },
 				{ NULL },
 			},
 		},
@@ -2408,7 +2408,7 @@ struct dvb_usb_device_properties dib0700_devices[] = {
 		.num_device_descs = 1,
 		.devices = {
 			{   "DiBcom STK807xPVR reference design",
-				{ &dib0700_usb_id_table[55], NULL },
+				{ &dib0700_usb_id_table[61], NULL },
 				{ NULL },
 			},
 		},
-- 
cgit v1.2.3


From be5c908d619efc69e59b9c1595b5df7962bd9a90 Mon Sep 17 00:00:00 2001
From: Mauro Carvalho Chehab <mchehab@redhat.com>
Date: Wed, 16 Sep 2009 09:18:26 -0300
Subject: dib0700: Add support for Prolink SBTVD

From: Mauro Carvalho Chehab <mchehab@redhat.com>

Priority: normal

Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
---
 linux/drivers/media/dvb/dvb-usb/dib0700_devices.c | 7 ++++++-
 linux/drivers/media/dvb/dvb-usb/dvb-usb-ids.h     | 2 ++
 2 files changed, 8 insertions(+), 1 deletion(-)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c b/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c
index cc4942c44..5198167a9 100644
--- a/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c
+++ b/linux/drivers/media/dvb/dvb-usb/dib0700_devices.c
@@ -1864,6 +1864,7 @@ struct usb_device_id dib0700_usb_id_table[] = {
 /* 60 */{ USB_DEVICE(USB_VID_TERRATEC,	USB_PID_TERRATEC_CINERGY_T_XXS_2) },
 	{ USB_DEVICE(USB_VID_DIBCOM,    USB_PID_DIBCOM_STK807XPVR) },
 	{ USB_DEVICE(USB_VID_DIBCOM,    USB_PID_DIBCOM_STK807XP) },
+	{ USB_DEVICE(USB_VID_PIXELVIEW, USB_PID_PIXELVIEW_SBTVD) },
 	{ 0 }		/* Terminating entry */
 };
 MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);
@@ -2369,12 +2370,16 @@ struct dvb_usb_device_properties dib0700_devices[] = {
 			},
 		},
 
-		.num_device_descs = 1,
+		.num_device_descs = 2,
 		.devices = {
 			{   "DiBcom STK807xP reference design",
 				{ &dib0700_usb_id_table[62], NULL },
 				{ NULL },
 			},
+			{   "Prolink Pixelview SBTVD",
+				{ &dib0700_usb_id_table[63], NULL },
+				{ NULL },
+			},
 		},
 
 		.rc_interval      = DEFAULT_RC_INTERVAL,
diff --git a/linux/drivers/media/dvb/dvb-usb/dvb-usb-ids.h b/linux/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
index 7c0e3124a..2d51e3c28 100644
--- a/linux/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
+++ b/linux/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
@@ -46,6 +46,7 @@
 #define USB_VID_MSI_2				0x1462
 #define USB_VID_OPERA1				0x695c
 #define USB_VID_PINNACLE			0x2304
+#define USB_VID_PIXELVIEW			0x1554
 #define USB_VID_TECHNOTREND			0x0b48
 #define USB_VID_TERRATEC			0x0ccd
 #define USB_VID_TELESTAR			0x10b9
@@ -202,6 +203,7 @@
 #define USB_PID_PINNACLE_PCTV73A			0x0243
 #define USB_PID_PINNACLE_PCTV73ESE			0x0245
 #define USB_PID_PINNACLE_PCTV282E			0x0248
+#define USB_PID_PIXELVIEW_SBTVD				0x5010
 #define USB_PID_PCTV_200E				0x020e
 #define USB_PID_PCTV_400E				0x020f
 #define USB_PID_PCTV_450E				0x0222
-- 
cgit v1.2.3


From 95ef516ce2a8ae3c1dade201b57f860641ab4e39 Mon Sep 17 00:00:00 2001
From: Antti Palosaari <crope@iki.fi>
Date: Thu, 17 Sep 2009 01:47:01 +0300
Subject: anysee: increase BULK transfer size from 512 to 8192

From: Antti Palosaari <crope@iki.fi>

increase BULK transfer size from 512 to 8192 to increase wakeups

Priority: normal

Signed-off-by: Antti Palosaari <crope@iki.fi>
---
 linux/drivers/media/dvb/dvb-usb/anysee.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/dvb-usb/anysee.c b/linux/drivers/media/dvb/dvb-usb/anysee.c
index 1211c81ce..45ead8d9e 100644
--- a/linux/drivers/media/dvb/dvb-usb/anysee.c
+++ b/linux/drivers/media/dvb/dvb-usb/anysee.c
@@ -514,7 +514,7 @@ static struct dvb_usb_device_properties anysee_properties = {
 				.endpoint = 0x82,
 				.u = {
 					.bulk = {
-						.buffersize = 512,
+						.buffersize = (16*512),
 					}
 				}
 			},
-- 
cgit v1.2.3


From 8cc9d58b365e60e2b3b97cbc052b8bcb70219c0e Mon Sep 17 00:00:00 2001
From: Antti Palosaari <crope@iki.fi>
Date: Thu, 17 Sep 2009 01:50:25 +0300
Subject: anysee: coding style fix

From: Antti Palosaari <crope@iki.fi>

coding style fix

Priority: normal

Signed-off-by: Antti Palosaari <crope@iki.fi>
---
 linux/drivers/media/dvb/dvb-usb/anysee.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/dvb-usb/anysee.c b/linux/drivers/media/dvb/dvb-usb/anysee.c
index 45ead8d9e..bffb83fa3 100644
--- a/linux/drivers/media/dvb/dvb-usb/anysee.c
+++ b/linux/drivers/media/dvb/dvb-usb/anysee.c
@@ -206,11 +206,11 @@ static struct i2c_algorithm anysee_i2c_algo = {
 
 static int anysee_mt352_demod_init(struct dvb_frontend *fe)
 {
-	static u8 clock_config []  = { CLOCK_CTL,  0x38, 0x28 };
-	static u8 reset []         = { RESET,      0x80 };
-	static u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
-	static u8 agc_cfg []       = { AGC_TARGET, 0x28, 0x20 };
-	static u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
+	static u8 clock_config[]   = { CLOCK_CTL,  0x38, 0x28 };
+	static u8 reset[]          = { RESET,      0x80 };
+	static u8 adc_ctl_1_cfg[]  = { ADC_CTL_1,  0x40 };
+	static u8 agc_cfg[]        = { AGC_TARGET, 0x28, 0x20 };
+	static u8 gpp_ctl_cfg[]    = { GPP_CTL,    0x33 };
 	static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
 
 	mt352_write(fe, clock_config,   sizeof(clock_config));
@@ -488,7 +488,7 @@ static int anysee_probe(struct usb_interface *intf,
 	return ret;
 }
 
-static struct usb_device_id anysee_table [] = {
+static struct usb_device_id anysee_table[] = {
 	{ USB_DEVICE(USB_VID_CYPRESS, USB_PID_ANYSEE) },
 	{ USB_DEVICE(USB_VID_AMT,     USB_PID_ANYSEE) },
 	{ }		/* Terminating entry */
-- 
cgit v1.2.3


From 307405f21d709dd8df9a479d1786d7a2697f1796 Mon Sep 17 00:00:00 2001
From: Antti Palosaari <crope@iki.fi>
Date: Thu, 17 Sep 2009 02:21:52 +0300
Subject: ce6230: increase BULK transfer size from 512 to 8192

From: Antti Palosaari <crope@iki.fi>

increase BULK transfer size from 512 to 8192 to increase wakeups

Priority: normal

Signed-off-by: Antti Palosaari <crope@iki.fi>
---
 linux/drivers/media/dvb/dvb-usb/ce6230.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'linux/drivers/media/dvb')

diff --git a/linux/drivers/media/dvb/dvb-usb/ce6230.c b/linux/drivers/media/dvb/dvb-usb/ce6230.c
index 3ae3bde45..e20dd05e9 100644
--- a/linux/drivers/media/dvb/dvb-usb/ce6230.c
+++ b/linux/drivers/media/dvb/dvb-usb/ce6230.c
@@ -277,7 +277,7 @@ static struct dvb_usb_device_properties ce6230_properties = {
 				.endpoint = 0x82,
 				.u = {
 					.bulk = {
-						.buffersize = 512,
+						.buffersize = (16*512),
 					}
 				}
 			},
-- 
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