Age | Commit message (Collapse) | Author |
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Creating the objects early will allow the driver to use
randr structures to select a reasonable configuration.
That part has not been done yet.
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RandR DIX code is preparing for xf86 drivers that want to allocate RandR
objects at PreInit time. This patch adapts to that change without taking
advantage of it.
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Conflicts in PipeSetMode were resolved to use the keithp changes
that pushed more modesetting stuff into the per-pipe function.
Switched availablePipes to num_pipes.
Used modesetting default output configuration.
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ADPA might not have been set right in some cases (DPMS-off monitor, for
example), and a wait for vsync that the bios does was missing.
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Using "pipe" instead of the index "i" meant pipe(3) got referenced instead of
a nice small integer. Oops.
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operatingDevices and MonType1/MonType2 duplicate information already stored
in the device structures. Eliminate them and replace uses with direct
references to the appropriate other data.
(cherry picked from 3ab7f9693217d8fe993bdc94c376b219b0082961 commit)
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(cherry picked from e4bcec796e80e9fd66ab0c36394f5946915531f1 commit)
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new bugreport contains the user's config and log files. Bump dependencies on
xserver-xorg-core to >= 2:1.1.1-11, to make sure that the bug script is
present.
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Also, remove setting of some other random registers that appears to have
been spammed in at the same time, and don't try to disable on the I830, before
this register existed.
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DSPASURF/DSPBSURF can only take page aligned values, ignoring
the lower order bits. So, place the offset for the output
within the frame buffer in the DSPABASE/DSPBBASE registers instead.
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Letting the ring buffer or other objects be allocated within the lowest
portion of memory appears to trash some memory mapping data; I'm assuming
this is the GATT table on the 965. Just marking this out of bounds for
allocation fixes this problem.
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A few more register settings are needed to get CRT output working on the
965 chipset, in particular the the SDVO/UDI clock multiplier register
needed to get set to the default value (3). No, I really don't know what
this does, but it does get the CRT running at a wide range of sizes.
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operatingDevices and MonType1/MonType2 duplicate information already stored
in the device structures. Eliminate them and replace uses with direct
references to the appropriate other data.
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(cherry picked from 6a9386651785afc70a29e355255e8295b321f28e commit)
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Conflicts:
src/i830_display.c
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I830 contained six parallel arrays for pipe-specific data; these
have been moved to a I830PipeRec structure instead.
I830 also contained several unused members:
unsigned int bios_version;
Bool newPipeSwitch;
Bool fakeSwitch;
int fixedPipe;
These have been removed, along with the code that set them.
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The panel fitter appears to exist on the 965 hardware (at least) and
causes troubles with DVI output over SDVO when enabled. This patch
checks to see if the panel fitter is pointing at the pipe being configured
and disables it unconditionally in that case. The LVDS driver will configure
it correctly if necessary afterwards.
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I've gone back to compare our behavior to it several times, so I'll just keep
the code in tree for now.
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This gets the SDVO and CRT outputs I have to have at least 1 common mode
according to RandR.
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This should let RandR do the right thing in exposing the modes to userland.
As a side effect of getting this working, the SDVO pixel clock range code
was fixed and the mode valid tests for various outputs got extended. Also,
LVDS grew a get_modes for the fixed panel mode.
Note that we now no longer do automatic enabling of outputs at xrandr -s 0,
hotkey, or VT switch. That will be left to generic RandR code later. Also,
generic modes and user-defined modes are once again not validated into the
lists, so this is a regression there.
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