Age | Commit message (Collapse) | Author |
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This is a partial revert of 7358642e64ab6d13bc1dc1a44703ee66d715ff61
If we don't allocate it now, when the DRM version is too low there won't be any
memory allocated and DRI will fail. Instead, waste the memory in the i915tex
case for now, and leave fixing it right (check DRM version up front and decide
which memory manager to set up) to later.
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Not sure how I missed this before... Thanks to Todd Merrill for reporting.
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crestline
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pI830->mmSize is in kB.
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Guard code that dereferences pI830->third_buffer with tests for that instead of
pI830->TripleBuffer. It could happen that we want to enable triple buffering
but (temporarily) can't because the third buffer couldn't be allocated.
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The artifacts only seemed to occur when EXA was falling back to software for
the front buffer.
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Conflicts:
src/i830_display.c
src/i830_driver.c
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Make the application of crtc desiredModes generic code instead of
per-driver by creating xf86SetDesiredModes from the code that was in EnterVT
and calling it.
Also, move the frame buffer clear until just before mode setting to make
sure things are mapped correctly.
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git://proxy.ims.intel.com:9419/git/xorg/driver/xf86-video-intel
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I think this is a safe way to work around any possible chip
error.
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crestline
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git://otc-graphics.jf.intel.com/git/xorg/driver/xf86-video-intel into crestline
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Code to drive the global configuration from a single mode setting operation
(from RandR 1.1, XFree86-VidModeExtension or XFree86-DGA) has been included
in the X server now, so remove it from this driver.
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git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline
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Conflicts:
src/i830.h
src/i830_dri.c
src/i830_dri.h
src/i830_driver.c
src/i830_memory.c
src/i830_xaa.c
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It takes the offset and size in pages, not bytes.
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Only one of them can be active.
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Conflicts:
configure.ac
src/i830_driver.c
src/i830_modes.c
src/i830_video.c
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New hooks replace explicit invocation of DPMS functions to manage mode
setting sequencing.
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This isn't actually tested yet as libpciaccess doesn't do rom access on
non-linux yet.
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Shadow pixmap contents are copied from the main frame buffer and contain
only the bits displayed by the crtc, not the whole frame buffer. The crtc
origin is always interpreted by the shadow copying code, the frame buffer
itself doesn't move.
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git://otc-graphics.jf.intel.com/git/xorg/driver/xf86-video-intel into crestline
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Add xf86CrtcConfigFuncs to xf86CrtcConfigInit
Add canGrow option to xf86InitialConfiguration
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The LVDS register now contains lots of new controls for dual-channel LVDS control
along with dither enabling. The PFIT register has a lot fewer controls as a result.
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git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline
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Without this, the EXA code decides that the framebuffer is not in video
memory because it's not located between the start of video memory and the end
of EXA allocator memory. We should either have EXA let the driver decide if a
pointer is in video memory, or add a new field for "end of video memory" (not
just end of EXA offscreen allocation), but this fixes things for now.
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git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline
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git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline
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This reuses the i830_debug.c code, so we can run that from the console or from
the BIOS-based X server to debug some remaining issues.
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This should fix a number of issues with i855s, particularly with integrated
LVDS panels.
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git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline
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git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline
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This reverts commit 1ac83f51ee46d65237eae1b5c767e106ac9e29bc.
oops, current exa state + kernel program size + scratch space
is actually ~36KB.
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Origin size seems break all render, be sure to assign enough
mem. 80k works fine for me.
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