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2006-12-08Merge branch 'modesetting' of ↵Wang Zhenyu
git+ssh://zhen@git.freedesktop.org/git/xorg/driver/xf86-video-intel into modesetting
2006-12-08Merge branch 'exa-i965' of ↵Wang Zhenyu
git+ssh://zhen@git.freedesktop.org/git/xorg/driver/xf86-video-intel into crestline
2006-12-07Bump to 1.7.3Alan Hourihane
2006-12-06Merge branch 'modesetting-origin' into modesettingKeith Packard
2006-12-06Move vga restore to end of RestoreHWState.Keith Packard
I was having consistent system lockups when the vga restore was first. Moving it to the end has reduced them to an infrequent occurrence (but, alas, it has happened once since). This does not make me happy.
2006-12-06Use DOUBLE_WIDE mode on all hardware.Keith Packard
DOUBLE_WIDE mode is needed when the pixel clock is > 90% of the core clock rate. The code guesses what the core clock rate is based on the bus (AGP -> 133MHz, PCI-E -> 200MHz).
2006-12-06Include render.h to get SubPixelUnknown define.Eric Anholt
2006-12-06Merge branch 'modesetting' into crestlineKeith Packard
2006-12-06Merge branch 'modesetting-origin' into modesettingKeith Packard
2006-12-06Harmless warning fix.Eric Anholt
2006-12-06Reduce dumpregs to X startup, after a mode set, and LeaveVT.Eric Anholt
While here, remove some other register dumping that is better done by i830DumpRegs().
2006-12-06Save/restore registers around calls in PreInit with register side-effects.Eric Anholt
2006-12-06Remove stale i830_tv_pre_set_mode. Replaced by generic dpms hook call.Eric Anholt
Also replaced by not spamming unrelated ADPA register. At least, it had sure better not be related.
2006-12-06Save/restore more TV registers.Eric Anholt
2006-12-06Cannot modify DPLL register in output mode_set function.Keith Packard
DPLL register contains clock setup, so it cannot be written from the output mode_set function or 'bad things' happen.
2006-12-06Clean up SDVO multiplier debug outputKeith Packard
2006-12-06Merge branch 'modesetting' into nonrandr-setupKeith Packard
Also, fix buffer overflow in i830_debug.c
2006-12-06Merge branch 'generic-mode-set' into modesettingEric Anholt
2006-12-06Fix LVDS: Don't change bits in LVDS other than port enable/pipe select.Eric Anholt
This behavior matches what we did before when LVDS worked.
2006-12-06More LVDS fixed mode fixing: use the EDID DTD's blank length.Eric Anholt
2006-12-06Add missing newlines to new debug output.Eric Anholt
2006-12-06Fix LVDS fixed mode code after generic-mode-set.Eric Anholt
2006-12-06fix typo in checking xf86CrtcScreenInit returnWang Zhenyu
2006-12-06Use xf86 structures for default config instead of RandR.Keith Packard
To avoid requiring RandR 1.2 in the X server, use the xf86 Crtc and Output structures as the basis for the default configuration computation (and, eventually, the config-file based configuration as well).
2006-12-06fix Makefile.amWang Zhenyu
2006-12-05new server APIs are not in server-1.2 (version 7.1.99.2)Keith Packard
2006-12-05Capture VGA registers sooner so checks are more informativeKeith Packard
2006-12-05fix up misleading comment in i830_crt.c about border registerKeith Packard
2006-12-06Formats fixesWang Zhenyu
We should use card_fmt for src/mask picture, and use dest color buffer format helper. Also fix wrong name for G965 texture formats, and pict_x1r5g5b5 isn't supported by sampler engine.
2006-12-05Fix ordering of PIPE[AB]SRC debug output to be (x, y).Eric Anholt
2006-12-05Fix copy'n'paste-o of the ordering of h/v fields in DSP[AB]SIZE.Eric Anholt
2006-12-05Merge branch 'modesetting-origin' into modesettingEric Anholt
Conflicts: src/i830_display.c
2006-12-05Add a bunch of per-register debug code to i830DumpRegs().Eric Anholt
2006-12-05Move reg dump from i830PipeSetMode to after we set up the modes with RandR.Eric Anholt
2006-12-05WIP code to move mode set sequencing to XFree86 handlers.Eric Anholt
It compiles. It definitely doesn't run.
2006-12-04Re-create RandR Crtc/output structures on server regen.Keith Packard
RandR structures must be re-created when the server reinitializes, but the driver PreInit function is not re-invoked. Recreate them manually in this case during ScreenInit.
2006-12-04set correct default border colorWang Zhenyu
2006-12-04fix typo in ps kernelWang Zhenyu
fix corrupt in some subspans
2006-12-02Merge branch 'modesetting-origin' into modesettingKeith Packard
2006-12-02DOUBLE_WIDE mode for high pixel clock 8xx. Rewrite PLL search.Keith Packard
High pixel clock modes on pipe A of an 8xx chip require DOUBLE_WIDE mode. It's supposed to be modes > 180MHz or so, but the board I have requires DOUBLE_WIDE mode for clocks > 108MHz or so. The limit is related to the core clock speed of the chip, which can be found indirectly through PCI config space. None of the possible values explain why this board needs this mode for these relatively low clock rates though. Also, create tables of data for the PLL computation and use them instead of code. I think it's cleaner looking. It is also untested on 9xx. It'll work. Really.
2006-12-01Fix copy'n'paste-o from restructure-outputs that resulted in crashes.Eric Anholt
Our driver private is stored in the bus that we set up, not the DDC device that xf86 code does.
2006-12-01Don't try to write the read-only PP_STATUS register.Eric Anholt
Also, don't bother reading the PP_CONTROL register to try to get LVDS status -- that's what PP_STATUS is for.
2006-12-01Add the [ax]4r4g4b4 source picture formats.Eric Anholt
2006-12-01Merge branch 'modesetting' into crestlineKeith Packard
Use new TV output condition (all 9xx except 915g)
2006-12-01TV output exists on all 9xx chips except for 915GKeith Packard
2006-12-01Merge branch 'modesetting' into crestlineKeith Packard
2006-12-01Leave detected TV status alone when no free CRTC is available.Keith Packard
Yes, this means not detecting TV hotplug when two outputs are already running. An alternative would be to turn off one of the other outputs temporarily, but that would cause flashing. Something to consider.
2006-12-01Do output detection before any crtc allocation.Keith Packard
Some output detection requires a crtc for load detection, perform all of the output detection before allocating any crtcs so that there will be a free crtc for any load detection. Avoids losing TV detection when two monitors are connected.
2006-11-30When CRTC is disable through RandR, the mode is NULL. Don't dereference it.Keith Packard
Correctly interpret mode == NULL as CRTC disable, make sure the CRTC is disabled in this case.
2006-11-30Tristate the clock/data pins during GPIO when released while getting values.Eric Anholt
While the register is laid out suggesting that you can read a low value while driving the output high, and the I2C spec seems to indicate that you should be able to as well, and on some hardware this works successfully, on the i865 and perhaps some other chips it doesn't. So, if we're not holding the clock or data pin low during GetBits, tristate the pin so that we can successfully read. This fixes i865 analog (VGA) DDC so it successfully sees slave acks. Also, improve the I2C bit-banging debugging.
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