Age | Commit message (Collapse) | Author |
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Signed-off-by: Thomas Hilber <sparkie@lowbyte.de>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
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- introduced new xorg.conf options for both intel and radeon FRC patches
- FRC (aka sync_fields) switch (default on)
- process priority (default 0)
- FRC debug output (default off)
- intel Xserver now starts even with disconnected monitor
Signed-off-by: Thomas Hilber <sparkie@lowbyte.de>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
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- Full functionality of Radeon based original patch now ported
to recent Intel graphics hardware. This includes support
for i945G chipsets as found on EEE PCs and D945GCLF[2] boards.
- Exploits some special features of i945G chipsets like
vertical phase registers and fine tuning of vertical scaling.
This enables us to compensate for interference effects observed
when driving modern digital displays through a SCART interface.
Signed-off-by: Thomas Hilber <sparkie@lowbyte.de>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
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Signed-off-by: Eric Anholt <eric@anholt.net>
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Any time we actually need SW cursors, it gets enabled automatically.
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We rely on having AGPGART present to successfully allocate video memory as
we configure it by default. Admit that fact, and remove support for
non-AGPGART/KMS setups.
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It's been broken for years now, and KMS offers a much better chance of getting
this working sensibly without making a mess of the 2D driver.
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This saves massive quantities of memory on pre-965 since the DRI2 tiling
enable caused the minimum size of any pixmap to be 1MB.
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This could fix complaints about binding BOs and resulting failure to render.
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The LVDS config bits in VBT driver feature block is used by vendor
to identify the board implement of integrated LVDS/eDP or SDVO LVDS.
And video bios uses these bits for LVDS enabling or not. So check
these bits for integrated LVDS might eliminate more quirks.
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Which is just a hack to hide our SDVO detect drawback,
we will have SDVO/HDMI detect fix later.
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Oops, my bad. Reverted 8d4bc36fae50b09a73ba2cfab920adb32141a358
since my kernel doesn't yet have the new param, committed
the revert by accident.
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This adds back the resize hook so we can resize the front buffer under
kernel mode setting as well.
The patch also pulls the drmmode_* structs from drmmode_display.h into
drmmode_display.c and eliminates the header file.
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Set alignments, tile settings and flags correctly in the 2D driver to support
tiled rendering. UXA's create pixmap function currently assumes the worst
about the alignment constraints; that should probably be fixed. Some of the
1M alignment fixes could probably be done more cleanly as well.
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This eliminates the pinned memory allocation for 965 render state.
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This is a first step in a series of changes to avoid requiring a pinned object,
which gets in the way of doing non-root KMS. This change appears to result in
about a 2-6% loss in x11perf -aa10text, which better algorithms in libdrm could
make up for (it hasn't really had to deal with code this bad before).
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Debian "unstable" is still stuck with this ancient version.
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It was broken on current kernels, and deprecated anyway.
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It never worked with any upstream linux kernel, and is quite heavily
deprecated. A new solution based around DRI2 will probably be
forthcoming. Pageflipping itself is next.
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This also introduces tests to make sure that we asked for enough reserved space
and that we don't allow wrapping at the wrong time.
This fixes a hang during text rendering with DRI2 and a GL client running,
but could potentially affect text rendering with GEM in general with an
exceptional batchbuffer setup.
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Signed-off-by: Keith Packard <keithp@keithp.com>
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This eliminates the separate i830_allocate_memory_tiled function which means
that all memory objects will have tiling parameters set correctly.
Signed-off-by: Keith Packard <keithp@keithp.com>
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This should be a noop. If it wasn't a noop, it means that on pre-g33 chipsets
we were spamming some data into a page of system memory because we used a
virtual instead of a physical address. It was also supposed to not work when
we submit it from a batchbuffer, as we have been doing for some time now.
This code has existed since about the beginning of the driver's existence,
with no justification.
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For broken hardware/bios with incorrect ACPI LID state,
there's machine that can not be fixed in ACPI way, customed
DSDT that reprogram _LID method to read EC state. Although
this is ACPI issue, this quirk can be used to work around that.
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This avoids mapping a buffer object which is being referenced
by a batch that has already been flushed, (which is a terribly
expensive operation).
On my machine this brings the performance of x11perf -aa10text
from 85k back to 150k, (where it was before a recent kernel
upgrade). Also, before this patch, when I used my X server
actively performance would drop as low as 15k---hopefully that
bug is gone with this change.
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Conflicts:
src/i830_dri.c
src/i830_driver.c
src/i830_memory.c
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This was an early attempt to support display switch hotkey. It never really
worked, as the events didn't show up when they should. It also cost a wakeup
every second to check just in case, instead of taking an interrupt like we can
now using ACPI. Additionally, some machines apparently get stuck with the
event set and end up DDCing checking for new devices every second and
smashing your video modes.
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When moving or clearing the extra buffer contents associated with DRI
windows, the XAA code needs to see which buffer is being manipulated in the
Setup functions to program the tiling values correctly. Calling
I830SelectBuffer and not then calling I830Setup... would result in mis-tiled
rendering.
Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
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Implement DRI2CopyRegion and provide drm device filename to DRI2 module.
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We haven't found a way to make FBC work reliably with GM965 yet,
(it often fails to notice CPU writes). This appears to be a
specific problem with this device, (as we haven't gotten similar
bug reports for subsequent devices such as GM45). So FBC is
now disabled by default for GM965 but can still be enabled with
the FrameBufferCompression option for experimenting/debugging.
This resolves bug #16257:
[GM965 EXA] Frame-buffer compression broken for CPU writes (XPutImage)
https://bugs.freedesktop.org/show_bug.cgi?id=16257
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libpciaccess (and the old X server PCI code as well) provides a function to
get the ROM contents. Code to use that was already present in the driver and
used if the INT10 function failed. Skip the INT10 and just use libpciaccess
as that eliminates several module loads and scary use of vm86.
Signed-off-by: Keith Packard <keithp@keithp.com>
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Some ADD2 card doesn't get SDVO detect status setup right,
which disabled outputs on those cards. This adds a new
option "ForceSDVODetect" to probe all SDVO ports anyway.
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Conflicts:
src/i830_batchbuffer.c
src/i830_display.c
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NoAccel should still be needed for performance evaluation,
so don't crash me when exit.
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