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I was testing the behaviour of the XAA-based DRI buffer drawing code for
tiled buffers and accidentally left I830DRIInitBuffers disabled.
Signed-off-by: Keith Packard <keithp@keithp.com>
(cherry picked from commit c25437a69490b09acff335a81a38aa540f0822f5)
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When moving or clearing the extra buffer contents associated with DRI
windows, the XAA code needs to see which buffer is being manipulated in the
Setup functions to program the tiling values correctly. Calling
I830SelectBuffer and not then calling I830Setup... would result in mis-tiled
rendering.
Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 7ddea0447c8972104d43cd7966f5ce89b4cca20c)
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(cherry picked from commit 3414313ac9d0faa95797ee18cc33afa231ec7581)
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Move some declarations and don't declare an extra variable with the
same name, to fix warnings about mixed declarations and code.
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Several uses are actually left, which are determined by the X Server
interfaces we're implementing.
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Order hardware status page setup more reasonable after
all memory bound, in case new chipset requires non-stolen
page and that could be bound then.
Also clean up drm irq handler install function, and put
first install in starting stage later than status page setup,
so we won't make device cry for uninitialized status page.
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Also add support on new chipset.
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Some of the hw state restoration callbacks may want to use the ring for various
things like stopping video playback, so leave the ring enabled until we get
back from RestoreHWState. Also rename the functions so that their purpose is
clearer and remove a couple of redundant lines.
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This really isn't an error in general. If vblank pipe setup really fails for
some reason, it'll be obvious enough when the user tries to use vblank events
for something.
Patch from Hong Liu.
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Otherwise, we would use uninitialized offsets in the early setup.
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While this has been a desired feature for some time, to allow for reallocation
of the front buffer, it was made more necessary by the desire to avoid
requiring a NO_MOVE buffer type in TTM because buffer objects may not be left
pinned over VT switch. This is a step towards making those buffers
movable and resizable.
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This field shouldn't have been renamed in the first place. Go back to using
the old name so that the tree is backward and forward compatible again.
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There can be only one.
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Conflicts:
src/i830.h
src/i830_driver.c
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We want to associate plane A with pipe B on pre-965 mobile chips, since that's
the only way to get framebuffer compression on the builtin LVDS on those
platforms. However, if we do this swapping and DRM isn't aware of it, we may
end up requesting vblank events for the wrong pipe, or setting up SAREA buffer
swap state incorrectly.
This mod checks whether DRM supports the new plane->pipe swapping behavior, and
only enables the swapping if so. This should fix the bugs Lukas found and
debugged. Reviewed by Michel Danzer.
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The DRI interface requires bus identification for each DRI object; pull that
data from the libpciaccess structures as necessary.
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Conflicts:
src/i830_dri.c
src/i830_memory.c
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Front buffer tiling is now disabled with G965 and XAA. Some of the acceleration
that i830_xaa.c does can't be supported on tiled buffers.
Adds a tiling field to struct i830_memory, and uses it instead of separate
variables for each potential tiled buffer.
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If not available, AIGLX init will fail. While here, simplify DRIINFO tests
since we refuse to init with a version queried less than the version we
compiled against, anyway.
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This is a step towards being able to expose buffer objects through the screen
private to DRI clients, instead of having them have to use the fake buffer
object type.
This fails in two ways. First, the kernel memory manager is not currently
suitable for doing the physical allocations we need, so we still use AGP for
those. Additionally, the DRI lock can't be initialized early enough for us, so
these buffer object allocations fail. This will be fixed by improving the
DRM interface.
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ifndef."
This reverts commit c2b130354aecffbeb2a2d23c7371461feaf5766a.
Sadly, a non-working DRM_IOCTL_I915_FLIP already existed.
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Now, all 3D pipeline consumers in the driver just call
IntelEmitInvariantState(), which handles basic state setup, the caching of that
state setup, and notifying DRI clients. This also removes a mistaken idle
wait in the Render code which was papering over the brokenness in the context
switching.
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These chipsets require that the hardware status page be referenced by an offset
in the GTT rather than a physical memory address, so the X Server allocates it
rather than the DRM.
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(cherry picked from commit 6621dd71ada839f4c1742e9e5b272e924cee21d9)
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I830DRIClipNotify is passed to newer versions of DRI; don't include it in
the server when building against older versions.
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This currently only matters when the DRM memory manager is not available and
Option "Legacy3D" "off" is specified, but that hasn't always been the case and
might change again in the future.
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Doing it earlier can result in the wrong page being visible, giving the
appearance of a frozen X server.
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Older versions don't support the functionality we need.
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When this succeeds, 2D rendering does not have to be synchronized to back
buffers until the next 3D window appears.
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Conflicts:
src/i830_dri.c
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With the new mode setting code, rotation is handled outside of the driver,
so the old usage of the 'shadow' module is no longer needed. Code to
initialize the crtc structures has been moved out of the driver and into the
modes code.
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Not sure how I missed this before... Thanks to Todd Merrill for reporting.
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Guard code that dereferences pI830->third_buffer with tests for that instead of
pI830->TripleBuffer. It could happen that we want to enable triple buffering
but (temporarily) can't because the third buffer couldn't be allocated.
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Conflicts:
src/i830.h
src/i830_dri.c
src/i830_dri.h
src/i830_driver.c
src/i830_memory.c
src/i830_xaa.c
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Without this, the 965 DRI driver fell over when pitch * height wasn't
page-size aligned. Since the allocator only allocates at page-aligned offsets
anyway this shouldn't hurt us at all.
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This lets us do memory allocation just once rather than having several passes
(as long as things succeed), avoids trouble with zaphod mode, and will let us
do better automatic sizing of allocations soon.
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