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Fixes segfaults at startup with DRI2 and load detection, or with DRI disabled
entirely.
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Bug #14423.
Signed-off-by: Eric Anholt <eric@anholt.net>
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It's been broken for years now, and KMS offers a much better chance of getting
this working sensibly without making a mess of the 2D driver.
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This saves massive quantities of memory on pre-965 since the DRI2 tiling
enable caused the minimum size of any pixmap to be 1MB.
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Simpler and more robust. Works when we haven't set the device PCI ID,
ie when not going through the legacy DRI module.
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Oops, my bad. Reverted 8d4bc36fae50b09a73ba2cfab920adb32141a358
since my kernel doesn't yet have the new param, committed
the revert by accident.
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This fixes failure to auth DRI2 clients under KMS.
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Set alignments, tile settings and flags correctly in the 2D driver to support
tiled rendering. UXA's create pixmap function currently assumes the worst
about the alignment constraints; that should probably be fixed. Some of the
1M alignment fixes could probably be done more cleanly as well.
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It was broken on current kernels, and deprecated anyway.
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It never worked with any upstream linux kernel, and is quite heavily
deprecated. A new solution based around DRI2 will probably be
forthcoming. Pageflipping itself is next.
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This fixes glReadPixels failure on single-channel 915GM, as the software code
for readpixels was actually the only code in the driver doing tiling against
these buffers (everything else says "rely on fence registers", since the 2D
blits don't have a "don't rely on fence registers" option).
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This results in allocation overhead for small (8x8-128x128 or so) pixmaps with
DRI2, but we're interested in looking at tiling them in general in the near
future, anyway.
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Conflicts:
src/i830_dri.c
src/i830_driver.c
src/i830_memory.c
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Vblank in the kernel is far simpler if it deals with pipes instead of
planes, so we're changing both user and kernel side. This is the user mode
side. This fixes both i830_crtc_dpms and i830PipeSetBase, the two functions
which copy geometry from the crtc to the sarea.
Signed-off-by: Keith Packard <keithp@keithp.com>
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I was testing the behaviour of the XAA-based DRI buffer drawing code for
tiled buffers and accidentally left I830DRIInitBuffers disabled.
Signed-off-by: Keith Packard <keithp@keithp.com>
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When moving or clearing the extra buffer contents associated with DRI
windows, the XAA code needs to see which buffer is being manipulated in the
Setup functions to program the tiling values correctly. Calling
I830SelectBuffer and not then calling I830Setup... would result in mis-tiled
rendering.
Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
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Implement DRI2CopyRegion and provide drm device filename to DRI2 module.
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Conflicts:
src/i830_batchbuffer.c
src/i830_display.c
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The previous location for pitch fixup would have only worked when depth was
used with the backbuffer, and no page flipping or other adventures occurred.
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Should fix issues with swapbuffers flushing to front buffer on 965.
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Fixup the kernel stuff to have a slightly better chance of working. Still need
to fixup the EXA pixmap functions.
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Thanks airlied!
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This eliminates the cost of EXA migration management while providing full
pixmap allocation control to the driver. The goal is to make something
useful for UMA drivers.
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Conflicts:
src/i830_driver.c
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The root window visual can not be changed. Neither at runtime nor
through the configuration file. The xserver simply selects the first one
that matches the class (usually TrueColor). I need a root window visual
with stencil buffer because my compiz plugin uses the it for some
operations. This patch reorders the visuals that the 3D driver reports
and puts the one with stencil (and depth) bits as first.
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Conflicts:
configure.ac
src/reg_dumper/Makefile.am
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When page flipping is enabled, we need to make sure any changes to the front
buffer are reflected in the back buffer(s) or corruption might occur at page
flip time. So make the damage handler work on 965 by adding appropriate tiling
flags and pitch adjustments.
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This lets us remove a lot of conditional compile stuff in the DRI case, as
if we're doing DRI and have 2.4.0, we can rely on GEM ioctls existing.
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The EmitFlush in i830_dri.c was added as a pageflipping workaround, and was
noted to not even be sufficient then. There's no reason for it to be there,
so it's removed. After that, we just have to not emit an MI_FLUSH if we
already had, and cursor movement no longer bashes memory manager.
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allocate → create
unreference → close
name → flink
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GEM needs memory alignment requirements sent at pin time, which is a bit
after the allocation itself. Store the required alignment in the memory
object for later use by pin.
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Move some declarations and don't declare an extra variable with the
same name, to fix warnings about mixed declarations and code.
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Several uses are actually left, which are determined by the X Server
interfaces we're implementing.
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