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Several uses are actually left, which are determined by the X Server
interfaces we're implementing.
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The GMBUS was being left in SDVO pin access mode, which blocked our bit-banging
access to those pins. Thanks to Peter Jones for quick debugging turnaround
in getting this fixed.
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Changing this value slows the entire I2C bus down, making it far more
reliable on older monitors. Note the same change has been made in the core X
server code; this change is included here to ensure that older X servers
work reliably with this driver.
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Setting the value correctly and then immediately breaking it caused many I2C
transactions to timeout with slow monitors. Oops.
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The default I2C timeouts are very short, and while most
modern monitors have no trouble responding at that rate,
some older ones cannot manage.
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We were forcing bus lines to 1 which was breaking DDC for some monitors.
Instead, make the PutBits function just tristate when writing 1 bits.
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While the register is laid out suggesting that you can read a low value while
driving the output high, and the I2C spec seems to indicate that you should be
able to as well, and on some hardware this works successfully, on the i865 and
perhaps some other chips it doesn't. So, if we're not holding the clock or
data pin low during GetBits, tristate the pin so that we can successfully read.
This fixes i865 analog (VGA) DDC so it successfully sees slave acks.
Also, improve the I2C bit-banging debugging.
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I've gone back to compare our behavior to it several times, so I'll just keep
the code in tree for now.
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reimplementing it.
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