Age | Commit message (Collapse) | Author |
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The fixed panel timing will only be available when the LVDS is already on
at X startup.
So far, our only mostly-working LVDS driver is for the i830, and on i830 the
LVDS is always on DVOA, so use that for all LVDS chips. This may need to
change if we support the ch7017 I've seen used on embedded i845, for example.
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This disables all outputs on EnterVT as the SDVO output can confuse
the VGA output if the BIOS has enabled it on the same pipe but X
isn't going to use the SDVO.
Worked out on irc with keithp
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It had been necessary to allow more than a small amount of memory to be
allocated, but now those old small allocations people had configured are
getting in the way.
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Because stolen memory happens to be a contiguous block of high system memory,
we can just read the GTT entries for it to get physical addresses for our
allocations there if needed. This reduces fragmentation of the aperture space,
and will often reclaim up to 7 MB of memory that had been left unused since the
simplified aperture manager was put in place, but without reintroducing the
complexities of the old aperture manager.
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965G needs state mem buffer to setup render pipeline.
Thanks Barry Scrott for report this.
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The ihch DVO uses a modified I2C addressing scheme as described
in section 5.2 of the data sheet. Implement this by over-riding
the I2C read and write word routines.
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The server rotation code is now using the root window in IncludeInferiors
mode rather than using the screen pixmap. Change the XAA Composite code
to check for this case now.
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This was found when debug exa on a 865GV, we should set
pipeline state bits properly, otherwise the engine will hang.
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With the fixes to the 2D frame buffer allocation that allows up to 65536
lines of 2D frame buffer in XAA mode, the old linear allocation hacks are no
longer necessary.
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Convert relative X server source path to absolute. Check for local copies
of needed header files before building, rather than requiring server source.
Remove extra duplicate -I elements in AM_CFLAGS in sub directories.
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A closing brace was left inside #ifdef XF86DRI_MM while the matching
open brace was outside.
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usleep isn't always available, and we have an existing delay mechanism
available to use.
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and remove it from get attached displays call.
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Reported by JM Ibanez
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Reported by JM Ibanez.
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Bob deinterlacing in MythTV, and the zoom options in totem would result in
attempting to source from outside the video instead of scaling appropriately.
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displays. Ensures the command has completed before continuing.
(probably need to check PENDING in other SDVO calls too)
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Fix tex blend pipeline in case that src/mask pict has no
alpha. Unmask color buffer write disable bits. These make
rendercheck run fine on 855GM.
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Fallback in 830/845G when pict format is a8, x8r8g8b8 or
x8b8g8r8. The hw doesn't support them.
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Try to map texture stream when setup texture map, and use
correct order in load_immediate_1 cmd, which fixed crash on
845GV. Also remove some flush cmds.
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We should alloc xaa_linear mem in LinearAlloc case, otherwise
we get crash when initializing xf86 fb manager.
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This slipped in as a debugging aid, and never got turned off. The driver
appears to work fine without it on an i915 system, and for the non-default EXA
option, we'd rather see issues found than continue running with debugging aids
and hiding them behind bad performance.
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Run autoreconf to update configure/Makefile.in.
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Thanks to alanc for catching this.
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i830_get_blend_cntl() has already added S8 offset.
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Pick fix from i915 render, change tex blend pipeline for CA.
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