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Diffstat (limited to 'src/libffmpeg/libavcodec/ppc/dsputil_altivec.c')
-rw-r--r--src/libffmpeg/libavcodec/ppc/dsputil_altivec.c206
1 files changed, 120 insertions, 86 deletions
diff --git a/src/libffmpeg/libavcodec/ppc/dsputil_altivec.c b/src/libffmpeg/libavcodec/ppc/dsputil_altivec.c
index 31464fb7a..81a32c9e3 100644
--- a/src/libffmpeg/libavcodec/ppc/dsputil_altivec.c
+++ b/src/libffmpeg/libavcodec/ppc/dsputil_altivec.c
@@ -1308,13 +1308,12 @@ POWERPC_PERF_STOP_COUNT(altivec_put_no_rnd_pixels16_xy2_num, 1);
#endif /* ALTIVEC_USE_REFERENCE_C_CODE */
}
-#ifdef CONFIG_DARWIN
int hadamard8_diff8x8_altivec(/*MpegEncContext*/ void *s, uint8_t *dst, uint8_t *src, int stride, int h){
POWERPC_PERF_DECLARE(altivec_hadamard8_diff8x8_num, 1);
int sum;
-POWERPC_PERF_START_COUNT(altivec_hadamard8_diff8x8_num, 1);
register const_vector unsigned char vzero = (const_vector unsigned char)vec_splat_u8(0);
register vector signed short temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7;
+POWERPC_PERF_START_COUNT(altivec_hadamard8_diff8x8_num, 1);
{
register const_vector signed short vprod1 = (const_vector signed short)AVV( 1,-1, 1,-1, 1,-1, 1,-1);
register const_vector signed short vprod2 = (const_vector signed short)AVV( 1, 1,-1,-1, 1, 1,-1,-1);
@@ -1339,6 +1338,8 @@ POWERPC_PERF_START_COUNT(altivec_hadamard8_diff8x8_num, 1);
{ \
register vector unsigned char src1, src2, srcO; \
register vector unsigned char dst1, dst2, dstO; \
+ register vector signed short srcV, dstV; \
+ register vector signed short but0, but1, but2, op1, op2, op3; \
src1 = vec_ld(stride * i, src); \
if ((((stride * i) + (unsigned long)src) & 0x0000000F) > 8) \
src2 = vec_ld((stride * i) + 16, src); \
@@ -1349,17 +1350,19 @@ POWERPC_PERF_START_COUNT(altivec_hadamard8_diff8x8_num, 1);
dstO = vec_perm(dst1, dst2, vec_lvsl(stride * i, dst)); \
/* promote the unsigned chars to signed shorts */ \
/* we're in the 8x8 function, we only care for the first 8 */ \
- register vector signed short srcV = \
- (vector signed short)vec_mergeh((vector signed char)vzero, (vector signed char)srcO); \
- register vector signed short dstV = \
- (vector signed short)vec_mergeh((vector signed char)vzero, (vector signed char)dstO); \
+ srcV = \
+ (vector signed short)vec_mergeh((vector signed char)vzero, \
+ (vector signed char)srcO); \
+ dstV = \
+ (vector signed short)vec_mergeh((vector signed char)vzero, \
+ (vector signed char)dstO); \
/* substractions inside the first butterfly */ \
- register vector signed short but0 = vec_sub(srcV, dstV); \
- register vector signed short op1 = vec_perm(but0, but0, perm1); \
- register vector signed short but1 = vec_mladd(but0, vprod1, op1); \
- register vector signed short op2 = vec_perm(but1, but1, perm2); \
- register vector signed short but2 = vec_mladd(but1, vprod2, op2); \
- register vector signed short op3 = vec_perm(but2, but2, perm3); \
+ but0 = vec_sub(srcV, dstV); \
+ op1 = vec_perm(but0, but0, perm1); \
+ but1 = vec_mladd(but0, vprod1, op1); \
+ op2 = vec_perm(but1, but1, perm2); \
+ but2 = vec_mladd(but1, vprod2, op2); \
+ op3 = vec_perm(but2, but2, perm3); \
res = vec_mladd(but2, vprod3, op3); \
}
ONEITERBUTTERFLY(0, temp0);
@@ -1442,39 +1445,39 @@ POWERPC_PERF_STOP_COUNT(altivec_hadamard8_diff8x8_num, 1);
static int hadamard8_diff16x8_altivec(/*MpegEncContext*/ void *s, uint8_t *dst, uint8_t *src, int stride, int h) {
int sum;
register vector signed short
- temp0 asm ("v0"),
- temp1 asm ("v1"),
- temp2 asm ("v2"),
- temp3 asm ("v3"),
- temp4 asm ("v4"),
- temp5 asm ("v5"),
- temp6 asm ("v6"),
- temp7 asm ("v7");
+ temp0 REG_v(v0),
+ temp1 REG_v(v1),
+ temp2 REG_v(v2),
+ temp3 REG_v(v3),
+ temp4 REG_v(v4),
+ temp5 REG_v(v5),
+ temp6 REG_v(v6),
+ temp7 REG_v(v7);
register vector signed short
- temp0S asm ("v8"),
- temp1S asm ("v9"),
- temp2S asm ("v10"),
- temp3S asm ("v11"),
- temp4S asm ("v12"),
- temp5S asm ("v13"),
- temp6S asm ("v14"),
- temp7S asm ("v15");
- register const_vector unsigned char vzero asm ("v31")= (const_vector unsigned char)vec_splat_u8(0);
+ temp0S REG_v(v8),
+ temp1S REG_v(v9),
+ temp2S REG_v(v10),
+ temp3S REG_v(v11),
+ temp4S REG_v(v12),
+ temp5S REG_v(v13),
+ temp6S REG_v(v14),
+ temp7S REG_v(v15);
+ register const_vector unsigned char vzero REG_v(v31)= (const_vector unsigned char)vec_splat_u8(0);
{
- register const_vector signed short vprod1 asm ("v16")= (const_vector signed short)AVV( 1,-1, 1,-1, 1,-1, 1,-1);
- register const_vector signed short vprod2 asm ("v17")= (const_vector signed short)AVV( 1, 1,-1,-1, 1, 1,-1,-1);
- register const_vector signed short vprod3 asm ("v18")= (const_vector signed short)AVV( 1, 1, 1, 1,-1,-1,-1,-1);
- register const_vector unsigned char perm1 asm ("v19")= (const_vector unsigned char)
+ register const_vector signed short vprod1 REG_v(v16)= (const_vector signed short)AVV( 1,-1, 1,-1, 1,-1, 1,-1);
+ register const_vector signed short vprod2 REG_v(v17)= (const_vector signed short)AVV( 1, 1,-1,-1, 1, 1,-1,-1);
+ register const_vector signed short vprod3 REG_v(v18)= (const_vector signed short)AVV( 1, 1, 1, 1,-1,-1,-1,-1);
+ register const_vector unsigned char perm1 REG_v(v19)= (const_vector unsigned char)
AVV(0x02, 0x03, 0x00, 0x01,
0x06, 0x07, 0x04, 0x05,
0x0A, 0x0B, 0x08, 0x09,
0x0E, 0x0F, 0x0C, 0x0D);
- register const_vector unsigned char perm2 asm ("v20")= (const_vector unsigned char)
+ register const_vector unsigned char perm2 REG_v(v20)= (const_vector unsigned char)
AVV(0x04, 0x05, 0x06, 0x07,
0x00, 0x01, 0x02, 0x03,
0x0C, 0x0D, 0x0E, 0x0F,
0x08, 0x09, 0x0A, 0x0B);
- register const_vector unsigned char perm3 asm ("v21")= (const_vector unsigned char)
+ register const_vector unsigned char perm3 REG_v(v21)= (const_vector unsigned char)
AVV(0x08, 0x09, 0x0A, 0x0B,
0x0C, 0x0D, 0x0E, 0x0F,
0x00, 0x01, 0x02, 0x03,
@@ -1482,37 +1485,63 @@ static int hadamard8_diff16x8_altivec(/*MpegEncContext*/ void *s, uint8_t *dst,
#define ONEITERBUTTERFLY(i, res1, res2) \
{ \
- register vector unsigned char src1 asm ("v22"), src2 asm ("v23"); \
- register vector unsigned char dst1 asm ("v24"), dst2 asm ("v25"); \
+ register vector unsigned char src1 REG_v(v22), \
+ src2 REG_v(v23), \
+ dst1 REG_v(v24), \
+ dst2 REG_v(v25), \
+ srcO REG_v(v22), \
+ dstO REG_v(v23); \
+ \
+ register vector signed short srcV REG_v(v24), \
+ dstV REG_v(v25), \
+ srcW REG_v(v26), \
+ dstW REG_v(v27), \
+ but0 REG_v(v28), \
+ but0S REG_v(v29), \
+ op1 REG_v(v30), \
+ but1 REG_v(v22), \
+ op1S REG_v(v23), \
+ but1S REG_v(v24), \
+ op2 REG_v(v25), \
+ but2 REG_v(v26), \
+ op2S REG_v(v27), \
+ but2S REG_v(v28), \
+ op3 REG_v(v29), \
+ op3S REG_v(v30); \
+ \
src1 = vec_ld(stride * i, src); \
src2 = vec_ld((stride * i) + 16, src); \
- register vector unsigned char srcO asm ("v22") = vec_perm(src1, src2, vec_lvsl(stride * i, src)); \
+ srcO = vec_perm(src1, src2, vec_lvsl(stride * i, src)); \
dst1 = vec_ld(stride * i, dst); \
dst2 = vec_ld((stride * i) + 16, dst); \
- register vector unsigned char dstO asm ("v23") = vec_perm(dst1, dst2, vec_lvsl(stride * i, dst)); \
+ dstO = vec_perm(dst1, dst2, vec_lvsl(stride * i, dst)); \
/* promote the unsigned chars to signed shorts */ \
- register vector signed short srcV asm ("v24") = \
- (vector signed short)vec_mergeh((vector signed char)vzero, (vector signed char)srcO); \
- register vector signed short dstV asm ("v25") = \
- (vector signed short)vec_mergeh((vector signed char)vzero, (vector signed char)dstO); \
- register vector signed short srcW asm ("v26") = \
- (vector signed short)vec_mergel((vector signed char)vzero, (vector signed char)srcO); \
- register vector signed short dstW asm ("v27") = \
- (vector signed short)vec_mergel((vector signed char)vzero, (vector signed char)dstO); \
+ srcV = \
+ (vector signed short)vec_mergeh((vector signed char)vzero, \
+ (vector signed char)srcO); \
+ dstV = \
+ (vector signed short)vec_mergeh((vector signed char)vzero, \
+ (vector signed char)dstO); \
+ srcW = \
+ (vector signed short)vec_mergel((vector signed char)vzero, \
+ (vector signed char)srcO); \
+ dstW = \
+ (vector signed short)vec_mergel((vector signed char)vzero, \
+ (vector signed char)dstO); \
/* substractions inside the first butterfly */ \
- register vector signed short but0 asm ("v28") = vec_sub(srcV, dstV); \
- register vector signed short but0S asm ("v29") = vec_sub(srcW, dstW); \
- register vector signed short op1 asm ("v30") = vec_perm(but0, but0, perm1); \
- register vector signed short but1 asm ("v22") = vec_mladd(but0, vprod1, op1); \
- register vector signed short op1S asm ("v23") = vec_perm(but0S, but0S, perm1); \
- register vector signed short but1S asm ("v24") = vec_mladd(but0S, vprod1, op1S); \
- register vector signed short op2 asm ("v25") = vec_perm(but1, but1, perm2); \
- register vector signed short but2 asm ("v26") = vec_mladd(but1, vprod2, op2); \
- register vector signed short op2S asm ("v27") = vec_perm(but1S, but1S, perm2); \
- register vector signed short but2S asm ("v28") = vec_mladd(but1S, vprod2, op2S); \
- register vector signed short op3 asm ("v29") = vec_perm(but2, but2, perm3); \
+ but0 = vec_sub(srcV, dstV); \
+ but0S = vec_sub(srcW, dstW); \
+ op1 = vec_perm(but0, but0, perm1); \
+ but1 = vec_mladd(but0, vprod1, op1); \
+ op1S = vec_perm(but0S, but0S, perm1); \
+ but1S = vec_mladd(but0S, vprod1, op1S); \
+ op2 = vec_perm(but1, but1, perm2); \
+ but2 = vec_mladd(but1, vprod2, op2); \
+ op2S = vec_perm(but1S, but1S, perm2); \
+ but2S = vec_mladd(but1S, vprod2, op2S); \
+ op3 = vec_perm(but2, but2, perm3); \
res1 = vec_mladd(but2, vprod3, op3); \
- register vector signed short op3S asm ("v30") = vec_perm(but2S, but2S, perm3); \
+ op3S = vec_perm(but2S, but2S, perm3); \
res2 = vec_mladd(but2S, vprod3, op3S); \
}
ONEITERBUTTERFLY(0, temp0, temp0S);
@@ -1527,6 +1556,12 @@ static int hadamard8_diff16x8_altivec(/*MpegEncContext*/ void *s, uint8_t *dst,
#undef ONEITERBUTTERFLY
{
register vector signed int vsum;
+ register vector signed short line0S, line1S, line2S, line3S, line4S,
+ line5S, line6S, line7S, line0BS,line2BS,
+ line1BS,line3BS,line4BS,line6BS,line5BS,
+ line7BS,line0CS,line4CS,line1CS,line5CS,
+ line2CS,line6CS,line3CS,line7CS;
+
register vector signed short line0 = vec_add(temp0, temp1);
register vector signed short line1 = vec_sub(temp0, temp1);
register vector signed short line2 = vec_add(temp2, temp3);
@@ -1563,32 +1598,32 @@ static int hadamard8_diff16x8_altivec(/*MpegEncContext*/ void *s, uint8_t *dst,
vsum = vec_sum4s(vec_abs(line6C), vsum);
vsum = vec_sum4s(vec_abs(line7C), vsum);
- register vector signed short line0S = vec_add(temp0S, temp1S);
- register vector signed short line1S = vec_sub(temp0S, temp1S);
- register vector signed short line2S = vec_add(temp2S, temp3S);
- register vector signed short line3S = vec_sub(temp2S, temp3S);
- register vector signed short line4S = vec_add(temp4S, temp5S);
- register vector signed short line5S = vec_sub(temp4S, temp5S);
- register vector signed short line6S = vec_add(temp6S, temp7S);
- register vector signed short line7S = vec_sub(temp6S, temp7S);
-
- register vector signed short line0BS = vec_add(line0S, line2S);
- register vector signed short line2BS = vec_sub(line0S, line2S);
- register vector signed short line1BS = vec_add(line1S, line3S);
- register vector signed short line3BS = vec_sub(line1S, line3S);
- register vector signed short line4BS = vec_add(line4S, line6S);
- register vector signed short line6BS = vec_sub(line4S, line6S);
- register vector signed short line5BS = vec_add(line5S, line7S);
- register vector signed short line7BS = vec_sub(line5S, line7S);
-
- register vector signed short line0CS = vec_add(line0BS, line4BS);
- register vector signed short line4CS = vec_sub(line0BS, line4BS);
- register vector signed short line1CS = vec_add(line1BS, line5BS);
- register vector signed short line5CS = vec_sub(line1BS, line5BS);
- register vector signed short line2CS = vec_add(line2BS, line6BS);
- register vector signed short line6CS = vec_sub(line2BS, line6BS);
- register vector signed short line3CS = vec_add(line3BS, line7BS);
- register vector signed short line7CS = vec_sub(line3BS, line7BS);
+ line0S = vec_add(temp0S, temp1S);
+ line1S = vec_sub(temp0S, temp1S);
+ line2S = vec_add(temp2S, temp3S);
+ line3S = vec_sub(temp2S, temp3S);
+ line4S = vec_add(temp4S, temp5S);
+ line5S = vec_sub(temp4S, temp5S);
+ line6S = vec_add(temp6S, temp7S);
+ line7S = vec_sub(temp6S, temp7S);
+
+ line0BS = vec_add(line0S, line2S);
+ line2BS = vec_sub(line0S, line2S);
+ line1BS = vec_add(line1S, line3S);
+ line3BS = vec_sub(line1S, line3S);
+ line4BS = vec_add(line4S, line6S);
+ line6BS = vec_sub(line4S, line6S);
+ line5BS = vec_add(line5S, line7S);
+ line7BS = vec_sub(line5S, line7S);
+
+ line0CS = vec_add(line0BS, line4BS);
+ line4CS = vec_sub(line0BS, line4BS);
+ line1CS = vec_add(line1BS, line5BS);
+ line5CS = vec_sub(line1BS, line5BS);
+ line2CS = vec_add(line2BS, line6BS);
+ line6CS = vec_sub(line2BS, line6BS);
+ line3CS = vec_add(line3BS, line7BS);
+ line7CS = vec_sub(line3BS, line7BS);
vsum = vec_sum4s(vec_abs(line0CS), vsum);
vsum = vec_sum4s(vec_abs(line1CS), vsum);
@@ -1618,7 +1653,6 @@ POWERPC_PERF_START_COUNT(altivec_hadamard8_diff16_num, 1);
POWERPC_PERF_STOP_COUNT(altivec_hadamard8_diff16_num, 1);
return score;
}
-#endif //CONFIG_DARWIN
int has_altivec(void)
{
generated by cgit v1.2.3 (git 2.25.1) at 2025-04-26 23:23:19 +0000