- large refactoring of the dib3000mb frontend to make integration of the

  dib3000mc easier, especially to avoid code duplication

4 files changed, 308 insertions, 318 deletions

diff --git a/linux/drivers/media/dvb/frontends/dib3000-common.h b/linux/drivers/media/dvb/frontends/dib3000-common.h
new file mode 100644
index 000000000..436eb1afa
--- /dev/null
+++ b/linux/drivers/media/dvb/frontends/dib3000-common.h
@@ -0,0 +1,104 @@
+/*
+ * .h-files for the common use of the frontend drivers made by DiBcom
+ * DiBcom 3000-MB/MC/P
+ * 
+ * DiBcom (http://www.dibcom.fr/)
+ *
+ * Copyright (C) 2004 Patrick Boettcher (patrick.boettcher@desy.de)
+ *
+ * based on GPL code from DibCom, which has
+ *
+ * Copyright (C) 2004 Amaury Demol for DiBcom (ademol@dibcom.fr)
+ *
+ *	This program is free software; you can redistribute it and/or
+ *	modify it under the terms of the GNU General Public License as
+ *	published by the Free Software Foundation, version 2.
+ *
+ * Acknowledgements
+ *
+ *  Amaury Demol (ademol@dibcom.fr) from DiBcom for providing specs and driver
+ *  sources, on which this driver (and the dvb-dibusb) are based.
+ *
+ * see Documentation/dvb/README.dibusb for more information
+ *
+ */
+
+#ifndef DIB3000_COMMON_H
+#define DIB3000_COMMON_H
+
+
+/* info and err, taken from usb.h, if there is anything available like by default,
+ * please change !
+ */
+#define err(format, arg...) printk(KERN_ERR "%s: " format "\n" , __FILE__ , ## arg)
+#define info(format, arg...) printk(KERN_INFO "%s: " format "\n" , __FILE__ , ## arg)
+#define warn(format, arg...) printk(KERN_WARNING "%s: " format "\n" , __FILE__ , ## arg)
+
+/* a PID for the pid_filter list, when in use */
+struct dib3000_pid
+{
+	u16 pid;
+	int active;
+};
+
+/* mask for enabling a specific pid for the pid_filter */
+#define DIB3000_ACTIVATE_PID_FILTERING	(0x2000)
+
+/* common values for tuning */
+#define DIB3000_ALPHA_0					(     0)
+#define DIB3000_ALPHA_1					(     1)
+#define DIB3000_ALPHA_2					(     2)
+#define DIB3000_ALPHA_4					(     4)
+
+#define DIB3000_CONSTELLATION_QPSK		(     0)
+#define DIB3000_CONSTELLATION_16QAM		(     1)
+#define DIB3000_CONSTELLATION_64QAM		(     2)
+
+#define DIB3000_GUARD_TIME_1_32			(     0)
+#define DIB3000_GUARD_TIME_1_16			(     1)
+#define DIB3000_GUARD_TIME_1_8			(     2)
+#define DIB3000_GUARD_TIME_1_4			(     3)
+
+#define DIB3000_TRANSMISSION_MODE_2K	(     0)
+#define DIB3000_TRANSMISSION_MODE_8K	(     1)
+
+#define DIB3000_SELECT_LP				(     0)
+#define DIB3000_SELECT_HP				(     1)
+
+#define DIB3000_FEC_1_2					(     1)
+#define DIB3000_FEC_2_3					(     2)
+#define DIB3000_FEC_3_4					(     3)
+#define DIB3000_FEC_5_6					(     5)
+#define DIB3000_FEC_7_8					(     7)
+
+#define DIB3000_HRCH_OFF				(     0)
+#define DIB3000_HRCH_ON					(     1)
+
+#define DIB3000_DDS_INVERSION_OFF		(     0)
+#define DIB3000_DDS_INVERSION_ON		(     1)
+
+#define DIB3000_TUNER_WRITE_ENABLE(a)	(0xffff & (a << 7))
+#define DIB3000_TUNER_WRITE_DISABLE(a)	(0xffff & ((a << 7) | (1 << 7)))
+
+/* for auto search */
+static u16 dib3000_seq[2][2][2] =     /* fft,gua,   inv   */
+	{ /* fft */
+		{ /* gua */
+			{ 0, 1 },                   /*  0   0   { 0,1 } */
+			{ 3, 9 },                   /*  0   1   { 0,1 } */
+		},
+		{
+			{ 2, 5 },                   /*  1   0   { 0,1 } */
+			{ 6, 11 },                  /*  1   1   { 0,1 } */
+		}
+	};
+
+#define DIB3000_REG_MANUFACTOR_ID		(  1025)
+#define DIB3000_I2C_ID_DIBCOM			(0x01b3)
+
+#define DIB3000_REG_DEVICE_ID			(  1026)
+#define DIB3000MB_DEVICE_ID				(0x3000)
+#define DIB3000MC_DEVICE_ID				(0x3001)
+#define DIB3000P_DEVICE_ID				(0x3002)
+
+#endif // DIB3000_COMMON_H
diff --git a/linux/drivers/media/dvb/frontends/dib3000mb.h b/linux/drivers/media/dvb/frontends/dib3000.h
index fe9f09e04..491638d37 100644
--- a/linux/drivers/media/dvb/frontends/dib3000mb.h
+++ b/linux/drivers/media/dvb/frontends/dib3000.h
@@ -1,6 +1,6 @@
 /*
- * Frontend driver for mobile DVB-T demodulator DiBcom 3000-MB
- * DiBcom (http://www.dibcom.fr/)
+ * public header file of the frontend drivers for mobile DVB-T demodulators 
+ * DiBcom 3000-MB and DiBcom 3000-MC/P (http://www.dibcom.fr/)
  *
  * Copyright (C) 2004 Patrick Boettcher (patrick.boettcher@desy.de)
  *
@@ -21,12 +21,12 @@
  *
  */
 
-#ifndef DIB3000MB_H
-#define DIB3000MB_H
+#ifndef DIB3000_H
+#define DIB3000_H
 
 #include <linux/dvb/frontend.h>
 
-struct dib3000mb_config
+struct dib3000_config
 {
 	/* the demodulator's i2c address */
 	u8 demod_address;
@@ -35,12 +35,19 @@ struct dib3000mb_config
 	u8 pll_addr;
 
 	/* PLL maintenance */
-	int (*pll_init)(struct dvb_frontend* fe);
-	int (*pll_set)(struct dvb_frontend* fe, struct dvb_frontend_parameters* params);
+	int (*pll_init)(struct dvb_frontend *fe);
+	int (*pll_set)(struct dvb_frontend *fe, struct dvb_frontend_parameters* params);
 };
 
+struct dib3000_xfer_ops
+{
+	/* pid and transfer handling is done in the demodulator */
+	int (*pid_filter)(struct dvb_frontend *fe, int onoff);
+	int (*fifo_ctrl)(struct dvb_frontend *fe, int onoff);
+	int (*pid_ctrl)(struct dvb_frontend *fe, int pid, int onoff);
+};
 
-extern struct dvb_frontend* dib3000mb_attach(const struct dib3000mb_config* config,
-					     struct i2c_adapter* i2c);
+extern struct dvb_frontend* dib3000mb_attach(const struct dib3000_config* config,
+					     struct i2c_adapter* i2c, struct dib3000_xfer_ops *xfer_ops);
 
-#endif // DIB3000MB_H
+#endif // DIB3000_H
diff --git a/linux/drivers/media/dvb/frontends/dib3000mb.c b/linux/drivers/media/dvb/frontends/dib3000mb.c
index 1d2489d85..f7ee10fdf 100644
--- a/linux/drivers/media/dvb/frontends/dib3000mb.c
+++ b/linux/drivers/media/dvb/frontends/dib3000mb.c
@@ -30,9 +30,9 @@
 #include <linux/delay.h>
 
 #include "dvb_frontend.h"
+#include "dib3000-common.h"
 #include "dib3000mb_priv.h"
-#include "dib3000mb.h"
-
+#include "dib3000.h"
 
 struct dib3000mb_state {
 
@@ -41,7 +41,11 @@ struct dib3000mb_state {
 	struct dvb_frontend_ops ops;
 
 	/* configuration settings */
-	const struct dib3000mb_config* config;
+	const struct dib3000_config* config;
+
+	spinlock_t pid_list_lock;
+	struct dib3000_pid pid_list[DIB3000MB_NUM_PIDS];
+	int feedcount;
 
 	struct dvb_frontend frontend;
 };
@@ -68,9 +72,11 @@ MODULE_PARM_DESC(debug, "set debugging level (1=info,2=xfer,4=alotmore,8=setfe,1
 
 /* Version information */
 #define DRIVER_VERSION "0.1"
-#define DRIVER_DESC "DiBcom 3000-MB DVB-T Demodulator driver"
+#define DRIVER_DESC "DiBcom 3000-MB DVB-T demodulator driver"
 #define DRIVER_AUTHOR "Patrick Boettcher, patrick.boettcher@desy.de"
 
+
+/* handy shortcuts */
 #define rd(reg) dib3000mb_read_reg(state,reg)
 #define wr(reg,val) if (dib3000mb_write_reg(state,reg,val)) \
 	{ err("while sending 0x%04x to 0x%04x.",val,reg); return -EREMOTEIO; }
@@ -80,7 +86,7 @@ MODULE_PARM_DESC(debug, "set debugging level (1=info,2=xfer,4=alotmore,8=setfe,1
 		wr(a[i],v[i]); \
 }
 
-static u16 dib3000mb_read_reg(struct dib3000mb_state *state, u16 reg)
+static int dib3000mb_read_reg(struct dib3000mb_state *state, u16 reg)
 {
 	u8 wb[] = { ((reg >> 8) | 0x80) & 0xff, reg & 0xff };
 	u8 rb[2];
@@ -153,10 +159,10 @@ static int dib3000mb_set_frontend(struct dvb_frontend* fe,
 
 	if (tuner) {
 		wr(DIB3000MB_REG_TUNER,
-				DIB3000MB_ACTIVATE_TUNER_XFER(state->config->pll_addr));
+				DIB3000_TUNER_WRITE_ENABLE(state->config->pll_addr));
 		state->config->pll_set(fe, fep);
 		wr(DIB3000MB_REG_TUNER,
-				DIB3000MB_DEACTIVATE_TUNER_XFER(state->config->pll_addr));
+				DIB3000_TUNER_WRITE_DISABLE(state->config->pll_addr));
 
 		deb_setf("bandwidth: ");
 		switch (ofdm->bandwidth) {
@@ -188,15 +194,14 @@ static int dib3000mb_set_frontend(struct dvb_frontend* fe,
 	switch (ofdm->transmission_mode) {
 		case TRANSMISSION_MODE_2K:
 			deb_setf("2k\n");
-			wr(DIB3000MB_REG_FFT, DIB3000MB_FFT_2K);
+			wr(DIB3000MB_REG_FFT, DIB3000_TRANSMISSION_MODE_2K);
 			break;
 		case TRANSMISSION_MODE_8K:
 			deb_setf("8k\n");
-			wr(DIB3000MB_REG_FFT, DIB3000MB_FFT_8K);
+			wr(DIB3000MB_REG_FFT, DIB3000_TRANSMISSION_MODE_8K);
 			break;
 		case TRANSMISSION_MODE_AUTO:
 			deb_setf("auto\n");
-			wr(DIB3000MB_REG_FFT, DIB3000MB_FFT_AUTO);
 			break;
 		default:
 			return -EINVAL;
@@ -206,23 +211,22 @@ static int dib3000mb_set_frontend(struct dvb_frontend* fe,
 	switch (ofdm->guard_interval) {
 		case GUARD_INTERVAL_1_32:
 			deb_setf("1_32\n");
-			wr(DIB3000MB_REG_GUARD_TIME, DIB3000MB_GUARD_TIME_1_32);
+			wr(DIB3000MB_REG_GUARD_TIME, DIB3000_GUARD_TIME_1_32);
 			break;
 		case GUARD_INTERVAL_1_16:
 			deb_setf("1_16\n");
-			wr(DIB3000MB_REG_GUARD_TIME, DIB3000MB_GUARD_TIME_1_16);
+			wr(DIB3000MB_REG_GUARD_TIME, DIB3000_GUARD_TIME_1_16);
 			break;
 		case GUARD_INTERVAL_1_8:
 			deb_setf("1_8\n");
-			wr(DIB3000MB_REG_GUARD_TIME, DIB3000MB_GUARD_TIME_1_8);
+			wr(DIB3000MB_REG_GUARD_TIME, DIB3000_GUARD_TIME_1_8);
 			break;
 		case GUARD_INTERVAL_1_4:
 			deb_setf("1_4\n");
-			wr(DIB3000MB_REG_GUARD_TIME, DIB3000MB_GUARD_TIME_1_4);
+			wr(DIB3000MB_REG_GUARD_TIME, DIB3000_GUARD_TIME_1_4);
 			break;
 		case GUARD_INTERVAL_AUTO:
 			deb_setf("auto\n");
-			wr(DIB3000MB_REG_GUARD_TIME, DIB3000MB_GUARD_TIME_AUTO);
 			break;
 		default:
 			return -EINVAL;
@@ -232,14 +236,14 @@ static int dib3000mb_set_frontend(struct dvb_frontend* fe,
 	switch (fep->inversion) {
 		case INVERSION_OFF:
 			deb_setf("off\n");
-			wr(DIB3000MB_REG_DDS_INV, DIB3000MB_DDS_INV_OFF);
+			wr(DIB3000MB_REG_DDS_INV, DIB3000_DDS_INVERSION_OFF);
 			break;
 		case INVERSION_AUTO:
 			deb_setf("auto ");
 			break;
 		case INVERSION_ON:
 			deb_setf("on\n");
-			wr(DIB3000MB_REG_DDS_INV, DIB3000MB_DDS_INV_ON);
+			wr(DIB3000MB_REG_DDS_INV, DIB3000_DDS_INVERSION_ON);
 			break;
 		default:
 			return -EINVAL;
@@ -249,15 +253,15 @@ static int dib3000mb_set_frontend(struct dvb_frontend* fe,
 	switch (ofdm->constellation) {
 		case QPSK:
 			deb_setf("qpsk\n");
-			wr(DIB3000MB_REG_QAM, DIB3000MB_QAM_QPSK);
+			wr(DIB3000MB_REG_QAM, DIB3000_CONSTELLATION_QPSK);
 			break;
 		case QAM_16:
 			deb_setf("qam16\n");
-			wr(DIB3000MB_REG_QAM, DIB3000MB_QAM_QAM16);
+			wr(DIB3000MB_REG_QAM, DIB3000_CONSTELLATION_16QAM);
 			break;
 		case QAM_64:
 			deb_setf("qam64\n");
-			wr(DIB3000MB_REG_QAM, DIB3000MB_QAM_QAM64);
+			wr(DIB3000MB_REG_QAM, DIB3000_CONSTELLATION_64QAM);
 			break;
 		case QAM_AUTO:
 			break;
@@ -271,19 +275,18 @@ static int dib3000mb_set_frontend(struct dvb_frontend* fe,
 			/* fall through */
 		case HIERARCHY_1:
 			deb_setf("alpha=1\n");
-			wr(DIB3000MB_REG_VIT_ALPHA, DIB3000MB_VIT_ALPHA_1);
+			wr(DIB3000MB_REG_VIT_ALPHA, DIB3000_ALPHA_1);
 			break;
 		case HIERARCHY_2:
 			deb_setf("alpha=2\n");
-			wr(DIB3000MB_REG_VIT_ALPHA, DIB3000MB_VIT_ALPHA_2);
+			wr(DIB3000MB_REG_VIT_ALPHA, DIB3000_ALPHA_2);
 			break;
 		case HIERARCHY_4:
 			deb_setf("alpha=4\n");
-			wr(DIB3000MB_REG_VIT_ALPHA, DIB3000MB_VIT_ALPHA_4);
+			wr(DIB3000MB_REG_VIT_ALPHA, DIB3000_ALPHA_4);
 			break;
 		case HIERARCHY_AUTO:
 			deb_setf("alpha=auto\n");
-			wr(DIB3000MB_REG_VIT_ALPHA, DIB3000MB_VIT_ALPHA_AUTO);
 			break;
 		default:
 			return -EINVAL;
@@ -292,40 +295,40 @@ static int dib3000mb_set_frontend(struct dvb_frontend* fe,
 	deb_setf("hierarchy: ");
 	if (ofdm->hierarchy_information == HIERARCHY_NONE) {
 		deb_setf("none\n");
-		wr(DIB3000MB_REG_VIT_HRCH, DIB3000MB_VIT_HRCH_OFF);
-		wr(DIB3000MB_REG_VIT_HP, DIB3000MB_VIT_HP);
+		wr(DIB3000MB_REG_VIT_HRCH, DIB3000_HRCH_OFF);
+		wr(DIB3000MB_REG_VIT_HP, DIB3000_SELECT_HP);
 		fe_cr = ofdm->code_rate_HP;
 	} else if (ofdm->hierarchy_information != HIERARCHY_AUTO) {
 		deb_setf("on\n");
-		wr(DIB3000MB_REG_VIT_HRCH, DIB3000MB_VIT_HRCH_ON);
-		wr(DIB3000MB_REG_VIT_HP, DIB3000MB_VIT_LP);
+		wr(DIB3000MB_REG_VIT_HRCH, DIB3000_HRCH_ON);
+		wr(DIB3000MB_REG_VIT_HP, DIB3000_SELECT_LP);
 		fe_cr = ofdm->code_rate_LP;
 	}
 	deb_setf("fec: ");
 	switch (fe_cr) {
 		case FEC_1_2:
 			deb_setf("1_2\n");
-			wr(DIB3000MB_REG_VIT_CODE_RATE, DIB3000MB_FEC_1_2);
+			wr(DIB3000MB_REG_VIT_CODE_RATE, DIB3000_FEC_1_2);
 			break;
 		case FEC_2_3:
 			deb_setf("2_3\n");
-			wr(DIB3000MB_REG_VIT_CODE_RATE, DIB3000MB_FEC_2_3);
+			wr(DIB3000MB_REG_VIT_CODE_RATE, DIB3000_FEC_2_3);
 			break;
 		case FEC_3_4:
 			deb_setf("3_4\n");
-			wr(DIB3000MB_REG_VIT_CODE_RATE, DIB3000MB_FEC_3_4);
+			wr(DIB3000MB_REG_VIT_CODE_RATE, DIB3000_FEC_3_4);
 			break;
 		case FEC_5_6:
 			deb_setf("5_6\n");
-			wr(DIB3000MB_REG_VIT_CODE_RATE, DIB3000MB_FEC_5_6);
+			wr(DIB3000MB_REG_VIT_CODE_RATE, DIB3000_FEC_5_6);
 			break;
 		case FEC_7_8:
 			deb_setf("7_8\n");
-			wr(DIB3000MB_REG_VIT_CODE_RATE, DIB3000MB_FEC_7_8);
+			wr(DIB3000MB_REG_VIT_CODE_RATE, DIB3000_FEC_7_8);
 			break;
 		case FEC_NONE:
 			deb_setf("none ");
-			/* fall through */
+			break;
 		case FEC_AUTO:
 			deb_setf("auto\n");
 			break;
@@ -333,7 +336,7 @@ static int dib3000mb_set_frontend(struct dvb_frontend* fe,
 			return -EINVAL;
 	}
 
-	seq = dib3000mb_seq
+	seq = dib3000_seq
 		[ofdm->transmission_mode == TRANSMISSION_MODE_AUTO]
 		[ofdm->guard_interval == GUARD_INTERVAL_AUTO]
 		[fep->inversion == INVERSION_AUTO];
@@ -377,6 +380,7 @@ static int dib3000mb_set_frontend(struct dvb_frontend* fe,
 		ofdm->hierarchy_information == HIERARCHY_AUTO ||
 		fe_cr == FEC_AUTO ||
 		fep->inversion == INVERSION_AUTO) {
+		int as_count=0;
 
 		deb_setf("autosearch enabled.\n");
 
@@ -385,8 +389,10 @@ static int dib3000mb_set_frontend(struct dvb_frontend* fe,
 		wr(DIB3000MB_REG_RESTART, DIB3000MB_RESTART_AUTO_SEARCH);
 		wr(DIB3000MB_REG_RESTART, DIB3000MB_RESTART_OFF);
 
-		while ((search_state = dib3000mb_fe_read_search_status(fe)) < 0);
-		deb_info("search_state after autosearch %d\n",search_state);
+		while ((search_state = dib3000mb_fe_read_search_status(fe)) < 0 && as_count++ < 100) 
+			msleep(1);
+		
+		deb_info("search_state after autosearch %d after %d checks\n",search_state,as_count);
 	} else {
 		wr(DIB3000MB_REG_RESTART, DIB3000MB_RESTART_CTRL);
 		wr(DIB3000MB_REG_RESTART, DIB3000MB_RESTART_OFF);
@@ -395,7 +401,6 @@ static int dib3000mb_set_frontend(struct dvb_frontend* fe,
 	return 0;
 }
 
-
 static int dib3000mb_fe_init(struct dvb_frontend* fe, int mobile_mode)
 {
 	struct dib3000mb_state* state = (struct dib3000mb_state*) fe->demodulator_priv;
@@ -411,9 +416,6 @@ static int dib3000mb_fe_init(struct dvb_frontend* fe, int mobile_mode)
 
 	wr(DIB3000MB_REG_ELECT_OUT_MODE, DIB3000MB_ELECT_OUT_MODE_ON);
 
-	wr(DIB3000MB_REG_QAM, DIB3000MB_QAM_RESERVED);
-	wr(DIB3000MB_REG_VIT_ALPHA, DIB3000MB_VIT_ALPHA_AUTO);
-
 	wr(DIB3000MB_REG_DDS_FREQ_MSB, DIB3000MB_DDS_FREQ_MSB);
 	wr(DIB3000MB_REG_DDS_FREQ_LSB, DIB3000MB_DDS_FREQ_LSB);
 
@@ -435,7 +437,7 @@ static int dib3000mb_fe_init(struct dvb_frontend* fe, int mobile_mode)
 	wr(DIB3000MB_REG_LOCK0_MASK, DIB3000MB_LOCK0_DEFAULT);
 	wr(DIB3000MB_REG_LOCK1_MASK, DIB3000MB_LOCK1_SEARCH_4);
 	wr(DIB3000MB_REG_LOCK2_MASK, DIB3000MB_LOCK2_DEFAULT);
-	wr(DIB3000MB_REG_SEQ, dib3000mb_seq[1][1][1]);
+	wr(DIB3000MB_REG_SEQ, dib3000_seq[1][1][1]);
 
 	wr_foreach(dib3000mb_reg_bandwidth, dib3000mb_bandwidth_8mhz);
 
@@ -453,8 +455,6 @@ static int dib3000mb_fe_init(struct dvb_frontend* fe, int mobile_mode)
 	wr(DIB3000MB_REG_UNK_108, DIB3000MB_UNK_108);
 	wr(DIB3000MB_REG_UNK_122, DIB3000MB_UNK_122);
 	wr(DIB3000MB_REG_MOBILE_MODE_QAM, DIB3000MB_MOBILE_MODE_QAM_OFF);
-	wr(DIB3000MB_REG_VIT_CODE_RATE, DIB3000MB_FEC_1_2);
-	wr(DIB3000MB_REG_VIT_HP, DIB3000MB_VIT_HP);
 	wr(DIB3000MB_REG_BERLEN, DIB3000MB_BERLEN_DEFAULT);
 
 	wr_foreach(dib3000mb_reg_filter_coeffs, dib3000mb_filter_coeffs);
@@ -467,7 +467,7 @@ static int dib3000mb_fe_init(struct dvb_frontend* fe, int mobile_mode)
 
 	wr(DIB3000MB_REG_FIFO_142, DIB3000MB_FIFO_142);
 	wr(DIB3000MB_REG_MPEG2_OUT_MODE, DIB3000MB_MPEG2_OUT_MODE_188);
-	wr(DIB3000MB_REG_FIFO_144, DIB3000MB_FIFO_144);
+	wr(DIB3000MB_REG_PID_PARSE, DIB3000MB_PID_PARSE_ACTIVATE);
 	wr(DIB3000MB_REG_FIFO, DIB3000MB_FIFO_INHIBIT);
 	wr(DIB3000MB_REG_FIFO_146, DIB3000MB_FIFO_146);
 	wr(DIB3000MB_REG_FIFO_147, DIB3000MB_FIFO_147);
@@ -476,34 +476,15 @@ static int dib3000mb_fe_init(struct dvb_frontend* fe, int mobile_mode)
 
 	if (state->config->pll_init) {
 		wr(DIB3000MB_REG_TUNER,
-			DIB3000MB_ACTIVATE_TUNER_XFER(state->config->pll_addr << 1));
+			DIB3000_TUNER_WRITE_ENABLE(state->config->pll_addr));
 		state->config->pll_init(fe);
 		wr(DIB3000MB_REG_TUNER,
-			DIB3000MB_DEACTIVATE_TUNER_XFER(state->config->pll_addr << 1));
+			DIB3000_TUNER_WRITE_DISABLE(state->config->pll_addr));
 	}
 
 	return 0;
 }
 
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
 static int dib3000mb_get_frontend(struct dvb_frontend* fe,
 				  struct dvb_frontend_parameters *fep)
 {
@@ -540,15 +521,15 @@ static int dib3000mb_get_frontend(struct dvb_frontend* fe,
 	deb_getf("inversion %d %d, %d\n", inv_test2, inv_test1, fep->inversion);
 
 	switch ((tps_val = rd(DIB3000MB_REG_TPS_QAM))) {
-		case DIB3000MB_QAM_QPSK:
+		case DIB3000_CONSTELLATION_QPSK:
 			deb_getf("QPSK ");
 			ofdm->constellation = QPSK;
 			break;
-		case DIB3000MB_QAM_QAM16:
+		case DIB3000_CONSTELLATION_16QAM:
 			deb_getf("QAM16 ");
 			ofdm->constellation = QAM_16;
 			break;
-		case DIB3000MB_QAM_QAM64:
+		case DIB3000_CONSTELLATION_64QAM:
 			deb_getf("QAM64 ");
 			ofdm->constellation = QAM_64;
 			break;
@@ -565,19 +546,19 @@ static int dib3000mb_get_frontend(struct dvb_frontend* fe,
 		ofdm->code_rate_HP = FEC_NONE;
 
 		switch ((tps_val = rd(DIB3000MB_REG_TPS_VIT_ALPHA))) {
-			case DIB3000MB_VIT_ALPHA_OFF:
+			case DIB3000_ALPHA_0:
 				deb_getf("HIERARCHY_NONE ");
 				ofdm->hierarchy_information = HIERARCHY_NONE;
 				break;
-			case DIB3000MB_VIT_ALPHA_1:
+			case DIB3000_ALPHA_1:
 				deb_getf("HIERARCHY_1 ");
 				ofdm->hierarchy_information = HIERARCHY_1;
 				break;
-			case DIB3000MB_VIT_ALPHA_2:
+			case DIB3000_ALPHA_2:
 				deb_getf("HIERARCHY_2 ");
 				ofdm->hierarchy_information = HIERARCHY_2;
 				break;
-			case DIB3000MB_VIT_ALPHA_4:
+			case DIB3000_ALPHA_4:
 				deb_getf("HIERARCHY_4 ");
 				ofdm->hierarchy_information = HIERARCHY_4;
 				break;
@@ -595,23 +576,23 @@ static int dib3000mb_get_frontend(struct dvb_frontend* fe,
 	}
 
 	switch (tps_val) {
-		case DIB3000MB_FEC_1_2:
+		case DIB3000_FEC_1_2:
 			deb_getf("FEC_1_2 ");
 			*cr = FEC_1_2;
 			break;
-		case DIB3000MB_FEC_2_3:
+		case DIB3000_FEC_2_3:
 			deb_getf("FEC_2_3 ");
 			*cr = FEC_2_3;
 			break;
-		case DIB3000MB_FEC_3_4:
+		case DIB3000_FEC_3_4:
 			deb_getf("FEC_3_4 ");
 			*cr = FEC_3_4;
 			break;
-		case DIB3000MB_FEC_5_6:
+		case DIB3000_FEC_5_6:
 			deb_getf("FEC_5_6 ");
 			*cr = FEC_4_5;
 			break;
-		case DIB3000MB_FEC_7_8:
+		case DIB3000_FEC_7_8:
 			deb_getf("FEC_7_8 ");
 			*cr = FEC_7_8;
 			break;
@@ -622,19 +603,19 @@ static int dib3000mb_get_frontend(struct dvb_frontend* fe,
 	deb_getf("TPS: %d\n",tps_val);
 
 	switch ((tps_val = rd(DIB3000MB_REG_TPS_GUARD_TIME))) {
-		case DIB3000MB_GUARD_TIME_1_32:
+		case DIB3000_GUARD_TIME_1_32:
 			deb_getf("GUARD_INTERVAL_1_32 ");
 			ofdm->guard_interval = GUARD_INTERVAL_1_32;
 			break;
-		case DIB3000MB_GUARD_TIME_1_16:
+		case DIB3000_GUARD_TIME_1_16:
 			deb_getf("GUARD_INTERVAL_1_16 ");
 			ofdm->guard_interval = GUARD_INTERVAL_1_16;
 			break;
-		case DIB3000MB_GUARD_TIME_1_8:
+		case DIB3000_GUARD_TIME_1_8:
 			deb_getf("GUARD_INTERVAL_1_8 ");
 			ofdm->guard_interval = GUARD_INTERVAL_1_8;
 			break;
-		case DIB3000MB_GUARD_TIME_1_4:
+		case DIB3000_GUARD_TIME_1_4:
 			deb_getf("GUARD_INTERVAL_1_4 ");
 			ofdm->guard_interval = GUARD_INTERVAL_1_4;
 			break;
@@ -645,11 +626,11 @@ static int dib3000mb_get_frontend(struct dvb_frontend* fe,
 	deb_getf("TPS: %d\n", tps_val);
 
 	switch ((tps_val = rd(DIB3000MB_REG_TPS_FFT))) {
-		case DIB3000MB_FFT_2K:
+		case DIB3000_TRANSMISSION_MODE_2K:
 			deb_getf("TRANSMISSION_MODE_2K ");
 			ofdm->transmission_mode = TRANSMISSION_MODE_2K;
 			break;
-		case DIB3000MB_FFT_8K:
+		case DIB3000_TRANSMISSION_MODE_8K:
 			deb_getf("TRANSMISSION_MODE_8K ");
 			ofdm->transmission_mode = TRANSMISSION_MODE_8K;
 			break;
@@ -801,7 +782,7 @@ static int dib3000mb_fe_get_tune_settings(struct dvb_frontend* fe, struct dvb_fr
 
 static int dib3000mb_fe_init_nonmobile(struct dvb_frontend* fe)
 {
- return dib3000mb_fe_init(fe, 0);
+	return dib3000mb_fe_init(fe, 0);
 }
 
 static int dib3000mb_set_frontend_and_tuner(struct dvb_frontend* fe, struct dvb_frontend_parameters *fep)
@@ -811,44 +792,129 @@ static int dib3000mb_set_frontend_and_tuner(struct dvb_frontend* fe, struct dvb_
 
 static void dib3000mb_release(struct dvb_frontend* fe)
 {
-	struct dib3000mb_state* state = (struct dib3000mb_state*) fe->demodulator_priv;
+	struct dib3000mb_state *state = (struct dib3000mb_state*) fe->demodulator_priv;
 	kfree(state);
 }
 
+/* pid filter and transfer stuff */
+
+/* fetch a pid from pid_list */
+static int dib3000_get_pid_index(struct dib3000_pid pid_list[],
+		int num_pids, int pid, spinlock_t *pid_list_lock,int onoff)
+{
+	int i,ret = -1;
+	unsigned long flags;
+
+	spin_lock_irqsave(pid_list_lock,flags);
+	for (i=0; i < num_pids; i++)
+		if (onoff) {
+			if (!pid_list[i].active) {
+				pid_list[i].pid = pid;
+				pid_list[i].active = 1;
+				ret = i;
+				break;
+			}
+		} else {
+			if (pid_list[i].active && pid_list[i].pid == pid) {
+				pid_list[i].pid = 0;
+				pid_list[i].active = 0;
+				ret = i;
+				break;
+			}
+		}
+				
+	spin_unlock_irqrestore(pid_list_lock,flags);
+	return ret;
+}
+
+static int dib3000mb_pid_control(struct dvb_frontend *fe,int pid,int onoff)
+{
+	struct dib3000mb_state *state = fe->demodulator_priv;
+	int index = dib3000_get_pid_index(state->pid_list, DIB3000MB_NUM_PIDS, pid, &state->pid_list_lock,onoff);
+	pid = (onoff ? pid | DIB3000_ACTIVATE_PID_FILTERING : 0);
+
+	deb_info("setting pid 0x%x on index %d\n",pid,index);
+	
+	if (index >= 0) {
+		wr(index+DIB3000MB_REG_FIRST_PID,pid);
+	} else {
+		err("no more pids for filtering.");
+		return -ENOMEM;
+	}
+	return 0;
+}
+
+static int dib3000mb_fifo_control(struct dvb_frontend *fe, int onoff) 
+{
+	struct dib3000mb_state *state = (struct dib3000mb_state*) fe->demodulator_priv;
+
+	if (onoff) {
+		wr(DIB3000MB_REG_FIFO, DIB3000MB_FIFO_ACTIVATE);
+	} else {
+		wr(DIB3000MB_REG_FIFO, DIB3000MB_FIFO_INHIBIT);
+	}
+	return 0;
+}
+
+static int dib3000mb_pid_filter(struct dvb_frontend *fe, int onoff) 
+{
+	//struct dib3000mb_state *state = fe->demodulator_priv;
+	/* switch it off and on */
+	return 0;
+}
+
 static struct dvb_frontend_ops dib3000mb_ops;
 
-struct dvb_frontend* dib3000mb_attach(const struct dib3000mb_config* config,
-				      struct i2c_adapter* i2c)
+struct dvb_frontend* dib3000mb_attach(const struct dib3000_config* config,
+				      struct i2c_adapter* i2c, struct dib3000_xfer_ops *xfer_ops)
 {
 	struct dib3000mb_state* state = NULL;
-	u16 manfid, devid;
+	int i;
 
 	/* allocate memory for the internal state */
 	state = (struct dib3000mb_state*) kmalloc(sizeof(struct dib3000mb_state), GFP_KERNEL);
-	if (state == NULL) goto error;
+	if (state == NULL)
+		goto error;
 
 	/* setup the state */
 	state->config = config;
 	state->i2c = i2c;
 	memcpy(&state->ops, &dib3000mb_ops, sizeof(struct dvb_frontend_ops));
 
-	/* check if the demod is there */
-	manfid = dib3000mb_read_reg(state, DIB3000MB_REG_MANUFACTOR_ID);
-	if (manfid != 0x01b3) goto error;
-
-	devid = dib3000mb_read_reg(state, DIB3000MB_REG_DEVICE_ID);
-	if (devid != 0x3000) goto error;
-
+	/* check for the correct demod */
+	if (rd(DIB3000_REG_MANUFACTOR_ID) != DIB3000_I2C_ID_DIBCOM) 
+		goto error;
+
+	if (rd(DIB3000_REG_DEVICE_ID) != DIB3000MB_DEVICE_ID)
+		goto error;
+	
+	/* initialize the id_list */
+	deb_info("initializing %d pids for the pid_list.\n",DIB3000MB_NUM_PIDS);
+	state->pid_list_lock = SPIN_LOCK_UNLOCKED;
+	memset(state->pid_list,0,DIB3000MB_NUM_PIDS*(sizeof(struct dib3000_pid)));
+	for (i=0; i < DIB3000MB_NUM_PIDS; i++) {
+		state->pid_list[i].pid = 0;
+		state->pid_list[i].active = 0;
+	}
+	state->feedcount = 0;
+	
 	/* create dvb_frontend */
 	state->frontend.ops = &state->ops;
 	state->frontend.demodulator_priv = state;
+
+	/* set the xfer operations */
+	xfer_ops->pid_filter = dib3000mb_pid_filter;
+	xfer_ops->fifo_ctrl = dib3000mb_fifo_control;
+	xfer_ops->pid_ctrl = dib3000mb_pid_control;
+	
 	return &state->frontend;
 
 error:
-	if (state) kfree(state);
+	if (state)
+		kfree(state);
 	return NULL;
 }
-
+			
 static struct dvb_frontend_ops dib3000mb_ops = {
 
 	.info = {
diff --git a/linux/drivers/media/dvb/frontends/dib3000mb_priv.h b/linux/drivers/media/dvb/frontends/dib3000mb_priv.h
index 96759753c..57e61aa5b 100644
--- a/linux/drivers/media/dvb/frontends/dib3000mb_priv.h
+++ b/linux/drivers/media/dvb/frontends/dib3000mb_priv.h
@@ -1,5 +1,5 @@
 /*
- * dib3000mb.h
+ * dib3000mb_priv.h
  *
  * Copyright (C) 2004 Patrick Boettcher (patrick.boettcher@desy.de)
  *
@@ -13,13 +13,6 @@
 #ifndef __DIB3000MB_PRIV_H_INCLUDED__
 #define __DIB3000MB_PRIV_H_INCLUDED__
 
-/* info and err, taken from usb.h, if there is anything available like by default,
- * please change !
- */
-#define err(format, arg...) printk(KERN_ERR "%s: " format "\n" , __FILE__ , ## arg)
-#define info(format, arg...) printk(KERN_INFO "%s: " format "\n" , __FILE__ , ## arg)
-#define warn(format, arg...) printk(KERN_WARNING "%s: " format "\n" , __FILE__ , ## arg)
-
 /* register addresses and some of their default values */
 
 /* restart subsystems */
@@ -32,37 +25,18 @@
 
 /* FFT size */
 #define DIB3000MB_REG_FFT				(     1)
-#define DIB3000MB_FFT_2K					(     0)
-#define DIB3000MB_FFT_8K					(     1)
-#define DIB3000MB_FFT_AUTO					(     1)
 
 /* Guard time */
 #define DIB3000MB_REG_GUARD_TIME		(     2)
-#define DIB3000MB_GUARD_TIME_1_32			(     0)
-#define DIB3000MB_GUARD_TIME_1_16			(     1)
-#define DIB3000MB_GUARD_TIME_1_8			(     2)
-#define DIB3000MB_GUARD_TIME_1_4			(     3)
-#define DIB3000MB_GUARD_TIME_AUTO			(     0)
 
 /* QAM */
 #define DIB3000MB_REG_QAM				(     3)
-#define DIB3000MB_QAM_QPSK					(     0)
-#define DIB3000MB_QAM_QAM16					(     1)
-#define DIB3000MB_QAM_QAM64					(     2)
-#define DIB3000MB_QAM_RESERVED				(     3)
 
 /* Alpha coefficient high priority Viterbi algorithm */
 #define DIB3000MB_REG_VIT_ALPHA			(     4)
-#define DIB3000MB_VIT_ALPHA_OFF				(     0)
-#define DIB3000MB_VIT_ALPHA_1				(     1)
-#define DIB3000MB_VIT_ALPHA_2				(     2)
-#define DIB3000MB_VIT_ALPHA_4				(     4)
-#define DIB3000MB_VIT_ALPHA_AUTO			(     7)
 
 /* spectrum inversion */
 #define DIB3000MB_REG_DDS_INV			(     5)
-#define DIB3000MB_DDS_INV_OFF				(     0)
-#define DIB3000MB_DDS_INV_ON				(     1)
 
 /* DDS frequency value (IF position) ad ? values don't match reg_3000mb.txt */
 #define DIB3000MB_REG_DDS_FREQ_MSB		(     6)
@@ -71,12 +45,7 @@
 #define DIB3000MB_DDS_FREQ_LSB				(  8990)
 
 /* timing frequency (carrier spacing) */
-#define DIB3000MB_REG_TIMING_FREQ_MSB	(     8)
-#define DIB3000MB_REG_TIMING_FREQ_LSB	(     9)
-
-static u16 dib3000mb_reg_timing_freq[] = {
-	DIB3000MB_REG_TIMING_FREQ_MSB, DIB3000MB_REG_TIMING_FREQ_LSB
-};
+static u16 dib3000mb_reg_timing_freq[] = { 8,9 };
 static u16 dib3000mb_timing_freq[][2] = {
 	{ 126 , 48873 }, /* 6 MHz */
 	{ 147 , 57019 }, /* 7 MHz */
@@ -84,14 +53,9 @@ static u16 dib3000mb_timing_freq[][2] = {
 };
 
 /* impulse noise parameter */
-#define DIB3000MB_REG_IMPNOISE_10		(    10)
-#define DIB3000MB_REG_IMPNOISE_11		(    11)
-#define DIB3000MB_REG_IMPNOISE_12		(    12)
-#define DIB3000MB_REG_IMPNOISE_13		(    13)
-#define DIB3000MB_REG_IMPNOISE_14		(    14)
-#define DIB3000MB_REG_IMPNOISE_15		(    15)
 /* 36 ??? */
-#define DIB3000MB_REG_IMPNOISE_36		(    36)
+
+static u16 dib3000mb_reg_impulse_noise[] = { 10,11,12,15,36 };
 
 enum dib3000mb_impulse_noise_type {
 	DIB3000MB_IMPNOISE_OFF,
@@ -100,12 +64,6 @@ enum dib3000mb_impulse_noise_type {
 	DIB3000MB_IMPNOISE_DEFAULT
 };
 
-static u16 dib3000mb_reg_impulse_noise[] = {
- DIB3000MB_REG_IMPNOISE_10, DIB3000MB_REG_IMPNOISE_11,
- DIB3000MB_REG_IMPNOISE_12, DIB3000MB_REG_IMPNOISE_15,
- DIB3000MB_REG_IMPNOISE_36
-};
-
 static u16 dib3000mb_impulse_noise_values[][5] = {
 	{ 0x0000, 0x0004, 0x0014, 0x01ff, 0x0399 }, /* off */
 	{ 0x0001, 0x0004, 0x0014, 0x01ff, 0x037b }, /* mobile */
@@ -120,74 +78,26 @@ static u16 dib3000mb_impulse_noise_values[][5] = {
  */
 
 /* also from 16 to 18 */
-#define DIB3000MB_REG_AGC_GAIN_19		(    19)
-#define DIB3000MB_REG_AGC_GAIN_20		(    20)
-#define DIB3000MB_REG_AGC_GAIN_21		(    21)
-#define DIB3000MB_REG_AGC_GAIN_22		(    22)
-#define DIB3000MB_REG_AGC_GAIN_23		(    23)
-#define DIB3000MB_REG_AGC_GAIN_24		(    24)
-#define DIB3000MB_REG_AGC_GAIN_25		(    25)
-#define DIB3000MB_REG_AGC_GAIN_26		(    26)
-#define DIB3000MB_REG_AGC_GAIN_27		(    27)
-#define DIB3000MB_REG_AGC_GAIN_28		(    28)
-#define DIB3000MB_REG_AGC_GAIN_29		(    29)
-#define DIB3000MB_REG_AGC_GAIN_30		(    30)
-#define DIB3000MB_REG_AGC_GAIN_31		(    31)
-#define DIB3000MB_REG_AGC_GAIN_32		(    32)
-
 static u16 dib3000mb_reg_agc_gain[] = {
-  DIB3000MB_REG_AGC_GAIN_19, DIB3000MB_REG_AGC_GAIN_20, DIB3000MB_REG_AGC_GAIN_21,
-  DIB3000MB_REG_AGC_GAIN_22, DIB3000MB_REG_AGC_GAIN_23, DIB3000MB_REG_AGC_GAIN_24,
-  DIB3000MB_REG_AGC_GAIN_25, DIB3000MB_REG_AGC_GAIN_26, DIB3000MB_REG_AGC_GAIN_27,
-  DIB3000MB_REG_AGC_GAIN_28, DIB3000MB_REG_AGC_GAIN_29, DIB3000MB_REG_AGC_GAIN_30,
-  DIB3000MB_REG_AGC_GAIN_31, DIB3000MB_REG_AGC_GAIN_32 };
+	19,20,21,22,23,24,25,26,27,28,29,30,31,32
+};
 
 static u16 dib3000mb_default_agc_gain[] =
 	{ 0x0001, 52429,   623, 128, 166, 195, 61,   /* RF ??? */
 	  0x0001, 53766, 38011,   0,  90,  33, 23 }; /* IF ??? */
 
 /* phase noise */
-#define DIB3000MB_REG_PHASE_NOISE_33		(    33)
-#define DIB3000MB_REG_PHASE_NOISE_34		(    34)
-#define DIB3000MB_REG_PHASE_NOISE_35		(    35)
-#define DIB3000MB_REG_PHASE_NOISE_36		(    36)
-#define DIB3000MB_REG_PHASE_NOISE_37		(    37)
-#define DIB3000MB_REG_PHASE_NOISE_38		(    38)
-
-/* DIB3000MB_REG_PHASE_NOISE_36 is set when setting the impulse noise */
-static u16 dib3000mb_reg_phase_noise[] = {
-	DIB3000MB_REG_PHASE_NOISE_33, DIB3000MB_REG_PHASE_NOISE_34, DIB3000MB_REG_PHASE_NOISE_35,
-	DIB3000MB_REG_PHASE_NOISE_37, DIB3000MB_REG_PHASE_NOISE_38
-};
+/* 36 is set when setting the impulse noise */
+static u16 dib3000mb_reg_phase_noise[] = { 33,34,35,37,38 };
 
 static u16 dib3000mb_default_noise_phase[] = { 2, 544, 0, 5, 4 };
 
 /* lock duration */
-#define DIB3000MB_REG_LOCK_DURATION_39	(    39)
-#define DIB3000MB_REG_LOCK_DURATION_40	(    40)
-
-static u16 dib3000mb_reg_lock_duration[] = {
-	DIB3000MB_REG_LOCK_DURATION_39, DIB3000MB_REG_LOCK_DURATION_40
-};
-
+static u16 dib3000mb_reg_lock_duration[] = { 39,40 };
 static u16 dib3000mb_default_lock_duration[] = { 135, 135 };
 
 /* AGC loop bandwidth */
-
-#define DIB3000MB_REG_AGC_BW_43			(    43)
-#define DIB3000MB_REG_AGC_BW_44			(    44)
-#define DIB3000MB_REG_AGC_BW_45			(    45)
-#define DIB3000MB_REG_AGC_BW_46			(    46)
-#define DIB3000MB_REG_AGC_BW_47			(    47)
-#define DIB3000MB_REG_AGC_BW_48			(    48)
-#define DIB3000MB_REG_AGC_BW_49			(    49)
-#define DIB3000MB_REG_AGC_BW_50			(    50)
-
-static u16 dib3000mb_reg_agc_bandwidth[] = {
-	DIB3000MB_REG_AGC_BW_43, DIB3000MB_REG_AGC_BW_44, DIB3000MB_REG_AGC_BW_45,
-	DIB3000MB_REG_AGC_BW_46, DIB3000MB_REG_AGC_BW_47, DIB3000MB_REG_AGC_BW_48,
-	DIB3000MB_REG_AGC_BW_49, DIB3000MB_REG_AGC_BW_50
-};
+static u16 dib3000mb_reg_agc_bandwidth[] = { 43,44,45,46,47,48,49,50 };
 
 static u16 dib3000mb_agc_bandwidth_low[]  =
 	{ 2088, 10, 2088, 10, 3448, 5, 3448, 5 };
@@ -222,42 +132,8 @@ static u16 dib3000mb_agc_bandwidth_high[] =
  */
 #define DIB3000MB_REG_SEQ				(    54)
 
-/* all values have been set manually */
-static u16 dib3000mb_seq[2][2][2] = 	/* fft,gua,   inv   */
-	{ /* fft */
-		{ /* gua */
-			{ 0, 1 },					/*  0   0   { 0,1 } */
-			{ 3, 9 },					/*  0   1   { 0,1 } */
-		},
-		{
-			{ 2, 5 },					/*  1   0   { 0,1 } */
-			{ 6, 11 },					/*  1   1   { 0,1 } */
-		}
-	};
-
 /* bandwidth */
-#define DIB3000MB_REG_BW_55				(    55)
-#define DIB3000MB_REG_BW_56				(    56)
-#define DIB3000MB_REG_BW_57				(    57)
-#define DIB3000MB_REG_BW_58				(    58)
-#define DIB3000MB_REG_BW_59				(    59)
-#define DIB3000MB_REG_BW_60				(    60)
-#define DIB3000MB_REG_BW_61				(    61)
-#define DIB3000MB_REG_BW_62				(    62)
-#define DIB3000MB_REG_BW_63				(    63)
-#define DIB3000MB_REG_BW_64				(    64)
-#define DIB3000MB_REG_BW_65				(    65)
-#define DIB3000MB_REG_BW_66				(    66)
-#define DIB3000MB_REG_BW_67				(    67)
-
-static u16 dib3000mb_reg_bandwidth[] = {
-	DIB3000MB_REG_BW_55, DIB3000MB_REG_BW_56, DIB3000MB_REG_BW_57,
-	DIB3000MB_REG_BW_58, DIB3000MB_REG_BW_59, DIB3000MB_REG_BW_60,
-	DIB3000MB_REG_BW_61, DIB3000MB_REG_BW_62, DIB3000MB_REG_BW_63,
-	DIB3000MB_REG_BW_64, DIB3000MB_REG_BW_65, DIB3000MB_REG_BW_66,
-	DIB3000MB_REG_BW_67
-};
-
+static u16 dib3000mb_reg_bandwidth[] = { 55,56,57,58,59,60,61,62,63,64,65,66,67 };
 static u16 dib3000mb_bandwidth_6mhz[] =
 	{ 0, 33, 53312, 112, 46635, 563, 36565, 0, 1000, 0, 1010, 1, 45264 };
 
@@ -329,7 +205,7 @@ static u16 dib3000mb_bandwidth_8mhz[] =
 
 /* QAM for mobile mode */
 #define DIB3000MB_REG_MOBILE_MODE_QAM	(   126)
-#define DIB3000MB_MOBILE_MODE_QAM_64			(     3)
+#define DIB3000MB_MOBILE_MODE_QAM_64		(     3)
 #define DIB3000MB_MOBILE_MODE_QAM_QPSK_16	(     1)
 #define DIB3000MB_MOBILE_MODE_QAM_OFF		(     0)
 
@@ -343,23 +219,12 @@ static u16 dib3000mb_bandwidth_8mhz[] =
 
 /* vit hrch */
 #define DIB3000MB_REG_VIT_HRCH			(   128)
-#define DIB3000MB_VIT_HRCH_ON				(     1)
-#define DIB3000MB_VIT_HRCH_OFF				(     0)
 
 /* vit code rate */
 #define DIB3000MB_REG_VIT_CODE_RATE		(   129)
 
-/* forward error correction code rates */
-#define DIB3000MB_FEC_1_2					(     1)
-#define DIB3000MB_FEC_2_3					(     2)
-#define DIB3000MB_FEC_3_4					(     3)
-#define DIB3000MB_FEC_5_6					(     5)
-#define DIB3000MB_FEC_7_8					(     7)
-
 /* vit select hp */
 #define DIB3000MB_REG_VIT_HP			(   130)
-#define DIB3000MB_VIT_LP					(     0)
-#define DIB3000MB_VIT_HP					(     1)
 
 /* time frame for Bit-Error-Rate calculation */
 #define DIB3000MB_REG_BERLEN			(   135)
@@ -380,8 +245,9 @@ static u16 dib3000mb_bandwidth_8mhz[] =
 #define DIB3000MB_MPEG2_OUT_MODE_204		(     0)
 #define DIB3000MB_MPEG2_OUT_MODE_188		(     1)
 
-#define DIB3000MB_REG_FIFO_144			(   144)
-#define DIB3000MB_FIFO_144					(     1)
+#define DIB3000MB_REG_PID_PARSE			(   144)
+#define DIB3000MB_PID_PARSE_INHIBIT		(     0)
+#define DIB3000MB_PID_PARSE_ACTIVATE	(     1)
 
 #define DIB3000MB_REG_FIFO				(   145)
 #define DIB3000MB_FIFO_INHIBIT				(     1)
@@ -397,25 +263,11 @@ static u16 dib3000mb_bandwidth_8mhz[] =
  * pidfilter
  * it is not a hardware pidfilter but a filter which drops all pids
  * except the ones set. Necessary because of the limited USB1.1 bandwidth.
+ * regs 153-168
  */
-#define DIB3000MB_REG_FILTER_PID_0		(   153)
-#define DIB3000MB_REG_FILTER_PID_1		(   154)
-#define DIB3000MB_REG_FILTER_PID_2		(   155)
-#define DIB3000MB_REG_FILTER_PID_3		(   156)
-#define DIB3000MB_REG_FILTER_PID_4		(   157)
-#define DIB3000MB_REG_FILTER_PID_5		(   158)
-#define DIB3000MB_REG_FILTER_PID_6		(   159)
-#define DIB3000MB_REG_FILTER_PID_7		(   160)
-#define DIB3000MB_REG_FILTER_PID_8		(   161)
-#define DIB3000MB_REG_FILTER_PID_9		(   162)
-#define DIB3000MB_REG_FILTER_PID_10		(   163)
-#define DIB3000MB_REG_FILTER_PID_11		(   164)
-#define DIB3000MB_REG_FILTER_PID_12		(   165)
-#define DIB3000MB_REG_FILTER_PID_13		(   166)
-#define DIB3000MB_REG_FILTER_PID_14		(   167)
-#define DIB3000MB_REG_FILTER_PID_15		(   168)
-
-#define DIB3000MB_ACTIVATE_FILTERING			(0x2000)
+
+#define DIB3000MB_REG_FIRST_PID			(   153)
+#define DIB3000MB_NUM_PIDS				(    16)
 
 /*
  * output mode
@@ -434,40 +286,10 @@ static u16 dib3000mb_bandwidth_8mhz[] =
 #define DIB3000MB_IRQ_EVENT_MASK				(     0)
 
 /* filter coefficients */
-#define DIB3000MB_REG_FILTER_COEF_171	(   171)
-#define DIB3000MB_REG_FILTER_COEF_172	(   172)
-#define DIB3000MB_REG_FILTER_COEF_173	(   173)
-#define DIB3000MB_REG_FILTER_COEF_174	(   174)
-#define DIB3000MB_REG_FILTER_COEF_175	(   175)
-#define DIB3000MB_REG_FILTER_COEF_176	(   176)
-#define DIB3000MB_REG_FILTER_COEF_177	(   177)
-#define DIB3000MB_REG_FILTER_COEF_178	(   178)
-#define DIB3000MB_REG_FILTER_COEF_179	(   179)
-#define DIB3000MB_REG_FILTER_COEF_180	(   180)
-#define DIB3000MB_REG_FILTER_COEF_181	(   181)
-#define DIB3000MB_REG_FILTER_COEF_182	(   182)
-#define DIB3000MB_REG_FILTER_COEF_183	(   183)
-#define DIB3000MB_REG_FILTER_COEF_184	(   184)
-#define DIB3000MB_REG_FILTER_COEF_185	(   185)
-#define DIB3000MB_REG_FILTER_COEF_186	(   186)
-#define DIB3000MB_REG_FILTER_COEF_187	(   187)
-#define DIB3000MB_REG_FILTER_COEF_188	(   188)
-#define DIB3000MB_REG_FILTER_COEF_189	(   189)
-#define DIB3000MB_REG_FILTER_COEF_190	(   190)
-#define DIB3000MB_REG_FILTER_COEF_191	(   191)
-#define DIB3000MB_REG_FILTER_COEF_192	(   192)
-#define DIB3000MB_REG_FILTER_COEF_193	(   193)
-#define DIB3000MB_REG_FILTER_COEF_194	(   194)
-
 static u16 dib3000mb_reg_filter_coeffs[] = {
-	DIB3000MB_REG_FILTER_COEF_171, DIB3000MB_REG_FILTER_COEF_172, DIB3000MB_REG_FILTER_COEF_173,
-	DIB3000MB_REG_FILTER_COEF_174, DIB3000MB_REG_FILTER_COEF_175, DIB3000MB_REG_FILTER_COEF_176,
-	DIB3000MB_REG_FILTER_COEF_177, DIB3000MB_REG_FILTER_COEF_178, DIB3000MB_REG_FILTER_COEF_179,
-	DIB3000MB_REG_FILTER_COEF_180, DIB3000MB_REG_FILTER_COEF_181, DIB3000MB_REG_FILTER_COEF_182,
-	DIB3000MB_REG_FILTER_COEF_183, DIB3000MB_REG_FILTER_COEF_184, DIB3000MB_REG_FILTER_COEF_185,
-	DIB3000MB_REG_FILTER_COEF_186,                                DIB3000MB_REG_FILTER_COEF_188,
-	DIB3000MB_REG_FILTER_COEF_189, DIB3000MB_REG_FILTER_COEF_190, DIB3000MB_REG_FILTER_COEF_191,
-	DIB3000MB_REG_FILTER_COEF_192,                                DIB3000MB_REG_FILTER_COEF_194
+	171, 172, 173, 174, 175, 176, 177, 178,
+	179, 180, 181, 182, 183, 184, 185, 186,
+	188, 189, 190, 191, 192, 194
 };
 
 static u16 dib3000mb_filter_coeffs[] = {
@@ -502,13 +324,6 @@ static u16 dib3000mb_filter_coeffs[] = {
 #define DIB3000MB_RESET_DEVICE				(0x812c)
 #define DIB3000MB_RESET_DEVICE_RST			(     0)
 
-/* identification registers, manufactor an the device */
-#define DIB3000MB_REG_MANUFACTOR_ID		(  1025)
-#define DIB3000MB_MANUFACTOR_ID_DIBCOM		(0x01B3)
-
-#define DIB3000MB_REG_DEVICE_ID			(  1026)
-#define DIB3000MB_DEVICE_ID					(0x3000)
-
 /* hardware clock configuration */
 #define DIB3000MB_REG_CLOCK				(  1027)
 #define DIB3000MB_CLOCK_DEFAULT				(0x9000)
@@ -526,8 +341,6 @@ static u16 dib3000mb_filter_coeffs[] = {
 
 /* set the tuner i2c address */
 #define DIB3000MB_REG_TUNER				(  1089)
-#define DIB3000MB_ACTIVATE_TUNER_XFER(a)	(0xffff & ((a) << 7))
-#define DIB3000MB_DEACTIVATE_TUNER_XFER(a)	(0xffff & (((a) << 7) + 0x80))
 
 /* monitoring registers (read only) */