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authorAndy Walls <awalls@radix.net>2009-01-01 09:09:24 -0500
committerAndy Walls <awalls@radix.net>2009-01-01 09:09:24 -0500
commitdb548dc0e0db38f2af004d4007368c659742b64f (patch)
treed69b6177436d6c19ce2fa1252bac79227cc84c8b /INSTALL
parent70e0ec035b78cab8338a5b20518bfc1d1307b7ad (diff)
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cx18: Fix a PLL divisor update for the I2S master clock
From: Andy Walls <awalls@radix.net> A redundant PLL divisior update for the I2S master clock after AV core firmware load was missed in earlier PLL parameter changes. This one really doesn't matter because it's redundant and gets overwritten, but the driver should be self consistent in the values used. Priority: normal Signed-off-by: Andy Walls <awalls@radix.net>
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