Initial dst.c

1 files changed, 881 insertions, 0 deletions

diff --git a/linux/drivers/media/dvb/frontends/dst.c b/linux/drivers/media/dvb/frontends/dst.c
new file mode 100644
index 000000000..240e131b0
--- /dev/null
+++ b/linux/drivers/media/dvb/frontends/dst.c
@@ -0,0 +1,881 @@
+/* 
+    len for DST Frontend
+
+    Based on work done by
+    Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
+
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+*/    
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/string.h>
+#include <linux/slab.h>
+#include <linux/vmalloc.h>
+#include <asm/div64.h>
+#include <asm/delay.h>
+
+#include "dvb_frontend.h"
+#include "dvb_functions.h"
+#include "dst.h"
+
+
+unsigned int dst_debug = 0;
+unsigned int dst_verbose = 0;
+MODULE_PARM(dst_verbose, "i");
+MODULE_PARM_DESC(dst_verbose,
+		 "verbose startup messages, default is 1 (yes)");
+MODULE_PARM(dst_debug, "i");
+MODULE_PARM_DESC(dst_debug, "debug messages, default is 0 (no)");
+
+#define dprintk	if (dst_debug) printk
+
+#define HAS_CI		1
+#define HAS_LOCK	2
+#define ATTEMPT_TUNE	4
+#define HAS_POWER	8
+
+struct dst_data {
+	u8	tx_tuna[10];
+	u8	rx_tuna[10];
+	u8	flags;
+	u32 frequency;     /* intermediate frequency in kHz for QPSK */
+        fe_spectral_inversion_t inversion;
+        u32   symbol_rate;  /* symbol rate in Symbols per second */
+	fe_code_rate_t  fec;
+	fe_sec_voltage_t voltage;
+	fe_sec_tone_mode_t tone;
+	u32 decode_freq;
+	u32 decode_n1;
+	u32 decode_n2;
+	u8  k22;
+} ;
+
+static struct dvb_frontend_info dst_info = {
+	.name 			= "DST FTA",
+	.type 			= FE_QPSK,
+	.frequency_min 		= 950000,
+	.frequency_max 		= 2150000,
+	.frequency_stepsize 	= 1000,           /* kHz for QPSK frontends */
+	.frequency_tolerance 	= 29500,
+	.symbol_rate_min	= 1000000,
+	.symbol_rate_max	= 45000000,
+/*     . symbol_rate_tolerance	= 	???,*/
+	.notifier_delay		= 50,                /* 1/20 s */
+	.caps = FE_CAN_INVERSION_AUTO |
+		FE_CAN_FEC_AUTO |
+		FE_CAN_QPSK
+};
+
+static void dst_packsize(struct dvb_i2c_bus *i2c)
+{
+	struct dst_gpio_packet bits;
+	struct i2c_msg msg = {
+		 .addr = DST_IG_ADDR, .flags = 0, .buf = (u8*)(&bits), .len = sizeof(struct dst_gpio_packet) };
+ 	bits.cmd = DST_IG_TS;	
+	i2c->xfer (i2c, &msg, 1);
+}
+
+static int dst_gpio_outb(struct dvb_i2c_bus *i2c, u32 mask, u32 enbb, u32 outhigh)
+{
+	struct dst_gpio_packet enb;
+	struct dst_gpio_packet bits;
+	struct i2c_msg msgs[2] = {
+		{ .addr = DST_IG_ADDR, .flags = 0, .buf = (u8*)(&enb), .len = sizeof(struct dst_gpio_packet) },
+		{ .addr = DST_IG_ADDR, .flags = 0, .buf = (u8*)(&bits), .len = sizeof(struct dst_gpio_packet) } };
+	int err;
+	int msg_cnt;
+
+	enb.cmd = DST_IG_ENABLE;
+	enb.dstg.enb.mask = mask;
+	enb.dstg.enb.enable = enbb;
+	bits.cmd = DST_IG_WRITE;
+	bits.dstg.outp.mask = enbb;
+	bits.dstg.outp.highvals = outhigh;
+
+	/* because complete disabling means no output, no need to do
+	 * output packet */
+	msg_cnt = 2;
+	if (enbb == 0)
+		msg_cnt = 1;
+        if ((err = i2c->xfer (i2c, &msgs[0], msg_cnt)) < 0) {
+		dprintk ("%s: dst_gpio_outb error (err == %i, mask == 0x%02x, enb == 0x%02x, outhigh == 0x%02x)\n", __FUNCTION__, err, mask, enbb, outhigh);
+		return -EREMOTEIO;
+	}
+        return 0;
+}
+
+static int dst_gpio_inb(struct dvb_i2c_bus *i2c, u8 *result)
+{
+	struct dst_gpio_packet rd_packet;
+	struct i2c_msg msg = {
+		.addr = DST_IG_ADDR, .flags = 0, .buf = (u8*)(&rd_packet), .len = sizeof(struct dst_gpio_packet) };
+	int err;
+
+	*result = 0;
+
+	rd_packet.cmd = DST_IG_READ;
+
+        if ((err = i2c->xfer (i2c, &msg, 1)) < 0) {
+		dprintk ("%s: dst_gpio_inb error (err == %i)\n", __FUNCTION__, err);
+		return -EREMOTEIO;
+	}
+	*result = (u8)rd_packet.dstg.rd.value;
+        return 0;
+}
+
+#define DST_I2C_ENABLE	1
+#define DST_8820  	2
+
+static int
+dst_reset8820(struct dvb_i2c_bus *i2c)
+{
+int retval;
+	/* pull 8820 gpio pin low, wait, then release it */
+	// dprintk ("%s: reset 8820\n", __FUNCTION__);
+	retval = dst_gpio_outb(i2c, DST_8820, DST_8820, 0);
+	if (retval < 0)
+		return retval;
+	udelay(10);
+	retval = dst_gpio_outb(i2c, DST_8820, DST_8820, DST_8820);
+	if (retval < 0)
+		return retval;
+	return 0;
+}
+
+static int
+dst_i2c_enable(struct dvb_i2c_bus *i2c)
+{
+int retval;
+	/* pull I2C enable gpio pin low, wait */
+	// dprintk ("%s: i2c enable\n", __FUNCTION__);
+	retval = dst_gpio_outb(i2c, ~0, DST_I2C_ENABLE, 0);
+	if (retval < 0)
+		return retval;
+	// dprintk ("%s: i2c enable delay\n", __FUNCTION__);
+	dvb_delay(33);
+	return 0;
+}
+
+static int
+dst_i2c_disable(struct dvb_i2c_bus *i2c)
+{
+int retval;
+	/* release I2C enable gpio pin, wait */
+	// dprintk ("%s: i2c disable\n", __FUNCTION__);
+	retval = dst_gpio_outb(i2c, ~0, 0, 0);
+	if (retval < 0)
+		return retval;
+	// dprintk ("%s: i2c disable delay\n", __FUNCTION__);
+	dvb_delay(33);
+	return 0;
+}
+
+static int
+dst_wait_dst_ready(struct dvb_i2c_bus *i2c)
+{
+u8 reply;
+int retval;
+int i;
+	for (i = 0; i < 200; i++) {
+		retval = dst_gpio_inb(i2c, &reply);
+		if (retval < 0)
+			return retval;
+		if ((reply & DST_I2C_ENABLE) == 0) {
+			dprintk ("%s: dst wait ready after %d\n", __FUNCTION__, i);
+			return 1;
+		}
+		dvb_delay(5);
+	}
+	dprintk ("%s: dst wait NOT ready after %d\n", __FUNCTION__, i);
+	return 0;
+}
+
+#define DST_I2C_ADDR 0x55
+
+static int write_dst (struct dvb_i2c_bus *i2c, u8 *data, u8 len)
+{
+	struct i2c_msg msg = {
+		.addr = DST_I2C_ADDR, .flags = 0, .buf = data, .len = len };
+	int err;
+	int cnt;
+
+	if (dst_debug && dst_verbose) {
+		u8 i;
+		dprintk("%s writing",__FUNCTION__);
+		for (i = 0 ; i < len ; i++) {
+			dprintk(" 0x%02x", data[i]);
+		}
+		dprintk("\n");
+	}
+	dvb_delay(30);
+	for (cnt = 0; cnt < 4; cnt++) {
+		if ((err = i2c->xfer (i2c, &msg, 1)) < 0) {
+			dprintk ("%s: write_dst error (err == %i, len == 0x%02x, b0 == 0x%02x)\n", __FUNCTION__, err, len, data[0]);
+			dst_i2c_disable(i2c);
+			dvb_delay(500);
+			dst_i2c_enable(i2c);
+			dvb_delay(500);
+			continue;
+		} else
+			break;
+	}
+	if (cnt >= 4)
+		return -EREMOTEIO;
+        return 0;
+}
+
+static int read_dst (struct dvb_i2c_bus *i2c, u8 *ret, u8 len)
+{
+	struct i2c_msg msg = 
+		{ .addr = DST_I2C_ADDR, .flags = I2C_M_RD, .buf = ret, .len = len };
+	int err;
+	int cnt;
+
+	for (cnt = 0; cnt < 4; cnt++) {
+		if ((err = i2c->xfer (i2c, &msg, 1)) < 0) {
+			dprintk ("%s: read_dst error (err == %i, len == 0x%02x, b0 == 0x%02x)\n", __FUNCTION__, err, len, ret[0]);
+			dst_i2c_disable(i2c);
+			dst_i2c_enable(i2c);
+			continue;
+		} else
+			break;
+	}
+	if (cnt >= 4)
+		return -EREMOTEIO;
+	dprintk("%s reply is 0x%x\n", __FUNCTION__, ret[0]);
+	if (dst_debug && dst_verbose) {
+		for (err = 1; err < len; err++)
+			dprintk(" 0x%x", ret[err]);
+		if (err > 1)
+			dprintk("\n");
+	}
+	return 0;
+}
+
+static int dst_set_freq(struct dst_data *dst, u32 freq)
+{
+	u8 *val;
+
+	dst->frequency = freq;
+	freq = freq / 1000;
+	// dprintk("%s: set frequency %u\n", __FUNCTION__, freq);
+	if (freq < 950 || freq > 2150)
+		return -EINVAL;
+	val = &dst->tx_tuna[0];
+	val[2] = (freq >> 8) & 0x7f;
+	val[3] = (u8)freq;
+	val[4] = 1;
+	val[8] &= ~4;
+	if (freq < 1531)
+		val[8] |= 4;
+	return 0;
+}
+
+static int dst_set_inversion (struct dst_data *dst, fe_spectral_inversion_t inversion)
+{
+	u8 *val;
+
+	dst->inversion = inversion;
+
+	val = &dst->tx_tuna[0];
+
+	val[8] &= ~0x80;
+
+	switch (inversion) {
+	case INVERSION_OFF:
+		break;
+	case INVERSION_ON:
+		val[8] |= 0x80;
+		break;
+	case INVERSION_AUTO:
+		break;
+	default:
+		return -EINVAL;
+	}
+	return 0;
+}
+
+
+static int dst_set_fec (struct dst_data *dst, fe_code_rate_t fec)
+{
+	dst->fec = fec;
+	return 0;
+}
+
+static fe_code_rate_t dst_get_fec (struct dst_data *dst)
+{
+	return dst->fec;
+}
+
+static int dst_set_symbolrate (struct dst_data *dst, u32 srate)
+{
+	u8 *val;
+	u32 symcalc;
+	u64 sval;
+
+	dst->symbol_rate = srate;
+
+	// dprintk("%s: set srate %u\n", __FUNCTION__, srate);
+	srate /= 1000;
+	val = &dst->tx_tuna[0];
+
+	if (dst->flags & HAS_CI) {
+		val[5] = (u8)(srate >> 16) & 0x7f;
+		val[6] = (u8)(srate >> 8);
+		val[7] = (u8)srate;
+	} else {
+		sval = srate;
+		sval <<= 20;
+		do_div(sval, 88000);
+	        symcalc = (u32)sval;
+		// dprintk("%s: set symcalc %u\n", __FUNCTION__, symcalc);
+		val[5] = (u8)(symcalc >> 12);
+		val[6] = (u8)(symcalc >> 4);
+		val[7] = (u8)(symcalc << 4);
+	}
+	val[8] &= ~0x20;
+	if (srate > 8000)
+		val[8] |= 0x20;
+	return 0;
+}
+
+
+static u8 dst_check_sum(u8 *buf, u32 len)
+{
+	u32 i;
+	u8  val = 0;
+	if (!len)
+		return 0;
+	for (i = 0; i < len; i++) {
+		val += buf[i];
+	}
+	return ((~val) + 1);
+}
+
+static int dst_check_ci (struct dvb_i2c_bus *i2c)
+{
+	u8 txbuf[8];
+	u8 rxbuf[8];
+	int retval;
+
+	memset(txbuf, 0, sizeof(txbuf));
+	txbuf[1] = 6;
+	txbuf[7] = dst_check_sum (txbuf, 7);
+ 
+	dst_i2c_enable(i2c);
+	dst_reset8820(i2c);
+	retval = write_dst (i2c, txbuf, 8);
+	if (retval < 0) {
+		dst_i2c_disable(i2c);
+		dprintk("%s: write not successful, maybe no card?\n", __FUNCTION__);
+		return retval;
+	}
+	dvb_delay(3);
+	retval = read_dst (i2c, rxbuf, 1);
+	dst_i2c_disable(i2c);
+	if (retval < 0) {
+		dprintk("%s: read not successful, maybe no card?\n", __FUNCTION__);
+		return retval;
+	}
+	if (rxbuf[0] != 0xff) {
+		dprintk("%s: write reply not 0xff, not ci (%02x)\n", __FUNCTION__, rxbuf[0]);
+		return retval;
+	}
+	if (!dst_wait_dst_ready(i2c))
+		return 0;
+	dst_i2c_enable(i2c);
+	retval = read_dst (i2c, rxbuf, 8);
+	dst_i2c_disable(i2c);
+	if (retval < 0) {
+		dprintk("%s: read not successful\n", __FUNCTION__);
+		return retval;
+	}
+	if (rxbuf[7] != dst_check_sum (rxbuf, 7)) {
+		dprintk("%s: checksum failure\n", __FUNCTION__);
+		return retval;
+	}
+	rxbuf[7] = '\0';
+	if (!strncmp(&rxbuf[1], "DST-CI", 6)) {
+		printk("%s: IS DST-CI\n", __FUNCTION__);
+		dst_packsize(i2c);
+		return 1;
+	}
+	printk("%s: IS NOT DST-CI, but %s\n", __FUNCTION__, rxbuf);
+	return 0;
+}
+
+static int dst_command (struct dst_data *dst, struct dvb_i2c_bus *i2c, u8 *data, u8 len)
+
+{
+	int retval;
+	u8 reply;
+	u8 rxbuf[8];
+
+	dst_i2c_enable(i2c);
+	dst_reset8820(i2c);
+	retval = write_dst (i2c, data, len);
+	if (retval < 0) {
+		dst_i2c_disable(i2c);
+		dprintk("%s: write not successful\n", __FUNCTION__);
+		return retval;
+	}
+	dvb_delay(33);
+	retval = read_dst (i2c, &reply, 1);
+	dst_i2c_disable(i2c);
+	if (retval < 0) {
+		dprintk("%s: read verify  not successful\n", __FUNCTION__);
+		return retval;
+	}
+	if (reply != 0xff) {
+		dprintk("%s: write reply not 0xff 0x%02x \n", __FUNCTION__, reply);
+		return 0;
+	}
+	if (len >= 2 && data[0] == 0 && (data[1] == 1 || data[1] == 3))
+		return 0;
+	if (!dst_wait_dst_ready(i2c))
+		return 0;
+	dst_i2c_enable(i2c);
+	retval = read_dst (i2c, rxbuf, 8);
+	dst_i2c_disable(i2c);
+	if (retval < 0) {
+		dprintk("%s: read not successful\n", __FUNCTION__);
+		return 0;
+	}
+	if (rxbuf[7] != dst_check_sum (rxbuf, 7)) {
+		dprintk("%s: checksum failure\n", __FUNCTION__);
+		return 0;
+	}
+	return 0;
+}
+
+/*
+ * line22k0    0x00, 0x09, 0x00, 0xff, 0x01, 0x00, 0x00, 0x00
+ * line22k1    0x00, 0x09, 0x01, 0xff, 0x01, 0x00, 0x00, 0x00
+ * line22k2    0x00, 0x09, 0x02, 0xff, 0x01, 0x00, 0x00, 0x00
+ * tone        0x00, 0x09, 0xff, 0x00, 0x01, 0x00, 0x00, 0x00
+ * data        0x00, 0x09, 0xff, 0x01, 0x01, 0x00, 0x00, 0x00
+ * power_off   0x00, 0x09, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00
+ * power_on    0x00, 0x09, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00
+ * Diseqc 1    0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf0, 0xec
+ * Diseqc 2    0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf4, 0xe8 
+ * Diseqc 3    0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf8, 0xe4 
+ * Diseqc 4    0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xfc, 0xe0 
+ */
+
+static int dst_set_diseqc (struct dst_data *dst, struct dvb_i2c_bus *i2c, u8 *cmd, u8 len)
+{
+	u8 paket[8] =  {0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf0, 0xec };
+
+	if (len == 0 || len > 4)
+		return -EINVAL;
+	memcpy(&paket[3], cmd, len);
+	paket[7] = dst_check_sum (&paket[0], 7);
+	dst_command(dst, i2c, paket, 8);
+	return 0;
+}
+
+static int dst_tone_power_cmd (struct dst_data *dst, struct dvb_i2c_bus *i2c)
+{
+	u8 paket[8] =  {0x00, 0x09, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00};
+
+	if (dst->voltage == SEC_VOLTAGE_OFF) 
+		paket[4] = 0;
+	else
+		paket[4] = 1;
+	if (dst->tone == SEC_TONE_ON)
+		paket[2] = dst->k22;
+	else
+		paket[2] = 0;
+	paket[7] = dst_check_sum (&paket[0], 7);
+	dst_command(dst, i2c, paket, 8);
+	return 0;
+}
+
+static int dst_set_voltage (struct dst_data *dst, struct dvb_i2c_bus *i2c, fe_sec_voltage_t voltage)
+{
+	u8 *val;
+	int need_cmd;
+
+	dst->voltage = voltage;
+
+	need_cmd = 0;
+	val = &dst->tx_tuna[0];
+	val[8] &= ~0x40;
+	switch (voltage) {
+	case SEC_VOLTAGE_13:
+		if ((dst->flags & HAS_POWER) == 0)
+			need_cmd = 1;
+		dst->flags |= HAS_POWER;
+		break;
+	case SEC_VOLTAGE_18:
+		if ((dst->flags & HAS_POWER) == 0)
+			need_cmd = 1;
+		dst->flags |= HAS_POWER;
+		val[8] |= 0x40;
+		break;
+	case SEC_VOLTAGE_OFF:
+		need_cmd = 1;
+		dst->flags &= ~(HAS_POWER|HAS_LOCK|ATTEMPT_TUNE);
+		break;
+	default:
+		return -EINVAL;
+	}
+	if (need_cmd) {
+		dst_tone_power_cmd(dst, i2c);
+	}
+	return 0;
+}
+
+
+static int dst_set_tone (struct dst_data *dst, struct dvb_i2c_bus *i2c, fe_sec_tone_mode_t tone)
+{
+	u8 *val;
+
+	dst->tone = tone;
+
+	val = &dst->tx_tuna[0];
+
+	val[8] &= ~0x1;
+
+	switch (tone) {
+	case SEC_TONE_OFF:
+		break;
+	case SEC_TONE_ON:
+		val[8] |= 1;
+		break;
+	default:
+		return -EINVAL;
+	}
+	dst_tone_power_cmd(dst, i2c);
+	return 0;
+}
+
+static int dst_get_tuna (struct dst_data *dst, struct dvb_i2c_bus *i2c)
+{
+int retval;
+	if ((dst->flags & ATTEMPT_TUNE) == 0)
+		return 0;
+	dst->flags &= ~(HAS_LOCK);
+	if (!dst_wait_dst_ready(i2c))
+		return 0;
+	if (dst->flags & HAS_CI) {
+		/* how to get variable length reply ???? */
+		retval = read_dst (i2c, dst->rx_tuna, 10);
+	} else {
+		retval = read_dst (i2c, &dst->rx_tuna[2], 8);
+	}
+	if (retval < 0) {
+		dprintk("%s: read not successful\n", __FUNCTION__);
+		return 0;
+	}
+	if (dst->flags & HAS_CI) {
+		if (dst->rx_tuna[9] != dst_check_sum (&dst->rx_tuna[0], 9)) {
+			dprintk("%s: checksum failure?\n", __FUNCTION__);
+			return 0;
+		}
+	} else {
+		if (dst->rx_tuna[9] != dst_check_sum (&dst->rx_tuna[2], 7)) {
+			dprintk("%s: checksum failure?\n", __FUNCTION__);
+			return 0;
+		}
+	}
+	if (dst->rx_tuna[2] == 0 && dst->rx_tuna[3] == 0)
+		return 0;
+	dst->decode_freq = ((dst->rx_tuna[2] & 0x7f) << 8) +  dst->rx_tuna[3];
+
+	dst->decode_n1 = (dst->rx_tuna[4] << 8) +  
+			(dst->rx_tuna[5]);
+
+	dst->decode_n2 = (dst->rx_tuna[8] << 8) +  
+			(dst->rx_tuna[7]);
+	dst->flags |= HAS_LOCK;
+	return 1;
+}
+
+static int dst_write_tuna (struct dst_data *dst, struct dvb_i2c_bus *i2c)
+{
+	int retval;
+	u8 reply;
+
+	dprintk("%s: flags 0x%x \n", __FUNCTION__, dst->flags);
+	dst->decode_freq = 0;
+	dst->decode_n1 = 0;
+	dst->decode_n2 = 0;
+	if (!(dst->flags & HAS_POWER))
+		dst_set_voltage (dst, i2c, SEC_VOLTAGE_13);
+
+	dst->flags &= ~(HAS_LOCK|ATTEMPT_TUNE);
+	dst_i2c_enable(i2c);
+	if (dst->flags & HAS_CI) {
+		dst_reset8820(i2c);
+		dst->tx_tuna[9] = dst_check_sum (&dst->tx_tuna[0], 9);
+		retval = write_dst (i2c, &dst->tx_tuna[0], 10);
+	} else {
+		dst->tx_tuna[9] = dst_check_sum (&dst->tx_tuna[2], 7);
+		retval = write_dst (i2c, &dst->tx_tuna[2], 8);
+	}
+	if (retval < 0) {
+		dst_i2c_disable(i2c);
+		dprintk("%s: write not successful\n", __FUNCTION__);
+		return retval;
+	}
+	dvb_delay(3);
+	retval = read_dst (i2c, &reply, 1);
+	dst_i2c_disable(i2c);
+	if (retval < 0) {
+		dprintk("%s: read verify  not successful\n", __FUNCTION__);
+		return retval;
+	}
+	if (reply != 0xff) {
+		dprintk("%s: write reply not 0xff 0x%02x \n", __FUNCTION__, reply);
+		return 0;
+	}
+	dst->flags |= ATTEMPT_TUNE;
+	return dst_get_tuna(dst, i2c);
+}
+
+static void dst_init (struct dst_data *dst, int is_ci, struct dvb_i2c_bus *i2c)
+{
+static u8 ini_ci_tuna[] = {  9, 0, 3, 0xb6, 1, 0,    0x73, 0x21, 0, 0 };
+static u8 ini_fta_tuna[] = { 0, 0, 3, 0xb6, 1, 0x55, 0xbd, 0x50, 0, 0 };
+	memset(dst, 0, sizeof(*dst));
+	dst->frequency = 950000;
+	dst->inversion = INVERSION_ON;
+	dst->voltage = SEC_VOLTAGE_13;
+	dst->tone = SEC_TONE_OFF;
+	dst->symbol_rate = 29473000;
+	dst->fec = FEC_AUTO;
+	dst->flags = (is_ci ? HAS_CI : 0);
+	dst->k22 = 0x02;
+	memcpy(dst->tx_tuna, (is_ci ? ini_ci_tuna : ini_fta_tuna),
+			sizeof(ini_fta_tuna));
+}
+struct lkup {
+	unsigned int cmd;
+	char *desc;
+} looker[] = {
+	{FE_GET_INFO,                "FE_GET_INFO:"},
+	{FE_READ_STATUS,             "FE_READ_STATUS:" },
+	{FE_READ_BER,                "FE_READ_BER:" },
+	{FE_READ_SIGNAL_STRENGTH,    "FE_READ_SIGNAL_STRENGTH:" },
+	{FE_READ_SNR,                "FE_READ_SNR:" },
+	{FE_READ_UNCORRECTED_BLOCKS, "FE_READ_UNCORRECTED_BLOCKS:" },
+	{FE_SET_FRONTEND,            "FE_SET_FRONTEND:" },
+	{FE_GET_FRONTEND,            "FE_GET_FRONTEND:" },
+	{FE_SLEEP,                   "FE_SLEEP:" },
+	{FE_INIT,                    "FE_INIT:" },
+	{FE_RESET,                   "FE_RESET:" },
+	{FE_SET_TONE,                "FE_SET_TONE:" },
+	{FE_SET_VOLTAGE,             "FE_SET_VOLTAGE:" },
+	};
+
+static int dst_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg)
+{
+	struct dvb_i2c_bus *i2c = fe->i2c;
+	struct dst_data *dst = fe->data;
+	int retval;
+	/*
+	char  *cc;
+                
+	cc = "FE_UNSUPP:";
+	for(retval = 0; retval < sizeof(looker) / sizeof(looker[0]); retval++) {
+		if (looker[retval].cmd == cmd) {
+			cc = looker[retval].desc;
+			break;
+		}
+	}
+	dprintk("%s cmd %s (0x%x)\n",__FUNCTION__, cc, cmd);
+	*/
+        switch (cmd) {
+        case FE_GET_INFO:
+		memcpy (arg, &dst_info, sizeof(struct dvb_frontend_info));
+		break;
+
+        case FE_READ_STATUS:
+	{
+		fe_status_t *status = arg;
+
+		*status = 0;
+		if (dst->flags & HAS_LOCK) {
+			*status |= FE_HAS_LOCK | FE_HAS_SIGNAL |FE_HAS_CARRIER|
+				FE_HAS_SYNC|FE_HAS_VITERBI;
+		}
+		/*
+		if (sync & 1)
+			*status |= FE_HAS_SIGNAL;
+
+		if (sync & 2)
+			*status |= FE_HAS_CARRIER;
+
+		if (sync & 4)
+			*status |= FE_HAS_VITERBI;
+
+		if (sync & 8)
+			*status |= FE_HAS_SYNC;
+
+		if ((sync & 0x1f) == 0x1f)
+			*status |= FE_HAS_LOCK;
+		*/
+
+		break;
+	}
+
+        case FE_READ_BER:
+	{
+		/* guess */
+		// *(u32*) arg = dst->decode_n1;
+		*(u32*) arg = 0;
+
+		break;
+	}
+
+        case FE_READ_SIGNAL_STRENGTH:
+	{
+		/* guess */
+		// *((u16*) arg) = (u16)dst->decode_n2;
+		*((u16*) arg) = 0;
+		break;
+	}
+
+        case FE_READ_SNR:
+	{
+		*(u16*) arg = 0;
+		break;
+	}
+
+	case FE_READ_UNCORRECTED_BLOCKS: 
+	{
+		*((u32*) arg) = 0;    /* the stv0299 can't measure BER and */
+		return -EOPNOTSUPP;   /* errors at the same time.... */
+	}
+
+        case FE_SET_FRONTEND:
+        {
+		struct dvb_frontend_parameters *p = arg;
+
+		dst_set_freq (dst, p->frequency);
+		dst_set_inversion (dst, p->inversion);
+		dst_set_fec (dst, p->u.qpsk.fec_inner);
+		dst_set_symbolrate (dst, p->u.qpsk.symbol_rate);
+		dst_write_tuna (dst, i2c);
+
+                break;
+        }
+
+	case FE_GET_FRONTEND:
+	{
+		struct dvb_frontend_parameters *p = arg;
+
+
+		p->frequency = dst->decode_freq;
+		p->inversion = dst->inversion;
+		p->u.qpsk.symbol_rate = dst->symbol_rate;
+		p->u.qpsk.fec_inner = dst_get_fec (dst);
+		break;
+	}
+
+        case FE_SLEEP:
+		return 0;
+
+        case FE_INIT:
+		dst_init (dst, dst->flags & HAS_CI, i2c);
+		break;
+
+	case FE_RESET:
+		break;
+
+	case FE_DISEQC_SEND_MASTER_CMD:
+	{
+		struct dvb_diseqc_master_cmd *cmd = (struct dvb_diseqc_master_cmd *)arg;
+		retval = dst_set_diseqc (dst, i2c, cmd->msg, cmd->msg_len);
+		if (retval < 0)
+			return retval;
+		break;
+	}
+	case FE_SET_TONE:
+		retval = dst_set_tone (dst, i2c, (fe_sec_tone_mode_t) arg);
+		if (retval < 0)
+			return retval;
+		break;
+	case FE_SET_VOLTAGE:
+		retval = dst_set_voltage (dst, i2c, (fe_sec_voltage_t) arg);
+		if (retval < 0)
+			return retval;
+		break;
+	default:
+		return -EOPNOTSUPP;
+        };
+        
+        return 0;
+} 
+
+
+static int dst_attach (struct dvb_i2c_bus *i2c, void **data)
+{
+	int is_ci;
+	static struct dst_data sdst;
+	struct dst_data *dst;
+
+	dprintk("%s: check ci\n", __FUNCTION__);
+	is_ci = dst_check_ci (i2c);
+	if (is_ci < 0)
+		return -ENODEV;
+#if 0
+	dst = kmalloc(sizeof(struct dst_data), GFP_KERNEL);
+	if (dst == NULL) {
+		printk(KERN_INFO "%s: Out of memory.\n", __FUNCTION__);
+		return -ENOMEM;
+	}
+#else
+	dst = &sdst;
+#endif
+	dst_init (dst, is_ci, i2c);
+
+	dvb_register_frontend (dst_ioctl, i2c, dst, &dst_info);
+
+	return 0;
+}
+
+static void dst_detach (struct dvb_i2c_bus *i2c, void *data)
+{
+	/* kfree dst at this point ???? */
+	dvb_unregister_frontend (dst_ioctl, i2c);
+}
+
+
+static int __init init_dst (void)
+{
+	return dvb_register_i2c_device (THIS_MODULE, dst_attach, dst_detach);
+}
+
+
+static void __exit exit_dst (void)
+{
+	dvb_unregister_i2c_device (dst_attach);
+}
+
+
+module_init(init_dst);
+module_exit(exit_dst);
+
+MODULE_DESCRIPTION("DST DVB-S Frontend");
+MODULE_AUTHOR("Jamie Honan");
+MODULE_LICENSE("GPL");
+