diff options
| author | Michael Hunold <devnull@localhost> | 2003-05-19 17:33:06 +0000 |
|---|---|---|
| committer | Michael Hunold <devnull@localhost> | 2003-05-19 17:33:06 +0000 |
| commit | 1b96056da548c2823012c52a69e671310ff3445b (patch) | |
| tree | bdacde53ad08265b7713e75f44d2fba881f08591 /linux/drivers/media/dvb/ttpci/budget-patch.c | |
| parent | 78fccbe2a473cdf42a87d98fedaa89f4880da05d (diff) | |
| download | mediapointer-dvb-s2-1b96056da548c2823012c52a69e671310ff3445b.tar.gz mediapointer-dvb-s2-1b96056da548c2823012c52a69e671310ff3445b.tar.bz2 | |
First try to use pci_consistent_dma() throughout the whole saa7146
driver subsystem.
Diffstat (limited to 'linux/drivers/media/dvb/ttpci/budget-patch.c')
| -rw-r--r-- | linux/drivers/media/dvb/ttpci/budget-patch.c | 29 |
1 files changed, 16 insertions, 13 deletions
diff --git a/linux/drivers/media/dvb/ttpci/budget-patch.c b/linux/drivers/media/dvb/ttpci/budget-patch.c index 1ef2e1022..90ec7afbc 100644 --- a/linux/drivers/media/dvb/ttpci/budget-patch.c +++ b/linux/drivers/media/dvb/ttpci/budget-patch.c @@ -194,31 +194,34 @@ int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_extension_d ** (74HCT4040, LVC74) for the generation of this VSYNC signal, ** which seems that can be done perfectly without this :-)). */ + +#define WRITE_RPS1(x) dev->d_rps1.cpu_addr[ cnt++ ] = cpu_to_le32(x) + cnt = 0; // Setup RPS1 "program" (p35) // Wait reset Source Line Counter Threshold (p36) - dev->rps1[cnt++]=cpu_to_le32(CMD_PAUSE | RPS_INV | EVT_HS); + WRITE_RPS1(cpu_to_le32(CMD_PAUSE | RPS_INV | EVT_HS)); // Wait Source Line Counter Threshold (p36) - dev->rps1[cnt++]=cpu_to_le32(CMD_PAUSE | EVT_HS); + WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_HS)); // Set GPIO3=1 (p42) - dev->rps1[cnt++]=cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)); - dev->rps1[cnt++]=cpu_to_le32(GPIO3_MSK); - dev->rps1[cnt++]=cpu_to_le32(SAA7146_GPIO_OUTHI<<24); + WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2))); + WRITE_RPS1(cpu_to_le32(GPIO3_MSK)); + WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTHI<<24)); // Wait reset Source Line Counter Threshold (p36) - dev->rps1[cnt++]=cpu_to_le32(CMD_PAUSE | RPS_INV | EVT_HS); + WRITE_RPS1(cpu_to_le32(CMD_PAUSE | RPS_INV | EVT_HS)); // Wait Source Line Counter Threshold - dev->rps1[cnt++]=cpu_to_le32(CMD_PAUSE | EVT_HS); + WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_HS)); // Set GPIO3=0 (p42) - dev->rps1[cnt++]=cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)); - dev->rps1[cnt++]=cpu_to_le32(GPIO3_MSK); - dev->rps1[cnt++]=cpu_to_le32(SAA7146_GPIO_OUTLO<<24); + WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2))); + WRITE_RPS1(cpu_to_le32(GPIO3_MSK)); + WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24)); // Jump to begin of RPS program (p37) - dev->rps1[cnt++]=cpu_to_le32(CMD_JUMP); - dev->rps1[cnt++]=cpu_to_le32(virt_to_bus(&dev->rps1[0])); + WRITE_RPS1(cpu_to_le32(CMD_JUMP)); + WRITE_RPS1(cpu_to_le32(dev->d_rps1.dma_handle)); // Fix VSYNC level saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO); // Set RPS1 Address register to point to RPS code (r108 p42) - saa7146_write(dev, RPS_ADDR1, virt_to_bus(&dev->rps1[0])); + saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle); // Set Source Line Counter Threshold, using BRS (rCC p43) saa7146_write(dev, RPS_THRESH1, ((TS_HEIGHT/2) | MASK_12)); // Enable RPS1 (rFC p33) |