summaryrefslogtreecommitdiff
path: root/linux/drivers/media/dvb
diff options
context:
space:
mode:
authorMichael Hunold <devnull@localhost>2003-06-25 08:51:07 +0000
committerMichael Hunold <devnull@localhost>2003-06-25 08:51:07 +0000
commit473cad3c33ab4d59e1a2a47bf805274699e6c6ad (patch)
tree78a9cb2d56ca149c3d94a6f5dfc0b936fe52997c /linux/drivers/media/dvb
parent437d4fd4b8844edaaa924dd0d8630c15e0a004c7 (diff)
downloadmediapointer-dvb-s2-473cad3c33ab4d59e1a2a47bf805274699e6c6ad.tar.gz
mediapointer-dvb-s2-473cad3c33ab4d59e1a2a47bf805274699e6c6ad.tar.bz2
- follow kernel coding style, mostly indentation fixes, don't put static
on a separate line, use "real" tab - get rid of "mt312_reg_addr_t" use "enum mt312_reg_addr" instead I know this is annoying, but I get bashed regularly on lkml because of the coding style some of our files have.
Diffstat (limited to 'linux/drivers/media/dvb')
-rw-r--r--linux/drivers/media/dvb/frontends/mt312.c207
-rw-r--r--linux/drivers/media/dvb/frontends/mt312.h264
2 files changed, 237 insertions, 234 deletions
diff --git a/linux/drivers/media/dvb/frontends/mt312.c b/linux/drivers/media/dvb/frontends/mt312.c
index 9ea6c2ccd..6033a879c 100644
--- a/linux/drivers/media/dvb/frontends/mt312.c
+++ b/linux/drivers/media/dvb/frontends/mt312.c
@@ -46,20 +46,21 @@ static struct dvb_frontend_info mt312_info = {
.frequency_min = 950000,
.frequency_max = 2150000,
.frequency_stepsize = (MT312_PLL_CLK / 1000) / 128,
- /*.frequency_tolerance = 29500, FIXME: binary compatibility waste? */
+ /*.frequency_tolerance = 29500, FIXME: binary compatibility waste? */
.symbol_rate_min = MT312_SYS_CLK / 128,
.symbol_rate_max = MT312_SYS_CLK / 2,
- /*.symbol_rate_tolerance = 500, FIXME: binary compatibility waste? 2% */
+ /*.symbol_rate_tolerance = 500, FIXME: binary compatibility waste? 2% */
.notifier_delay = 0,
- .caps = FE_CAN_INVERSION_AUTO |
- FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
- FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
- FE_CAN_QPSK | FE_CAN_RECOVER | FE_CAN_CLEAN_SETUP |
- FE_CAN_MUTE_TS
+ .caps =
+ FE_CAN_INVERSION_AUTO | FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 |
+ FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 |
+ FE_CAN_FEC_AUTO | FE_CAN_QPSK | FE_CAN_RECOVER |
+ FE_CAN_CLEAN_SETUP | FE_CAN_MUTE_TS
};
-static
-int mt312_read(struct dvb_i2c_bus *i2c, const mt312_reg_addr_t reg, void *buf, const size_t count)
+static int mt312_read(struct dvb_i2c_bus *i2c,
+ const enum mt312_reg_addr reg, void *buf,
+ const size_t count)
{
int ret;
struct i2c_msg msg[2];
@@ -80,13 +81,12 @@ int mt312_read(struct dvb_i2c_bus *i2c, const mt312_reg_addr_t reg, void *buf, c
printk(KERN_ERR "%s: ret == %d\n", __FUNCTION__, ret);
return -EREMOTEIO;
}
-
#ifdef MT312_DEBUG
{
int i;
printk(KERN_INFO "R(%d):", reg & 0x7f);
for (i = 0; i < count; i++)
- printk(" %02x", ((const u8 *)buf)[i]);
+ printk(" %02x", ((const u8 *) buf)[i]);
printk("\n");
}
#endif
@@ -94,8 +94,9 @@ int mt312_read(struct dvb_i2c_bus *i2c, const mt312_reg_addr_t reg, void *buf, c
return 0;
}
-static
-int mt312_write(struct dvb_i2c_bus *i2c, const mt312_reg_addr_t reg, const void *src, const size_t count)
+static int mt312_write(struct dvb_i2c_bus *i2c,
+ const enum mt312_reg_addr reg, const void *src,
+ const size_t count)
{
int ret;
u8 buf[count + 1];
@@ -106,7 +107,7 @@ int mt312_write(struct dvb_i2c_bus *i2c, const mt312_reg_addr_t reg, const void
int i;
printk(KERN_INFO "W(%d):", reg & 0x7f);
for (i = 0; i < count; i++)
- printk(" %02x", ((const u8 *)src)[i]);
+ printk(" %02x", ((const u8 *) src)[i]);
printk("\n");
}
#endif
@@ -129,20 +130,20 @@ int mt312_write(struct dvb_i2c_bus *i2c, const mt312_reg_addr_t reg, const void
return 0;
}
-static inline
-int mt312_readreg(struct dvb_i2c_bus *i2c, const mt312_reg_addr_t reg, u8 *val)
+static inline int mt312_readreg(struct dvb_i2c_bus *i2c,
+ const enum mt312_reg_addr reg, u8 * val)
{
return mt312_read(i2c, reg, val, 1);
}
-static inline
-int mt312_writereg(struct dvb_i2c_bus *i2c, const mt312_reg_addr_t reg, const u8 val)
+static inline int mt312_writereg(struct dvb_i2c_bus *i2c,
+ const enum mt312_reg_addr reg, const u8 val)
{
return mt312_write(i2c, reg, &val, 1);
}
-static
-int mt312_pll_write(struct dvb_i2c_bus *i2c, const u8 addr, u8 *buf, const u8 len)
+static int mt312_pll_write(struct dvb_i2c_bus *i2c, const u8 addr,
+ u8 * buf, const u8 len)
{
int ret;
struct i2c_msg msg;
@@ -164,14 +165,12 @@ int mt312_pll_write(struct dvb_i2c_bus *i2c, const u8 addr, u8 *buf, const u8 le
return 0;
}
-static inline
-u32 mt312_div(u32 a, u32 b)
+static inline u32 mt312_div(u32 a, u32 b)
{
return (a + (b / 2)) / b;
}
-static
-int sl1935_set_tv_freq(struct dvb_i2c_bus *i2c, u32 freq, u32 sr)
+static int sl1935_set_tv_freq(struct dvb_i2c_bus *i2c, u32 freq, u32 sr)
{
/* 155 uA, Baseband Path B */
u8 buf[4] = { 0x00, 0x00, 0x80, 0x00 };
@@ -180,17 +179,15 @@ int sl1935_set_tv_freq(struct dvb_i2c_bus *i2c, u32 freq, u32 sr)
u32 ref;
u32 div;
- if (sr < 10000000) { /* 1-10 MSym/s: ratio 2 ^ 3 */
+ if (sr < 10000000) { /* 1-10 MSym/s: ratio 2 ^ 3 */
exp = 3;
- buf[2] |= 0x40; /* 690 uA */
- }
- else if (sr < 15000000) { /* 10-15 MSym/s: ratio 2 ^ 4 */
+ buf[2] |= 0x40; /* 690 uA */
+ } else if (sr < 15000000) { /* 10-15 MSym/s: ratio 2 ^ 4 */
exp = 4;
- buf[2] |= 0x20; /* 330 uA */
- }
- else { /* 15-45 MSym/s: ratio 2 ^ 7 */
+ buf[2] |= 0x20; /* 330 uA */
+ } else { /* 15-45 MSym/s: ratio 2 ^ 7 */
exp = 7;
- buf[3] |= 0x08; /* Baseband Path A */
+ buf[3] |= 0x08; /* Baseband Path A */
}
div = mt312_div(MT312_PLL_CLK, 1 << exp);
@@ -204,19 +201,18 @@ int sl1935_set_tv_freq(struct dvb_i2c_bus *i2c, u32 freq, u32 sr)
if (freq < 1550000)
buf[3] |= 0x10;
- printk(KERN_INFO "synth dword = %02x%02x%02x%02x\n", buf[0], buf[1], buf[2], buf[3]);
+ printk(KERN_INFO "synth dword = %02x%02x%02x%02x\n", buf[0],
+ buf[1], buf[2], buf[3]);
return mt312_pll_write(i2c, I2C_ADDR_SL1935, buf, sizeof(buf));
}
-static
-int mt312_reset(struct dvb_i2c_bus *i2c, const u8 full)
+static int mt312_reset(struct dvb_i2c_bus *i2c, const u8 full)
{
return mt312_writereg(i2c, RESET, full ? 0x80 : 0x40);
}
-static
-int mt312_init(struct dvb_i2c_bus *i2c)
+static int mt312_init(struct dvb_i2c_bus *i2c)
{
int ret;
u8 buf[2];
@@ -257,8 +253,8 @@ int mt312_init(struct dvb_i2c_bus *i2c)
return 0;
}
-static
-int mt312_send_master_cmd(struct dvb_i2c_bus *i2c, const struct dvb_diseqc_master_cmd *c)
+static int mt312_send_master_cmd(struct dvb_i2c_bus *i2c,
+ const struct dvb_diseqc_master_cmd *c)
{
int ret;
u8 diseqc_mode;
@@ -269,29 +265,33 @@ int mt312_send_master_cmd(struct dvb_i2c_bus *i2c, const struct dvb_diseqc_maste
if ((ret = mt312_readreg(i2c, DISEQC_MODE, &diseqc_mode)) < 0)
return ret;
- if ((ret = mt312_write(i2c, (0x80 | DISEQC_INSTR), c->msg, c->msg_len)) < 0)
+ if ((ret =
+ mt312_write(i2c, (0x80 | DISEQC_INSTR), c->msg, c->msg_len)) < 0)
return ret;
- if ((ret = mt312_writereg(i2c, DISEQC_MODE, (diseqc_mode & 0x40) | ((c->msg_len - 1) << 3) | 0x04)) < 0)
+ if ((ret =
+ mt312_writereg(i2c, DISEQC_MODE,
+ (diseqc_mode & 0x40) | ((c->msg_len - 1) << 3)
+ | 0x04)) < 0)
return ret;
/* set DISEQC_MODE[2:0] to zero if a return message is expected */
if (c->msg[0] & 0x02)
- if ((ret = mt312_writereg(i2c, DISEQC_MODE, (diseqc_mode & 0x40))) < 0)
+ if ((ret =
+ mt312_writereg(i2c, DISEQC_MODE, (diseqc_mode & 0x40))) < 0)
return ret;
return 0;
}
-static
-int mt312_recv_slave_reply(struct dvb_i2c_bus *i2c, struct dvb_diseqc_slave_reply *r)
+static int mt312_recv_slave_reply(struct dvb_i2c_bus *i2c,
+ struct dvb_diseqc_slave_reply *r)
{
/* TODO */
return -EOPNOTSUPP;
}
-static
-int mt312_send_burst(struct dvb_i2c_bus *i2c, const fe_sec_mini_cmd_t c)
+static int mt312_send_burst(struct dvb_i2c_bus *i2c, const fe_sec_mini_cmd_t c)
{
const u8 mini_tab[2] = { 0x02, 0x03 };
@@ -304,14 +304,15 @@ int mt312_send_burst(struct dvb_i2c_bus *i2c, const fe_sec_mini_cmd_t c)
if ((ret = mt312_readreg(i2c, DISEQC_MODE, &diseqc_mode)) < 0)
return ret;
- if ((ret = mt312_writereg(i2c, DISEQC_MODE, (diseqc_mode & 0x40) | mini_tab[c])) < 0)
+ if ((ret =
+ mt312_writereg(i2c, DISEQC_MODE,
+ (diseqc_mode & 0x40) | mini_tab[c])) < 0)
return ret;
return 0;
}
-static
-int mt312_set_tone(struct dvb_i2c_bus *i2c, const fe_sec_tone_mode_t t)
+static int mt312_set_tone(struct dvb_i2c_bus *i2c, const fe_sec_tone_mode_t t)
{
const u8 tone_tab[2] = { 0x01, 0x00 };
@@ -324,14 +325,15 @@ int mt312_set_tone(struct dvb_i2c_bus *i2c, const fe_sec_tone_mode_t t)
if ((ret = mt312_readreg(i2c, DISEQC_MODE, &diseqc_mode)) < 0)
return ret;
- if ((ret = mt312_writereg(i2c, DISEQC_MODE, (diseqc_mode & 0x40) | tone_tab[t])) < 0)
+ if ((ret =
+ mt312_writereg(i2c, DISEQC_MODE,
+ (diseqc_mode & 0x40) | tone_tab[t])) < 0)
return ret;
return 0;
}
-static
-int mt312_set_voltage(struct dvb_i2c_bus *i2c, const fe_sec_voltage_t v)
+static int mt312_set_voltage(struct dvb_i2c_bus *i2c, const fe_sec_voltage_t v)
{
const u8 volt_tab[3] = { 0x00, 0x40, 0x00 };
@@ -341,8 +343,7 @@ int mt312_set_voltage(struct dvb_i2c_bus *i2c, const fe_sec_voltage_t v)
return mt312_writereg(i2c, DISEQC_MODE, volt_tab[v]);
}
-static
-int mt312_read_status(struct dvb_i2c_bus *i2c, fe_status_t *s)
+static int mt312_read_status(struct dvb_i2c_bus *i2c, fe_status_t * s)
{
int ret;
u8 status[3];
@@ -366,8 +367,7 @@ int mt312_read_status(struct dvb_i2c_bus *i2c, fe_status_t *s)
return 0;
}
-static
-int mt312_read_bercnt(struct dvb_i2c_bus *i2c, u32 *ber)
+static int mt312_read_bercnt(struct dvb_i2c_bus *i2c, u32 * ber)
{
int ret;
u8 buf[3];
@@ -380,8 +380,7 @@ int mt312_read_bercnt(struct dvb_i2c_bus *i2c, u32 *ber)
return 0;
}
-static
-int mt312_read_agc(struct dvb_i2c_bus *i2c, u16 *signal_strength)
+static int mt312_read_agc(struct dvb_i2c_bus *i2c, u16 * signal_strength)
{
int ret;
u8 buf[3];
@@ -392,7 +391,7 @@ int mt312_read_agc(struct dvb_i2c_bus *i2c, u16 *signal_strength)
return ret;
agc = (buf[0] << 6) | (buf[1] >> 2);
- err_db = (s16)(((buf[1] & 0x03) << 14) | buf[2] << 6) >> 6;
+ err_db = (s16) (((buf[1] & 0x03) << 14) | buf[2] << 6) >> 6;
*signal_strength = agc;
@@ -401,8 +400,7 @@ int mt312_read_agc(struct dvb_i2c_bus *i2c, u16 *signal_strength)
return 0;
}
-static
-int mt312_read_snr(struct dvb_i2c_bus *i2c, u16 *snr)
+static int mt312_read_snr(struct dvb_i2c_bus *i2c, u16 * snr)
{
int ret;
u8 buf[2];
@@ -415,8 +413,7 @@ int mt312_read_snr(struct dvb_i2c_bus *i2c, u16 *snr)
return 0;
}
-static
-int mt312_read_ubc(struct dvb_i2c_bus *i2c, u32 *ubc)
+static int mt312_read_ubc(struct dvb_i2c_bus *i2c, u32 * ubc)
{
int ret;
u8 buf[2];
@@ -429,32 +426,39 @@ int mt312_read_ubc(struct dvb_i2c_bus *i2c, u32 *ubc)
return 0;
}
-static
-int mt312_set_frontend(struct dvb_i2c_bus *i2c, const struct dvb_frontend_parameters *p)
+static int mt312_set_frontend(struct dvb_i2c_bus *i2c,
+ const struct dvb_frontend_parameters *p)
{
int ret;
u8 buf[5];
u16 sr;
- const u8 fec_tab[10] = { 0x00, 0x01, 0x02, 0x04, 0x3f, 0x08, 0x10, 0x20, 0x3f, 0x3f };
+ const u8 fec_tab[10] =
+ { 0x00, 0x01, 0x02, 0x04, 0x3f, 0x08, 0x10, 0x20, 0x3f, 0x3f };
const u8 inv_tab[3] = { 0x00, 0x40, 0x80 };
- if ((p->frequency < mt312_info.frequency_min) || (p->frequency > mt312_info.frequency_max))
+ if ((p->frequency < mt312_info.frequency_min)
+ || (p->frequency > mt312_info.frequency_max))
return -EINVAL;
- if ((p->inversion < INVERSION_OFF) || (p->inversion > INVERSION_AUTO))
+ if ((p->inversion < INVERSION_OFF)
+ || (p->inversion > INVERSION_AUTO))
return -EINVAL;
- if ((p->u.qpsk.symbol_rate < mt312_info.symbol_rate_min) || (p->u.qpsk.symbol_rate > mt312_info.symbol_rate_max))
+ if ((p->u.qpsk.symbol_rate < mt312_info.symbol_rate_min)
+ || (p->u.qpsk.symbol_rate > mt312_info.symbol_rate_max))
return -EINVAL;
- if ((p->u.qpsk.fec_inner < FEC_NONE) || (p->u.qpsk.fec_inner > FEC_AUTO))
+ if ((p->u.qpsk.fec_inner < FEC_NONE)
+ || (p->u.qpsk.fec_inner > FEC_AUTO))
return -EINVAL;
- if ((p->u.qpsk.fec_inner == FEC_4_5) || (p->u.qpsk.fec_inner == FEC_8_9))
+ if ((p->u.qpsk.fec_inner == FEC_4_5)
+ || (p->u.qpsk.fec_inner == FEC_8_9))
return -EINVAL;
- if ((ret = sl1935_set_tv_freq(i2c, p->frequency, p->u.qpsk.symbol_rate)) < 0)
+ if ((ret =
+ sl1935_set_tv_freq(i2c, p->frequency, p->u.qpsk.symbol_rate)) < 0)
return ret;
/* sr = (u16)(sr * 256.0 / 1000000.0) */
@@ -471,7 +475,7 @@ int mt312_set_frontend(struct dvb_i2c_bus *i2c, const struct dvb_frontend_parame
buf[3] = 0x40; /* swap I and Q before QPSK demodulation */
if (p->u.qpsk.symbol_rate < 10000000)
- buf[3] |= 0x04; /* use afc mode */
+ buf[3] |= 0x04; /* use afc mode */
/* GO */
buf[4] = 0x01;
@@ -482,8 +486,8 @@ int mt312_set_frontend(struct dvb_i2c_bus *i2c, const struct dvb_frontend_parame
return 0;
}
-static
-int mt312_get_inversion(struct dvb_i2c_bus *i2c, fe_spectral_inversion_t *i)
+static int mt312_get_inversion(struct dvb_i2c_bus *i2c,
+ fe_spectral_inversion_t * i)
{
int ret;
u8 vit_mode;
@@ -491,14 +495,13 @@ int mt312_get_inversion(struct dvb_i2c_bus *i2c, fe_spectral_inversion_t *i)
if ((ret = mt312_readreg(i2c, VIT_MODE, &vit_mode)) < 0)
return ret;
- if (vit_mode & 0x80) /* auto inversion was used */
+ if (vit_mode & 0x80) /* auto inversion was used */
*i = (vit_mode & 0x40) ? INVERSION_ON : INVERSION_OFF;
return 0;
}
-static
-int mt312_get_symbol_rate(struct dvb_i2c_bus *i2c, u32 *sr)
+static int mt312_get_symbol_rate(struct dvb_i2c_bus *i2c, u32 * sr)
{
int ret;
u8 sym_rate_h;
@@ -519,9 +522,9 @@ int mt312_get_symbol_rate(struct dvb_i2c_bus *i2c, u32 *sr)
monitor = (buf[0] << 8) | buf[1];
- printk(KERN_DEBUG "sr(auto) = %u\n", mt312_div(monitor * 15625, 4));
- }
- else {
+ printk(KERN_DEBUG "sr(auto) = %u\n",
+ mt312_div(monitor * 15625, 4));
+ } else {
if ((ret = mt312_writereg(i2c, MON_CTRL, 0x05)) < 0)
return ret;
@@ -535,18 +538,23 @@ int mt312_get_symbol_rate(struct dvb_i2c_bus *i2c, u32 *sr)
sym_rat_op = (buf[0] << 8) | buf[1];
- printk(KERN_DEBUG "sym_rat_op=%d dec_ratio=%d\n", sym_rat_op, dec_ratio);
- printk(KERN_DEBUG "*sr(manual) = %lu\n", (((MT312_PLL_CLK * 8192) / (sym_rat_op + 8192)) * 2) - dec_ratio);
+ printk(KERN_DEBUG "sym_rat_op=%d dec_ratio=%d\n",
+ sym_rat_op, dec_ratio);
+ printk(KERN_DEBUG "*sr(manual) = %lu\n",
+ (((MT312_PLL_CLK * 8192) / (sym_rat_op + 8192)) *
+ 2) - dec_ratio);
}
return 0;
}
-static
-int mt312_get_code_rate(struct dvb_i2c_bus *i2c, fe_code_rate_t *cr)
+static int mt312_get_code_rate(struct dvb_i2c_bus *i2c, fe_code_rate_t * cr)
{
const fe_code_rate_t fec_tab[8] =
- { FEC_1_2, FEC_2_3, FEC_3_4, FEC_5_6, FEC_6_7, FEC_7_8, FEC_AUTO, FEC_AUTO };
+ { FEC_1_2, FEC_2_3, FEC_3_4, FEC_5_6, FEC_6_7, FEC_7_8,
+ FEC_AUTO,
+ FEC_AUTO
+ };
int ret;
u8 fec_status;
@@ -559,8 +567,8 @@ int mt312_get_code_rate(struct dvb_i2c_bus *i2c, fe_code_rate_t *cr)
return 0;
}
-static
-int mt312_get_frontend(struct dvb_i2c_bus *i2c, struct dvb_frontend_parameters *p)
+static int mt312_get_frontend(struct dvb_i2c_bus *i2c,
+ struct dvb_frontend_parameters *p)
{
int ret;
@@ -576,8 +584,7 @@ int mt312_get_frontend(struct dvb_i2c_bus *i2c, struct dvb_frontend_parameters *
return 0;
}
-static
-int mt312_sleep(struct dvb_i2c_bus *i2c)
+static int mt312_sleep(struct dvb_i2c_bus *i2c)
{
int ret;
u8 config;
@@ -596,8 +603,7 @@ int mt312_sleep(struct dvb_i2c_bus *i2c)
return 0;
}
-static
-int mt312_ioctl(struct dvb_frontend *fe, unsigned int cmd, void *arg)
+static int mt312_ioctl(struct dvb_frontend *fe, unsigned int cmd, void *arg)
{
struct dvb_i2c_bus *i2c = fe->i2c;
@@ -613,7 +619,7 @@ int mt312_ioctl(struct dvb_frontend *fe, unsigned int cmd, void *arg)
return mt312_send_master_cmd(i2c, arg);
case FE_DISEQC_RECV_SLAVE_REPLY:
- if ((long)fe->data == ID_MT312)
+ if ((long) fe->data == ID_MT312)
return mt312_recv_slave_reply(i2c, arg);
else
return -EOPNOTSUPP;
@@ -670,8 +676,7 @@ int mt312_ioctl(struct dvb_frontend *fe, unsigned int cmd, void *arg)
return 0;
}
-static
-int mt312_attach(struct dvb_i2c_bus *i2c)
+static int mt312_attach(struct dvb_i2c_bus *i2c)
{
int ret;
u8 id;
@@ -682,23 +687,21 @@ int mt312_attach(struct dvb_i2c_bus *i2c)
if ((id != ID_VP310) && (id != ID_MT312))
return -ENODEV;
- return dvb_register_frontend(mt312_ioctl, i2c, (void *)(long)id, &mt312_info);
+ return dvb_register_frontend(mt312_ioctl, i2c, (void *) (long) id,
+ &mt312_info);
}
-static
-void mt312_detach(struct dvb_i2c_bus *i2c)
+static void mt312_detach(struct dvb_i2c_bus *i2c)
{
dvb_unregister_frontend(mt312_ioctl, i2c);
}
-static
-int __init mt312_module_init(void)
+static int __init mt312_module_init(void)
{
return dvb_register_i2c_device(THIS_MODULE, mt312_attach, mt312_detach);
}
-static
-void __exit mt312_module_exit(void)
+static void __exit mt312_module_exit(void)
{
dvb_unregister_i2c_device(mt312_attach);
}
diff --git a/linux/drivers/media/dvb/frontends/mt312.h b/linux/drivers/media/dvb/frontends/mt312.h
index 46e8c501d..a0d0b153e 100644
--- a/linux/drivers/media/dvb/frontends/mt312.h
+++ b/linux/drivers/media/dvb/frontends/mt312.h
@@ -24,139 +24,139 @@
#define _DVB_FRONTENDS_MT312
typedef enum mt312_reg_addr {
- QPSK_INT_H = 0,
- QPSK_INT_M = 1,
- QPSK_INT_L = 2,
- FEC_INT = 3,
- QPSK_STAT_H = 4,
- QPSK_STAT_L = 5,
- FEC_STATUS = 6,
- LNB_FREQ_H = 7,
- LNB_FREQ_L = 8,
- M_SNR_H = 9,
- M_SNR_L = 10,
- VIT_ERRCNT_H = 11,
- VIT_ERRCNT_M = 12,
- VIT_ERRCNT_L = 13,
- RS_BERCNT_H = 14,
- RS_BERCNT_M = 15,
- RS_BERCNT_L = 16,
- RS_UBC_H = 17,
- RS_UBC_L = 18,
- SIG_LEVEL = 19,
- GPP_CTRL = 20,
- RESET = 21,
- DISEQC_MODE = 22,
- SYM_RATE_H = 23,
- SYM_RATE_L = 24,
- VIT_MODE = 25,
- QPSK_CTRL = 26,
- GO = 27,
- IE_QPSK_H = 28,
- IE_QPSK_M = 29,
- IE_QPSK_L = 30,
- IE_FEC = 31,
- QPSK_STAT_EN = 32,
- FEC_STAT_EN = 33,
- SYS_CLK = 34,
- DISEQC_RATIO = 35,
- DISEQC_INSTR = 36,
- FR_LIM = 37,
- FR_OFF = 38,
- AGC_CTRL = 39,
- AGC_INIT = 40,
- AGC_REF = 41,
- AGC_MAX = 42,
- AGC_MIN = 43,
- AGC_LK_TH = 44,
- TS_AGC_LK_TH = 45,
- AGC_PWR_SET = 46,
- QPSK_MISC = 47,
- SNR_THS_LOW = 48,
- SNR_THS_HIGH = 49,
- TS_SW_RATE = 50,
- TS_SW_LIM_L = 51,
- TS_SW_LIM_H = 52,
- CS_SW_RATE_1 = 53,
- CS_SW_RATE_2 = 54,
- CS_SW_RATE_3 = 55,
- CS_SW_RATE_4 = 56,
- CS_SW_LIM = 57,
- TS_LPK = 58,
- TS_LPK_M = 59,
- TS_LPK_L = 60,
- CS_KPROP_H = 61,
- CS_KPROP_L = 62,
- CS_KINT_H = 63,
- CS_KINT_L = 64,
- QPSK_SCALE = 65,
- TLD_OUTCLK_TH = 66,
- TLD_INCLK_TH = 67,
- FLD_TH = 68,
- PLD_OUTLK3 = 69,
- PLD_OUTLK2 = 70,
- PLD_OUTLK1 = 71,
- PLD_OUTLK0 = 72,
- PLD_INLK3 = 73,
- PLD_INLK2 = 74,
- PLD_INLK1 = 75,
- PLD_INLK0 = 76,
- PLD_ACC_TIME = 77,
- SWEEP_PAR = 78,
- STARTUP_TIME = 79,
- LOSSLOCK_TH = 80,
- FEC_LOCK_TM = 81,
- LOSSLOCK_TM = 82,
- VIT_ERRPER_H = 83,
- VIT_ERRPER_M = 84,
- VIT_ERRPER_L = 85,
- VIT_SETUP = 86,
- VIT_REF0 = 87,
- VIT_REF1 = 88,
- VIT_REF2 = 89,
- VIT_REF3 = 90,
- VIT_REF4 = 91,
- VIT_REF5 = 92,
- VIT_REF6 = 93,
- VIT_MAXERR = 94,
- BA_SETUPT = 95,
- OP_CTRL = 96,
- FEC_SETUP = 97,
- PROG_SYNC = 98,
- AFC_SEAR_TH = 99,
- CSACC_DIF_TH = 100,
- QPSK_LK_CT = 101,
- QPSK_ST_CT = 102,
- MON_CTRL = 103,
- QPSK_RESET = 104,
- QPSK_TST_CT = 105,
- QPSK_TST_ST = 106,
- TEST_R = 107,
- AGC_H = 108,
- AGC_M = 109,
- AGC_L = 110,
- FREQ_ERR1_H = 111,
- FREQ_ERR1_M = 112,
- FREQ_ERR1_L = 113,
- FREQ_ERR2_H = 114,
- FREQ_ERR2_L = 115,
- SYM_RAT_OP_H = 116,
- SYM_RAT_OP_L = 117,
- DESEQC2_INT = 118,
- DISEQC2_STAT = 119,
- DISEQC2_FIFO = 120,
- DISEQC2_CTRL1 = 121,
- DISEQC2_CTRL2 = 122,
- MONITOR_H = 123,
- MONITOR_L = 124,
- TEST_MODE = 125,
- ID = 126,
- CONFIG = 127
-} mt312_reg_addr_t;
+ QPSK_INT_H = 0,
+ QPSK_INT_M = 1,
+ QPSK_INT_L = 2,
+ FEC_INT = 3,
+ QPSK_STAT_H = 4,
+ QPSK_STAT_L = 5,
+ FEC_STATUS = 6,
+ LNB_FREQ_H = 7,
+ LNB_FREQ_L = 8,
+ M_SNR_H = 9,
+ M_SNR_L = 10,
+ VIT_ERRCNT_H = 11,
+ VIT_ERRCNT_M = 12,
+ VIT_ERRCNT_L = 13,
+ RS_BERCNT_H = 14,
+ RS_BERCNT_M = 15,
+ RS_BERCNT_L = 16,
+ RS_UBC_H = 17,
+ RS_UBC_L = 18,
+ SIG_LEVEL = 19,
+ GPP_CTRL = 20,
+ RESET = 21,
+ DISEQC_MODE = 22,
+ SYM_RATE_H = 23,
+ SYM_RATE_L = 24,
+ VIT_MODE = 25,
+ QPSK_CTRL = 26,
+ GO = 27,
+ IE_QPSK_H = 28,
+ IE_QPSK_M = 29,
+ IE_QPSK_L = 30,
+ IE_FEC = 31,
+ QPSK_STAT_EN = 32,
+ FEC_STAT_EN = 33,
+ SYS_CLK = 34,
+ DISEQC_RATIO = 35,
+ DISEQC_INSTR = 36,
+ FR_LIM = 37,
+ FR_OFF = 38,
+ AGC_CTRL = 39,
+ AGC_INIT = 40,
+ AGC_REF = 41,
+ AGC_MAX = 42,
+ AGC_MIN = 43,
+ AGC_LK_TH = 44,
+ TS_AGC_LK_TH = 45,
+ AGC_PWR_SET = 46,
+ QPSK_MISC = 47,
+ SNR_THS_LOW = 48,
+ SNR_THS_HIGH = 49,
+ TS_SW_RATE = 50,
+ TS_SW_LIM_L = 51,
+ TS_SW_LIM_H = 52,
+ CS_SW_RATE_1 = 53,
+ CS_SW_RATE_2 = 54,
+ CS_SW_RATE_3 = 55,
+ CS_SW_RATE_4 = 56,
+ CS_SW_LIM = 57,
+ TS_LPK = 58,
+ TS_LPK_M = 59,
+ TS_LPK_L = 60,
+ CS_KPROP_H = 61,
+ CS_KPROP_L = 62,
+ CS_KINT_H = 63,
+ CS_KINT_L = 64,
+ QPSK_SCALE = 65,
+ TLD_OUTCLK_TH = 66,
+ TLD_INCLK_TH = 67,
+ FLD_TH = 68,
+ PLD_OUTLK3 = 69,
+ PLD_OUTLK2 = 70,
+ PLD_OUTLK1 = 71,
+ PLD_OUTLK0 = 72,
+ PLD_INLK3 = 73,
+ PLD_INLK2 = 74,
+ PLD_INLK1 = 75,
+ PLD_INLK0 = 76,
+ PLD_ACC_TIME = 77,
+ SWEEP_PAR = 78,
+ STARTUP_TIME = 79,
+ LOSSLOCK_TH = 80,
+ FEC_LOCK_TM = 81,
+ LOSSLOCK_TM = 82,
+ VIT_ERRPER_H = 83,
+ VIT_ERRPER_M = 84,
+ VIT_ERRPER_L = 85,
+ VIT_SETUP = 86,
+ VIT_REF0 = 87,
+ VIT_REF1 = 88,
+ VIT_REF2 = 89,
+ VIT_REF3 = 90,
+ VIT_REF4 = 91,
+ VIT_REF5 = 92,
+ VIT_REF6 = 93,
+ VIT_MAXERR = 94,
+ BA_SETUPT = 95,
+ OP_CTRL = 96,
+ FEC_SETUP = 97,
+ PROG_SYNC = 98,
+ AFC_SEAR_TH = 99,
+ CSACC_DIF_TH = 100,
+ QPSK_LK_CT = 101,
+ QPSK_ST_CT = 102,
+ MON_CTRL = 103,
+ QPSK_RESET = 104,
+ QPSK_TST_CT = 105,
+ QPSK_TST_ST = 106,
+ TEST_R = 107,
+ AGC_H = 108,
+ AGC_M = 109,
+ AGC_L = 110,
+ FREQ_ERR1_H = 111,
+ FREQ_ERR1_M = 112,
+ FREQ_ERR1_L = 113,
+ FREQ_ERR2_H = 114,
+ FREQ_ERR2_L = 115,
+ SYM_RAT_OP_H = 116,
+ SYM_RAT_OP_L = 117,
+ DESEQC2_INT = 118,
+ DISEQC2_STAT = 119,
+ DISEQC2_FIFO = 120,
+ DISEQC2_CTRL1 = 121,
+ DISEQC2_CTRL2 = 122,
+ MONITOR_H = 123,
+ MONITOR_L = 124,
+ TEST_MODE = 125,
+ ID = 126,
+ CONFIG = 127
+};
enum mt312_model_id {
- ID_VP310 = 1,
- ID_MT312 = 3
+ ID_VP310 = 1,
+ ID_MT312 = 3
};
-#endif /* DVB_FRONTENDS_MT312 */
+#endif /* DVB_FRONTENDS_MT312 */