xc5000: poll at 5ms interval for register write command completion

From: Devin Heitmueller <dheitmueller@kernellabs.com>

Instead of polling at 100ms intervals for register writes, poll at 5ms
intervals.  This is consistent with the xc5000 specification, and improves
tuning time by up to 500 ms on devices that such as the au0828 which do not
properly implement i2c clock stretching (since the five register writes that
occur for a tuning request often do not complete immediately but do complete
far before 100ms has gone by).

The net amount of time we wait before timing out is unchanged (500ms).

Priority: normal

Signed-off-by: Devin Heitmueller <dheitmueller@kernellabs.com>

0 files changed, 0 insertions, 0 deletions