diff options
| author | Andy Walls <awalls@radix.net> | 2009-02-16 00:23:25 -0500 |
|---|---|---|
| committer | Andy Walls <awalls@radix.net> | 2009-02-16 00:23:25 -0500 |
| commit | 2fc2bbdf325e45fee8f2e62a8594fc62f18b5f3e (patch) | |
| tree | 476b889e240097b8296c9a1ab0523cead2b40468 /linux/drivers/media/video/cx18/cx18-firmware.c | |
| parent | 2aa8e5c7af6768440a674eceede51b867f915445 (diff) | |
| download | mediapointer-dvb-s2-2fc2bbdf325e45fee8f2e62a8594fc62f18b5f3e.tar.gz mediapointer-dvb-s2-2fc2bbdf325e45fee8f2e62a8594fc62f18b5f3e.tar.bz2 | |
cx18, v4l2-chip-ident: Finish conversion of AV decoder core to v4l2_subdev
From: Andy Walls <awalls@radix.net>
Added a new chip identifer to v4l2-chip-ident for the integrated A/V broadcast
decoder core internal to the CX23418. Completed separation and encapsulation
of the A/V decoder core interface as a v4l2_subdevice. The cx18 driver now
compiles and links again.
Priority: normal
Signed-off-by: Andy Walls <awalls@radix.net>
Diffstat (limited to 'linux/drivers/media/video/cx18/cx18-firmware.c')
| -rw-r--r-- | linux/drivers/media/video/cx18/cx18-firmware.c | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/linux/drivers/media/video/cx18/cx18-firmware.c b/linux/drivers/media/video/cx18/cx18-firmware.c index aa89bee65..83cd559cc 100644 --- a/linux/drivers/media/video/cx18/cx18-firmware.c +++ b/linux/drivers/media/video/cx18/cx18-firmware.c @@ -26,7 +26,6 @@ #include "cx18-irq.h" #include "cx18-firmware.h" #include "cx18-cards.h" -#include "cx18-av-core.h" #include <linux/firmware.h> #define CX18_PROC_SOFT_RESET 0xc70010 @@ -286,23 +285,6 @@ void cx18_init_power(struct cx18 *cx, int lowpwr) cx18_write_reg(cx, 0x2BE2FE, CX18_MPEG_CLOCK_PLL_FRAC); cx18_write_reg(cx, 8, CX18_MPEG_CLOCK_PLL_POST); - /* - * VDCLK Integer = 0x0f, Post Divider = 0x04 - * AIMCLK Integer = 0x0e, Post Divider = 0x16 - */ - cx18_av_write4(cx, CXADEC_PLL_CTRL1, 0x160e040f); - - /* VDCLK Fraction = 0x2be2fe */ - /* xtal * 0xf.15f17f0/4 = 108 MHz: 432 MHz before post divide */ - cx18_av_write4(cx, CXADEC_VID_PLL_FRAC, 0x002be2fe); - - /* AIMCLK Fraction = 0x05227ad */ - /* xtal * 0xe.2913d68/0x16 = 48000 * 384: 406 MHz before post-divide */ - cx18_av_write4(cx, CXADEC_AUX_PLL_FRAC, 0x005227ad); - - /* SA_MCLK_SEL=1, SA_MCLK_DIV=0x16 */ - cx18_av_write(cx, CXADEC_I2S_MCLK, 0x56); - /* Defaults */ /* APU = SC or SC/2 = 125/62.5 */ /* EPU = SC = 125 */ |