diff options
author | Jean-Francois Moine <moinejf@free.fr> | 2008-11-07 08:46:07 +0100 |
---|---|---|
committer | Jean-Francois Moine <moinejf@free.fr> | 2008-11-07 08:46:07 +0100 |
commit | 8bf5ff37ec43c9afcf8a352754624f6462c06a02 (patch) | |
tree | c407189bc8a36c3b5d452a13692037949858e7f2 /linux/drivers/media/video/cx18/cx18-i2c.c | |
parent | 4c6dca7b19e1055dd0d4aaa8123c9a832f117202 (diff) | |
parent | 17490135b2a7a46fc7fb67d64dbaeb1301ea169d (diff) | |
download | mediapointer-dvb-s2-8bf5ff37ec43c9afcf8a352754624f6462c06a02.tar.gz mediapointer-dvb-s2-8bf5ff37ec43c9afcf8a352754624f6462c06a02.tar.bz2 |
merge: v4l-dvb
Diffstat (limited to 'linux/drivers/media/video/cx18/cx18-i2c.c')
-rw-r--r-- | linux/drivers/media/video/cx18/cx18-i2c.c | 24 |
1 files changed, 17 insertions, 7 deletions
diff --git a/linux/drivers/media/video/cx18/cx18-i2c.c b/linux/drivers/media/video/cx18/cx18-i2c.c index f28a1ff2e..1af9ea149 100644 --- a/linux/drivers/media/video/cx18/cx18-i2c.c +++ b/linux/drivers/media/video/cx18/cx18-i2c.c @@ -27,6 +27,7 @@ #include "cx18-gpio.h" #include "cx18-av-core.h" #include "cx18-i2c.h" +#include "cx18-irq.h" #define CX18_REG_I2C_1_WR 0xf15000 #define CX18_REG_I2C_1_RD 0xf15008 @@ -424,22 +425,31 @@ int init_cx18_i2c(struct cx18 *cx) if (cx18_read_reg(cx, CX18_REG_I2C_2_WR) != 0x0003c02f) { /* Reset/Unreset I2C hardware block */ /* Clock select 220MHz */ - cx18_write_reg(cx, 0x10000000, 0xc71004); + cx18_write_reg_expect(cx, 0x10000000, 0xc71004, + 0x00000000, 0x10001000); /* Clock Enable */ - cx18_write_reg_sync(cx, 0x10001000, 0xc71024); + cx18_write_reg_expect(cx, 0x10001000, 0xc71024, + 0x00001000, 0x10001000); } /* courtesy of Steven Toth <stoth@hauppauge.com> */ - cx18_write_reg_sync(cx, 0x00c00000, 0xc7001c); + cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0); + if (!cx18_retry_mmio) + (void) cx18_read_reg(cx, 0xc7001c); /* sync */ mdelay(10); - cx18_write_reg_sync(cx, 0x00c000c0, 0xc7001c); + cx18_write_reg_expect(cx, 0x00c000c0, 0xc7001c, 0x000000c0, 0x00c000c0); + if (!cx18_retry_mmio) + (void) cx18_read_reg(cx, 0xc7001c); /* sync */ mdelay(10); - cx18_write_reg_sync(cx, 0x00c00000, 0xc7001c); + cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0); + if (!cx18_retry_mmio) + (void) cx18_read_reg(cx, 0xc7001c); /* sync */ mdelay(10); /* Set to edge-triggered intrs. */ - cx18_write_reg_sync(cx, 0x00c00000, 0xc730c8); + cx18_write_reg(cx, 0x00c00000, 0xc730c8); /* Clear any stale intrs */ - cx18_write_reg_sync(cx, 0x00c00000, 0xc730c4); + cx18_write_reg_expect(cx, HW2_I2C1_INT|HW2_I2C2_INT, HW2_INT_CLR_STATUS, + ~(HW2_I2C1_INT|HW2_I2C2_INT), HW2_I2C1_INT|HW2_I2C2_INT); /* Hw I2C1 Clock Freq ~100kHz */ cx18_write_reg_sync(cx, 0x00021c0f & ~4, CX18_REG_I2C_1_WR); |