Changes within module ngene based on information from Media-Pointer.

From: Matthias Benesch <twoof7@freenet.de>

Added initialisation of register TSTTNR1=0x26 & TSTTNR3=0x26.
Used "#ifdef 0" instead of commenting unnecessary sourcecode.
Set repeter level from STV090x_RPTLEVEL_64 to STV090x_RPTLEVEL_16.

Priority: normal

1 files changed, 1013 insertions, 983 deletions

diff --git a/linux/drivers/media/video/ngene/ngene-core.c b/linux/drivers/media/video/ngene/ngene-core.c
index 2a73c6c86..0fad67e17 100644
--- a/linux/drivers/media/video/ngene/ngene-core.c
+++ b/linux/drivers/media/video/ngene/ngene-core.c
@@ -714,15 +714,17 @@ static void FillTSBuffer(void *Buffer, int Length, u32 Flags)
 	}
 }
 
-//static void clear_tsin(struct ngene_channel *chan)
-//{
-//	struct SBufferHeader *Cur = chan->nextBuffer;
-//
-//	do {
-//		memset(&Cur->ngeneBuffer.SR, 0, sizeof(Cur->ngeneBuffer.SR));
-//		Cur = Cur->Next;
-//	} while (Cur != chan->nextBuffer);
-//}
+#if 0
+static void clear_tsin(struct ngene_channel *chan)
+{
+	struct SBufferHeader *Cur = chan->nextBuffer;
+
+	do {
+		memset(&Cur->ngeneBuffer.SR, 0, sizeof(Cur->ngeneBuffer.SR));
+		Cur = Cur->Next;
+	} while (Cur != chan->nextBuffer);
+}
+#endif
 
 
 static void flush_buffers(struct ngene_channel *chan)
@@ -1076,15 +1078,17 @@ struct i2c_algorithm ngene_i2c_algo = {
 	.functionality = ngene_i2c_functionality,
 };
 
-//static int ngene_i2c_attach(struct i2c_client *client)
-//{
-//        return 0;
-//}
-//
-//static int ngene_i2c_detach(struct i2c_client *client)
-//{
-//	return 0;
-//}
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)
+static int ngene_i2c_attach(struct i2c_client *client)
+{
+        return 0;
+}
+
+static int ngene_i2c_detach(struct i2c_client *client)
+{
+	return 0;
+}
+#endif
 
 static int ngene_i2c_init(struct ngene *dev, int dev_nr)
 {
@@ -1104,8 +1108,10 @@ static int ngene_i2c_init(struct ngene *dev, int dev_nr)
 #else
 	adap->id=I2C_HW_SAA7146;
 #endif
-//	adap->client_register=ngene_i2c_attach;
-//	adap->client_unregister=ngene_i2c_detach;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)
+	adap->client_register=ngene_i2c_attach;
+	adap->client_unregister=ngene_i2c_detach;
+#endif
 	adap->algo=&ngene_i2c_algo;
 	adap->algo_data=(void *)&(dev->channel[dev_nr]);
 
@@ -1129,19 +1135,21 @@ int i2c_write(struct i2c_adapter *adapter, u8 adr, u8 data)
         return 0;
 }
 
-//static int i2c_write_register(struct i2c_adapter *adapter,
-//			      u8 adr, u8 reg, u8 data)
-//{
-//        u8 m[2]={reg, data};
-//        struct i2c_msg msg={.addr=adr, .flags=0, .buf=m, .len=2};
-//
-//        if (i2c_transfer(adapter, &msg, 1)!=1) {
-//		printk("Failed to write to I2C register %02x@%02x!\n",
-//		       reg, adr);
-//		return -1;
-//	}
-//        return 0;
-//}
+#if 0
+static int i2c_write_register(struct i2c_adapter *adapter,
+			      u8 adr, u8 reg, u8 data)
+{
+        u8 m[2]={reg, data};
+        struct i2c_msg msg={.addr=adr, .flags=0, .buf=m, .len=2};
+
+        if (i2c_transfer(adapter, &msg, 1)!=1) {
+		printk("Failed to write to I2C register %02x@%02x!\n",
+		       reg, adr);
+		return -1;
+	}
+        return 0;
+}
+#endif
 
 static int i2c_write_read(struct i2c_adapter *adapter,
 			  u8 adr, u8 *w, u8 wlen, u8 *r, u8 rlen)
@@ -1246,144 +1254,146 @@ static int i2c_read_eeprom(struct i2c_adapter *adapter,
 	return 0;
 }
 
-//static int ReadEEProm(struct i2c_adapter *adapter,
-//		      u16 Tag, u32 MaxLen, u8 *data, u32 *pLength)
-//{
-//	int status=0;
-//	u16 Addr=MICNG_EE_START, Length, tag=0;
-//	u8  EETag[3];
-//
-//	while (Addr+sizeof(u16)+1<MICNG_EE_END) {
-//		if (i2c_read_eeprom(adapter, 0x50, Addr, EETag,
-//				    sizeof(EETag)))
-//			return -1;
-//		tag=(EETag[0]<<8)|EETag[1];
-//		if (tag==MICNG_EETAG_END0 || tag==MICNG_EETAG_END1)
-//			return -1;
-//		if (tag==Tag)
-//			break;
-//		Addr+=sizeof(u16)+1+EETag[2];
-//	}
-//	if (Addr+sizeof(u16)+1+EETag[2]>MICNG_EE_END) {
-//		printk(DEVICE_NAME
-//		       ": Reached EOEE @ Tag = %04x Length = %3d\n",
-//		       tag, EETag[2]);
-//		return -1;
-//	}
-//	Length=EETag[2];
-//	if (Length>MaxLen)
-//		Length=(u16)MaxLen;
-//	if (Length>0) {
-//		Addr+=sizeof(u16)+1;
-//		if (!(status=i2c_read_eeprom(adapter, 0x50,
-//					     Addr, data, Length))) {
-//			*pLength=EETag[2];
-//			if (Length<EETag[2])
-//				;/*status=STATUS_BUFFER_OVERFLOW;*/
-//		}
-//	}
-//	return status;
-//}
-//
-//static int WriteEEProm(struct i2c_adapter *adapter,
-//		       u16 Tag, u32 Length, u8 *data)
-//{
-//	int status=0;
-//	u16 Addr=MICNG_EE_START;
-//	u8  EETag[3];
-//	u16 tag=0;
-//	int retry,i;
-//
-//	while (Addr+sizeof(u16)+1<MICNG_EE_END) {
-//		if (i2c_read_eeprom(adapter, 0x50,
-//				    Addr, EETag, sizeof(EETag)))
-//			return -1;
-//		tag=(EETag[0]<<8)|EETag[1];
-//		if (tag==MICNG_EETAG_END0 || tag==MICNG_EETAG_END1)
-//			return -1;
-//		if (tag==Tag)
-//			break;
-//		Addr+=sizeof(u16)+1+EETag[2];
-//	}
-//	if (Addr+sizeof(u16)+1+EETag[2]>MICNG_EE_END) {
-//		printk(DEVICE_NAME
-//		       ": Reached EOEE @ Tag = %04x Length = %3d\n",
-//		       tag, EETag[2]);
-//		return -1;
-//	}
-//
-//	if (Length>EETag[2])
-//		return -EINVAL;
-//	/* Note: We write the data one byte at a time to avoid
-//	   issues with page sizes. (which are different for
-//	   each manufacture and eeprom size)
-//	*/
-//	Addr+=sizeof(u16)+1;
-//	for (i=0; i<Length; i++, Addr++) {
-//		status=i2c_write_eeprom(adapter, 0x50, Addr, data[i]);
-//
-//		if (status)
-//			break;
-//
-//		/* Poll for finishing write cycle */
-//		retry=10;
-//		while (retry) {
-//			u8 Tmp;
-//
-//			msleep(50);
-//			status=i2c_read_eeprom(adapter, 0x50, Addr, &Tmp, 1);
-//			if (status)
-//				break;
-//			if (Tmp!=data[i])
-//				printk("eeprom write error\n");
-//			retry-=1;
-//		}
-//		if (status) {
-//			printk(DEVICE_NAME ": Timeout polling eeprom\n");
-//			break;
-//		}
-//	}
-//	return status;
-//}
-//
-//static void i2c_init_eeprom(struct i2c_adapter *adapter)
-//{
-//	u8 tags[]={ 0x10, 0x00, 0x02, 0x00, 0x00,
-//		    0x10, 0x01, 0x02, 0x00, 0x00,
-//		    0x00, 0x00, 0x00 };
-//
-//	int i;
-//
-//	for (i=0; i<sizeof(tags); i++)
-//		i2c_write_eeprom(adapter, 0x50, 0x0100+i, tags[i]);
-//}
-//
-//static int eeprom_read_ushort(struct i2c_adapter *adapter, u16 tag, u16 *data)
-//{
-//	int stat;
-//	u8 buf[2];
-//	u32 len=0;
-//
-//	if ((stat=ReadEEProm(adapter, tag, 2, buf, &len)))
-//		return stat;
-//	if (len!=2)
-//		return -EINVAL;
-//
-//	*data=(buf[0]<<8)|buf[1];
-//	return 0;
-//}
-//
-//static int eeprom_write_ushort(struct i2c_adapter *adapter, u16 tag, u16 data)
-//{
-//	int stat;
-//	u8 buf[2];
-//
-//	buf[0]=data>>8;
-//	buf[1]=data&0xff;
-//	if ((stat=WriteEEProm(adapter, tag, 2, buf)))
-//		return stat;
-//	return 0;
-//}
+#if 0
+static int ReadEEProm(struct i2c_adapter *adapter,
+		      u16 Tag, u32 MaxLen, u8 *data, u32 *pLength)
+{
+	int status=0;
+	u16 Addr=MICNG_EE_START, Length, tag=0;
+	u8  EETag[3];
+
+	while (Addr+sizeof(u16)+1<MICNG_EE_END) {
+		if (i2c_read_eeprom(adapter, 0x50, Addr, EETag,
+				    sizeof(EETag)))
+			return -1;
+		tag=(EETag[0]<<8)|EETag[1];
+		if (tag==MICNG_EETAG_END0 || tag==MICNG_EETAG_END1)
+			return -1;
+		if (tag==Tag)
+			break;
+		Addr+=sizeof(u16)+1+EETag[2];
+	}
+	if (Addr+sizeof(u16)+1+EETag[2]>MICNG_EE_END) {
+		printk(DEVICE_NAME
+		       ": Reached EOEE @ Tag = %04x Length = %3d\n",
+		       tag, EETag[2]);
+		return -1;
+	}
+	Length=EETag[2];
+	if (Length>MaxLen)
+		Length=(u16)MaxLen;
+	if (Length>0) {
+		Addr+=sizeof(u16)+1;
+		if (!(status=i2c_read_eeprom(adapter, 0x50,
+					     Addr, data, Length))) {
+			*pLength=EETag[2];
+			if (Length<EETag[2])
+				;/*status=STATUS_BUFFER_OVERFLOW;*/
+		}
+	}
+	return status;
+}
+
+static int WriteEEProm(struct i2c_adapter *adapter,
+		       u16 Tag, u32 Length, u8 *data)
+{
+	int status=0;
+	u16 Addr=MICNG_EE_START;
+	u8  EETag[3];
+	u16 tag=0;
+	int retry,i;
+
+	while (Addr+sizeof(u16)+1<MICNG_EE_END) {
+		if (i2c_read_eeprom(adapter, 0x50,
+				    Addr, EETag, sizeof(EETag)))
+			return -1;
+		tag=(EETag[0]<<8)|EETag[1];
+		if (tag==MICNG_EETAG_END0 || tag==MICNG_EETAG_END1)
+			return -1;
+		if (tag==Tag)
+			break;
+		Addr+=sizeof(u16)+1+EETag[2];
+	}
+	if (Addr+sizeof(u16)+1+EETag[2]>MICNG_EE_END) {
+		printk(DEVICE_NAME
+		       ": Reached EOEE @ Tag = %04x Length = %3d\n",
+		       tag, EETag[2]);
+		return -1;
+	}
+
+	if (Length>EETag[2])
+		return -EINVAL;
+	/* Note: We write the data one byte at a time to avoid
+	   issues with page sizes. (which are different for
+	   each manufacture and eeprom size)
+	*/
+	Addr+=sizeof(u16)+1;
+	for (i=0; i<Length; i++, Addr++) {
+		status=i2c_write_eeprom(adapter, 0x50, Addr, data[i]);
+
+		if (status)
+			break;
+
+		/* Poll for finishing write cycle */
+		retry=10;
+		while (retry) {
+			u8 Tmp;
+
+			msleep(50);
+			status=i2c_read_eeprom(adapter, 0x50, Addr, &Tmp, 1);
+			if (status)
+				break;
+			if (Tmp!=data[i])
+				printk("eeprom write error\n");
+			retry-=1;
+		}
+		if (status) {
+			printk(DEVICE_NAME ": Timeout polling eeprom\n");
+			break;
+		}
+	}
+	return status;
+}
+
+static void i2c_init_eeprom(struct i2c_adapter *adapter)
+{
+	u8 tags[]={ 0x10, 0x00, 0x02, 0x00, 0x00,
+		    0x10, 0x01, 0x02, 0x00, 0x00,
+		    0x00, 0x00, 0x00 };
+
+	int i;
+
+	for (i=0; i<sizeof(tags); i++)
+		i2c_write_eeprom(adapter, 0x50, 0x0100+i, tags[i]);
+}
+
+static int eeprom_read_ushort(struct i2c_adapter *adapter, u16 tag, u16 *data)
+{
+	int stat;
+	u8 buf[2];
+	u32 len=0;
+
+	if ((stat=ReadEEProm(adapter, tag, 2, buf, &len)))
+		return stat;
+	if (len!=2)
+		return -EINVAL;
+
+	*data=(buf[0]<<8)|buf[1];
+	return 0;
+}
+
+static int eeprom_write_ushort(struct i2c_adapter *adapter, u16 tag, u16 data)
+{
+	int stat;
+	u8 buf[2];
+
+	buf[0]=data>>8;
+	buf[1]=data&0xff;
+	if ((stat=WriteEEProm(adapter, tag, 2, buf)))
+		return stat;
+	return 0;
+}
+#endif
 
 static int i2c_dump_eeprom(struct i2c_adapter *adapter, u8 adr)
 {
@@ -1641,48 +1651,50 @@ static int send_cli_val(struct ngene *dev, char *cmd, u32 val)
 	return write_uart(dev, s, strlen(s));
 }
 
-//static int ngene_command_write_uart_user(struct ngene *dev,
-//					 const u8 *data, int len)
-//{
-//	struct ngene_command com;
-//
-//	dev->tx_busy=1;
-//	com.cmd.hdr.Opcode=CMD_WRITE_UART;
-//	com.cmd.hdr.Length=len;
-//
-//	if (copy_from_user(com.cmd.WriteUart.Data, data, len))
-//		return -EFAULT;
-//	com.in_len=len;
-//	com.out_len=0;
-//
-//	if (ngene_command(dev, &com)<0)
-//		return -EIO;
-//
-//	return 0;
-//}
-//
-//static ssize_t uart_write(struct file *file, const char *buf,
-//			  size_t count, loff_t *ppos)
-//{
-//	struct dvb_device *dvbdev=file->private_data;
-//	struct ngene_channel *chan=dvbdev->priv;
-//	struct ngene *dev=chan->dev;
-//	int len, ret=0;
-//	size_t left=count;
-//
-//	while (left) {
-//		len=left;
-//		if (len>250)
-//			len=250;
-//		ret=wait_event_interruptible(dev->tx_wq, dev->tx_busy==0);
-//		if (ret<0)
-//			return ret;
-//		ngene_command_write_uart_user(dev, buf, len);
-//		left-=len;
-//		buf+=len;
-//	}
-//	return count;
-//}
+#if 0
+static int ngene_command_write_uart_user(struct ngene *dev,
+					 const u8 *data, int len)
+{
+	struct ngene_command com;
+
+	dev->tx_busy=1;
+	com.cmd.hdr.Opcode=CMD_WRITE_UART;
+	com.cmd.hdr.Length=len;
+
+	if (copy_from_user(com.cmd.WriteUart.Data, data, len))
+		return -EFAULT;
+	com.in_len=len;
+	com.out_len=0;
+
+	if (ngene_command(dev, &com)<0)
+		return -EIO;
+
+	return 0;
+}
+
+static ssize_t uart_write(struct file *file, const char *buf,
+			  size_t count, loff_t *ppos)
+{
+	struct dvb_device *dvbdev=file->private_data;
+	struct ngene_channel *chan=dvbdev->priv;
+	struct ngene *dev=chan->dev;
+	int len, ret=0;
+	size_t left=count;
+
+	while (left) {
+		len=left;
+		if (len>250)
+			len=250;
+		ret=wait_event_interruptible(dev->tx_wq, dev->tx_busy==0);
+		if (ret<0)
+			return ret;
+		ngene_command_write_uart_user(dev, buf, len);
+		left-=len;
+		buf+=len;
+	}
+	return count;
+}
+#endif
 
 static ssize_t ts_write(struct file *file, const char *buf,
 			  size_t count, loff_t *ppos)
@@ -1853,15 +1865,17 @@ static void *tsout_exchange(void *priv, void *buf, u32 len,
 	return buf;
 }
 
-//static void set_dto(struct ngene_channel *chan, u32 rate)
-//{
-//	u64 val=rate*0x89705f41ULL; /* times val for 2^26 Hz */
-//
-//	val=((val>>25)+1)>>1;
-//	chan->AudioDTOValue=(u32)val;
-//	//chan->AudioDTOUpdated=1;
-//	//printk("Setting DTO to %08x\n", val);
-//}
+#if 0
+static void set_dto(struct ngene_channel *chan, u32 rate)
+{
+	u64 val=rate*0x89705f41ULL; /* times val for 2^26 Hz */
+
+	val=((val>>25)+1)>>1;
+	chan->AudioDTOValue=(u32)val;
+	//chan->AudioDTOUpdated=1;
+	//printk("Setting DTO to %08x\n", val);
+}
+#endif
 
 static void set_transfer(struct ngene_channel *chan, int state)
 {
@@ -2007,196 +2021,198 @@ static int ngene_stop_feed(struct dvb_demux_feed *dvbdmxfeed)
 	return 0;
 }
 
-//static int write_demod(struct i2c_adapter *adapter,
-//		       u8 adr, u16 reg, u16 data)
-//{
-//        u8 mm[5]={0x10, (reg>>8)&0xff, reg&0xff,
-//		  (data>>8)&0xff, data&0xff};
-//        struct i2c_msg msg={.addr=adr, .flags=0, .buf=mm, .len=5};
-//
-//        if (i2c_transfer(adapter, &msg, 1)!=1) {
-//		printk("error in write_demod\n");
-//		return -1;
-//	}
-//	return 0;
-//}
-//
-//#if 0
-//static int read_demod(struct i2c_adapter *adapter,
-//		      u8 adr, u16 reg, u16 *data)
-//{
-//        u8 msg[3] = {0x11, (reg>>8)&0xff, reg&0xff};
-//        u8 val[2];
-//        struct i2c_msg msgs[2]={{.addr=adr, .flags=0,
-//				 .buf=msg, .len=3 },
-//				{.addr=adr, .flags=I2C_M_RD,
-//				 .buf=val, .len=2 }};
-//
-//        if (i2c_transfer(adapter, msgs, 2)!=2) {
-//		printk("error in read_demod\n");
-//		return -1;
-//	}
-//	*data=(val[0]<<8)|val[1];
-//	return 0;
-//}
-//#endif
-//
-//static int ngene_drxd_pll_set(struct ngene_channel *chan,
-//			      u8 *pll, u8 *aux, u8 plladr)
-//{
-//	struct i2c_adapter *adap=&chan->i2c_adapter;
-//	struct i2c_msg msg_pll={.addr=plladr, .flags=0, .buf=pll, .len=4};
-//	struct i2c_msg msg_aux={.addr=plladr, .flags=0, .buf=aux, .len=2};
-//	int err=0;
-//
-//	if (chan->dev->card_info->i2c_access&1)
-//		down(&chan->dev->pll_mutex);
-//
-//#if 1
-//	chan->fe->ops.i2c_gate_ctrl(chan->fe, 1);
-//#else
-//	drxd_config_i2c(chan->fe, 1);
-//#endif
-//	if ((err=i2c_transfer(adap, &msg_pll, 1))!=1)
-//		goto error;
-//        if (aux)
-//		err=i2c_transfer(adap, &msg_aux, 1);
-//error:
-//#if 1
-//	chan->fe->ops.i2c_gate_ctrl(chan->fe, 0);
-//#else
-//	drxd_config_i2c(chan->fe, 0);
-//#endif
-//	if (chan->dev->card_info->i2c_access&1)
-//		up(&chan->dev->pll_mutex);
-//	return err;
-//}
-//
-//static int ngene_pll_set_th_dtt7520x(void *priv, void *priv_params,
-//				     u8 plladr, u8 dadr, s32 *off)
-//{
-//	struct dvb_frontend_parameters *params=priv_params;
-//	struct ngene_channel *chan=priv;
-//
-//	u32 freq=params->frequency;
-//	u8 pll[4], aux[2];
-//	u8 c1, c2;
-//	u32 div;
-//
-//	if (freq<185000000 || freq>900000000)
-//		return -EINVAL;
-//
-//	if (freq<465000000)
-//		c2=0x12;
-//	else
-//		c2=0x18;
-//
-//	if (freq<305000000) c1=0xb4;
-//	else if (freq<405000000) c1=0xbc;
-//	else if (freq<445000000) c1=0xf4;
-//	else if (freq<465000000) c1=0xfc;
-//	else if (freq<735000000) c1=0xbc;
-//	else if (freq<835000000) c1=0xf4;
-//	else c1=0xfc;
-//
-//	if (params->u.ofdm.bandwidth==BANDWIDTH_8_MHZ)
-//		c2^=0x10;
-//
-//	div=(freq+36000000+166667/2)/166667;
-//	*off=((s32) div)*166667-(s32)freq-36000000;
-//
-//	pll[0]=(div>>8)&0x7f;
-//	pll[1]=div&0xff;
-//	pll[2]=c1;
-//	pll[3]=c2;
-//
-//	aux[0]=(c1&0xc7)|0x98;
-//	aux[1]=0x30;
-//
-//	return ngene_drxd_pll_set(chan, pll, aux, plladr);
-//}
-//
-//static int ngene_pll_set_mt_3x0823(void *priv,
-//				   void *priv_params,
-//				   u8 plladr, u8 dadr, s32 *off)
-//{
-//	struct dvb_frontend_parameters *params=priv_params;
-//	struct ngene_channel *chan=priv;
-//	struct i2c_adapter *adap=&chan->i2c_adapter;
-//	u32 freq=params->frequency;
-//	u8 pll[4];
-//	u8 aux[2];
-//	u8 c1, c2;
-//	u32 div;
-//
-//	if (freq<47125000 || freq>855250000)
-//		return -EINVAL;
-//	else if (freq<120000000) { c1=0xcc; c2=0x01; }
-//	else if (freq<155500000) { c1=0xfc; c2=0x01; }
-//	else if (freq<300000000) { c1=0xbc; c2=0x02; }
-//	else if (freq<467000000) { c1=0xcc; c2=0x02; }
-//	else { c1=0xcc; c2=0x04; }
-//
-//	if (params->u.ofdm.bandwidth==BANDWIDTH_8_MHZ)
-//		c2|=0x08;
-//
-//#define INTERFREQ (36000000)
-//
-//	div=(freq+INTERFREQ+166667/2)/166667;
-//
-//	*off=((s32) div)*166667-(s32)freq-INTERFREQ;
-//
-//	pll[0]=(div>>8)&0x7f;
-//	pll[1]=div&0xff;
-//	pll[2]=c1;
-//	pll[3]=c2;
-//
-//	aux[0]=(c1&0xc7)|0x98;
-//	aux[1]=0x20;
-//
-//#if 0
-//	write_demod(adap, dadr, 0x1007, 0x000);
-//	write_demod(adap, dadr, 0x1094, 0x500); /*280-7ff*/
-//#else
-//	write_demod(adap, dadr, 0x1007, 0xc27);
-//
-//	switch (params->u.ofdm.bandwidth) {
-//	case BANDWIDTH_7_MHZ:
-//		write_demod(adap, dadr, 0x0020, 0x103);
-//		break;
-//	case BANDWIDTH_AUTO:
-//	case BANDWIDTH_8_MHZ:
-//		write_demod(adap, dadr, 0x0020, 0x003);
-//		break;
-//	case BANDWIDTH_6_MHZ:
-//		write_demod(adap, dadr, 0x0020, 0x002);
-//		/*write_demod(adap, dadr, 0x1022, 397);*/
-//		break;
-//	}
-//#endif
-//
-//	return ngene_drxd_pll_set(chan, pll, aux, plladr);
-//
-//}
-//
-//static s16 osc_deviation(void *priv, s16 deviation, int flag)
-//{
-//	struct ngene_channel *chan=priv;
-//	struct i2c_adapter *adap=&chan->i2c_adapter;
-//	u16 data=0;
-//
-//	if (flag) {
-//		data=(u16) deviation;
-//		printk("write deviation %d\n", deviation);
-//		eeprom_write_ushort(adap, 0x1000+chan->number, data);
-//	} else {
-//		if (eeprom_read_ushort(adap, 0x1000+chan->number, &data))
-//			data=0;
-//		printk("read deviation %d\n", (s16)data);
-//	}
-//
-//	return (s16) data;
-//}
+#if 0
+static int write_demod(struct i2c_adapter *adapter,
+		       u8 adr, u16 reg, u16 data)
+{
+        u8 mm[5]={0x10, (reg>>8)&0xff, reg&0xff,
+		  (data>>8)&0xff, data&0xff};
+        struct i2c_msg msg={.addr=adr, .flags=0, .buf=mm, .len=5};
+
+        if (i2c_transfer(adapter, &msg, 1)!=1) {
+		printk("error in write_demod\n");
+		return -1;
+	}
+	return 0;
+}
+
+#if 0
+static int read_demod(struct i2c_adapter *adapter,
+		      u8 adr, u16 reg, u16 *data)
+{
+        u8 msg[3] = {0x11, (reg>>8)&0xff, reg&0xff};
+        u8 val[2];
+        struct i2c_msg msgs[2]={{.addr=adr, .flags=0,
+				 .buf=msg, .len=3 },
+				{.addr=adr, .flags=I2C_M_RD,
+				 .buf=val, .len=2 }};
+
+        if (i2c_transfer(adapter, msgs, 2)!=2) {
+		printk("error in read_demod\n");
+		return -1;
+	}
+	*data=(val[0]<<8)|val[1];
+	return 0;
+}
+#endif
+
+static int ngene_drxd_pll_set(struct ngene_channel *chan,
+			      u8 *pll, u8 *aux, u8 plladr)
+{
+	struct i2c_adapter *adap=&chan->i2c_adapter;
+	struct i2c_msg msg_pll={.addr=plladr, .flags=0, .buf=pll, .len=4};
+	struct i2c_msg msg_aux={.addr=plladr, .flags=0, .buf=aux, .len=2};
+	int err=0;
+
+	if (chan->dev->card_info->i2c_access&1)
+		down(&chan->dev->pll_mutex);
+
+#if 1
+	chan->fe->ops.i2c_gate_ctrl(chan->fe, 1);
+#else
+	drxd_config_i2c(chan->fe, 1);
+#endif
+	if ((err=i2c_transfer(adap, &msg_pll, 1))!=1)
+		goto error;
+        if (aux)
+		err=i2c_transfer(adap, &msg_aux, 1);
+error:
+#if 1
+	chan->fe->ops.i2c_gate_ctrl(chan->fe, 0);
+#else
+	drxd_config_i2c(chan->fe, 0);
+#endif
+	if (chan->dev->card_info->i2c_access&1)
+		up(&chan->dev->pll_mutex);
+	return err;
+}
+
+static int ngene_pll_set_th_dtt7520x(void *priv, void *priv_params,
+				     u8 plladr, u8 dadr, s32 *off)
+{
+	struct dvb_frontend_parameters *params=priv_params;
+	struct ngene_channel *chan=priv;
+
+	u32 freq=params->frequency;
+	u8 pll[4], aux[2];
+	u8 c1, c2;
+	u32 div;
+
+	if (freq<185000000 || freq>900000000)
+		return -EINVAL;
+
+	if (freq<465000000)
+		c2=0x12;
+	else
+		c2=0x18;
+
+	if (freq<305000000) c1=0xb4;
+	else if (freq<405000000) c1=0xbc;
+	else if (freq<445000000) c1=0xf4;
+	else if (freq<465000000) c1=0xfc;
+	else if (freq<735000000) c1=0xbc;
+	else if (freq<835000000) c1=0xf4;
+	else c1=0xfc;
+
+	if (params->u.ofdm.bandwidth==BANDWIDTH_8_MHZ)
+		c2^=0x10;
+
+	div=(freq+36000000+166667/2)/166667;
+	*off=((s32) div)*166667-(s32)freq-36000000;
+
+	pll[0]=(div>>8)&0x7f;
+	pll[1]=div&0xff;
+	pll[2]=c1;
+	pll[3]=c2;
+
+	aux[0]=(c1&0xc7)|0x98;
+	aux[1]=0x30;
+
+	return ngene_drxd_pll_set(chan, pll, aux, plladr);
+}
+
+static int ngene_pll_set_mt_3x0823(void *priv,
+				   void *priv_params,
+				   u8 plladr, u8 dadr, s32 *off)
+{
+	struct dvb_frontend_parameters *params=priv_params;
+	struct ngene_channel *chan=priv;
+	struct i2c_adapter *adap=&chan->i2c_adapter;
+	u32 freq=params->frequency;
+	u8 pll[4];
+	u8 aux[2];
+	u8 c1, c2;
+	u32 div;
+
+	if (freq<47125000 || freq>855250000)
+		return -EINVAL;
+	else if (freq<120000000) { c1=0xcc; c2=0x01; }
+	else if (freq<155500000) { c1=0xfc; c2=0x01; }
+	else if (freq<300000000) { c1=0xbc; c2=0x02; }
+	else if (freq<467000000) { c1=0xcc; c2=0x02; }
+	else { c1=0xcc; c2=0x04; }
+
+	if (params->u.ofdm.bandwidth==BANDWIDTH_8_MHZ)
+		c2|=0x08;
+
+#define INTERFREQ (36000000)
+
+	div=(freq+INTERFREQ+166667/2)/166667;
+
+	*off=((s32) div)*166667-(s32)freq-INTERFREQ;
+
+	pll[0]=(div>>8)&0x7f;
+	pll[1]=div&0xff;
+	pll[2]=c1;
+	pll[3]=c2;
+
+	aux[0]=(c1&0xc7)|0x98;
+	aux[1]=0x20;
+
+#if 0
+	write_demod(adap, dadr, 0x1007, 0x000);
+	write_demod(adap, dadr, 0x1094, 0x500); /*280-7ff*/
+#else
+	write_demod(adap, dadr, 0x1007, 0xc27);
+
+	switch (params->u.ofdm.bandwidth) {
+	case BANDWIDTH_7_MHZ:
+		write_demod(adap, dadr, 0x0020, 0x103);
+		break;
+	case BANDWIDTH_AUTO:
+	case BANDWIDTH_8_MHZ:
+		write_demod(adap, dadr, 0x0020, 0x003);
+		break;
+	case BANDWIDTH_6_MHZ:
+		write_demod(adap, dadr, 0x0020, 0x002);
+		/*write_demod(adap, dadr, 0x1022, 397);*/
+		break;
+	}
+#endif
+
+	return ngene_drxd_pll_set(chan, pll, aux, plladr);
+
+}
+
+static s16 osc_deviation(void *priv, s16 deviation, int flag)
+{
+	struct ngene_channel *chan=priv;
+	struct i2c_adapter *adap=&chan->i2c_adapter;
+	u16 data=0;
+
+	if (flag) {
+		data=(u16) deviation;
+		printk("write deviation %d\n", deviation);
+		eeprom_write_ushort(adap, 0x1000+chan->number, data);
+	} else {
+		if (eeprom_read_ushort(adap, 0x1000+chan->number, &data))
+			data=0;
+		printk("read deviation %d\n", (s16)data);
+	}
+
+	return (s16) data;
+}
+#endif
 
 static int write_to_decoder(struct dvb_demux_feed *feed,
 			    const u8 *buf, size_t len)
@@ -2648,88 +2664,90 @@ static u32 Buffer2Sizes[MAX_STREAM] =
 	0
 };
 
-//static int allocate_buffer(struct pci_dev *pci_dev,
-//			   dma_addr_t of,
-//			   struct SRingBufferDescriptor *rbuf,
-//			   u32 entries,
-//			   u32 size1, u32 size2)
-//{
-//	if (create_ring_buffer(pci_dev, rbuf, entries)<0)
-//		return -ENOMEM;
-//
-//	if (AllocateRingBuffers(pci_dev, of,
-//				rbuf, size1, size2)<0)
-//		return -ENOMEM;
-//
-//	return 0;
-//}
-//
-//static int channel_allocate_buffers(struct ngene_channel *chan)
-//{
-//	struct ngene *dev=chan->dev;
-//	int type=dev->card_info->io_type[chan->number];
-//	int status;
-//
-//	chan->State = KSSTATE_STOP;
-//
-//	if (type&(NGENE_IO_TV|NGENE_IO_HDTV|NGENE_IO_AIN)) {
-//		status=create_ring_buffer(dev->pci_dev,
-//					  &chan->RingBuffer,
-//					  RingBufferSizes[chan->number]);
-//		if (status<0)
-//			return -ENOMEM;
-//
-//		if (type&(NGENE_IO_TV|NGENE_IO_AIN)) {
-//			status=AllocateRingBuffers(dev->pci_dev,
-//						   dev->PAOverflowBuffer,
-//						   &chan->RingBuffer,
-//						   Buffer1Sizes[chan->number],
-//						   Buffer2Sizes[chan->number]);
-//			if (status<0)
-//				return -ENOMEM;
-//		} else if (type&NGENE_IO_HDTV) {
-//			status=AllocateRingBuffers(dev->pci_dev,
-//						   dev->PAOverflowBuffer,
-//						   &chan->RingBuffer,
-//						   MAX_HDTV_BUFFER_SIZE, 0);
-//			if (status<0)
-//				return -ENOMEM;
-//		}
-//	}
-//
-//	if (type&(NGENE_IO_TSIN|NGENE_IO_TSOUT)) {
-//
-//		status=create_ring_buffer(dev->pci_dev,
-//					  &chan->TSRingBuffer,
-//					  RING_SIZE_TS);
-//		if (status<0)
-//			return -ENOMEM;
-//
-//		status=AllocateRingBuffers(dev->pci_dev,
-//					   dev->PAOverflowBuffer,
-//					   &chan->TSRingBuffer,
-//					   MAX_TS_BUFFER_SIZE,0);
-//		if (status)
-//			return -ENOMEM;
-//	}
-//
-//	if (type&NGENE_IO_TSOUT) {
-//		status=create_ring_buffer(dev->pci_dev,
-//					  &chan->TSIdleBuffer,
-//					  1);
-//		if (status<0)
-//			return -ENOMEM;
-//		status=AllocateRingBuffers(dev->pci_dev,
-//					   dev->PAOverflowBuffer,
-//					   &chan->TSIdleBuffer,
-//					   MAX_TS_BUFFER_SIZE,0);
-//		if (status)
-//			return -ENOMEM;
-//		FillTSIdleBuffer(&chan->TSIdleBuffer,
-//				 &chan->TSRingBuffer);
-//	}
-//	return 0;
-//}
+#if 0
+static int allocate_buffer(struct pci_dev *pci_dev,
+			   dma_addr_t of,
+			   struct SRingBufferDescriptor *rbuf,
+			   u32 entries,
+			   u32 size1, u32 size2)
+{
+	if (create_ring_buffer(pci_dev, rbuf, entries)<0)
+		return -ENOMEM;
+
+	if (AllocateRingBuffers(pci_dev, of,
+				rbuf, size1, size2)<0)
+		return -ENOMEM;
+
+	return 0;
+}
+
+static int channel_allocate_buffers(struct ngene_channel *chan)
+{
+	struct ngene *dev=chan->dev;
+	int type=dev->card_info->io_type[chan->number];
+	int status;
+
+	chan->State = KSSTATE_STOP;
+
+	if (type&(NGENE_IO_TV|NGENE_IO_HDTV|NGENE_IO_AIN)) {
+		status=create_ring_buffer(dev->pci_dev,
+					  &chan->RingBuffer,
+					  RingBufferSizes[chan->number]);
+		if (status<0)
+			return -ENOMEM;
+
+		if (type&(NGENE_IO_TV|NGENE_IO_AIN)) {
+			status=AllocateRingBuffers(dev->pci_dev,
+						   dev->PAOverflowBuffer,
+						   &chan->RingBuffer,
+						   Buffer1Sizes[chan->number],
+						   Buffer2Sizes[chan->number]);
+			if (status<0)
+				return -ENOMEM;
+		} else if (type&NGENE_IO_HDTV) {
+			status=AllocateRingBuffers(dev->pci_dev,
+						   dev->PAOverflowBuffer,
+						   &chan->RingBuffer,
+						   MAX_HDTV_BUFFER_SIZE, 0);
+			if (status<0)
+				return -ENOMEM;
+		}
+	}
+
+	if (type&(NGENE_IO_TSIN|NGENE_IO_TSOUT)) {
+
+		status=create_ring_buffer(dev->pci_dev,
+					  &chan->TSRingBuffer,
+					  RING_SIZE_TS);
+		if (status<0)
+			return -ENOMEM;
+
+		status=AllocateRingBuffers(dev->pci_dev,
+					   dev->PAOverflowBuffer,
+					   &chan->TSRingBuffer,
+					   MAX_TS_BUFFER_SIZE,0);
+		if (status)
+			return -ENOMEM;
+	}
+
+	if (type&NGENE_IO_TSOUT) {
+		status=create_ring_buffer(dev->pci_dev,
+					  &chan->TSIdleBuffer,
+					  1);
+		if (status<0)
+			return -ENOMEM;
+		status=AllocateRingBuffers(dev->pci_dev,
+					   dev->PAOverflowBuffer,
+					   &chan->TSIdleBuffer,
+					   MAX_TS_BUFFER_SIZE,0);
+		if (status)
+			return -ENOMEM;
+		FillTSIdleBuffer(&chan->TSIdleBuffer,
+				 &chan->TSRingBuffer);
+	}
+	return 0;
+}
+#endif
 
 static int AllocCommonBuffers(struct ngene *dev)
 {
@@ -3000,7 +3018,7 @@ static int ngene_start(struct ngene *dev)
 	if (dev->card_info->fw_version==17) {
 		u8 hdtv_config[6]={6144/64,0,0,2048/64,2048/64,2048/64};
 		u8 tsin4_config[6]={3072/64,3072/64,0,3072/64,3072/64,0};
-//		u8 ts5_config[6]={2048/64,2048/64,0,2048/64,2048/64,2048/64};
+		//u8 ts5_config[6]={2048/64,2048/64,0,2048/64,2048/64,2048/64};
 		u8 default_config[6]={4096/64,4096/64,0,2048/64,2048/64,0};
 		u8 *bconf=default_config;
 
@@ -3363,19 +3381,22 @@ static int lnbh21_set_tone(struct dvb_frontend *fe,
 }
 #endif
 
+
 /****************************************************************************/
 /* Switch control (I2C gates, etc.) *****************************************/
 /****************************************************************************/
 
-//static int avf_output(struct ngene_channel *chan, int state)
-//{
-//	if (chan->dev->card_info->avf[chan->number])
-//		i2c_write_register(&chan->i2c_adapter,
-//				   chan->dev->
-//				   card_info->avf[chan->number],
-//				   0xf2, state ? 0x89 : 0x80);
-//	return 0;
-//}
+#if 0
+static int avf_output(struct ngene_channel *chan, int state)
+{
+	if (chan->dev->card_info->avf[chan->number])
+		i2c_write_register(&chan->i2c_adapter,
+				   chan->dev->
+				   card_info->avf[chan->number],
+				   0xf2, state ? 0x89 : 0x80);
+	return 0;
+}
+#endif
 
 
 /* Viper expander: sw11,sw12,sw21,sw22,i2csw1,i2csw2,tsen1,tsen2 */
@@ -3395,162 +3416,167 @@ static int exp_init(struct ngene *dev)
 	return exp_set(dev);
 }
 
-//static int exp_set_bit(struct ngene *dev, int bit, int val)
-//{
-//	if (val)
-//		set_bit(bit, &dev->exp_val);
-//	else
-//		clear_bit(bit, &dev->exp_val);
-//	return exp_set(dev);
-//}
-//
-//static int viper_switch_ctrl(struct ngene_channel *chan, int type, int val)
-//{
-//	switch (type) {
-//	case 0: /* I2C tuner gate on/off */
-//		return exp_set_bit(chan->dev, 4+chan->number, val);
-//	case 1: /* Stream: 0=TS 1=ITU */
-//		avf_output(chan, val);
-//		return exp_set_bit(chan->dev, 6+chan->number, val);
-//	case 2: /* Input: 0=digital 1=analog antenna input */
-//		exp_set_bit(chan->dev, 0+chan->number*2, val ? 0 : 1);
-//		exp_set_bit(chan->dev, 1+chan->number*2, val ? 1 : 0);
-//		break;
-//	}
-//	return 0;
-//}
-//
-//static int viper_switch_ctrl2(struct ngene_channel *chan, int type, int val)
-//{
-//	switch (type) {
-//	case 0: /* I2C tuner gate on/off */
-//		return exp_set_bit(chan->dev, 4+chan->number, val);
-//	case 1: /* Stream: 0=TS 1=ITU */
-//		avf_output(chan, val);
-//		return exp_set_bit(chan->dev, 6+chan->number, val);
-//	case 2: /* Input: 0=digital 1=analog antenna input */
-//		exp_set_bit(chan->dev, 0+chan->number*2, val ? 0 : 1);
-//		exp_set_bit(chan->dev, 1+chan->number*2, 0);
-//		break;
-//	}
-//	return 0;
-//}
-//
-//static int viper_gate_ctrl(struct dvb_frontend *fe, int enable)
-//{
-//#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
-//	struct ngene_channel *chan=fe->misc_priv;
-//#else /* Why is there no misc_priv available anymore !?!?! */
-//      /* Well, just abuse sec :-) */
-//	struct ngene_channel *chan=fe->sec_priv;
-//#endif
-//	struct ngene *dev=chan->dev;
-//
-//	return dev->card_info->switch_ctrl(chan, 0, enable);
-//}
-//
-//static int python_switch_ctrl(struct ngene_channel *chan, int type, int val)
-//{
-//	switch (type) {
-//	case 0: /* I2C tuner gate on/off */
-//		if (chan->number>1)
-//			return -EINVAL;
-//		return ngene_command_gpio_set(chan->dev, 3+chan->number, val);
-//	case 1: /* Stream: 0=TS 1=ITU */
-//		avf_output(chan, val);
-//		return 0;
-//	}
-//	return 0;
-//}
-//
-//static int viper_reset_xc(struct dvb_frontend *fe)
-//{
-//#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
-//	struct ngene_channel *chan=fe->misc_priv;
-//#else
-//	struct ngene_channel *chan=fe->sec_priv;
-//#endif
-//	struct ngene *dev=chan->dev;
-//
-//	printk("Reset XC3028\n");
-//
-//	if (chan->number>1)
-//		return -EINVAL;
-//
-//	ngene_command_gpio_set(dev, 3+chan->number, 0);
-//	msleep(150);
-//	ngene_command_gpio_set(dev, 3+chan->number, 1);
-//	return 0;
-//}
-//
-//static int python_gate_ctrl(struct dvb_frontend *fe, int enable)
-//{
-//#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
-//	struct ngene_channel *chan=fe->misc_priv;
-//#else /* Why is there no misc_priv available anymore !?!?! */
-//	struct ngene_channel *chan=fe->sec_priv;
-//#endif
-//	struct ngene *dev=chan->dev;
-//
-//	if (chan->number==0)
-//		return ngene_command_gpio_set(dev, 3, enable);
-//	if (chan->number==1)
-//		return ngene_command_gpio_set(dev, 4, enable);
-//	return -EINVAL;
-//}
+#if 0
+static int exp_set_bit(struct ngene *dev, int bit, int val)
+{
+	if (val)
+		set_bit(bit, &dev->exp_val);
+	else
+		clear_bit(bit, &dev->exp_val);
+	return exp_set(dev);
+}
+
+static int viper_switch_ctrl(struct ngene_channel *chan, int type, int val)
+{
+	switch (type) {
+	case 0: /* I2C tuner gate on/off */
+		return exp_set_bit(chan->dev, 4+chan->number, val);
+	case 1: /* Stream: 0=TS 1=ITU */
+		avf_output(chan, val);
+		return exp_set_bit(chan->dev, 6+chan->number, val);
+	case 2: /* Input: 0=digital 1=analog antenna input */
+		exp_set_bit(chan->dev, 0+chan->number*2, val ? 0 : 1);
+		exp_set_bit(chan->dev, 1+chan->number*2, val ? 1 : 0);
+		break;
+	}
+	return 0;
+}
+
+static int viper_switch_ctrl2(struct ngene_channel *chan, int type, int val)
+{
+	switch (type) {
+	case 0: /* I2C tuner gate on/off */
+		return exp_set_bit(chan->dev, 4+chan->number, val);
+	case 1: /* Stream: 0=TS 1=ITU */
+		avf_output(chan, val);
+		return exp_set_bit(chan->dev, 6+chan->number, val);
+	case 2: /* Input: 0=digital 1=analog antenna input */
+		exp_set_bit(chan->dev, 0+chan->number*2, val ? 0 : 1);
+		exp_set_bit(chan->dev, 1+chan->number*2, 0);
+		break;
+	}
+	return 0;
+}
+
+static int viper_gate_ctrl(struct dvb_frontend *fe, int enable)
+{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
+	struct ngene_channel *chan=fe->misc_priv;
+#else /* Why is there no misc_priv available anymore !?!?! */
+      /* Well, just abuse sec :-) */
+	struct ngene_channel *chan=fe->sec_priv;
+#endif
+	struct ngene *dev=chan->dev;
+
+	return dev->card_info->switch_ctrl(chan, 0, enable);
+}
+
+static int python_switch_ctrl(struct ngene_channel *chan, int type, int val)
+{
+	switch (type) {
+	case 0: /* I2C tuner gate on/off */
+		if (chan->number>1)
+			return -EINVAL;
+		return ngene_command_gpio_set(chan->dev, 3+chan->number, val);
+	case 1: /* Stream: 0=TS 1=ITU */
+		avf_output(chan, val);
+		return 0;
+	}
+	return 0;
+}
+
+static int viper_reset_xc(struct dvb_frontend *fe)
+{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
+	struct ngene_channel *chan=fe->misc_priv;
+#else
+	struct ngene_channel *chan=fe->sec_priv;
+#endif
+	struct ngene *dev=chan->dev;
+
+	printk("Reset XC3028\n");
+
+	if (chan->number>1)
+		return -EINVAL;
+
+	ngene_command_gpio_set(dev, 3+chan->number, 0);
+	msleep(150);
+	ngene_command_gpio_set(dev, 3+chan->number, 1);
+	return 0;
+}
+
+static int python_gate_ctrl(struct dvb_frontend *fe, int enable)
+{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
+	struct ngene_channel *chan=fe->misc_priv;
+#else /* Why is there no misc_priv available anymore !?!?! */
+	struct ngene_channel *chan=fe->sec_priv;
+#endif
+	struct ngene *dev=chan->dev;
+
+	if (chan->number==0)
+		return ngene_command_gpio_set(dev, 3, enable);
+	if (chan->number==1)
+		return ngene_command_gpio_set(dev, 4, enable);
+	return -EINVAL;
+}
+#endif
 
 
 /****************************************************************************/
 /* Demod/tuner attachment ***************************************************/
 /****************************************************************************/
 
-//static int tuner_attach_mt2060(struct ngene_channel *chan)
-//{
-//	struct ngene *dev=chan->dev;
-//	void *tconf=dev->card_info->tuner_config[chan->number];
-//	u8 drxa=dev->card_info->demoda[chan->number];
-//	struct dvb_frontend *fe=chan->fe, *fe2;
-//
-//#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
-//	fe->misc_priv=chan;
-//#else
-//	fe->sec_priv=chan;
-//#endif
-//	fe->ops.i2c_gate_ctrl=dev->card_info->gate_ctrl;
-//
-//	dev->card_info->gate_ctrl(fe, 1);
-//	fe2=mt2060_attach(fe, &chan->i2c_adapter, tconf, 1220);
-//	dev->card_info->gate_ctrl(fe, 0);
-//
-//	i2c_write_register(&chan->i2c_adapter, drxa, 3, 4);
-//	write_demod(&chan->i2c_adapter, drxa, 0x1012, 15);
-//	write_demod(&chan->i2c_adapter, drxa, 0x1007, 0xc27);
-//	write_demod(&chan->i2c_adapter, drxa, 0x0020, 0x003);
-//
-//	return fe2 ? 0 : -ENODEV;
-//}
-//
-//static int tuner_attach_xc3028(struct ngene_channel *chan)
-//{
-//	struct ngene *dev=chan->dev;
-//	void *tconf=dev->card_info->tuner_config[chan->number];
-//	struct dvb_frontend *fe=chan->fe, *fe2;
-//
-//#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
-//	fe->misc_priv=chan;
-//#else
-//	fe->sec_priv=chan;
-//#endif
-//	fe->ops.i2c_gate_ctrl=dev->card_info->gate_ctrl;
-//
-//	dev->card_info->gate_ctrl(fe, 1);
-//	fe2=xc3028_attach(fe, &chan->i2c_adapter, tconf);
-//	dev->card_info->gate_ctrl(fe, 0);
-//
-//	/*chan->fe->ops.tuner_ops.set_frequency(chan->fe,231250000);*/
-//
-//	return fe2 ? 0 : -ENODEV;
-//}
+#if 0
+static int tuner_attach_mt2060(struct ngene_channel *chan)
+{
+	struct ngene *dev=chan->dev;
+	void *tconf=dev->card_info->tuner_config[chan->number];
+	u8 drxa=dev->card_info->demoda[chan->number];
+	struct dvb_frontend *fe=chan->fe, *fe2;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
+	fe->misc_priv=chan;
+#else
+	fe->sec_priv=chan;
+#endif
+	fe->ops.i2c_gate_ctrl=dev->card_info->gate_ctrl;
+
+	dev->card_info->gate_ctrl(fe, 1);
+	fe2=mt2060_attach(fe, &chan->i2c_adapter, tconf, 1220);
+	dev->card_info->gate_ctrl(fe, 0);
+
+	i2c_write_register(&chan->i2c_adapter, drxa, 3, 4);
+	write_demod(&chan->i2c_adapter, drxa, 0x1012, 15);
+	write_demod(&chan->i2c_adapter, drxa, 0x1007, 0xc27);
+	write_demod(&chan->i2c_adapter, drxa, 0x0020, 0x003);
+
+	return fe2 ? 0 : -ENODEV;
+}
+
+static int tuner_attach_xc3028(struct ngene_channel *chan)
+{
+	struct ngene *dev=chan->dev;
+	void *tconf=dev->card_info->tuner_config[chan->number];
+	struct dvb_frontend *fe=chan->fe, *fe2;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
+	fe->misc_priv=chan;
+#else
+	fe->sec_priv=chan;
+#endif
+	fe->ops.i2c_gate_ctrl=dev->card_info->gate_ctrl;
+
+	dev->card_info->gate_ctrl(fe, 1);
+	fe2=xc3028_attach(fe, &chan->i2c_adapter, tconf);
+	dev->card_info->gate_ctrl(fe, 0);
+
+	/*chan->fe->ops.tuner_ops.set_frequency(chan->fe,231250000);*/
+
+	return fe2 ? 0 : -ENODEV;
+}
+
+#endif
 
 static int tuner_attach_stv6110(struct ngene_channel *chan)
 {
@@ -3581,6 +3607,7 @@ static int tuner_attach_stv6110(struct ngene_channel *chan)
 	feconf->tuner_get_bbgain	= ctl->tuner_get_bbgain;
 	feconf->tuner_set_refclk	= ctl->tuner_set_refclk;
 	feconf->tuner_get_status	= ctl->tuner_get_status;
+
 #else
 	struct stv6110_config *tunerconf =
 		(struct stv6110_config*)chan->dev->card_info->tuner_config[chan->number];
@@ -3603,9 +3630,7 @@ static int tuner_attach_stv6110(struct ngene_channel *chan)
 	chan->fe->ops.set_voltage=lnbh21_set_voltage;
 #else
 	printk(DEVICE_NAME ": lnbh24_attach: nr = %d, lnb = %x\n", chan->number, chan->dev->card_info->lnb[chan->number]);
-	if (!dvb_attach(lnbh24_attach, chan->fe, &chan->i2c_adapter,
-			0, /* LNBH24_PCL */
-			0, /* LNBH24_TTX */
+	if (!dvb_attach(lnbh24_attach, chan->fe, &chan->i2c_adapter, 0, 0,
 			chan->dev->card_info->lnb[chan->number])) {
 		printk(KERN_ERR	"No LNBH24 found!\n");
 		return -ENODEV;
@@ -3615,47 +3640,49 @@ static int tuner_attach_stv6110(struct ngene_channel *chan)
 	return 0;
 }
 
-//static int demod_attach_drxd(struct ngene_channel *chan)
-//{
-//	void *feconf=chan->dev->card_info->fe_config[chan->number];
-//
-//	chan->fe=drxd_attach(feconf,
-//			     chan, &chan->i2c_adapter,
-//			     &chan->dev->pci_dev->dev);
-//	return (chan->fe) ? 0 : -ENODEV;
-//}
-//
-//static int demod_attach_drxh(struct ngene_channel *chan)
-//{
-//	void *feconf=chan->dev->card_info->fe_config[chan->number];
-//
-//	chan->fe=drxh_attach(feconf, chan,
-//			     &chan->i2c_adapter,
-//			     &chan->dev->pci_dev->dev);
-//	return (chan->fe) ? 0 : -ENODEV;
-//}
-//
-//static int demod_attach_stb0899(struct ngene_channel *chan)
-//{
-//	void *feconf=chan->dev->card_info->fe_config[chan->number];
-//
-//	chan->fe=stb0899_attach(feconf,
-//				chan, &chan->i2c_adapter,
-//				&chan->dev->pci_dev->dev);
-//	if (chan->fe) {
-//#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)
-//		chan->set_tone=chan->fe->ops->set_tone;
-//		chan->fe->ops->set_tone=lnbh21_set_tone;
-//		chan->fe->ops->set_voltage=lnbh21_set_voltage;
-//#else
-//		chan->set_tone=chan->fe->ops.set_tone;
-//		chan->fe->ops.set_tone=lnbh21_set_tone;
-//		chan->fe->ops.set_voltage=lnbh21_set_voltage;
-//#endif
-//	}
-//
-//	return (chan->fe) ? 0 : -ENODEV;
-//}
+#if 0
+static int demod_attach_drxd(struct ngene_channel *chan)
+{
+	void *feconf=chan->dev->card_info->fe_config[chan->number];
+
+	chan->fe=drxd_attach(feconf,
+			     chan, &chan->i2c_adapter,
+			     &chan->dev->pci_dev->dev);
+	return (chan->fe) ? 0 : -ENODEV;
+}
+
+static int demod_attach_drxh(struct ngene_channel *chan)
+{
+	void *feconf=chan->dev->card_info->fe_config[chan->number];
+
+	chan->fe=drxh_attach(feconf, chan,
+			     &chan->i2c_adapter,
+			     &chan->dev->pci_dev->dev);
+	return (chan->fe) ? 0 : -ENODEV;
+}
+
+static int demod_attach_stb0899(struct ngene_channel *chan)
+{
+	void *feconf=chan->dev->card_info->fe_config[chan->number];
+
+	chan->fe=stb0899_attach(feconf,
+				chan, &chan->i2c_adapter,
+				&chan->dev->pci_dev->dev);
+	if (chan->fe) {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)
+		chan->set_tone=chan->fe->ops->set_tone;
+		chan->fe->ops->set_tone=lnbh21_set_tone;
+		chan->fe->ops->set_voltage=lnbh21_set_voltage;
+#else
+		chan->set_tone=chan->fe->ops.set_tone;
+		chan->fe->ops.set_tone=lnbh21_set_tone;
+		chan->fe->ops.set_voltage=lnbh21_set_voltage;
+#endif
+	}
+
+	return (chan->fe) ? 0 : -ENODEV;
+}
+#endif
 
 static int demod_attach_stv0900(struct ngene_channel *chan)
 {
@@ -3985,141 +4012,143 @@ fail1:
 /* Card configs *************************************************************/
 /****************************************************************************/
 
-//static struct drxd_config fe_terratec_dvbt_0 = {
-//	.index=0, .demod_address=0x70, .demod_revision=0xa2,
-//	.demoda_address=0x00, .pll_address=0x60,
-//	.pll_type=DRXD_PLL_DTT7520X, .clock=20000,
-//	.pll_set=ngene_pll_set_th_dtt7520x,
-//	.osc_deviation=osc_deviation,
-//};
-//
-//static struct drxd_config fe_terratec_dvbt_1 = {
-//	.index=1, .demod_address=0x71, .demod_revision=0xa2,
-//	.demoda_address=0x00, .pll_address=0x60,
-//	.pll_type=DRXD_PLL_DTT7520X, .clock=20000,
-//	.pll_set=ngene_pll_set_th_dtt7520x,
-//	.osc_deviation=osc_deviation,
-//};
-//
-//static struct ngene_info ngene_info_terratec = {
-//	.type=NGENE_TERRATEC,
-//	.name="Terratec Integra/Cinergy2400i Dual DVB-T",
-//	.io_type={NGENE_IO_TSIN, NGENE_IO_TSIN},
-//	.demod_attach={demod_attach_drxd, demod_attach_drxd},
-//	.fe_config={&fe_terratec_dvbt_0, &fe_terratec_dvbt_1 },
-//	.i2c_access=1,
-//};
+#if 0
+static struct drxd_config fe_terratec_dvbt_0 = {
+	.index=0, .demod_address=0x70, .demod_revision=0xa2,
+	.demoda_address=0x00, .pll_address=0x60,
+	.pll_type=DRXD_PLL_DTT7520X, .clock=20000,
+	.pll_set=ngene_pll_set_th_dtt7520x,
+	.osc_deviation=osc_deviation,
+};
+
+static struct drxd_config fe_terratec_dvbt_1 = {
+	.index=1, .demod_address=0x71, .demod_revision=0xa2,
+	.demoda_address=0x00, .pll_address=0x60,
+	.pll_type=DRXD_PLL_DTT7520X, .clock=20000,
+	.pll_set=ngene_pll_set_th_dtt7520x,
+	.osc_deviation=osc_deviation,
+};
+
+static struct ngene_info ngene_info_terratec = {
+	.type=NGENE_TERRATEC,
+	.name="Terratec Integra/Cinergy2400i Dual DVB-T",
+	.io_type={NGENE_IO_TSIN, NGENE_IO_TSIN},
+	.demod_attach={demod_attach_drxd, demod_attach_drxd},
+	.fe_config={&fe_terratec_dvbt_0, &fe_terratec_dvbt_1 },
+	.i2c_access=1,
+};
 
 /****************************************************************************/
 
-//static struct mt2060_config tuner_python_0 = {
-//	.i2c_address    = 0x60,
-//	.clock_out      = 3,
-//	.input          = 0
-//};
-//
-//static struct mt2060_config tuner_python_1 = {
-//	.i2c_address    = 0x61,
-//	.clock_out      = 3,
-//	.input          = 1
-//};
-//
-//static struct drxd_config fe_python_0 = {
-//	.index          = 0,
-//	.demod_address  = 0x71,
-//	.demod_revision = 0xb1,
-//	.demoda_address = 0x41,
-//	.clock          = 16000,
-//	.osc_deviation  = osc_deviation,
-//};
-//
-//static struct drxd_config fe_python_1 = {
-//	.index          = 1,
-//	.demod_address  = 0x70,
-//	.demod_revision = 0xb1,
-//	.demoda_address = 0x45,
-//	.clock          = 16000,
-//	.osc_deviation  = osc_deviation,
-//};
-//
-//static struct ngene_info ngene_info_python = {
-//	.type         = NGENE_PYTHON,
-//	.name         = "Micronas MicPython/Hedgehog Dual DVB-T",
-//	.io_type      = { NGENE_IO_TSIN | NGENE_IO_TV,
-//			  NGENE_IO_TSIN | NGENE_IO_TV,
-//			  NGENE_IO_AIN, NGENE_IO_AIN },
-//	.demod_attach = { demod_attach_drxd, demod_attach_drxd },
-//	.tuner_attach = { tuner_attach_mt2060, tuner_attach_mt2060 },
-//	.fe_config    = { &fe_python_0, &fe_python_1 },
-//	.tuner_config = { &tuner_python_0, &tuner_python_1 },
-//	.avf          = { 0x43, 0x47 },
-//	.msp          = { 0x40, 0x42 },
-//	.demoda       = { 0x41, 0x45 },
-//	.gate_ctrl    = python_gate_ctrl,
-//	.switch_ctrl  = python_switch_ctrl,
-//};
+static struct mt2060_config tuner_python_0 = {
+	.i2c_address    = 0x60,
+	.clock_out      = 3,
+	.input          = 0
+};
+
+static struct mt2060_config tuner_python_1 = {
+	.i2c_address    = 0x61,
+	.clock_out      = 3,
+	.input          = 1
+};
+
+static struct drxd_config fe_python_0 = {
+	.index          = 0,
+	.demod_address  = 0x71,
+	.demod_revision = 0xb1,
+	.demoda_address = 0x41,
+	.clock          = 16000,
+	.osc_deviation  = osc_deviation,
+};
+
+static struct drxd_config fe_python_1 = {
+	.index          = 1,
+	.demod_address  = 0x70,
+	.demod_revision = 0xb1,
+	.demoda_address = 0x45,
+	.clock          = 16000,
+	.osc_deviation  = osc_deviation,
+};
+
+static struct ngene_info ngene_info_python = {
+	.type         = NGENE_PYTHON,
+	.name         = "Micronas MicPython/Hedgehog Dual DVB-T",
+	.io_type      = { NGENE_IO_TSIN | NGENE_IO_TV,
+			  NGENE_IO_TSIN | NGENE_IO_TV,
+			  NGENE_IO_AIN, NGENE_IO_AIN },
+	.demod_attach = { demod_attach_drxd, demod_attach_drxd },
+	.tuner_attach = { tuner_attach_mt2060, tuner_attach_mt2060 },
+	.fe_config    = { &fe_python_0, &fe_python_1 },
+	.tuner_config = { &tuner_python_0, &tuner_python_1 },
+	.avf          = { 0x43, 0x47 },
+	.msp          = { 0x40, 0x42 },
+	.demoda       = { 0x41, 0x45 },
+	.gate_ctrl    = python_gate_ctrl,
+	.switch_ctrl  = python_switch_ctrl,
+};
 
 /****************************************************************************/
 
-//static struct drxd_config fe_appb_dvbt_0 = {
-//	.index          = 0,
-//	.demod_address  = 0x71,
-//	.demod_revision = 0xa2,
-//	.demoda_address = 0x41,
-//	.pll_address    = 0x63,
-//	.pll_type       = DRXD_PLL_MT3X0823, .clock=20000,
-//	.pll_set        = ngene_pll_set_mt_3x0823,
-//	.osc_deviation  = osc_deviation,
-//};
-//
-//static struct drxd_config fe_appb_dvbt_1 = {
-//	.index          = 1,
-//	.demod_address  = 0x70,
-//	.demod_revision = 0xa2,
-//	.demoda_address = 0x45,
-//	.pll_address    = 0x60,
-//	.pll_type       = DRXD_PLL_MT3X0823, .clock=20000,
-//	.pll_set        = ngene_pll_set_mt_3x0823,
-//	.osc_deviation  = osc_deviation,
-//};
-//
-//static struct ngene_info ngene_info_appboard = {
-//	.type         = NGENE_APP,
-//	.name         = "Micronas Application Board Dual DVB-T",
-//	.io_type      = {NGENE_IO_TSIN, NGENE_IO_TSIN},
-//	.demod_attach = {demod_attach_drxd, demod_attach_drxd},
-//	.fe_config    = {&fe_appb_dvbt_0, &fe_appb_dvbt_1 },
-//	.avf          = {0x43, 0x47},
-//};
-//
-//static struct ngene_info ngene_info_appboard_ntsc = {
-//	.type         = NGENE_APP,
-//	.name         = "Micronas Application Board Dual DVB-T",
-//	.io_type      = {NGENE_IO_TSIN, NGENE_IO_TSIN},
-//	.demod_attach = {demod_attach_drxd, demod_attach_drxd},
-//	.fe_config    = {&fe_appb_dvbt_0, &fe_appb_dvbt_1 },
-//	.avf          = {0x43, 0x47},
-//	.ntsc=1,
-//};
+static struct drxd_config fe_appb_dvbt_0 = {
+	.index          = 0,
+	.demod_address  = 0x71,
+	.demod_revision = 0xa2,
+	.demoda_address = 0x41,
+	.pll_address    = 0x63,
+	.pll_type       = DRXD_PLL_MT3X0823, .clock=20000,
+	.pll_set        = ngene_pll_set_mt_3x0823,
+	.osc_deviation  = osc_deviation,
+};
+
+static struct drxd_config fe_appb_dvbt_1 = {
+	.index          = 1,
+	.demod_address  = 0x70,
+	.demod_revision = 0xa2,
+	.demoda_address = 0x45,
+	.pll_address    = 0x60,
+	.pll_type       = DRXD_PLL_MT3X0823, .clock=20000,
+	.pll_set        = ngene_pll_set_mt_3x0823,
+	.osc_deviation  = osc_deviation,
+};
+
+static struct ngene_info ngene_info_appboard = {
+	.type         = NGENE_APP,
+	.name         = "Micronas Application Board Dual DVB-T",
+	.io_type      = {NGENE_IO_TSIN, NGENE_IO_TSIN},
+	.demod_attach = {demod_attach_drxd, demod_attach_drxd},
+	.fe_config    = {&fe_appb_dvbt_0, &fe_appb_dvbt_1 },
+	.avf          = {0x43, 0x47},
+};
+
+static struct ngene_info ngene_info_appboard_ntsc = {
+	.type         = NGENE_APP,
+	.name         = "Micronas Application Board Dual DVB-T",
+	.io_type      = {NGENE_IO_TSIN, NGENE_IO_TSIN},
+	.demod_attach = {demod_attach_drxd, demod_attach_drxd},
+	.fe_config    = {&fe_appb_dvbt_0, &fe_appb_dvbt_1 },
+	.avf          = {0x43, 0x47},
+	.ntsc=1,
+};
 
 /****************************************************************************/
 
-//static struct stb0899_config fe_sidewinder_0 = {
-//	.demod_address=0x68, .pll_address=0x63,
-//};
-//
-//static struct stb0899_config fe_sidewinder_1 = {
-//	.demod_address=0x6b, .pll_address=0x60,
-//};
-//
-//static struct ngene_info ngene_info_sidewinder = {
-//	.type         = NGENE_SIDEWINDER,
-//	.name         = "Micronas MicSquirrel/Sidewinder Dual DVB-S2",
-//	.io_type      = { NGENE_IO_TSIN, NGENE_IO_TSIN },
-//	.demod_attach = { demod_attach_stb0899, demod_attach_stb0899 },
-//	.fe_config    = { &fe_sidewinder_0, &fe_sidewinder_1 },
-//	.lnb          = { 0x0b, 0x08 },
-//};
+static struct stb0899_config fe_sidewinder_0 = {
+	.demod_address=0x68, .pll_address=0x63,
+};
+
+static struct stb0899_config fe_sidewinder_1 = {
+	.demod_address=0x6b, .pll_address=0x60,
+};
+
+static struct ngene_info ngene_info_sidewinder = {
+	.type         = NGENE_SIDEWINDER,
+	.name         = "Micronas MicSquirrel/Sidewinder Dual DVB-S2",
+	.io_type      = { NGENE_IO_TSIN, NGENE_IO_TSIN },
+	.demod_attach = { demod_attach_stb0899, demod_attach_stb0899 },
+	.fe_config    = { &fe_sidewinder_0, &fe_sidewinder_1 },
+	.lnb          = { 0x0b, 0x08 },
+};
+#endif
 
 /****************************************************************************/
 
@@ -4133,10 +4162,10 @@ static struct stv090x_config fe_mps2 = {
 	.address		= 0x68,
 	.ref_clk		= 27000000,
 
-	.ts1_mode		= STV090x_TSMODE_SERIAL_PUNCTURED,
-	.ts2_mode		= STV090x_TSMODE_SERIAL_PUNCTURED,
+	.ts1_mode		= STV090x_TSMODE_SERIAL_PUNCTURED, /* => TSCFGH.SERIAL & TSCFGH.TSFIFO_DVBCI */
+	.ts2_mode		= STV090x_TSMODE_SERIAL_PUNCTURED, /* => TSCFGH.SERIAL & TSCFGH.TSFIFO_DVBCI */
 
-	.repeater_level = STV090x_RPTLEVEL_64, /* STV090x_RPTLEVEL_16 */
+	.repeater_level = STV090x_RPTLEVEL_16, /* => I2CRPT.ENARPT_LEVEL */
 
 	.tuner_init          = NULL,
 	.tuner_set_mode      = NULL,
@@ -4186,12 +4215,12 @@ static struct stv0900_reg stv0900_regs[] = {
 //	{ R0900_P1_TNRCFG2,        0x80 }, /* v4l: 0x82 */
 //	{ R0900_P2_TNRCFG2,        0x80 }, /* v4l: 0x02 */
 //TSCFG
-//	{ R0900_P1_TSCFGH,         0x60 }, /* v4l: 0xe0 */
-//	{ R0900_P2_TSCFGH,         0x60 }, /* v4l: 0xe0 */
+	{ R0900_P1_TSCFGH,         0x60 }, /* v4l: 0xe0 */
+	{ R0900_P2_TSCFGH,         0x60 }, /* v4l: 0xe0 */
 	{ R0900_P1_TSCFGM,         0x00 }, /* v4l: 0xc0 */
 	{ R0900_P2_TSCFGM,         0x00 }, /* v4l: 0xc0 */
-//	{ R0900_P1_TSCFGL,         0x20 }, /* v4l: 0x20 */
-//	{ R0900_P2_TSCFGL,         0x20 }, /* v4l: 0x20 */
+	{ R0900_P1_TSCFGL,         0x20 }, /* v4l: 0x20 */
+	{ R0900_P2_TSCFGL,         0x20 }, /* v4l: 0x20 */
 
 //	{ R0900_P1_BCLC2S2Q,       0x86 }, /* v4l: 0x86 */
 //	{ R0900_P2_BCLC2S2Q,       0xa5 }, /* v4l: 0x86 */
@@ -4203,36 +4232,35 @@ static struct stv0900_reg stv0900_regs[] = {
 	{ 0xffff,                  0xff }, /* terminate */
 };
 
-//TODO F0900_INV_CLKADCI1 = 1
 static struct stv0900_config fe_mps2 = {
 	.demod_address  = 0x68,
 	.xtal           = 27000000,
-	.clkmode        = 2,/* 0-CLKI, 2-XTALI, else AUTO */
-	.diseqc_mode    = 2,/* 2/3 PWM */
+	.clkmode        = 2, /* 0-CLKI, 2-XTALI, else AUTO => SYNTCTRL.SELOSCI */
+	.diseqc_mode    = 2, /* ??? => DISTXCTL.DISTX_MODE */
 	/* STV0900_USE_REGISTERS_DEFAULT = 0,
 	 * STV0900_SERIAL_PUNCT_CLOCK = 1,
 	 * STV0900_SERIAL_CONT_CLOCK = 2,
 	 * STV0900_PARALLEL_PUNCT_CLOCK = 3,
 	 * STV0900_DVBCI_CLOCK = 4 */
-//	.path1_mode     = 1,
-//	.path2_mode     = 1,
+//	.path1_mode     = 1, /* => TSCFGH.TSFIFO_SERIAL & TSCFGH.TSFIFO_DVBCI */
+//	.path2_mode     = 1, /* => TSCFGH.TSFIFO_SERIAL & TSCFGH.TSFIFO_DVBCI */
 	.ts_config_regs = stv0900_regs,
-	.tun1_maddress  = 0,/* 0x60 */
-	.tun2_maddress  = 3,/* 0x63 */
-	.tun1_adc       = 0,
-	.tun2_adc       = 0,
+	.tun1_maddress  = 0, /* 0x60 */
+	.tun2_maddress  = 3, /* 0x63 */
+	.tun1_adc       = 1, /* => if 1 TSTTNR1=0x26 */
+	.tun2_adc       = 1, /* => if 1 TSTTNR3=0x26 */
 };
 
 static struct stv6110_config tuner_mps2_0 = {
 	.i2c_address = 0x60,
-	.mclk        = 27000000,
-	.clk_div     = 1,
+	.mclk        = 27000000, /* => CTRL1.K */
+	.clk_div     = 1, /* => CTRL2.CO_DIV */
 };
 
 static struct stv6110_config tuner_mps2_1 = {
 	.i2c_address = 0x63,
-	.mclk        = 27000000,
-	.clk_div     = 1,
+	.mclk        = 27000000, /* => CTRL1.K */
+	.clk_div     = 1, /* => CTRL2.CO_DIV */
 };
 
 #endif /* NGENE_STV090X */
@@ -4254,153 +4282,155 @@ static struct ngene_info ngene_info_mps2 = {
 /* Yet unnamed S2 card with dual DVB-S2 demod                               */
 /****************************************************************************/
 
-//static struct stv0900_config fe_s2_0 = {
-//	.addr=0x68, .pll=0x63, .pll_type=0, .nr=0,
-//};
-//
-//static struct stv0900_config fe_s2_1 = {
-//	.addr=0x68, .pll=0x60, .pll_type=0, .nr=1,
-//};
-//
-//static struct ngene_info ngene_info_s2 = {
-//	.type         = NGENE_SIDEWINDER,
-//	.name         = "S2",
-//	.io_type      = { NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN },
-//	.demod_attach = { demod_attach_stv0900, demod_attach_stv0900 },
-//	.fe_config    = { &fe_s2_0, &fe_s2_1 },
-//	.lnb          = { 0x0b, 0x08 },
-//	.tsf          = { 3, 3 },
-//	.fw_version   = 15,
-//};
-
-//static struct stv0900_config fe_s2b_0 = {
-//	.addr=0x68, .pll=0x60, .pll_type=0x10, .nr=0,
-//};
-//
-//static struct stv0900_config fe_s2b_1 = {
-//	.addr=0x68, .pll=0x63, .pll_type=0x10, .nr=1,
-//};
-//
-//static struct ngene_info ngene_info_s2_b = {
-//	.type         = NGENE_SIDEWINDER,
-//	.name         = "S2 V2",
-//	.io_type      = { NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN },
-//	.demod_attach = { demod_attach_stv0900, demod_attach_stv0900 },
-//	.fe_config    = { &fe_s2b_0, &fe_s2b_1 },
-//	.lnb          = { 0x0b, 0x08 },
-//	.tsf          = { 3, 3 },
-//	.fw_version   = 17,
-//};
-//
-///****************************************************************************/
-//
-//static struct xc3028_config tuner_viper_0 = {
-//	.adr = 0x61, .reset=viper_reset_xc
-//};
-//
-//static struct xc3028_config tuner_viper_1 = {
-//	.adr = 0x64, .reset=viper_reset_xc
-//};
-//
-//static struct drxh_config fe_viper_h_0   = { .adr=0x2b };
-//
-//static struct drxh_config fe_viper_h_1   = { .adr=0x29 };
-//
-//static struct drxh_config fe_viper_l_0   = { .adr=0x2b, .type=3931 };
-//
-//static struct drxh_config fe_viper_l_1   = { .adr=0x29, .type=3931 };
-//
-//static struct ngene_info ngene_info_viper_v1 = {
-//	.type         = NGENE_VIPER,
-//	.name         = "Micronas MicViper Dual ATSC DRXH",
-//	.io_type      = { NGENE_IO_TSIN | NGENE_IO_TV,
-//			  NGENE_IO_TSIN | NGENE_IO_TV,
-//			  NGENE_IO_AIN, NGENE_IO_AIN },
-//	.demod_attach = { demod_attach_drxh, demod_attach_drxh },
-//	.fe_config    = { &fe_viper_h_0, &fe_viper_h_1 },
-//	.tuner_config = { &tuner_viper_0, &tuner_viper_1 },
-//	.tuner_attach = { tuner_attach_xc3028, tuner_attach_xc3028 },
-//	.avf          = { 0x43, 0x47 },
-//	.msp          = { 0x40, 0x42 },
-//	.exp          = 0x20,
-//	.exp_init     = 0xf5,
-//	.gate_ctrl    = viper_gate_ctrl,
-//	.switch_ctrl  = viper_switch_ctrl,
-//	.tsf          = { 2, 2 },
-//};
-//
-//static struct ngene_info ngene_info_viper_v2 = {
-//	.type         = NGENE_VIPER,
-//	.name         = "Micronas MicViper Dual ATSC DRXL",
-//	.io_type      = { NGENE_IO_TSIN | NGENE_IO_TV,
-//			  NGENE_IO_TSIN | NGENE_IO_TV,
-//			  NGENE_IO_AIN, NGENE_IO_AIN },
-//	.demod_attach = { demod_attach_drxh, demod_attach_drxh },
-//	.fe_config    = { &fe_viper_l_0, &fe_viper_l_1 },
-//	.tuner_config = { &tuner_viper_0, &tuner_viper_1 },
-//	.tuner_attach = { tuner_attach_xc3028, tuner_attach_xc3028 },
-//	.avf          = { 0x43, 0x47 },
-//	.msp          = { 0x40, 0x42 },
-//	.exp          = 0x38,
-//	.exp_init     = 0xf5,
-//	.gate_ctrl    = viper_gate_ctrl,
-//	.switch_ctrl  = viper_switch_ctrl,
-//	.tsf          = { 2, 2 },
-//};
+#if 0
+static struct stv0900_config fe_s2_0 = {
+	.addr=0x68, .pll=0x63, .pll_type=0, .nr=0,
+};
+
+static struct stv0900_config fe_s2_1 = {
+	.addr=0x68, .pll=0x60, .pll_type=0, .nr=1,
+};
+
+static struct ngene_info ngene_info_s2 = {
+	.type         = NGENE_SIDEWINDER,
+	.name         = "S2",
+	.io_type      = { NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN },
+	.demod_attach = { demod_attach_stv0900, demod_attach_stv0900 },
+	.fe_config    = { &fe_s2_0, &fe_s2_1 },
+	.lnb          = { 0x0b, 0x08 },
+	.tsf          = { 3, 3 },
+	.fw_version   = 15,
+};
+
+static struct stv0900_config fe_s2b_0 = {
+	.addr=0x68, .pll=0x60, .pll_type=0x10, .nr=0,
+};
+
+static struct stv0900_config fe_s2b_1 = {
+	.addr=0x68, .pll=0x63, .pll_type=0x10, .nr=1,
+};
+
+static struct ngene_info ngene_info_s2_b = {
+	.type         = NGENE_SIDEWINDER,
+	.name         = "S2 V2",
+	.io_type      = { NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN },
+	.demod_attach = { demod_attach_stv0900, demod_attach_stv0900 },
+	.fe_config    = { &fe_s2b_0, &fe_s2b_1 },
+	.lnb          = { 0x0b, 0x08 },
+	.tsf          = { 3, 3 },
+	.fw_version   = 17,
+};
+
+/****************************************************************************/
+
+static struct xc3028_config tuner_viper_0 = {
+	.adr = 0x61, .reset=viper_reset_xc
+};
+
+static struct xc3028_config tuner_viper_1 = {
+	.adr = 0x64, .reset=viper_reset_xc
+};
+
+static struct drxh_config fe_viper_h_0   = { .adr=0x2b };
+
+static struct drxh_config fe_viper_h_1   = { .adr=0x29 };
+
+static struct drxh_config fe_viper_l_0   = { .adr=0x2b, .type=3931 };
+
+static struct drxh_config fe_viper_l_1   = { .adr=0x29, .type=3931 };
+
+static struct ngene_info ngene_info_viper_v1 = {
+	.type         = NGENE_VIPER,
+	.name         = "Micronas MicViper Dual ATSC DRXH",
+	.io_type      = { NGENE_IO_TSIN | NGENE_IO_TV,
+			  NGENE_IO_TSIN | NGENE_IO_TV,
+			  NGENE_IO_AIN, NGENE_IO_AIN },
+	.demod_attach = { demod_attach_drxh, demod_attach_drxh },
+	.fe_config    = { &fe_viper_h_0, &fe_viper_h_1 },
+	.tuner_config = { &tuner_viper_0, &tuner_viper_1 },
+	.tuner_attach = { tuner_attach_xc3028, tuner_attach_xc3028 },
+	.avf          = { 0x43, 0x47 },
+	.msp          = { 0x40, 0x42 },
+	.exp          = 0x20,
+	.exp_init     = 0xf5,
+	.gate_ctrl    = viper_gate_ctrl,
+	.switch_ctrl  = viper_switch_ctrl,
+	.tsf          = { 2, 2 },
+};
+
+static struct ngene_info ngene_info_viper_v2 = {
+	.type         = NGENE_VIPER,
+	.name         = "Micronas MicViper Dual ATSC DRXL",
+	.io_type      = { NGENE_IO_TSIN | NGENE_IO_TV,
+			  NGENE_IO_TSIN | NGENE_IO_TV,
+			  NGENE_IO_AIN, NGENE_IO_AIN },
+	.demod_attach = { demod_attach_drxh, demod_attach_drxh },
+	.fe_config    = { &fe_viper_l_0, &fe_viper_l_1 },
+	.tuner_config = { &tuner_viper_0, &tuner_viper_1 },
+	.tuner_attach = { tuner_attach_xc3028, tuner_attach_xc3028 },
+	.avf          = { 0x43, 0x47 },
+	.msp          = { 0x40, 0x42 },
+	.exp          = 0x38,
+	.exp_init     = 0xf5,
+	.gate_ctrl    = viper_gate_ctrl,
+	.switch_ctrl  = viper_switch_ctrl,
+	.tsf          = { 2, 2 },
+};
 
 /****************************************************************************/
 
-//static struct ngene_info ngene_info_vbox_v1 = {
-//	.type         = NGENE_VBOX_V1,
-//	.name         = "VBox Cat's Eye 164E",
-//	.io_type      = { NGENE_IO_TSIN | NGENE_IO_TV,
-//			  NGENE_IO_TSIN | NGENE_IO_TV,
-//			  NGENE_IO_AIN, NGENE_IO_AIN },
-//	.demod_attach = { demod_attach_drxh, demod_attach_drxh },
-//	.fe_config    = { &fe_viper_h_0, &fe_viper_h_1 },
-//	.tuner_config = { &tuner_viper_0, &tuner_viper_1 },
-//	.tuner_attach = { tuner_attach_xc3028, tuner_attach_xc3028 },
-//	.avf          = { 0x43, 0x47 },
-//	.msp          = { 0x40, 0x42 },
-//	.exp          = 0x20,
-//	.exp_init     = 0xf5,
-//	.gate_ctrl    = viper_gate_ctrl,
-//	.switch_ctrl  = viper_switch_ctrl,
-//	.tsf          = { 2, 2 },
-//};
+static struct ngene_info ngene_info_vbox_v1 = {
+	.type         = NGENE_VBOX_V1,
+	.name         = "VBox Cat's Eye 164E",
+	.io_type      = { NGENE_IO_TSIN | NGENE_IO_TV,
+			  NGENE_IO_TSIN | NGENE_IO_TV,
+			  NGENE_IO_AIN, NGENE_IO_AIN },
+	.demod_attach = { demod_attach_drxh, demod_attach_drxh },
+	.fe_config    = { &fe_viper_h_0, &fe_viper_h_1 },
+	.tuner_config = { &tuner_viper_0, &tuner_viper_1 },
+	.tuner_attach = { tuner_attach_xc3028, tuner_attach_xc3028 },
+	.avf          = { 0x43, 0x47 },
+	.msp          = { 0x40, 0x42 },
+	.exp          = 0x20,
+	.exp_init     = 0xf5,
+	.gate_ctrl    = viper_gate_ctrl,
+	.switch_ctrl  = viper_switch_ctrl,
+	.tsf          = { 2, 2 },
+};
 
 /****************************************************************************/
 
-//static struct ngene_info ngene_info_vbox_v2 = {
-//	.type         = NGENE_VBOX_V2,
-//	.name         = "VBox Cat's Eye 164E",
-//	.io_type      = { NGENE_IO_TSIN | NGENE_IO_TV,
-//			  NGENE_IO_TSIN | NGENE_IO_TV,
-//			  NGENE_IO_AIN, NGENE_IO_AIN },
-//	.demod_attach = { demod_attach_drxh, demod_attach_drxh },
-//	.fe_config    = { &fe_viper_h_0, &fe_viper_h_1 },
-//	.tuner_config = { &tuner_viper_0, &tuner_viper_1 },
-//	.tuner_attach = { tuner_attach_xc3028, tuner_attach_xc3028 },
-//	.avf          = { 0x43, 0x47 },
-//	.msp          = { 0x40, 0x42 },
-//	.exp          = 0x20,
-//	.exp_init     = 0xf5,
-//	.gate_ctrl    = viper_gate_ctrl,
-//	.switch_ctrl  = viper_switch_ctrl2,
-//	.tsf          = { 2, 2 },
-//};
+static struct ngene_info ngene_info_vbox_v2 = {
+	.type         = NGENE_VBOX_V2,
+	.name         = "VBox Cat's Eye 164E",
+	.io_type      = { NGENE_IO_TSIN | NGENE_IO_TV,
+			  NGENE_IO_TSIN | NGENE_IO_TV,
+			  NGENE_IO_AIN, NGENE_IO_AIN },
+	.demod_attach = { demod_attach_drxh, demod_attach_drxh },
+	.fe_config    = { &fe_viper_h_0, &fe_viper_h_1 },
+	.tuner_config = { &tuner_viper_0, &tuner_viper_1 },
+	.tuner_attach = { tuner_attach_xc3028, tuner_attach_xc3028 },
+	.avf          = { 0x43, 0x47 },
+	.msp          = { 0x40, 0x42 },
+	.exp          = 0x20,
+	.exp_init     = 0xf5,
+	.gate_ctrl    = viper_gate_ctrl,
+	.switch_ctrl  = viper_switch_ctrl2,
+	.tsf          = { 2, 2 },
+};
 
 /****************************************************************************/
 
-//static struct ngene_info ngene_info_racer = {
-//	.type         = NGENE_RACER,
-//	.name         = "Micronas MicRacer HDTV Decoder Card",
-//	.io_type      = { NGENE_IO_HDTV, NGENE_IO_NONE,
-//			  NGENE_IO_AIN, NGENE_IO_NONE,
-//			  NGENE_IO_TSOUT },
-//	.i2s          = { 0, 0, 1, 0 },
-//	.fw_version   = 17,
-//};
+static struct ngene_info ngene_info_racer = {
+	.type         = NGENE_RACER,
+	.name         = "Micronas MicRacer HDTV Decoder Card",
+	.io_type      = { NGENE_IO_HDTV, NGENE_IO_NONE,
+			  NGENE_IO_AIN, NGENE_IO_NONE,
+			  NGENE_IO_TSOUT },
+	.i2s          = { 0, 0, 1, 0 },
+	.fw_version   = 17,
+};
+#endif
 
 
 /****************************************************************************/
@@ -4415,13 +4445,13 @@ static struct ngene_info ngene_info_mps2 = {
 /****************************************************************************/
 
 static const struct pci_device_id ngene_id_tbl[] __devinitdata = {
-//TODO	NGENE_ID( 0x153b, 0x1167, ngene_info_terratec ),
 	NGENE_ID( 0x18c3, 0xabc3, ngene_info_mps2 ),
 #if 0 /* not (yet?) supported */
 	NGENE_ID( 0x18c3, 0x0000, ngene_info_appboard ),
 	NGENE_ID( 0x18c3, 0x0004, ngene_info_appboard ),
 	NGENE_ID( 0x18c3, 0x8011, ngene_info_appboard ),
 	NGENE_ID( 0x18c3, 0x8015, ngene_info_appboard_ntsc ),
+	NGENE_ID( 0x153b, 0x1167, ngene_info_terratec ),
 	NGENE_ID( 0x18c3, 0x0030, ngene_info_python ),
 	NGENE_ID( 0x18c3, 0x0052, ngene_info_sidewinder ),
 	NGENE_ID( 0x18c3, 0x8f00, ngene_info_racer ),