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| author | Andrew de Quincy <devnull@localhost> | 2005-07-22 01:07:26 +0000 |
|---|---|---|
| committer | Andrew de Quincy <devnull@localhost> | 2005-07-22 01:07:26 +0000 |
| commit | 4a1771d50a129c6ad9bf789f79c97ba10ab9494b (patch) | |
| tree | 5b1364315f8d4514867f4c2ed7c2892eb4b2e900 /linux/drivers | |
| parent | 19bff174c9562127f0be0a9a90785be79eff15a4 (diff) | |
| download | mediapointer-dvb-s2-4a1771d50a129c6ad9bf789f79c97ba10ab9494b.tar.gz mediapointer-dvb-s2-4a1771d50a129c6ad9bf789f79c97ba10ab9494b.tar.bz2 | |
Check for division by 0
FIx tuning.
Signed-off-by: Andrew de Quincey <adq_dvb@lidskialf.net>
Diffstat (limited to 'linux/drivers')
| -rw-r--r-- | linux/drivers/media/dvb/frontends/s5h1420.c | 28 |
1 files changed, 18 insertions, 10 deletions
diff --git a/linux/drivers/media/dvb/frontends/s5h1420.c b/linux/drivers/media/dvb/frontends/s5h1420.c index f26f0474b..2c005e146 100644 --- a/linux/drivers/media/dvb/frontends/s5h1420.c +++ b/linux/drivers/media/dvb/frontends/s5h1420.c @@ -340,6 +340,10 @@ static int s5h1420_read_status(struct dvb_frontend* fe, fe_status_t* status) tmp = (tmp * 2 * 7) / 8; break; } + if (tmp == 0) { + printk("s5h1420: avoided division by 0\n"); + tmp = 1; + } tmp = state->fclk / tmp; /* set the MPEG_CLK_INTL for the calculated data rate */ @@ -578,6 +582,7 @@ static int s5h1420_set_frontend(struct dvb_frontend* fe, struct s5h1420_state* state = fe->demodulator_priv; int frequency_delta; struct dvb_frontend_tune_settings fesettings; + u32 tmp; /* check if we should do a fast-tune */ memcpy(&fesettings.parameters, p, sizeof(struct dvb_frontend_parameters)); @@ -589,20 +594,17 @@ static int s5h1420_set_frontend(struct dvb_frontend* fe, (state->fec_inner == p->u.qpsk.fec_inner) && (state->symbol_rate == p->u.qpsk.symbol_rate)) { - s5h1420_setfreqoffset(state, frequency_delta); + if (state->config->pll_set) { + s5h1420_writereg (state, 0x02, s5h1420_readreg(state,0x02) | 1); + state->config->pll_set(fe, p, &tmp); + s5h1420_setfreqoffset(state, p->frequency - tmp); + } return 0; } /* first of all, software reset */ s5h1420_reset(state); - /* set tuner PLL */ - if (state->config->pll_set) { - s5h1420_writereg (state, 0x02, s5h1420_readreg(state,0x02) | 1); - state->config->pll_set(fe, p, &state->tunedfreq); - s5h1420_writereg (state, 0x02, s5h1420_readreg(state,0x02) & 0xfe); - } - /* set s5h1420 fclk PLL according to desired symbol rate */ if (p->u.qpsk.symbol_rate > 28000000) { state->fclk = 88000000; @@ -623,6 +625,7 @@ static int s5h1420_set_frontend(struct dvb_frontend* fe, /* set misc registers */ s5h1420_writereg(state, 0x02, 0x00); + s5h1420_writereg(state, 0x06, 0x00); s5h1420_writereg(state, 0x07, 0xb0); s5h1420_writereg(state, 0x0a, 0xe7); s5h1420_writereg(state, 0x0b, 0x78); @@ -640,8 +643,12 @@ static int s5h1420_set_frontend(struct dvb_frontend* fe, /* start QPSK */ s5h1420_writereg(state, 0x05, s5h1420_readreg(state, 0x05) | 1); - /* set initial offset */ - s5h1420_setfreqoffset(state, p->frequency - state->tunedfreq); + /* set tuner PLL */ + if (state->config->pll_set) { + s5h1420_writereg (state, 0x02, s5h1420_readreg(state,0x02) | 1); + state->config->pll_set(fe, p, &tmp); + s5h1420_setfreqoffset(state, p->frequency - tmp); + } /* set the reset of the parameters */ s5h1420_setsymbolrate(state, p); @@ -650,6 +657,7 @@ static int s5h1420_set_frontend(struct dvb_frontend* fe, state->fec_inner = p->u.qpsk.fec_inner; state->symbol_rate = p->u.qpsk.symbol_rate; state->postlocked = 0; + state->tunedfreq = p->frequency; return 0; } |