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-rw-r--r--linux/drivers/media/dvb/frontends/cx24110.c281
1 files changed, 148 insertions, 133 deletions
diff --git a/linux/drivers/media/dvb/frontends/cx24110.c b/linux/drivers/media/dvb/frontends/cx24110.c
index 87d26398b..0ff6ceae1 100644
--- a/linux/drivers/media/dvb/frontends/cx24110.c
+++ b/linux/drivers/media/dvb/frontends/cx24110.c
@@ -1,4 +1,4 @@
-/*
+/*
cx24110 - Single Chip Satellite Channel Receiver driver module
used on the the Pinnacle PCTV Sat cards
@@ -21,14 +21,14 @@
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-*/
+*/
-/* currently drives the Conexant cx24110 and cx24106 QPSK decoder chips,
+/* currently drives the Conexant cx24110 and cx24106 QPSK decoder chips,
connected via i2c to a Conexant Fusion 878 (this uses the standard
linux bttv driver). The tuner chip is supposed to be the Conexant
cx24108 digital satellite tuner, driven through the tuner interface
of the cx24110. SEC is also supplied by the cx24110.
-
+
Oct-2002: Migrate to API V3 (formerly known as NEWSTRUCT)
*/
@@ -47,20 +47,21 @@ static int debug = 0;
static
struct dvb_frontend_info cx24110_info = {
- name: "Conexant CX24110 with CX24108 tuner, aka HM1221/HM1811",
- type: FE_QPSK,
- frequency_min: 950000,
- frequency_max: 2150000,
- frequency_stepsize: 1011, /* kHz for QPSK frontends, can be reduced to 253kHz on the cx24108 tuner */
- frequency_tolerance: 29500,
- symbol_rate_min: 1000000,
- symbol_rate_max: 45000000,
-/* symbol_rate_tolerance: ???,*/
- notifier_delay: 50, /* 1/20 s */
- caps: FE_CAN_INVERSION_AUTO |
+ .name = "Conexant CX24110 with CX24108 tuner, aka HM1221/HM1811",
+ .type = FE_QPSK,
+ .frequency_min = 950000,
+ .frequency_max = 2150000,
+ .frequency_stepsize = 1011, /* kHz for QPSK frontends, can be reduced
+ to 253kHz on the cx24108 tuner */
+ .frequency_tolerance = 29500,
+ .symbol_rate_min = 1000000,
+ .symbol_rate_max = 45000000,
+/* .symbol_rate_tolerance = ???,*/
+ .notifier_delay = 50, /* 1/20 s */
+ .caps = FE_CAN_INVERSION_AUTO |
FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
- FE_CAN_QPSK |
+ FE_CAN_QPSK |
FE_CAN_CLEAN_SETUP
};
/* fixme: are these values correct? especially ..._tolerance and caps */
@@ -84,7 +85,7 @@ struct {u8 reg; u8 data;} cx24110_regdata[]=
{0x0c,0x11}, /* no parity bytes, large hold time, serial data out */
{0x0d,0x6f}, /* @ RS Sync/Unsync thresholds */
{0x10,0x40}, /* chip doc is misleading here: write bit 6 as 1
- to avoid starting the BER counter. Reset the
+ to avoid starting the BER counter. Reset the
CRC test bit. Finite counting selected */
{0x15,0xff}, /* @ size of the limited time window for RS BER
estimation. It is <value>*256 RS blocks, this
@@ -97,7 +98,7 @@ struct {u8 reg; u8 data;} cx24110_regdata[]=
registers as they are after reset... */
{0x21,0x10}, /* @ during AutoAcq, search each viterbi setting
only once */
- {0x23,0x18}, /* @ size of the limited time window for Viterbi BER
+ {0x23,0x18}, /* @ size of the limited time window for Viterbi BER
estimation. It is <value>*65536 channel bits, i.e.
approx. 38ms at 27.5MS/s, rate 3/4 */
{0x24,0x24}, /* do not trigger Viterbi CRC test. Finite count window */
@@ -134,9 +135,9 @@ static
int cx24110_writereg (struct dvb_i2c_bus *i2c, int reg, int data)
{
u8 buf [] = { reg, data };
- struct i2c_msg msg = { addr: 0x55, flags: 0, buf: buf, len: 2 };
+ struct i2c_msg msg = { .addr = 0x55, .flags = 0, .buf = buf, .len = 2 };
/* fixme (medium): HW allows any i2c address. 0x55 is the default, but the
- cx24110 might show up at any address */
+ cx24110 might show up at any address */
int err;
if ((err = i2c->xfer (i2c, &msg, 1)) != 1) {
@@ -154,8 +155,8 @@ u8 cx24110_readreg (struct dvb_i2c_bus *i2c, u8 reg)
int ret;
u8 b0 [] = { reg };
u8 b1 [] = { 0 };
- struct i2c_msg msg [] = { { addr: 0x55, flags: 0, buf: b0, len: 1 },
- { addr: 0x55, flags: I2C_M_RD, buf: b1, len: 1 } };
+ struct i2c_msg msg [] = { { .addr = 0x55, .flags = 0, .buf = b0, .len = 1 },
+ { .addr = 0x55, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
/* fixme (medium): address might be different from 0x55 */
ret = i2c->xfer (i2c, msg, 2);
@@ -171,28 +172,32 @@ int cx24108_write (struct dvb_i2c_bus *i2c, u32 data)
{
/* tuner data is 21 bits long, must be left-aligned in data */
/* tuner cx24108 is written through a dedicated 3wire interface on the demod chip */
-/* fixme (low): add error handling, avoid infinite loops if HW fails... */
+/* FIXME (low): add error handling, avoid infinite loops if HW fails... */
dprintk("cx24110 debug: cx24108_write(%8.8x)\n",data);
cx24110_writereg(i2c,0x6d,0x30); /* auto mode at 62kHz */
cx24110_writereg(i2c,0x70,0x15); /* auto mode 21 bits */
/* if the auto tuner writer is still busy, clear it out */
- while(cx24110_readreg(i2c,0x6d)&0x80) cx24110_writereg(i2c,0x72,0);
+ while (cx24110_readreg(i2c,0x6d)&0x80)
+ cx24110_writereg(i2c,0x72,0);
/* write the topmost 8 bits */
cx24110_writereg(i2c,0x72,(data>>24)&0xff);
/* wait for the send to be completed */
- while((cx24110_readreg(i2c,0x6d)&0xc0)==0x80);
+ while ((cx24110_readreg(i2c,0x6d)&0xc0)==0x80)
+ ;
/* send another 8 bytes */
cx24110_writereg(i2c,0x72,(data>>16)&0xff);
- while((cx24110_readreg(i2c,0x6d)&0xc0)==0x80);
+ while ((cx24110_readreg(i2c,0x6d)&0xc0)==0x80)
+ ;
/* and the topmost 5 bits of this byte */
cx24110_writereg(i2c,0x72,(data>>8)&0xff);
- while((cx24110_readreg(i2c,0x6d)&0xc0)==0x80);
+ while ((cx24110_readreg(i2c,0x6d)&0xc0)==0x80)
+ ;
/* now strobe the enable line once */
cx24110_writereg(i2c,0x6d,0x32);
cx24110_writereg(i2c,0x6d,0x30);
-
+
return 0;
}
@@ -201,10 +206,10 @@ static
int cx24108_set_tv_freq (struct dvb_i2c_bus *i2c, u32 freq)
{
/* fixme (low): error handling */
- int i, a, n, pump;
+ int i, a, n, pump;
u32 band, pll;
-
+
static const u32 osci[]={ 950000,1019000,1075000,1178000,
1296000,1432000,1576000,1718000,
1856000,2036000,2150000};
@@ -212,23 +217,28 @@ int cx24108_set_tv_freq (struct dvb_i2c_bus *i2c, u32 freq)
0x00101000,0x00102000,0x00104000,
0x00108000,0x00110000,0x00120000,
0x00140000};
-
+
#define XTAL 1011100 /* Hz, really 1.0111 MHz and a /10 prescaler */
dprintk("cx24110 debug: cx24108_set_tv_freq, freq=%d\n",freq);
-
- if(freq<950000) freq=950000; /* kHz */
- if(freq>2150000) freq=2150000; /* satellite IF is 950..2150MHz */
+
+ if (freq<950000)
+ freq=950000; /* kHz */
+ if (freq>2150000)
+ freq=2150000; /* satellite IF is 950..2150MHz */
/* decide which VCO to use for the input frequency */
- for(i=1;(i<sizeof(osci)/sizeof(osci[0]))&&(osci[i]<freq);i++);
+ for (i=1;(i<sizeof(osci)/sizeof(osci[0]))&&(osci[i]<freq);i++)
+ ;
dprintk("cx24110 debug: select vco #%d (f=%d)\n",i,freq);
band=bandsel[i];
/* the gain values must be set by SetSymbolrate */
/* compute the pll divider needed, from Conexant data sheet,
resolved for (n*32+a), remember f(vco) is f(receive) *2 or *4,
- depending on the divider bit. It is set to /4 on the 2 lowest
+ depending on the divider bit. It is set to /4 on the 2 lowest
bands */
n=((i<=2?2:1)*freq*10L)/(XTAL/100);
- a=n%32; n/=32; if(a==0) n--;
+ a=n%32; n/=32;
+ if (a==0)
+ n--;
pump=(freq<(osci[i-1]+osci[i])/2);
pll=0xf8000000|
((pump?1:2)<<(14+11))|
@@ -248,7 +258,8 @@ int cx24108_set_tv_freq (struct dvb_i2c_bus *i2c, u32 freq)
dvb_delay(HZ/10); /* wait a moment for the tuner pll to lock */
/* tuner pll lock can be monitored on GPIO pin 4 of cx24110 */
- while(!(cx24110_readreg(i2c,0x66)&0x20)&&i<1000) i++;
+ while (!(cx24110_readreg(i2c,0x66)&0x20)&&i<1000)
+ i++;
dprintk("cx24110 debug: GPIO IN=%2.2x(loop=%d)\n",
cx24110_readreg(i2c,0x66),i);
return 0;
@@ -261,11 +272,11 @@ int cx24110_init (struct dvb_i2c_bus *i2c)
{
/* fixme (low): error handling */
int i;
-
+
dprintk("%s: init chip\n", __FUNCTION__);
for(i=0;i<sizeof(cx24110_regdata)/sizeof(cx24110_regdata[0]);i++) {
- cx24110_writereg(i2c,cx24110_regdata[i].reg,cx24110_regdata[i].data);
+ cx24110_writereg(i2c,cx24110_regdata[i].reg,cx24110_regdata[i].data);
};
return 0;
@@ -320,34 +331,35 @@ int cx24110_set_fec (struct dvb_i2c_bus *i2c, fe_code_rate_t fec)
/* Well, the AutoAcq engine of the cx24106 and 24110 automatically
searches all enabled viterbi rates, and can handle non-standard
rates as well. */
-
- if (fec>FEC_AUTO)
+
+ if (fec>FEC_AUTO)
fec=FEC_AUTO;
- if(fec==FEC_AUTO) { /* (re-)establish AutoAcq behaviour */
- cx24110_writereg(i2c,0x37,cx24110_readreg(i2c,0x37)&0xdf);
- /* clear AcqVitDis bit */
- cx24110_writereg(i2c,0x18,0xae);
- /* allow all DVB standard code rates */
- cx24110_writereg(i2c,0x05,(cx24110_readreg(i2c,0x05)&0xf0)|0x3);
- /* set nominal Viterbi rate 3/4 */
- cx24110_writereg(i2c,0x22,(cx24110_readreg(i2c,0x22)&0xf0)|0x3);
- /* set current Viterbi rate 3/4 */
- cx24110_writereg(i2c,0x1a,0x05); cx24110_writereg(i2c,0x1b,0x06);
- /* set the puncture registers for code rate 3/4 */
- return 0;
+ if (fec==FEC_AUTO) { /* (re-)establish AutoAcq behaviour */
+ cx24110_writereg(i2c,0x37,cx24110_readreg(i2c,0x37)&0xdf);
+ /* clear AcqVitDis bit */
+ cx24110_writereg(i2c,0x18,0xae);
+ /* allow all DVB standard code rates */
+ cx24110_writereg(i2c,0x05,(cx24110_readreg(i2c,0x05)&0xf0)|0x3);
+ /* set nominal Viterbi rate 3/4 */
+ cx24110_writereg(i2c,0x22,(cx24110_readreg(i2c,0x22)&0xf0)|0x3);
+ /* set current Viterbi rate 3/4 */
+ cx24110_writereg(i2c,0x1a,0x05); cx24110_writereg(i2c,0x1b,0x06);
+ /* set the puncture registers for code rate 3/4 */
+ return 0;
} else {
- cx24110_writereg(i2c,0x37,cx24110_readreg(i2c,0x37)|0x20);
- /* set AcqVitDis bit */
- if(rate[fec]>0) {
- cx24110_writereg(i2c,0x05,(cx24110_readreg(i2c,0x05)&0xf0)|rate[fec]);
- /* set nominal Viterbi rate */
- cx24110_writereg(i2c,0x22,(cx24110_readreg(i2c,0x22)&0xf0)|rate[fec]);
- /* set current Viterbi rate */
- cx24110_writereg(i2c,0x1a,g1[fec]);
- cx24110_writereg(i2c,0x1b,g2[fec]);
- /* not sure if this is the right way: I always used AutoAcq mode */
- } else return -EOPNOTSUPP;
+ cx24110_writereg(i2c,0x37,cx24110_readreg(i2c,0x37)|0x20);
+ /* set AcqVitDis bit */
+ if(rate[fec]>0) {
+ cx24110_writereg(i2c,0x05,(cx24110_readreg(i2c,0x05)&0xf0)|rate[fec]);
+ /* set nominal Viterbi rate */
+ cx24110_writereg(i2c,0x22,(cx24110_readreg(i2c,0x22)&0xf0)|rate[fec]);
+ /* set current Viterbi rate */
+ cx24110_writereg(i2c,0x1a,g1[fec]);
+ cx24110_writereg(i2c,0x1b,g2[fec]);
+ /* not sure if this is the right way: I always used AutoAcq mode */
+ } else
+ return -EOPNOTSUPP;
/* fixme (low): which is the correct return code? */
};
return 0;
@@ -361,7 +373,7 @@ fe_code_rate_t cx24110_get_fec (struct dvb_i2c_bus *i2c)
i=cx24110_readreg(i2c,0x22)&0x0f;
if(!(i&0x08)) {
- return FEC_1_2 + i - 1;
+ return FEC_1_2 + i - 1;
} else {
/* fixme (low): a special code rate has been selected. In theory, we need to
return a denominator value, a numerator value, and a pair of puncture
@@ -391,50 +403,51 @@ dprintk("cx24110 debug: entering %s(%d)\n",__FUNCTION__,srate);
if (srate<500000)
srate=500000;
- for(i=0;(i<sizeof(bands)/sizeof(bands[0]))&&(srate>bands[i]);i++);
+ for(i=0;(i<sizeof(bands)/sizeof(bands[0]))&&(srate>bands[i]);i++)
+ ;
/* first, check which sample rate is appropriate: 45, 60 80 or 90 MHz,
and set the PLL accordingly (R07[1:0] Fclk, R06[7:4] PLLmult,
R06[3:0] PLLphaseDetGain */
tmp=cx24110_readreg(i2c,0x07)&0xfc;
if(srate<90999000UL/4) { /* sample rate 45MHz*/
- cx24110_writereg(i2c,0x07,tmp);
- cx24110_writereg(i2c,0x06,0x78);
- fclk=90999000UL/2;
+ cx24110_writereg(i2c,0x07,tmp);
+ cx24110_writereg(i2c,0x06,0x78);
+ fclk=90999000UL/2;
} else if(srate<60666000UL/2) { /* sample rate 60MHz */
- cx24110_writereg(i2c,0x07,tmp|0x1);
- cx24110_writereg(i2c,0x06,0xa5);
- fclk=60666000UL;
+ cx24110_writereg(i2c,0x07,tmp|0x1);
+ cx24110_writereg(i2c,0x06,0xa5);
+ fclk=60666000UL;
} else if(srate<80888000UL/2) { /* sample rate 80MHz */
- cx24110_writereg(i2c,0x07,tmp|0x2);
- cx24110_writereg(i2c,0x06,0x87);
- fclk=80888000UL;
+ cx24110_writereg(i2c,0x07,tmp|0x2);
+ cx24110_writereg(i2c,0x06,0x87);
+ fclk=80888000UL;
} else { /* sample rate 90MHz */
- cx24110_writereg(i2c,0x07,tmp|0x3);
- cx24110_writereg(i2c,0x06,0x78);
- fclk=90999000UL;
+ cx24110_writereg(i2c,0x07,tmp|0x3);
+ cx24110_writereg(i2c,0x06,0x78);
+ fclk=90999000UL;
};
dprintk("cx24110 debug: fclk %d Hz\n",fclk);
/* we need to divide two integers with approx. 27 bits in 32 bit
arithmetic giving a 25 bit result */
/* the maximum dividend is 90999000/2, 0x02b6446c, this number is
also the most complex divisor. Hence, the dividend has,
- assuming 32bit unsigned arithmetic, 6 clear bits on top, the
+ assuming 32bit unsigned arithmetic, 6 clear bits on top, the
divisor 2 unused bits at the bottom. Also, the quotient is
always less than 1/2. Borrowed from VES1893.c, of course */
tmp=srate<<6;
BDRI=fclk>>2;
ratio=(tmp/BDRI);
-
+
tmp=(tmp%BDRI)<<8;
ratio=(ratio<<8)+(tmp/BDRI);
-
+
tmp=(tmp%BDRI)<<8;
ratio=(ratio<<8)+(tmp/BDRI);
tmp=(tmp%BDRI)<<1;
ratio=(ratio<<1)+(tmp/BDRI);
-
+
dprintk("srate= %d (range %d, up to %d)\n", srate,i,bands[i]);
dprintk("fclk = %d\n", fclk);
dprintk("ratio= %08x\n", ratio);
@@ -443,12 +456,12 @@ dprintk("cx24110 debug: entering %s(%d)\n",__FUNCTION__,srate);
cx24110_writereg(i2c, 0x2, (ratio>>8)&0xff);
cx24110_writereg(i2c, 0x3, (ratio)&0xff);
- /* please see the cx24108 data sheet, this controls tuner gain
+ /* please see the cx24108 data sheet, this controls tuner gain
and bandwidth settings depending on the symbol rate */
cx24108_write(i2c,vga[i]);
cx24108_write(i2c,vca[i]); /* gain is set on tuner chip */
cx24110_writereg(i2c,0x56,filtune[i]); /* bw is contolled by filtune voltage */
-
+
return 0;
}
@@ -459,23 +472,26 @@ int cx24110_set_voltage (struct dvb_i2c_bus *i2c, fe_sec_voltage_t voltage)
{
switch (voltage) {
case SEC_VOLTAGE_13:
- return cx24110_writereg(i2c,0x76,(cx24110_readreg(i2c,0x76)&0x3b)|0xc0);
+ return cx24110_writereg(i2c,0x76,(cx24110_readreg(i2c,0x76)&0x3b)|0xc0);
case SEC_VOLTAGE_18:
- return cx24110_writereg(i2c,0x76,(cx24110_readreg(i2c,0x76)&0x3b)|0x40);
+ return cx24110_writereg(i2c,0x76,(cx24110_readreg(i2c,0x76)&0x3b)|0x40);
default:
return -EINVAL;
};
}
-static void sendDiSEqCMessage(struct dvb_i2c_bus *i2c, struct dvb_diseqc_master_cmd *pCmd) {
- int i, rv;
- for (i = 0; i < pCmd->msg_len; i++)
- cx24110_writereg(i2c, 0x79 + i, pCmd->msg[i]);
+static void sendDiSEqCMessage(struct dvb_i2c_bus *i2c, struct dvb_diseqc_master_cmd *pCmd)
+{
+ int i, rv;
+
+ for (i = 0; i < pCmd->msg_len; i++)
+ cx24110_writereg(i2c, 0x79 + i, pCmd->msg[i]);
- rv = cx24110_readreg(i2c, 0x76);
+ rv = cx24110_readreg(i2c, 0x76);
- cx24110_writereg(i2c, 0x76, ((rv & 0x90) | 0x40) | ((pCmd->msg_len-3) & 3));
- for(i=500;i-->0&&!(cx24110_readreg(i2c,0x76)&0x40);); /* wait for LNB ready */
+ cx24110_writereg(i2c, 0x76, ((rv & 0x90) | 0x40) | ((pCmd->msg_len-3) & 3));
+ for (i=500; i-- > 0 && !(cx24110_readreg(i2c,0x76)&0x40);)
+ ; /* wait for LNB ready */
}
@@ -484,7 +500,7 @@ int cx24110_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg)
{
struct dvb_i2c_bus *i2c = fe->i2c;
static int lastber=0, lastbyer=0,lastbler=0, lastesn0=0, sum_bler=0;
-
+
switch (cmd) {
case FE_GET_INFO:
memcpy (arg, &cx24110_info, sizeof(struct dvb_frontend_info));
@@ -515,32 +531,32 @@ int cx24110_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg)
*status |= FE_HAS_LOCK;
if(cx24110_readreg(i2c,0x10)&0x40) {
- /* the RS error counter has finished one counting window */
- cx24110_writereg(i2c,0x10,0x60); /* select the byer reg */
- lastbyer=cx24110_readreg(i2c,0x12)|
- (cx24110_readreg(i2c,0x13)<<8)|
- (cx24110_readreg(i2c,0x14)<<16);
- cx24110_writereg(i2c,0x10,0x70); /* select the bler reg */
- lastbler=cx24110_readreg(i2c,0x12)|
- (cx24110_readreg(i2c,0x13)<<8)|
- (cx24110_readreg(i2c,0x14)<<16);
- cx24110_writereg(i2c,0x10,0x20); /* start new count window */
- sum_bler += lastbler;
- }
+ /* the RS error counter has finished one counting window */
+ cx24110_writereg(i2c,0x10,0x60); /* select the byer reg */
+ lastbyer=cx24110_readreg(i2c,0x12)|
+ (cx24110_readreg(i2c,0x13)<<8)|
+ (cx24110_readreg(i2c,0x14)<<16);
+ cx24110_writereg(i2c,0x10,0x70); /* select the bler reg */
+ lastbler=cx24110_readreg(i2c,0x12)|
+ (cx24110_readreg(i2c,0x13)<<8)|
+ (cx24110_readreg(i2c,0x14)<<16);
+ cx24110_writereg(i2c,0x10,0x20); /* start new count window */
+ sum_bler += lastbler;
+ }
if(cx24110_readreg(i2c,0x24)&0x10) {
- /* the Viterbi error counter has finished one counting window */
- cx24110_writereg(i2c,0x24,0x04); /* select the ber reg */
- lastber=cx24110_readreg(i2c,0x25)|
- (cx24110_readreg(i2c,0x26)<<8);
- cx24110_writereg(i2c,0x24,0x04); /* start new count window */
- cx24110_writereg(i2c,0x24,0x14);
- }
+ /* the Viterbi error counter has finished one counting window */
+ cx24110_writereg(i2c,0x24,0x04); /* select the ber reg */
+ lastber=cx24110_readreg(i2c,0x25)|
+ (cx24110_readreg(i2c,0x26)<<8);
+ cx24110_writereg(i2c,0x24,0x04); /* start new count window */
+ cx24110_writereg(i2c,0x24,0x14);
+ }
if(cx24110_readreg(i2c,0x6a)&0x80) {
- /* the Es/N0 error counter has finished one counting window */
- lastesn0=cx24110_readreg(i2c,0x69)|
- (cx24110_readreg(i2c,0x68)<<8);
- cx24110_writereg(i2c,0x6a,0x84); /* start new count window */
- }
+ /* the Es/N0 error counter has finished one counting window */
+ lastesn0=cx24110_readreg(i2c,0x69)|
+ (cx24110_readreg(i2c,0x68)<<8);
+ cx24110_writereg(i2c,0x6a,0x84); /* start new count window */
+ }
break;
}
@@ -568,7 +584,7 @@ int cx24110_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg)
break;
}
- case FE_READ_UNCORRECTED_BLOCKS:
+ case FE_READ_UNCORRECTED_BLOCKS:
{
*(u16*) arg = sum_bler&0xffff;
sum_bler=0;
@@ -595,18 +611,19 @@ int cx24110_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg)
/* cannot read back tuner settings (freq). Need to have some private storage */
sclk = cx24110_readreg (i2c, 0x07) & 0x03;
-/* ok, real AFC (FEDR) freq. is afc/2^24*fsamp, fsamp=45/60/80/90MHz. Need 64 bit arithmetic. Is thiss possible in the kernel? */
+/* ok, real AFC (FEDR) freq. is afc/2^24*fsamp, fsamp=45/60/80/90MHz.
+ * Need 64 bit arithmetic. Is thiss possible in the kernel? */
if (sclk==0) sclk=90999000L/2L;
else if (sclk==1) sclk=60666000L;
else if (sclk==2) sclk=80888000L;
- else sclk=90999000L;
+ else sclk=90999000L;
sclk>>=8;
afc = sclk*(cx24110_readreg (i2c, 0x44)&0x1f)+
((sclk*cx24110_readreg (i2c, 0x45))>>8)+
((sclk*cx24110_readreg (i2c, 0x46))>>16);
-
+
p->frequency += afc;
- p->inversion = (cx24110_readreg (i2c, 0x22) & 0x10) ?
+ p->inversion = (cx24110_readreg (i2c, 0x22) & 0x10) ?
INVERSION_ON : INVERSION_OFF;
p->u.qpsk.fec_inner = cx24110_get_fec (i2c);
break;
@@ -614,14 +631,14 @@ int cx24110_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg)
case FE_SLEEP:
/* cannot do this from the FE end. How to communicate this to the place where it can be done? */
- break;
+ break;
case FE_INIT:
return cx24110_init (i2c);
case FE_RESET:
/* no idea what to do for this call */
/* fixme (medium): fill me in */
- break;
+ break;
case FE_SET_TONE:
return cx24110_writereg(i2c,0x76,(cx24110_readreg(i2c,0x76)&~0x10)|((((fe_sec_tone_mode_t) arg)==SEC_TONE_ON)?0x10:0));
@@ -629,17 +646,15 @@ int cx24110_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg)
return cx24110_set_voltage (i2c, (fe_sec_voltage_t) arg);
case FE_DISEQC_SEND_MASTER_CMD:
- {
- sendDiSEqCMessage(i2c, (struct dvb_diseqc_master_cmd*) arg);
- return 0;
- }
+ sendDiSEqCMessage(i2c, (struct dvb_diseqc_master_cmd*) arg);
+ return 0;
default:
return -EOPNOTSUPP;
};
-
+
return 0;
-}
+}
static
@@ -671,7 +686,7 @@ int __init init_cx24110 (void)
}
-static
+static
void __exit exit_cx24110 (void)
{
dvb_unregister_i2c_device (cx24110_attach);
generated by cgit v1.2.3 (git 2.25.1) at 2025-02-03 03:40:32 +0000