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path: root/linux/drivers/media/dvb/frontends/tda18271-fe.c
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Diffstat (limited to 'linux/drivers/media/dvb/frontends/tda18271-fe.c')
-rw-r--r--linux/drivers/media/dvb/frontends/tda18271-fe.c24
1 files changed, 8 insertions, 16 deletions
diff --git a/linux/drivers/media/dvb/frontends/tda18271-fe.c b/linux/drivers/media/dvb/frontends/tda18271-fe.c
index e182df32e..ef39b3216 100644
--- a/linux/drivers/media/dvb/frontends/tda18271-fe.c
+++ b/linux/drivers/media/dvb/frontends/tda18271-fe.c
@@ -128,24 +128,20 @@ static int tda18271_channel_configuration(struct dvb_frontend *fe,
#if 1
/* main pll charge pump source */
- regs[R_EB4] |= 0x20;
- tda18271_write_regs(fe, R_EB4, 1);
+ tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 1);
#else
/* cal pll charge pump source */
- regs[R_EB7] |= 0x20;
- tda18271_write_regs(fe, R_EB7, 1);
+ tda18271_charge_pump_source(fe, TDA18271_CAL_PLL, 1);
#endif
msleep(1);
#if 1
/* normal operation for the main pll */
- regs[R_EB4] &= ~0x20;
- tda18271_write_regs(fe, R_EB4, 1);
+ tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 0);
#else
/* normal operation for the cal pll */
- regs[R_EB7] &= ~0x20;
- tda18271_write_regs(fe, R_EB7, 1);
+ tda18271_charge_pump_source(fe, TDA18271_CAL_PLL, 0);
#endif
msleep(20);
@@ -305,12 +301,10 @@ static int tda18271_calibrate_rf(struct dvb_frontend *fe, u32 freq)
tda18271_write_regs(fe, R_EB13, 1);
/* main pll charge pump source */
- regs[R_EB4] |= 0x20;
- tda18271_write_regs(fe, R_EB4, 1);
+ tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 1);
/* cal pll charge pump source */
- regs[R_EB7] |= 0x20;
- tda18271_write_regs(fe, R_EB7, 1);
+ tda18271_charge_pump_source(fe, TDA18271_CAL_PLL, 1);
/* force dcdc converter to 0 V */
regs[R_EB14] = 0x00;
@@ -348,12 +342,10 @@ static int tda18271_calibrate_rf(struct dvb_frontend *fe, u32 freq)
/* --------------------------------------------------------------- */
/* normal operation for the main pll */
- regs[R_EB4] &= ~0x20;
- tda18271_write_regs(fe, R_EB4, 1);
+ tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 0);
/* normal operation for the cal pll */
- regs[R_EB7] &= ~0x20;
- tda18271_write_regs(fe, R_EB7, 1);
+ tda18271_charge_pump_source(fe, TDA18271_CAL_PLL, 0);
msleep(10); /* plls locking */