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Diffstat (limited to 'linux/drivers/media/video/cx18/cx18-i2c.c')
-rw-r--r--linux/drivers/media/video/cx18/cx18-i2c.c19
1 files changed, 7 insertions, 12 deletions
diff --git a/linux/drivers/media/video/cx18/cx18-i2c.c b/linux/drivers/media/video/cx18/cx18-i2c.c
index 1af9ea149..c0a79ecd4 100644
--- a/linux/drivers/media/video/cx18/cx18-i2c.c
+++ b/linux/drivers/media/video/cx18/cx18-i2c.c
@@ -4,6 +4,7 @@
* Derived from ivtv-i2c.c
*
* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
+ * Copyright (C) 2008 Andy Walls <awalls@radix.net>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -184,9 +185,9 @@ static void cx18_setscl(void *data, int state)
u32 r = cx18_read_reg(cx, addr);
if (state)
- cx18_write_reg_sync(cx, r | SETSCL_BIT, addr);
+ cx18_write_reg(cx, r | SETSCL_BIT, addr);
else
- cx18_write_reg_sync(cx, r & ~SETSCL_BIT, addr);
+ cx18_write_reg(cx, r & ~SETSCL_BIT, addr);
}
static void cx18_setsda(void *data, int state)
@@ -197,9 +198,9 @@ static void cx18_setsda(void *data, int state)
u32 r = cx18_read_reg(cx, addr);
if (state)
- cx18_write_reg_sync(cx, r | SETSDL_BIT, addr);
+ cx18_write_reg(cx, r | SETSDL_BIT, addr);
else
- cx18_write_reg_sync(cx, r & ~SETSDL_BIT, addr);
+ cx18_write_reg(cx, r & ~SETSDL_BIT, addr);
}
static int cx18_getscl(void *data)
@@ -433,16 +434,10 @@ int init_cx18_i2c(struct cx18 *cx)
}
/* courtesy of Steven Toth <stoth@hauppauge.com> */
cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
- if (!cx18_retry_mmio)
- (void) cx18_read_reg(cx, 0xc7001c); /* sync */
mdelay(10);
cx18_write_reg_expect(cx, 0x00c000c0, 0xc7001c, 0x000000c0, 0x00c000c0);
- if (!cx18_retry_mmio)
- (void) cx18_read_reg(cx, 0xc7001c); /* sync */
mdelay(10);
cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
- if (!cx18_retry_mmio)
- (void) cx18_read_reg(cx, 0xc7001c); /* sync */
mdelay(10);
/* Set to edge-triggered intrs. */
@@ -452,12 +447,12 @@ int init_cx18_i2c(struct cx18 *cx)
~(HW2_I2C1_INT|HW2_I2C2_INT), HW2_I2C1_INT|HW2_I2C2_INT);
/* Hw I2C1 Clock Freq ~100kHz */
- cx18_write_reg_sync(cx, 0x00021c0f & ~4, CX18_REG_I2C_1_WR);
+ cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_1_WR);
cx18_setscl(&cx->i2c_algo_cb_data[0], 1);
cx18_setsda(&cx->i2c_algo_cb_data[0], 1);
/* Hw I2C2 Clock Freq ~100kHz */
- cx18_write_reg_sync(cx, 0x00021c0f & ~4, CX18_REG_I2C_2_WR);
+ cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_2_WR);
cx18_setscl(&cx->i2c_algo_cb_data[1], 1);
cx18_setsda(&cx->i2c_algo_cb_data[1], 1);