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|
/*
* Support for OR51132 (pcHDTV HD-3000) - VSB/QAM
*
* Copyright (C) 2005 Kirk Lapray <kirk_lapray@bigfoot.com>
*
* Based on code from Jack Kelliher (kelliher@xmission.com)
* Copyright (C) 2002 & pcHDTV, inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/delay.h>
#include "dvb_frontend.h"
#include "or51132.h"
static int debug;
#define dprintk(args...) \
do { \
if (debug) printk(KERN_DEBUG "or51132: " args); \
} while (0)
/* uCode and Data */
/* 113-4-194-3 */
char tuc[] = {
0x7e,
0x08, 0x88, 0x1a, 0x7b, 0xc1, 0x2f, 0x40, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x81, 0x19, 0x40, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, 0xe0, 0xff, 0x89,
0x51, 0x00, 0x00, 0x80, 0x10, 0x08, 0x00, 0xc8, 0x51, 0x0c, 0x00, 0x80, 0x10, 0x08, 0x00, 0xc8,
0x5f, 0x9e, 0xff, 0x81, 0x59, 0x00, 0x00, 0x80, 0x00, 0x6a, 0x38, 0x70, 0x00, 0x00, 0x00, 0x00,
0x63, 0x00, 0x04, 0x80, 0x22, 0x80, 0x48, 0x80, 0x23, 0x78, 0xd4, 0x80, 0x64, 0x08, 0x00, 0x80,
0x08, 0xa0, 0x14, 0x79, 0x28, 0xa8, 0x1c, 0x79, 0x00, 0x2c, 0x40, 0x6c, 0x63, 0x00, 0x04, 0x80,
0x22, 0xe0, 0xff, 0x89, 0x50, 0xfe, 0x01, 0x80, 0x80, 0x20, 0x00, 0x00, 0x01, 0x80, 0x00, 0x64,
0x08, 0x10, 0x8d, 0x7a, 0x80, 0x1c, 0x09, 0x6c, 0x00, 0x20, 0x0a, 0x00, 0x71, 0x80, 0x00, 0x62,
0x08, 0x10, 0x8d, 0x7a, 0x08, 0x38, 0x88, 0x7a, 0x50, 0x0e, 0x00, 0x80, 0x01, 0x80, 0x00, 0x64,
0x50, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x18, 0x10, 0xb6, 0x40, 0x6c, 0x50, 0x02, 0x00, 0x80,
0x00, 0x00, 0x00, 0x18, 0x10, 0x60, 0x40, 0x6c, 0x50, 0x0e, 0x00, 0x80, 0x00, 0x00, 0x00, 0x18,
0x20, 0xb6, 0x40, 0x6c, 0x63, 0x00, 0x04, 0x80, 0x8f, 0x50, 0x01, 0x80, 0x00, 0x5e, 0x40, 0x6c,
0xa1, 0x8c, 0x0e, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x08, 0x30, 0x00, 0x7d, 0x00, 0x70, 0x00, 0x00, 0x61, 0x91, 0x40, 0x69, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x61, 0x80, 0x00, 0x62, 0x08, 0x38, 0x88, 0x7a, 0x22, 0xe0, 0xff, 0x89,
0x00, 0x70, 0x00, 0x00, 0x10, 0x08, 0x00, 0xc8, 0x08, 0x88, 0x32, 0x78, 0x10, 0x08, 0x00, 0xc8,
0x63, 0x00, 0x06, 0x80, 0x22, 0x80, 0x48, 0x80, 0x23, 0x78, 0xd4, 0x80, 0x09, 0x08, 0x00, 0x80,
0x08, 0xa0, 0x14, 0x79, 0x08, 0xa8, 0x1c, 0x79, 0x48, 0x20, 0x4b, 0x78, 0x00, 0x8e, 0x40, 0x6c,
0x08, 0x88, 0x32, 0x78, 0x50, 0xfe, 0x01, 0x80, 0x01, 0x80, 0x00, 0x64, 0x50, 0x0c, 0x00, 0x80,
0x00, 0x00, 0x00, 0x18, 0x20, 0xb6, 0x40, 0x6c, 0x08, 0x88, 0x32, 0x78, 0x81, 0xa7, 0x40, 0x69,
0x16, 0x56, 0x00, 0x61, 0x00, 0x00, 0x00, 0x00, 0x16, 0x56, 0x00, 0x62, 0x91, 0xaf, 0x40, 0x69,
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0x00, 0x00, 0x00, 0x00, 0x9f, 0x30, 0x3e, 0x80, 0x08, 0x80, 0x52, 0x78, 0x00, 0x34, 0x00, 0x28,
0x43, 0x68, 0x00, 0x88, 0x00, 0x00, 0x00, 0x00, 0x88, 0x30, 0x00, 0x00, 0x88, 0x30, 0x00, 0x00,
0x88, 0x30, 0x00, 0x00, 0x00, 0x01, 0x60, 0x70, 0x88, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x08, 0xf0, 0x8c, 0x7a, 0x00, 0x00, 0x00, 0x00, 0x00, 0xb0, 0x5e, 0x6c, 0x00, 0x00, 0x00, 0x00,
0x91, 0x22, 0x80, 0x80, 0x9f, 0x30, 0x3e, 0x80, 0x08, 0x80, 0x52, 0x78, 0x01, 0x34, 0x00, 0x28,
0x43, 0x68, 0x00, 0x88, 0x00, 0x00, 0x00, 0x00, 0x88, 0x30, 0x00, 0x00, 0x88, 0x30, 0x00, 0x00,
0x88, 0x30, 0x00, 0x00, 0x80, 0x00, 0x80, 0x70, 0x88, 0x30, 0x00, 0x00, 0x18, 0xf0, 0x8c, 0x7a,
0x00, 0x00, 0x00, 0x00, 0x08, 0xf0, 0x8c, 0x7a, 0x00, 0x00, 0x00, 0x00, 0x00, 0xb0, 0x5e, 0x6c,
0x00, 0x00, 0x00, 0x00, 0x9f, 0x30, 0x3e, 0x80, 0x08, 0x80, 0x52, 0x78, 0x00, 0x34, 0x00, 0x28,
0x43, 0x68, 0x00, 0x88, 0x00, 0x00, 0x00, 0x00, 0x88, 0x30, 0x00, 0x00, 0x88, 0x30, 0x00, 0x00,
0x88, 0x30, 0x00, 0x00, 0x00, 0x01, 0x60, 0x70, 0x88, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x18, 0xf0, 0x8c, 0x7a, 0x00, 0x00, 0x00, 0x00, 0x00, 0xb0, 0x5e, 0x6c, 0x00, 0x00, 0x80, 0x6e,
0x9f, 0xae, 0x3e, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x08, 0xf0, 0x5c, 0x78, 0x00, 0x00, 0x80, 0x6e, 0x00, 0xbe, 0x5e, 0x6c, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
};
/* 113-4-194-3 */
char tud1[] = {
0x7d,
0x00, 0x04, 0xe0, 0xff, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xc0, 0xff, 0x00, 0x00, 0x00, 0x00,
0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00,
0xe0, 0xff, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0xff, 0xc0, 0xff, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0xc0, 0xff, 0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
0x40, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00,
0x60, 0xff, 0x80, 0xff, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x40, 0xff, 0x00, 0x00, 0x00, 0x00,
0x00, 0x01, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00,
0xa0, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0xfe, 0x40, 0xfd, 0x00, 0x00, 0x00, 0x00
};
/* 113-4-194-3 */
char tud2[] = {
0x40, 0x00, 0xe0, 0xff, 0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0xff, 0xe0, 0xff, 0x00, 0x00, 0x00, 0x00,
0xe0, 0xff, 0xa0, 0xff, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x40, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x60, 0x00, 0x80, 0x00, 0x60, 0x00, 0x20, 0x00, 0xc0, 0xff, 0x60, 0xff, 0x00, 0xff,
0xe0, 0xfe, 0x20, 0xff, 0xc0, 0xff, 0xa0, 0x00, 0xa0, 0x01, 0x20, 0x02, 0x20, 0x02, 0x60, 0x01,
0x00, 0x00, 0x40, 0xfe, 0xe0, 0xfc, 0x40, 0xfc, 0xc0, 0xfc, 0x60, 0xfe, 0xc0, 0x00, 0x20, 0x03,
0xe0, 0x04, 0x20, 0x05, 0xe0, 0x03, 0x40, 0x01, 0x20, 0xfe, 0x40, 0xfb, 0xc0, 0xf9, 0x00, 0xfa,
0x20, 0xfc, 0x80, 0xff, 0x00, 0x03, 0xc0, 0x05, 0xc0, 0x06, 0xc0, 0x05, 0x00, 0x03, 0x80, 0xff,
0x20, 0xfc, 0x00, 0xfa, 0xc0, 0xf9, 0x40, 0xfb, 0x20, 0xfe, 0x40, 0x01, 0xe0, 0x03, 0x20, 0x05,
0xe0, 0x04, 0x20, 0x03, 0xc0, 0x00, 0x60, 0xfe, 0xc0, 0xfc, 0x40, 0xfc, 0xe0, 0xfc, 0x40, 0xfe,
0x00, 0x00, 0x60, 0x01, 0x20, 0x02, 0x20, 0x02, 0xa0, 0x01, 0xa0, 0x00, 0xc0, 0xff, 0x20, 0xff,
0xe0, 0xfe, 0x00, 0xff, 0x60, 0xff, 0xc0, 0xff, 0x20, 0x00, 0x60, 0x00, 0x80, 0x00, 0x60, 0x00,
0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x01,
0xc0, 0x03, 0x40, 0xe7, 0xc0, 0x15, 0xc0, 0x08, 0x40, 0xea, 0xa0, 0xf2, 0x60, 0x21, 0x40, 0x07,
0x00, 0xc3, 0x00, 0x19, 0xe0, 0x15, 0xe0, 0x0b, 0xe0, 0xda, 0x80, 0x51, 0x40, 0xe7, 0x40, 0xde,
0xe0, 0xff, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8,
0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28,
0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8,
0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28,
0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28,
0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8,
0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8,
0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8,
0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28,
0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28,
0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28,
0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28,
0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8,
0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8,
0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28,
0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8,
0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8,
0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8,
0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8,
0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28,
0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8,
0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28,
0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8,
0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8,
0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8,
0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28,
0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28,
0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28,
0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28,
0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28,
0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8,
0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8,
0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28,
0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28,
0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28,
0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28,
0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8,
0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28,
0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8,
0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28,
0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8,
0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8,
0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8,
0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28,
0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8,
0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28,
0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8,
0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8,
0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28,
0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28,
0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8,
0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8,
0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8,
0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8,
0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28,
0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28,
0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8,
0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8,
0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8,
0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28,
0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8,
0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8,
0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8,
0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8,
0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8,
0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28,
0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8,
0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8,
0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8,
0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8,
0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28,
0x00, 0xd8, 0x00, 0xd8, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0x28, 0x00, 0xd8, 0x00, 0x28,
0x00, 0xd8, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x8a,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xd8, 0x68, 0x00, 0x00
};
static unsigned char run_buf[] = {0x7f,0x01};
static int tuc_size = sizeof(tuc);
static int tud1_size = sizeof(tud1);
static int tud2_size = sizeof(tud2);
struct or51132_state
{
struct i2c_adapter* i2c;
struct dvb_frontend_ops ops;
/* Configuration settings */
const struct or51132_config* config;
struct dvb_frontend frontend;
/* Demodulator private data */
u8 initialized:1;
/* Duner private data */
u32 current_frequency;
};
static int i2c_writebytes (struct or51132_state* state, u8 reg, u8 *buf, int len)
{
int err;
struct i2c_msg msg;
msg.addr = reg;
msg.flags = 0;
msg.len = len;
msg.buf = buf;
if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
printk(KERN_WARNING "or51132: i2c_writebytes error (addr %02x, err == %i)\n", reg, err);
return -EREMOTEIO;
}
return 0;
}
static u8 i2c_readbytes (struct or51132_state* state, u8 reg, u8* buf, int len)
{
int err;
struct i2c_msg msg;
msg.addr = reg;
msg.flags = I2C_M_RD;
msg.len = len;
msg.buf = buf;
if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
printk(KERN_WARNING "or51132: i2c_readbytes error (addr %02x, err == %i)\n", reg, err);
return -EREMOTEIO;
}
return 0;
}
static int or51132_init(struct dvb_frontend* fe)
{
struct or51132_state* state = (struct or51132_state*) fe->demodulator_priv;
unsigned char get_ver_buf[] = {0x04,0x00,0x30,0x00,0x00};
unsigned char rec_buf[14];
unsigned char cmd_buf[14];
char tudata[sizeof(tud1)+sizeof(tud2)+128+64];
int tudata_size = sizeof(tud1) + sizeof(tud2) + 128 + 64;
int i;
if (!state->initialized) {
/* Get eprom data */
tudata[0] = 8;
if(i2c_writebytes(state,0x50,tudata,1)) {
printk(KERN_WARNING "or51132: init error eprom addr\n");
return -1;
}
if(i2c_readbytes(state,0x50,&tudata[16*8+1],128+64)) {
printk(KERN_WARNING "or51132: init error eprom\n");
return -1;
}
for(i=0;i<tud1_size;i++) {
tudata[i] = tud1[i];
}
for(i=0;i<tud2_size;i++) {
tudata[i+tud1_size+128+64] = tud2[i];
}
if(i2c_writebytes(state,state->config->demod_address,tudata,tudata_size)) {
printk(KERN_WARNING "or51132: init error 1\n");
return -1;
}
udelay(1000); /* 1ms */
if(i2c_writebytes(state,state->config->demod_address,tuc,tuc_size)) {
printk(KERN_WARNING "or51132: init error 2\n");
return -1;
}
udelay(1000); /* 1ms */
if(i2c_writebytes(state,state->config->demod_address,run_buf,2)) {
printk(KERN_WARNING "or51132: init error 3\n");
return -1;
}
/* wait at least 5 msec */
msleep(20); /* 20ms */
if(i2c_writebytes(state,state->config->demod_address,run_buf,2)) {
printk(KERN_WARNING "or51132: init error 4\n");
return -1;
}
msleep(500); /* 500ms for operation to begin */
if(i2c_writebytes(state,state->config->demod_address,run_buf,2)) {
printk(KERN_WARNING "or51132: init error 5\n");
return -1;
}
/* wait at least 5 msec */
msleep(20); /* 20ms */
if(i2c_writebytes(state,state->config->demod_address,run_buf,2)) {
printk(KERN_WARNING "or51132: init error 6\n");
return -1;
}
msleep(20); /* 20ms */
/* set operation mode in Receiver 1 register;
* type 1:
* data 0x50h Automatic sets receiver channel conditions
* Automatic NTSC rejection filter
* Enable MPEG serial data output
* MPEG2tr
* High tuner phase noise
* normal +/-150kHz Carrier acquisition range
*/
/* Read back ucode version to besure we loaded correctly and are really up and running */
cmd_buf[0]=0x1c; /* CTL REG 6 */
cmd_buf[1]=0x03; /* REC MODE inv IF spectrum, Normal */
cmd_buf[2]=0x06; /* Channel MODE ATSC/VSB8 */
cmd_buf[3]=0x00;
msleep(20); /* 20ms */
if(i2c_writebytes(state,state->config->demod_address,cmd_buf,3)) {
printk(KERN_WARNING "or51132: init error a\n");
return -1;
}
/* Get uCode version */
cmd_buf[0]=0x10;
cmd_buf[1]=0x10;
cmd_buf[2]=0x00;
cmd_buf[3]=0x00;
msleep(20); /* 20ms */
if(i2c_writebytes(state,state->config->demod_address,cmd_buf,3)) {
printk(KERN_WARNING "or51132: init error b\n");
return -1;
}
cmd_buf[0]=0x04;
cmd_buf[1]=0x17;
cmd_buf[2]=0x00;
cmd_buf[3]=0x00;
msleep(20); /* 20ms */
if(i2c_writebytes(state,state->config->demod_address,cmd_buf,2)) {
printk(KERN_WARNING "or51132: init error c\n");
return -1;
}
cmd_buf[0]=0x00;
cmd_buf[1]=0x00;
cmd_buf[2]=0x00;
cmd_buf[3]=0x00;
msleep(20); /* 20ms */
if(i2c_writebytes(state,state->config->demod_address,cmd_buf,2)) {
printk(KERN_WARNING "or51132: init error d\n");
return -1;
}
for(i=0;i<4;i++) {
msleep(20); /* 20ms */
udelay(1000); /* 1ms */
get_ver_buf[4] = i+1;
if(i2c_readbytes(state,state->config->demod_address,&rec_buf[i*2],2)) {
printk(KERN_WARNING "or51132: init error 7 - %d\n",i);
return -1;
}
}
printk(KERN_WARNING
"or51132: 0 Version Data: %02X%02X%02X%02X-%02X%02X%02X%02X\n",
rec_buf[1],rec_buf[0],rec_buf[3],rec_buf[2],
rec_buf[5],rec_buf[4],rec_buf[7],rec_buf[6]);
cmd_buf[0]=0x10;
cmd_buf[1]=0x00;
cmd_buf[2]=0x00;
cmd_buf[3]=0x00;
msleep(20); /* 20ms */
if(i2c_writebytes(state,state->config->demod_address,cmd_buf,3)) {
printk(KERN_WARNING "or51132: init error e\n");
return -1;
}
cmd_buf[0]=0x10;
cmd_buf[1]=0x10;
cmd_buf[2]=0x00;
cmd_buf[3]=0x00;
msleep(20); /* 20ms */
if(i2c_writebytes(state,state->config->demod_address,cmd_buf,3)) {
printk(KERN_WARNING "or51132: init error f\n");
return -1;
}
cmd_buf[0]=0x04;
cmd_buf[1]=0x17;
cmd_buf[2]=0x00;
cmd_buf[3]=0x00;
msleep(20); /* 20ms */
if(i2c_writebytes(state,state->config->demod_address,cmd_buf,2)) {
printk(KERN_WARNING "or51132: init error g\n");
return -1;
}
cmd_buf[0]=0x00;
cmd_buf[1]=0x00;
cmd_buf[2]=0x00;
cmd_buf[3]=0x00;
msleep(20); /* 20ms */
if(i2c_writebytes(state,state->config->demod_address,cmd_buf,2)) {
printk(KERN_WARNING "or51132: init error h\n");
return -1;
}
for(i=0;i<4;i++) {
msleep(20); /* 20ms */
udelay(1000); /* 1ms */
get_ver_buf[4] = i+1;
if(i2c_readbytes(state,state->config->demod_address,&rec_buf[i*2],2)) {
printk(KERN_WARNING "or51132: init error 8 - %d\n",i);
return -1;
}
}
printk(KERN_WARNING
"or51132: 1 Version Data: %02X%02X%02X%02X-%02X%02X%02X%02X\n",
rec_buf[1],rec_buf[0],rec_buf[3],rec_buf[2],
rec_buf[5],rec_buf[4],rec_buf[7],rec_buf[6]);
printk(KERN_WARNING
"or51132: Version: %02X%01X-%01X-%02X%01X-%01X\n",
rec_buf[3],rec_buf[2]>>4,rec_buf[2]&0x0f,
rec_buf[5],rec_buf[4]>>4,rec_buf[4]&0x0f);
cmd_buf[0]=0x10;
cmd_buf[1]=0x00;
cmd_buf[2]=0x00;
cmd_buf[3]=0x00;
msleep(20); /* 20ms */
if(i2c_writebytes(state,state->config->demod_address,cmd_buf,3)) {
printk(KERN_WARNING "or51132: init error i\n");
return -1;
}
state->initialized = 1;
}
return 0;
}
static int or51132_read_ber(struct dvb_frontend* fe, u32* ber)
{
*ber = ENOSYS;
return 0;
}
static int or51132_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
{
*ucblocks = ENOSYS;
return 0;
}
static int or51132_sleep(struct dvb_frontend* fe)
{
return 0;
}
static int or51132_setmode(struct dvb_frontend* fe, int mode)
{
struct or51132_state* state = (struct or51132_state*) fe->demodulator_priv;
unsigned char rec_buf[14];
unsigned char cmd_buf[14];
dprintk("setmode %d\n",mode);
if(i2c_writebytes(state,state->config->demod_address,run_buf,2)) {
printk(KERN_WARNING "or51132: setmode error 1\n");
return 1;
}
/* Wait at least 5 msec */
msleep(20); /* 20ms */
if(i2c_writebytes(state,state->config->demod_address,run_buf,2)) {
printk(KERN_WARNING "or51132: setmode error 2\n");
}
msleep(20); /* 20ms */
/* set operation mode in Receiver 1 register;
* type 1:
* data 0x50h Automatic sets receiver channel conditions
* Automatic NTSC rejection filter
* Enable MPEG serial data output
* MPEG2tr
* High tuner phase noise
* normal +/-150kHz Carrier acquisition range
*/
if(i2c_writebytes(state,state->config->demod_address,cmd_buf,5)) {
printk(KERN_WARNING "or51132: setmode error 3\n");
return 1;
}
msleep(20); /* 20ms */
if(i2c_writebytes(state,state->config->demod_address,cmd_buf,5)) {
printk(KERN_WARNING "or51132: setmode error 4\n");
return 1;
}
rec_buf[0]=0x04;
rec_buf[1]=0x00;
rec_buf[2]=0x03;
rec_buf[3]=0x00;
msleep(20); /* 20ms */
if(i2c_writebytes(state,state->config->demod_address,rec_buf,3)) {
printk(KERN_WARNING "or51132: setmode error 5\n");
return 1;
}
msleep(20); /* 20ms */
if(i2c_readbytes(state,state->config->demod_address,&rec_buf[10],2)) {
printk(KERN_WARNING "or51132: setmode error 6\n");
return 1;
}
dprintk("or51132: setmode rec status %02x %02x\n",rec_buf[10],rec_buf[11]);
return 0;
}
static int or51132_set_parameters(struct dvb_frontend* fe,
struct dvb_frontend_parameters *param)
{
struct or51132_state* state = (struct or51132_state*) fe->demodulator_priv;
u32 freq = 0;
u16 tunerfreq = 0;
u8 buf[4];
/* Change only if we are actually changing the channel */
if (state->current_frequency == param->frequency)
return 0;
freq = 44000 + (param->frequency/1000);
tunerfreq = freq * 16/1000;
dprintk("set_parameters frequency = %d (freq = %d, tunerfreq = %d)\n",param->frequency,freq,tunerfreq);
buf[0] = (tunerfreq >> 8) & 0x7f;
buf[1] = (tunerfreq & 0xff);
buf[2] = 0x8e;
if (param->frequency < 157250000) {
buf[3] = 0x39;
dprintk(KERN_WARNING "set_parameters VHF low range\n");
} else if (param->frequency < 454000000) {
buf[3] = 0x3a;
dprintk(KERN_WARNING "set_parameters VHF high range\n");
} else {
buf[3] = 0x3c;
dprintk(KERN_WARNING "set_parameters UHF range\n");
}
dprintk("set_parameters tuner bytes: 0x%02x 0x%02x 0x%02x 0x%02x\n",buf[0],buf[1],buf[2],buf[3]);
if (i2c_writebytes(state,0xc2>>1,buf,4))
printk(KERN_WARNING "or51132: set_parameters error writing to tuner\n");
/* Set to ATSC mode */
or51132_setmode(fe, 0);
/* Update current frequency */
state->current_frequency = param->frequency;
return 0;
}
static int or51132_read_status(struct dvb_frontend* fe, fe_status_t* status)
{
struct or51132_state* state = (struct or51132_state*) fe->demodulator_priv;
unsigned char rec_buf[2];
unsigned char snd_buf[2];
*status = 0;
/* Receiver Status */
snd_buf[0]=0x04;
snd_buf[1]=0x00;
msleep(30); /* 30ms */
if(i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
printk(KERN_WARNING "or51132: read_status write error\n");
return -1;
}
msleep(30); /* 30ms */
if(i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
printk(KERN_WARNING "or51132: read_status read error\n");
return -1;
}
dprintk("read_status %x %x\n",rec_buf[0],rec_buf[1]);
if(rec_buf[1] & 0x01) { /* Receiver Lock */
*status |= FE_HAS_SIGNAL;
*status |= FE_HAS_CARRIER;
*status |= FE_HAS_VITERBI;
*status |= FE_HAS_SYNC;
*status |= FE_HAS_LOCK;
}
return 0;
}
/* log10-1 table at .5 increments from 1 to 100.5 */
unsigned int i100x20log10[] = {
0, 352, 602, 795, 954, 1088, 1204, 1306, 1397, 1480,
1556, 1625, 1690, 1750, 1806, 1858, 1908, 1955, 2000, 2042,
2082, 2121, 2158, 2193, 2227, 2260, 2292, 2322, 2352, 2380,
2408, 2434, 2460, 2486, 2510, 2534, 2557, 2580, 2602, 2623,
2644, 2664, 2684, 2704, 2723, 2742, 2760, 2778, 2795, 2813,
2829, 2846, 2862, 2878, 2894, 2909, 2924, 2939, 2954, 2968,
2982, 2996, 3010, 3023, 3037, 3050, 3062, 3075, 3088, 3100,
3112, 3124, 3136, 3148, 3159, 3170, 3182, 3193, 3204, 3214,
3225, 3236, 3246, 3256, 3266, 3276, 3286, 3296, 3306, 3316,
3325, 3334, 3344, 3353, 3362, 3371, 3380, 3389, 3397, 3406,
3415, 3423, 3432, 3440, 3448, 3456, 3464, 3472, 3480, 3488,
3496, 3504, 3511, 3519, 3526, 3534, 3541, 3549, 3556, 3563,
3570, 3577, 3584, 3591, 3598, 3605, 3612, 3619, 3625, 3632,
3639, 3645, 3652, 3658, 3665, 3671, 3677, 3683, 3690, 3696,
3702, 3708, 3714, 3720, 3726, 3732, 3738, 3744, 3750, 3755,
3761, 3767, 3772, 3778, 3784, 3789, 3795, 3800, 3806, 3811,
3816, 3822, 3827, 3832, 3838, 3843, 3848, 3853, 3858, 3863,
3868, 3874, 3879, 3884, 3888, 3893, 3898, 3903, 3908, 3913,
3918, 3922, 3927, 3932, 3936, 3941, 3946, 3950, 3955, 3960,
3964, 3969, 3973, 3978, 3982, 3986, 3991, 3995, 4000, 4004,
};
unsigned int denom[] = {1,1,100,1000,10000,100000,1000000,10000000,100000000};
unsigned int i20Log10(unsigned short val)
{
unsigned int rntval = 100;
unsigned int tmp = val;
unsigned int exp = 1;
while(tmp > 100) {tmp /= 100; exp++;}
val = (2 * val)/denom[exp];
if(exp > 1) rntval = 2000*exp;
rntval += i100x20log10[val];
return rntval;
}
static int or51132_read_signal_strength(struct dvb_frontend* fe, u16* strength)
{
struct or51132_state* state = (struct or51132_state*) fe->demodulator_priv;
unsigned char rec_buf[2];
unsigned char snd_buf[2];
u8 rcvr_stat;
u16 snr_equ;
int usK;
snd_buf[0]=0x04;
snd_buf[1]=0x02; /* SNR after Equalizer */
msleep(30); /* 30ms */
if(i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
printk(KERN_WARNING "or51132: read_status write error\n");
return -1;
}
msleep(30); /* 30ms */
if(i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
printk(KERN_WARNING "or51132: read_status read error\n");
return -1;
}
snr_equ = rec_buf[0] | (rec_buf[1] << 8);
dprintk("read_signal_strength snr_equ %x %x (%i)\n",rec_buf[0],rec_buf[1],snr_equ);
/* Receiver Status */
snd_buf[0]=0x04;
snd_buf[1]=0x00;
msleep(30); /* 30ms */
if(i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
printk(KERN_WARNING "or51132: read_signal_strength read_status write error\n");
return -1;
}
msleep(30); /* 30ms */
if(i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
printk(KERN_WARNING "or51132: read_signal_strength read_status read error\n");
return -1;
}
dprintk("read_signal_strength read_status %x %x\n",rec_buf[0],rec_buf[1]);
rcvr_stat = rec_buf[1];
usK = (rcvr_stat & 0x10) ? 3 : 0;
/* The value reported back from the frontend will be FFFF=100% 0000=0% */
*strength = (((8952 - i20Log10(snr_equ) - usK*100)/3+5)*65535)/1000;
dprintk("read_signal_strength %i\n",*strength);
return 0;
}
static int or51132_read_snr(struct dvb_frontend* fe, u16* snr)
{
struct or51132_state* state = (struct or51132_state*) fe->demodulator_priv;
unsigned char rec_buf[2];
unsigned char snd_buf[2];
u16 snr_equ;
snd_buf[0]=0x04;
snd_buf[1]=0x02; /* SNR after Equalizer */
msleep(30); /* 30ms */
if(i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
printk(KERN_WARNING "or51132: read_snr write error\n");
return -1;
}
msleep(30); /* 30ms */
if(i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
printk(KERN_WARNING "or51132: read_snr dvr read error\n");
return -1;
}
snr_equ = rec_buf[0] | (rec_buf[1] << 8);
dprintk("read_snr snr_equ %x %x (%i)\n",rec_buf[0],rec_buf[1],snr_equ);
*snr = 0xFFFF - snr_equ;
dprintk("read_snr %i\n",*snr);
return 0;
}
static int or51132_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
{
fe_tune_settings->min_delay_ms = 500;
fe_tune_settings->step_size = 0;
fe_tune_settings->max_drift = 0;
return 0;
}
static void or51132_release(struct dvb_frontend* fe)
{
struct or51132_state* state = (struct or51132_state*) fe->demodulator_priv;
kfree(state);
}
static struct dvb_frontend_ops or51132_ops;
struct dvb_frontend* or51132_attach(const struct or51132_config* config,
struct i2c_adapter* i2c)
{
struct or51132_state* state = NULL;
/* Allocate memory for the internal state */
state = (struct or51132_state*) kmalloc(sizeof(struct or51132_state), GFP_KERNEL);
if (state == NULL)
goto error;
/* Setup the state */
state->config = config;
state->i2c = i2c;
memcpy(&state->ops, &or51132_ops, sizeof(struct dvb_frontend_ops));
state->initialized = 0;
state->current_frequency = 0;
/* Create dvb_frontend */
state->frontend.ops = &state->ops;
state->frontend.demodulator_priv = state;
return &state->frontend;
error:
if (state)
kfree(state);
return NULL;
}
static struct dvb_frontend_ops or51132_ops = {
.info = {
.name = "Oren OR51132 VSB/QAM Frontend",
.type = FE_ATSC,
.frequency_min = 44000000,
.frequency_max = 958000000,
.frequency_stepsize = 166666,
.caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_QAM_AUTO |
FE_CAN_8VSB
},
.release = or51132_release,
.init = or51132_init,
.sleep = or51132_sleep,
.set_frontend = or51132_set_parameters,
.get_tune_settings = or51132_get_tune_settings,
.read_status = or51132_read_status,
.read_ber = or51132_read_ber,
.read_signal_strength = or51132_read_signal_strength,
.read_snr = or51132_read_snr,
.read_ucblocks = or51132_read_ucblocks,
};
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
MODULE_DESCRIPTION("Oren OR51132 VSB/QAM [pcHDTV HD-3000] Demodulator Driver");
MODULE_AUTHOR("Kirk Lapray");
MODULE_LICENSE("GPL");
EXPORT_SYMBOL(or51132_attach);
/*
* Local variables:
* c-basic-offset: 8
* End:
*/
|