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authorBrice Goglin <bgoglin@debian.org>2007-12-03 21:21:53 +0100
committerBrice Goglin <bgoglin@debian.org>2007-12-03 21:21:53 +0100
commit411bbbc1b93db8f8435071ef67008db4775e2af3 (patch)
tree3763929f7fd54a3b5e441842e6d177f73ee3f2f8
parent7c0a40aa6a07bbf997d84c3dc3d5c5c01880a6f3 (diff)
parent5022d006cfc06ca0395981526b2c2c94c6878567 (diff)
downloadxf86-video-ati-frc-411bbbc1b93db8f8435071ef67008db4775e2af3.tar.gz
xf86-video-ati-frc-411bbbc1b93db8f8435071ef67008db4775e2af3.tar.bz2
Merge branch 'master' of git://git.freedesktop.org/git/xorg/driver/xf86-video-ati into debian-experimental
Diffstat
-rw-r--r--configure.ac2
-rw-r--r--man/radeon.man51
-rw-r--r--src/Makefile.am9
-rw-r--r--src/ati_pciids_gen.h219
-rw-r--r--src/atidri.c26
-rw-r--r--src/atipciids.h248
-rw-r--r--src/pcidb/ati_pciids.csv220
-rwxr-xr-xsrc/pcidb/parse_pci_ids.pl94
-rw-r--r--src/radeon.h30
-rw-r--r--src/radeon_chipinfo_gen.h140
-rw-r--r--src/radeon_chipset.h142
-rw-r--r--src/radeon_chipset_gen.h141
-rw-r--r--src/radeon_crtc.c4
-rw-r--r--src/radeon_dri.c30
-rw-r--r--src/radeon_driver.c260
-rw-r--r--src/radeon_output.c212
-rw-r--r--src/radeon_pci_chipset_gen.h141
-rw-r--r--src/radeon_probe.c145
-rw-r--r--src/radeon_render.c4
-rw-r--r--src/radeon_tv.c8
-rw-r--r--src/radeon_video.c56
21 files changed, 1309 insertions, 873 deletions
diff --git a/configure.ac b/configure.ac
index 450d951..b3d46a5 100644
--- a/configure.ac
+++ b/configure.ac
@@ -79,7 +79,7 @@ sdkdir=$(pkg-config --variable=sdkdir xorg-server)
# Checks for header files.
AC_HEADER_STDC
-if test "x$DRI" = xauto; then
+if test "$DRI" != no; then
AC_CHECK_FILE([${sdkdir}/dri.h],
[have_dri_h="yes"], [have_dri_h="no"])
AC_CHECK_FILE([${sdkdir}/sarea.h],
diff --git a/man/radeon.man b/man/radeon.man
index 5d31eb1..881612a 100644
--- a/man/radeon.man
+++ b/man/radeon.man
@@ -383,14 +383,14 @@ case. This is only useful for LVDS panels (laptop internal panels).
The default is
.B on.
.TP
-.BI "Option \*TVDACLoadDetect\*q \*q" boolean \*q
+.BI "Option \*qTVDACLoadDetect\*q \*q" boolean \*q
Enable load detection on the TV DAC. The TV DAC is used to drive both
TV-OUT and analog monitors. Load detection is often unreliable in the
TV DAC so it is disabled by default.
The default is
.B off.
.TP
-.BI "Option \*DefaultTMDSPLL\*q \*q" boolean \*q
+.BI "Option \*qDefaultTMDSPLL\*q \*q" boolean \*q
Use the default driver provided TMDS PLL values rather than the ones
provided by the bios. This option has no effect on Mac cards. Enable
this option if you are having problems with a DVI monitor using the
@@ -414,20 +414,57 @@ The default is
.TP
.BI "Option \*qMacModel\*q \*q" string \*q
.br
-Used to specify Mac models for connector tables and quirks. Only valid
- on PowerPC.
+Used to specify Mac models for connector tables and quirks. If you have
+a powerbook or mini with DVI that does not work properly, try the alternate
+ options as Apple does not seem to provide a good way of knowing whether
+ they use internal or external TMDS for DVI. Only valid on PowerPC.
.br
ibook \-\- ibooks
.br
-powerbook-duallink \-\- Powerbooks with external DVI
+powerbook-external \-\- Powerbooks with external DVI
.br
-powerbook \-\- Powerbooks with integrated DVI
+powerbook-internal \-\- Powerbooks with integrated DVI
.br
-mini \-\- Mac Mini
+powerbook-vga \-\- Powerbooks with VGA rather than DVI
+.br
+powerbook-duallink \-\- powerbook-external alias
+.br
+powerbook \-\- powerbook-internal alias
+.br
+mini-external \-\- Mac Mini with external DVI
+.br
+mini-internal \-\- Mac Mini with integrated DVI
+.br
+mini \-\- mini-external alias
.br
The default value is
.B undefined.
.TP
+.BI "Option \*qTVStandard\*q \*q" string \*q
+.br
+Used to specify the default TV standard if you want to use something other than
+the bios default. Valid options are:
+.br
+ntsc
+.br
+pal
+.br
+pal-m
+.br
+pal-60
+.br
+ntsc-j
+.br
+scart-pal
+.br
+The default value is
+.B undefined.
+.TP
+.BI "Option \*qForceTVOut\*q \*q" boolean \*q
+Enable this option to force TV Out to always be detected as attached.
+The default is
+.B off
+.TP
.SH SEE ALSO
__xservername__(__appmansuffix__), __xconfigfile__(__filemansuffix__), xorgconfig(__appmansuffix__), Xserver(__appmansuffix__), X(__miscmansuffix__)
diff --git a/src/Makefile.am b/src/Makefile.am
index ff1e225..5152577 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -171,7 +171,6 @@ EXTRA_DIST = \
r128_reg.h \
r128_sarea.h \
r128_version.h \
- radeon_chipset.h \
radeon_common.h \
radeon_commonfuncs.c \
radeon_dri.h \
@@ -191,4 +190,10 @@ EXTRA_DIST = \
theatre.h \
theatre_reg.h \
atipciids.h \
- atipcirename.h
+ atipcirename.h \
+ ati_pciids_gen.h \
+ radeon_chipinfo_gen.h \
+ radeon_chipset_gen.h \
+ radeon_pci_chipset_gen.h \
+ pcidb/ati_pciids.csv \
+ pcidb/parse_pci_ids.pl
diff --git a/src/ati_pciids_gen.h b/src/ati_pciids_gen.h
new file mode 100644
index 0000000..ad54f64
--- /dev/null
+++ b/src/ati_pciids_gen.h
@@ -0,0 +1,219 @@
+#define PCI_CHIP_RV380_3150 0x3150
+#define PCI_CHIP_RV380_3152 0x3152
+#define PCI_CHIP_RV380_3154 0x3154
+#define PCI_CHIP_RV380_3E50 0x3E50
+#define PCI_CHIP_RV380_3E54 0x3E54
+#define PCI_CHIP_RS100_4136 0x4136
+#define PCI_CHIP_RS200_4137 0x4137
+#define PCI_CHIP_R300_AD 0x4144
+#define PCI_CHIP_R300_AE 0x4145
+#define PCI_CHIP_R300_AF 0x4146
+#define PCI_CHIP_R300_AG 0x4147
+#define PCI_CHIP_R350_AH 0x4148
+#define PCI_CHIP_R350_AI 0x4149
+#define PCI_CHIP_R350_AJ 0x414A
+#define PCI_CHIP_R350_AK 0x414B
+#define PCI_CHIP_RV350_AP 0x4150
+#define PCI_CHIP_RV350_AQ 0x4151
+#define PCI_CHIP_RV360_AR 0x4152
+#define PCI_CHIP_RV350_AS 0x4153
+#define PCI_CHIP_RV350_AT 0x4154
+#define PCI_CHIP_RV350_4155 0x4155
+#define PCI_CHIP_RV350_AV 0x4156
+#define PCI_CHIP_MACH32 0x4158
+#define PCI_CHIP_RS250_4237 0x4237
+#define PCI_CHIP_R200_BB 0x4242
+#define PCI_CHIP_R200_BC 0x4243
+#define PCI_CHIP_RS100_4336 0x4336
+#define PCI_CHIP_RS200_4337 0x4337
+#define PCI_CHIP_MACH64CT 0x4354
+#define PCI_CHIP_MACH64CX 0x4358
+#define PCI_CHIP_RS250_4437 0x4437
+#define PCI_CHIP_MACH64ET 0x4554
+#define PCI_CHIP_MACH64GB 0x4742
+#define PCI_CHIP_MACH64GD 0x4744
+#define PCI_CHIP_MACH64GI 0x4749
+#define PCI_CHIP_MACH64GL 0x474C
+#define PCI_CHIP_MACH64GM 0x474D
+#define PCI_CHIP_MACH64GN 0x474E
+#define PCI_CHIP_MACH64GO 0x474F
+#define PCI_CHIP_MACH64GP 0x4750
+#define PCI_CHIP_MACH64GQ 0x4751
+#define PCI_CHIP_MACH64GR 0x4752
+#define PCI_CHIP_MACH64GS 0x4753
+#define PCI_CHIP_MACH64GT 0x4754
+#define PCI_CHIP_MACH64GU 0x4755
+#define PCI_CHIP_MACH64GV 0x4756
+#define PCI_CHIP_MACH64GW 0x4757
+#define PCI_CHIP_MACH64GX 0x4758
+#define PCI_CHIP_MACH64GY 0x4759
+#define PCI_CHIP_MACH64GZ 0x475A
+#define PCI_CHIP_RV250_If 0x4966
+#define PCI_CHIP_RV250_Ig 0x4967
+#define PCI_CHIP_R420_JH 0x4A48
+#define PCI_CHIP_R420_JI 0x4A49
+#define PCI_CHIP_R420_JJ 0x4A4A
+#define PCI_CHIP_R420_JK 0x4A4B
+#define PCI_CHIP_R420_JL 0x4A4C
+#define PCI_CHIP_R420_JM 0x4A4D
+#define PCI_CHIP_R420_JN 0x4A4E
+#define PCI_CHIP_R420_4A4F 0x4A4F
+#define PCI_CHIP_R420_JP 0x4A50
+#define PCI_CHIP_R481_4B49 0x4B49
+#define PCI_CHIP_R481_4B4A 0x4B4A
+#define PCI_CHIP_R481_4B4B 0x4B4B
+#define PCI_CHIP_R481_4B4C 0x4B4C
+#define PCI_CHIP_MACH64LB 0x4C42
+#define PCI_CHIP_MACH64LD 0x4C44
+#define PCI_CHIP_RAGE128LE 0x4C45
+#define PCI_CHIP_RAGE128LF 0x4C46
+#define PCI_CHIP_MACH64LG 0x4C47
+#define PCI_CHIP_MACH64LI 0x4C49
+#define PCI_CHIP_MACH64LM 0x4C4D
+#define PCI_CHIP_MACH64LN 0x4C4E
+#define PCI_CHIP_MACH64LP 0x4C50
+#define PCI_CHIP_MACH64LQ 0x4C51
+#define PCI_CHIP_MACH64LR 0x4C52
+#define PCI_CHIP_MACH64LS 0x4C53
+#define PCI_CHIP_RADEON_LW 0x4C57
+#define PCI_CHIP_RADEON_LX 0x4C58
+#define PCI_CHIP_RADEON_LY 0x4C59
+#define PCI_CHIP_RADEON_LZ 0x4C5A
+#define PCI_CHIP_RV250_Ld 0x4C64
+#define PCI_CHIP_RV250_Lf 0x4C66
+#define PCI_CHIP_RV250_Lg 0x4C67
+#define PCI_CHIP_RAGE128MF 0x4D46
+#define PCI_CHIP_RAGE128ML 0x4D4C
+#define PCI_CHIP_R300_ND 0x4E44
+#define PCI_CHIP_R300_NE 0x4E45
+#define PCI_CHIP_R300_NF 0x4E46
+#define PCI_CHIP_R300_NG 0x4E47
+#define PCI_CHIP_R350_NH 0x4E48
+#define PCI_CHIP_R350_NI 0x4E49
+#define PCI_CHIP_R360_NJ 0x4E4A
+#define PCI_CHIP_R350_NK 0x4E4B
+#define PCI_CHIP_RV350_NP 0x4E50
+#define PCI_CHIP_RV350_NQ 0x4E51
+#define PCI_CHIP_RV350_NR 0x4E52
+#define PCI_CHIP_RV350_NS 0x4E53
+#define PCI_CHIP_RV350_NT 0x4E54
+#define PCI_CHIP_RV350_NV 0x4E56
+#define PCI_CHIP_RAGE128PA 0x5041
+#define PCI_CHIP_RAGE128PB 0x5042
+#define PCI_CHIP_RAGE128PC 0x5043
+#define PCI_CHIP_RAGE128PD 0x5044
+#define PCI_CHIP_RAGE128PE 0x5045
+#define PCI_CHIP_RAGE128PF 0x5046
+#define PCI_CHIP_RAGE128PG 0x5047
+#define PCI_CHIP_RAGE128PH 0x5048
+#define PCI_CHIP_RAGE128PI 0x5049
+#define PCI_CHIP_RAGE128PJ 0x504A
+#define PCI_CHIP_RAGE128PK 0x504B
+#define PCI_CHIP_RAGE128PL 0x504C
+#define PCI_CHIP_RAGE128PM 0x504D
+#define PCI_CHIP_RAGE128PN 0x504E
+#define PCI_CHIP_RAGE128PO 0x504F
+#define PCI_CHIP_RAGE128PP 0x5050
+#define PCI_CHIP_RAGE128PQ 0x5051
+#define PCI_CHIP_RAGE128PR 0x5052
+#define PCI_CHIP_RAGE128PS 0x5053
+#define PCI_CHIP_RAGE128PT 0x5054
+#define PCI_CHIP_RAGE128PU 0x5055
+#define PCI_CHIP_RAGE128PV 0x5056
+#define PCI_CHIP_RAGE128PW 0x5057
+#define PCI_CHIP_RAGE128PX 0x5058
+#define PCI_CHIP_RADEON_QD 0x5144
+#define PCI_CHIP_RADEON_QE 0x5145
+#define PCI_CHIP_RADEON_QF 0x5146
+#define PCI_CHIP_RADEON_QG 0x5147
+#define PCI_CHIP_R200_QH 0x5148
+#define PCI_CHIP_R200_QL 0x514C
+#define PCI_CHIP_R200_QM 0x514D
+#define PCI_CHIP_RV200_QW 0x5157
+#define PCI_CHIP_RV200_QX 0x5158
+#define PCI_CHIP_RV100_QY 0x5159
+#define PCI_CHIP_RV100_QZ 0x515A
+#define PCI_CHIP_RN50_515E 0x515E
+#define PCI_CHIP_RAGE128RE 0x5245
+#define PCI_CHIP_RAGE128RF 0x5246
+#define PCI_CHIP_RAGE128RG 0x5247
+#define PCI_CHIP_RAGE128RK 0x524B
+#define PCI_CHIP_RAGE128RL 0x524C
+#define PCI_CHIP_RAGE128SE 0x5345
+#define PCI_CHIP_RAGE128SF 0x5346
+#define PCI_CHIP_RAGE128SG 0x5347
+#define PCI_CHIP_RAGE128SH 0x5348
+#define PCI_CHIP_RAGE128SK 0x534B
+#define PCI_CHIP_RAGE128SL 0x534C
+#define PCI_CHIP_RAGE128SM 0x534D
+#define PCI_CHIP_RAGE128SN 0x534E
+#define PCI_CHIP_RAGE128TF 0x5446
+#define PCI_CHIP_RAGE128TL 0x544C
+#define PCI_CHIP_RAGE128TR 0x5452
+#define PCI_CHIP_RAGE128TS 0x5453
+#define PCI_CHIP_RAGE128TT 0x5454
+#define PCI_CHIP_RAGE128TU 0x5455
+#define PCI_CHIP_RV370_5460 0x5460
+#define PCI_CHIP_RV370_5462 0x5462
+#define PCI_CHIP_RV370_5464 0x5464
+#define PCI_CHIP_R423_UH 0x5548
+#define PCI_CHIP_R423_UI 0x5549
+#define PCI_CHIP_R423_UJ 0x554A
+#define PCI_CHIP_R423_UK 0x554B
+#define PCI_CHIP_R430_554C 0x554C
+#define PCI_CHIP_R430_554D 0x554D
+#define PCI_CHIP_R430_554E 0x554E
+#define PCI_CHIP_R430_554F 0x554F
+#define PCI_CHIP_R423_5550 0x5550
+#define PCI_CHIP_R423_UQ 0x5551
+#define PCI_CHIP_R423_UR 0x5552
+#define PCI_CHIP_R423_UT 0x5554
+#define PCI_CHIP_RV410_564A 0x564A
+#define PCI_CHIP_RV410_564B 0x564B
+#define PCI_CHIP_RV410_564F 0x564F
+#define PCI_CHIP_RV410_5652 0x5652
+#define PCI_CHIP_RV410_5653 0x5653
+#define PCI_CHIP_MACH64VT 0x5654
+#define PCI_CHIP_MACH64VU 0x5655
+#define PCI_CHIP_MACH64VV 0x5656
+#define PCI_CHIP_RS300_5834 0x5834
+#define PCI_CHIP_RS300_5835 0x5835
+#define PCI_CHIP_RS480_5954 0x5954
+#define PCI_CHIP_RS480_5955 0x5955
+#define PCI_CHIP_RV280_5960 0x5960
+#define PCI_CHIP_RV280_5961 0x5961
+#define PCI_CHIP_RV280_5962 0x5962
+#define PCI_CHIP_RV280_5964 0x5964
+#define PCI_CHIP_RV280_5965 0x5965
+#define PCI_CHIP_RN50_5969 0x5969
+#define PCI_CHIP_RS482_5974 0x5974
+#define PCI_CHIP_RS485_5975 0x5975
+#define PCI_CHIP_RS400_5A41 0x5A41
+#define PCI_CHIP_RS400_5A42 0x5A42
+#define PCI_CHIP_RC410_5A61 0x5A61
+#define PCI_CHIP_RC410_5A62 0x5A62
+#define PCI_CHIP_RV370_5B60 0x5B60
+#define PCI_CHIP_RV370_5B62 0x5B62
+#define PCI_CHIP_RV370_5B63 0x5B63
+#define PCI_CHIP_RV370_5B64 0x5B64
+#define PCI_CHIP_RV370_5B65 0x5B65
+#define PCI_CHIP_RV280_5C61 0x5C61
+#define PCI_CHIP_RV280_5C63 0x5C63
+#define PCI_CHIP_R430_5D48 0x5D48
+#define PCI_CHIP_R430_5D49 0x5D49
+#define PCI_CHIP_R430_5D4A 0x5D4A
+#define PCI_CHIP_R480_5D4C 0x5D4C
+#define PCI_CHIP_R480_5D4D 0x5D4D
+#define PCI_CHIP_R480_5D4E 0x5D4E
+#define PCI_CHIP_R480_5D4F 0x5D4F
+#define PCI_CHIP_R480_5D50 0x5D50
+#define PCI_CHIP_R480_5D52 0x5D52
+#define PCI_CHIP_R423_5D57 0x5D57
+#define PCI_CHIP_RV410_5E48 0x5E48
+#define PCI_CHIP_RV410_5E4A 0x5E4A
+#define PCI_CHIP_RV410_5E4B 0x5E4B
+#define PCI_CHIP_RV410_5E4C 0x5E4C
+#define PCI_CHIP_RV410_5E4D 0x5E4D
+#define PCI_CHIP_RV410_5E4F 0x5E4F
+#define PCI_CHIP_RS350_7834 0x7834
+#define PCI_CHIP_RS350_7835 0x7835
diff --git a/src/atidri.c b/src/atidri.c
index bc862a8..0da1bc5 100644
--- a/src/atidri.c
+++ b/src/atidri.c
@@ -553,11 +553,11 @@ static void ATIDRIMoveBuffers( WindowPtr pWin, DDXPointRec ptOldOrg,
if (nbox > 1) {
/* Keep ordering in each band, reverse order of bands */
- pboxNew1 = (BoxPtr)ALLOCATE_LOCAL(sizeof(BoxRec)*nbox);
+ pboxNew1 = (BoxPtr)xalloc(sizeof(BoxRec)*nbox);
if (!pboxNew1) return;
- pptNew1 = (DDXPointPtr)ALLOCATE_LOCAL(sizeof(DDXPointRec)*nbox);
+ pptNew1 = (DDXPointPtr)xalloc(sizeof(DDXPointRec)*nbox);
if (!pptNew1) {
- DEALLOCATE_LOCAL(pboxNew1);
+ xfree(pboxNew1);
return;
}
pboxBase = pboxNext = pbox+nbox-1;
@@ -588,13 +588,13 @@ static void ATIDRIMoveBuffers( WindowPtr pWin, DDXPointRec ptOldOrg,
if (nbox > 1) {
/* reverse order of rects in each band */
- pboxNew2 = (BoxPtr)ALLOCATE_LOCAL(sizeof(BoxRec)*nbox);
- pptNew2 = (DDXPointPtr)ALLOCATE_LOCAL(sizeof(DDXPointRec)*nbox);
+ pboxNew2 = (BoxPtr)xalloc(sizeof(BoxRec)*nbox);
+ pptNew2 = (DDXPointPtr)xalloc(sizeof(DDXPointRec)*nbox);
if (!pboxNew2 || !pptNew2) {
- DEALLOCATE_LOCAL(pptNew2);
- DEALLOCATE_LOCAL(pboxNew2);
- DEALLOCATE_LOCAL(pptNew1);
- DEALLOCATE_LOCAL(pboxNew1);
+ xfree(pptNew2);
+ xfree(pboxNew2);
+ xfree(pptNew1);
+ xfree(pboxNew1);
return;
}
pboxBase = pboxNext = pbox;
@@ -665,10 +665,10 @@ static void ATIDRIMoveBuffers( WindowPtr pWin, DDXPointRec ptOldOrg,
outf(SRC_OFF_PITCH, pATI->NewHW.dst_off_pitch);
outf(DST_OFF_PITCH, pATI->NewHW.src_off_pitch);
- DEALLOCATE_LOCAL(pptNew2);
- DEALLOCATE_LOCAL(pboxNew2);
- DEALLOCATE_LOCAL(pptNew1);
- DEALLOCATE_LOCAL(pboxNew1);
+ xfree(pptNew2);
+ xfree(pboxNew2);
+ xfree(pptNew1);
+ xfree(pboxNew1);
ATIDRIMarkSyncInt(pScreenInfo);
#endif
diff --git a/src/atipciids.h b/src/atipciids.h
index 2aa8a3e..f24f8fb 100644
--- a/src/atipciids.h
+++ b/src/atipciids.h
@@ -38,253 +38,7 @@
#define PCI_VENDOR_AMD 0x1022
#define PCI_VENDOR_DELL 0x1028
-/* ATI */
-#define PCI_CHIP_RV380_3150 0x3150
-#define PCI_CHIP_RV380_3151 0x3151
-#define PCI_CHIP_RV380_3152 0x3152
-#define PCI_CHIP_RV380_3153 0x3153
-#define PCI_CHIP_RV380_3154 0x3154
-#define PCI_CHIP_RV380_3156 0x3156
-#define PCI_CHIP_RV380_3E50 0x3E50
-#define PCI_CHIP_RV380_3E51 0x3E51
-#define PCI_CHIP_RV380_3E52 0x3E52
-#define PCI_CHIP_RV380_3E53 0x3E53
-#define PCI_CHIP_RV380_3E54 0x3E54
-#define PCI_CHIP_RV380_3E56 0x3E56
-#define PCI_CHIP_RS100_4136 0x4136
-#define PCI_CHIP_RS200_4137 0x4137
-#define PCI_CHIP_R300_AD 0x4144
-#define PCI_CHIP_R300_AE 0x4145
-#define PCI_CHIP_R300_AF 0x4146
-#define PCI_CHIP_R300_AG 0x4147
-#define PCI_CHIP_R350_AH 0x4148
-#define PCI_CHIP_R350_AI 0x4149
-#define PCI_CHIP_R350_AJ 0x414A
-#define PCI_CHIP_R350_AK 0x414B
-#define PCI_CHIP_RV350_AP 0x4150
-#define PCI_CHIP_RV350_AQ 0x4151
-#define PCI_CHIP_RV360_AR 0x4152
-#define PCI_CHIP_RV350_AS 0x4153
-#define PCI_CHIP_RV350_AT 0x4154
-#define PCI_CHIP_RV350_4155 0x4155
-#define PCI_CHIP_RV350_AV 0x4156
-#define PCI_CHIP_MACH32 0x4158
-#define PCI_CHIP_RS250_4237 0x4237
-#define PCI_CHIP_R200_BB 0x4242
-#define PCI_CHIP_R200_BC 0x4243
-#define PCI_CHIP_RS100_4336 0x4336
-#define PCI_CHIP_RS200_4337 0x4337
-#define PCI_CHIP_MACH64CT 0x4354
-#define PCI_CHIP_MACH64CX 0x4358
-#define PCI_CHIP_RS250_4437 0x4437
-#define PCI_CHIP_MACH64ET 0x4554
-#define PCI_CHIP_MACH64GB 0x4742
-#define PCI_CHIP_MACH64GD 0x4744
-#define PCI_CHIP_MACH64GI 0x4749
-#define PCI_CHIP_MACH64GL 0x474C
-#define PCI_CHIP_MACH64GM 0x474D
-#define PCI_CHIP_MACH64GN 0x474E
-#define PCI_CHIP_MACH64GO 0x474F
-#define PCI_CHIP_MACH64GP 0x4750
-#define PCI_CHIP_MACH64GQ 0x4751
-#define PCI_CHIP_MACH64GR 0x4752
-#define PCI_CHIP_MACH64GS 0x4753
-#define PCI_CHIP_MACH64GT 0x4754
-#define PCI_CHIP_MACH64GU 0x4755
-#define PCI_CHIP_MACH64GV 0x4756
-#define PCI_CHIP_MACH64GW 0x4757
-#define PCI_CHIP_MACH64GX 0x4758
-#define PCI_CHIP_MACH64GY 0x4759
-#define PCI_CHIP_MACH64GZ 0x475A
-#define PCI_CHIP_RV250_Id 0x4964
-#define PCI_CHIP_RV250_Ie 0x4965
-#define PCI_CHIP_RV250_If 0x4966
-#define PCI_CHIP_RV250_Ig 0x4967
-#define PCI_CHIP_R420_JH 0x4A48
-#define PCI_CHIP_R420_JI 0x4A49
-#define PCI_CHIP_R420_JJ 0x4A4A
-#define PCI_CHIP_R420_JK 0x4A4B
-#define PCI_CHIP_R420_JL 0x4A4C
-#define PCI_CHIP_R420_JM 0x4A4D
-#define PCI_CHIP_R420_JN 0x4A4E
-#define PCI_CHIP_R420_4A4F 0x4A4F
-#define PCI_CHIP_R420_JP 0x4A50
-#define PCI_CHIP_R420_4A54 0x4A54
-#define PCI_CHIP_R481_4B49 0x4B49
-#define PCI_CHIP_R481_4B4A 0x4B4A
-#define PCI_CHIP_R481_4B4B 0x4B4B
-#define PCI_CHIP_R481_4B4C 0x4B4C
-#define PCI_CHIP_MACH64LB 0x4C42
-#define PCI_CHIP_MACH64LD 0x4C44
-#define PCI_CHIP_RAGE128LE 0x4C45
-#define PCI_CHIP_RAGE128LF 0x4C46
-#define PCI_CHIP_MACH64LG 0x4C47
-#define PCI_CHIP_MACH64LI 0x4C49
-#define PCI_CHIP_MACH64LM 0x4C4D
-#define PCI_CHIP_MACH64LN 0x4C4E
-#define PCI_CHIP_MACH64LP 0x4C50
-#define PCI_CHIP_MACH64LQ 0x4C51
-#define PCI_CHIP_MACH64LR 0x4C52
-#define PCI_CHIP_MACH64LS 0x4C53
-#define PCI_CHIP_RADEON_LW 0x4C57
-#define PCI_CHIP_RADEON_LX 0x4C58
-#define PCI_CHIP_RADEON_LY 0x4C59
-#define PCI_CHIP_RADEON_LZ 0x4C5A
-#define PCI_CHIP_RV250_Ld 0x4C64
-#define PCI_CHIP_RV250_Le 0x4C65
-#define PCI_CHIP_RV250_Lf 0x4C66
-#define PCI_CHIP_RV250_Lg 0x4C67
-#define PCI_CHIP_RV250_Ln 0x4C6E
-#define PCI_CHIP_RAGE128MF 0x4D46
-#define PCI_CHIP_RAGE128ML 0x4D4C
-#define PCI_CHIP_R300_ND 0x4E44
-#define PCI_CHIP_R300_NE 0x4E45
-#define PCI_CHIP_R300_NF 0x4E46
-#define PCI_CHIP_R300_NG 0x4E47
-#define PCI_CHIP_R350_NH 0x4E48
-#define PCI_CHIP_R350_NI 0x4E49
-#define PCI_CHIP_R360_NJ 0x4E4A
-#define PCI_CHIP_R350_NK 0x4E4B
-#define PCI_CHIP_RV350_NP 0x4E50
-#define PCI_CHIP_RV350_NQ 0x4E51
-#define PCI_CHIP_RV350_NR 0x4E52
-#define PCI_CHIP_RV350_NS 0x4E53
-#define PCI_CHIP_RV350_NT 0x4E54
-#define PCI_CHIP_RV350_NV 0x4E56
-#define PCI_CHIP_RAGE128PA 0x5041
-#define PCI_CHIP_RAGE128PB 0x5042
-#define PCI_CHIP_RAGE128PC 0x5043
-#define PCI_CHIP_RAGE128PD 0x5044
-#define PCI_CHIP_RAGE128PE 0x5045
-#define PCI_CHIP_RAGE128PF 0x5046
-#define PCI_CHIP_RAGE128PG 0x5047
-#define PCI_CHIP_RAGE128PH 0x5048
-#define PCI_CHIP_RAGE128PI 0x5049
-#define PCI_CHIP_RAGE128PJ 0x504A
-#define PCI_CHIP_RAGE128PK 0x504B
-#define PCI_CHIP_RAGE128PL 0x504C
-#define PCI_CHIP_RAGE128PM 0x504D
-#define PCI_CHIP_RAGE128PN 0x504E
-#define PCI_CHIP_RAGE128PO 0x504F
-#define PCI_CHIP_RAGE128PP 0x5050
-#define PCI_CHIP_RAGE128PQ 0x5051
-#define PCI_CHIP_RAGE128PR 0x5052
-#define PCI_CHIP_RAGE128PS 0x5053
-#define PCI_CHIP_RAGE128PT 0x5054
-#define PCI_CHIP_RAGE128PU 0x5055
-#define PCI_CHIP_RAGE128PV 0x5056
-#define PCI_CHIP_RAGE128PW 0x5057
-#define PCI_CHIP_RAGE128PX 0x5058
-#define PCI_CHIP_RADEON_QD 0x5144
-#define PCI_CHIP_RADEON_QE 0x5145
-#define PCI_CHIP_RADEON_QF 0x5146
-#define PCI_CHIP_RADEON_QG 0x5147
-#define PCI_CHIP_R200_QH 0x5148
-#define PCI_CHIP_R200_QI 0x5149
-#define PCI_CHIP_R200_QJ 0x514A
-#define PCI_CHIP_R200_QK 0x514B
-#define PCI_CHIP_R200_QL 0x514C
-#define PCI_CHIP_R200_QM 0x514D
-#define PCI_CHIP_R200_QN 0x514E
-#define PCI_CHIP_R200_QO 0x514F
-#define PCI_CHIP_RV200_QW 0x5157
-#define PCI_CHIP_RV200_QX 0x5158
-#define PCI_CHIP_RV100_QY 0x5159
-#define PCI_CHIP_RV100_QZ 0x515A
-#define PCI_CHIP_RN50_515E 0x515E
-#define PCI_CHIP_RAGE128RE 0x5245
-#define PCI_CHIP_RAGE128RF 0x5246
-#define PCI_CHIP_RAGE128RG 0x5247
-#define PCI_CHIP_RAGE128RK 0x524B
-#define PCI_CHIP_RAGE128RL 0x524C
-#define PCI_CHIP_RAGE128SE 0x5345
-#define PCI_CHIP_RAGE128SF 0x5346
-#define PCI_CHIP_RAGE128SG 0x5347
-#define PCI_CHIP_RAGE128SH 0x5348
-#define PCI_CHIP_RAGE128SK 0x534B
-#define PCI_CHIP_RAGE128SL 0x534C
-#define PCI_CHIP_RAGE128SM 0x534D
-#define PCI_CHIP_RAGE128SN 0x534E
-#define PCI_CHIP_RAGE128TF 0x5446
-#define PCI_CHIP_RAGE128TL 0x544C
-#define PCI_CHIP_RAGE128TR 0x5452
-#define PCI_CHIP_RAGE128TS 0x5453
-#define PCI_CHIP_RAGE128TT 0x5454
-#define PCI_CHIP_RAGE128TU 0x5455
-#define PCI_CHIP_RV370_5460 0x5460
-#define PCI_CHIP_RV370_5461 0x5461
-#define PCI_CHIP_RV370_5462 0x5462
-#define PCI_CHIP_RV370_5463 0x5463
-#define PCI_CHIP_RV370_5464 0x5464
-#define PCI_CHIP_RV370_5465 0x5465
-#define PCI_CHIP_RV370_5466 0x5466
-#define PCI_CHIP_RV370_5467 0x5467
-#define PCI_CHIP_R423_UH 0x5548
-#define PCI_CHIP_R423_UI 0x5549
-#define PCI_CHIP_R423_UJ 0x554A
-#define PCI_CHIP_R423_UK 0x554B
-#define PCI_CHIP_R430_554C 0x554C
-#define PCI_CHIP_R430_554D 0x554D
-#define PCI_CHIP_R430_554E 0x554E
-#define PCI_CHIP_R430_554F 0x554F
-#define PCI_CHIP_R423_5550 0x5550
-#define PCI_CHIP_R423_UQ 0x5551
-#define PCI_CHIP_R423_UR 0x5552
-#define PCI_CHIP_R423_UT 0x5554
-#define PCI_CHIP_RV410_564A 0x564A
-#define PCI_CHIP_RV410_564B 0x564B
-#define PCI_CHIP_RV410_564F 0x564F
-#define PCI_CHIP_RV410_5652 0x5652
-#define PCI_CHIP_RV410_5653 0x5653
-#define PCI_CHIP_MACH64VT 0x5654
-#define PCI_CHIP_MACH64VU 0x5655
-#define PCI_CHIP_MACH64VV 0x5656
-#define PCI_CHIP_RS300_5834 0x5834
-#define PCI_CHIP_RS300_5835 0x5835
-#define PCI_CHIP_RS300_5836 0x5836
-#define PCI_CHIP_RS300_5837 0x5837
-#define PCI_CHIP_RS480_5954 0x5954
-#define PCI_CHIP_RS480_5955 0x5955
-#define PCI_CHIP_RV280_5960 0x5960
-#define PCI_CHIP_RV280_5961 0x5961
-#define PCI_CHIP_RV280_5962 0x5962
-#define PCI_CHIP_RV280_5964 0x5964
-#define PCI_CHIP_RV280_5965 0x5965
-#define PCI_CHIP_RN50_5969 0x5969
-#define PCI_CHIP_RS482_5974 0x5974
-#define PCI_CHIP_RS485_5975 0x5975
-#define PCI_CHIP_RS400_5A41 0x5A41
-#define PCI_CHIP_RS400_5A42 0x5A42
-#define PCI_CHIP_RC410_5A61 0x5A61
-#define PCI_CHIP_RC410_5A62 0x5A62
-#define PCI_CHIP_RV370_5B60 0x5B60
-#define PCI_CHIP_RV370_5B61 0x5B61
-#define PCI_CHIP_RV370_5B62 0x5B62
-#define PCI_CHIP_RV370_5B63 0x5B63
-#define PCI_CHIP_RV370_5B64 0x5B64
-#define PCI_CHIP_RV370_5B65 0x5B65
-#define PCI_CHIP_RV370_5B66 0x5B66
-#define PCI_CHIP_RV370_5B67 0x5B67
-#define PCI_CHIP_RV280_5C61 0x5C61
-#define PCI_CHIP_RV280_5C63 0x5C63
-#define PCI_CHIP_R430_5D48 0x5D48
-#define PCI_CHIP_R430_5D49 0x5D49
-#define PCI_CHIP_R430_5D4A 0x5D4A
-#define PCI_CHIP_R480_5D4C 0x5D4C
-#define PCI_CHIP_R480_5D4D 0x5D4D
-#define PCI_CHIP_R480_5D4E 0x5D4E
-#define PCI_CHIP_R480_5D4F 0x5D4F
-#define PCI_CHIP_R480_5D50 0x5D50
-#define PCI_CHIP_R480_5D52 0x5D52
-#define PCI_CHIP_R423_5D57 0x5D57
-#define PCI_CHIP_RV410_5E48 0x5E48
-#define PCI_CHIP_RV410_5E4A 0x5E4A
-#define PCI_CHIP_RV410_5E4B 0x5E4B
-#define PCI_CHIP_RV410_5E4C 0x5E4C
-#define PCI_CHIP_RV410_5E4D 0x5E4D
-#define PCI_CHIP_RV410_5E4F 0x5E4F
-#define PCI_CHIP_RS350_7834 0x7834
-#define PCI_CHIP_RS350_7835 0x7835
+#include "ati_pciids_gen.h"
/* Misc */
#define PCI_CHIP_AMD761 0x700E
diff --git a/src/pcidb/ati_pciids.csv b/src/pcidb/ati_pciids.csv
new file mode 100644
index 0000000..f201cc4
--- /dev/null
+++ b/src/pcidb/ati_pciids.csv
@@ -0,0 +1,220 @@
+"#pciid","define","family","mobility","igp","nocrtc2","Nointtvout","singledac","name"
+"0x3150","RV380_3150","RV380",1,,,,,"ATI Radeon Mobility X600 (M24) 3150 (PCIE)"
+"0x3152","RV380_3152","RV380",1,,,,,"ATI Radeon Mobility X300 (M24) 3152 (PCIE)"
+"0x3154","RV380_3154","RV380",1,,,,,"ATI FireGL M24 GL 3154 (PCIE)"
+"0x3E50","RV380_3E50","RV380",,,,,,"ATI Radeon X600 (RV380) 3E50 (PCIE)"
+"0x3E54","RV380_3E54","RV380",,,,,,"ATI FireGL V3200 (RV380) 3E54 (PCIE)"
+"0x4136","RS100_4136","RS100",,1,,,,"ATI Radeon IGP320 (A3) 4136"
+"0x4137","RS200_4137","RS200",,1,,,,"ATI Radeon IGP330/340/350 (A4) 4137"
+"0x4144","R300_AD","R300",,,,,,"ATI Radeon 9500 AD (AGP)"
+"0x4145","R300_AE","R300",,,,,,"ATI Radeon 9500 AE (AGP)"
+"0x4146","R300_AF","R300",,,,,,"ATI Radeon 9600TX AF (AGP)"
+"0x4147","R300_AG","R300",,,,,,"ATI FireGL Z1 AG (AGP)"
+"0x4148","R350_AH","R350",,,,,,"ATI Radeon 9800SE AH (AGP)"
+"0x4149","R350_AI","R350",,,,,,"ATI Radeon 9800 AI (AGP)"
+"0x414A","R350_AJ","R350",,,,,,"ATI Radeon 9800 AJ (AGP)"
+"0x414B","R350_AK","R350",,,,,,"ATI FireGL X2 AK (AGP)"
+"0x4150","RV350_AP","RV350",,,,,,"ATI Radeon 9600 AP (AGP)"
+"0x4151","RV350_AQ","RV350",,,,,,"ATI Radeon 9600SE AQ (AGP)"
+"0x4152","RV360_AR","RV350",,,,,,"ATI Radeon 9600XT AR (AGP)"
+"0x4153","RV350_AS","RV350",,,,,,"ATI Radeon 9600 AS (AGP)"
+"0x4154","RV350_AT","RV350",,,,,,"ATI FireGL T2 AT (AGP)"
+"0x4155","RV350_4155","RV350",,,,,,"ATI Radeon 9650"
+"0x4156","RV350_AV","RV350",,,,,,"ATI FireGL RV360 AV (AGP)"
+"0x4158","MACH32","MACH32",,,,,,
+"0x4237","RS250_4237","RS200",,1,,,,"ATI Radeon 7000 IGP (A4+) 4237"
+"0x4242","R200_BB","R200",,,,1,,"ATI Radeon 8500 AIW BB (AGP)"
+"0x4243","R200_BC","R200",,,,1,,"ATI Radeon 8500 AIW BC (AGP)"
+"0x4336","RS100_4336","RS100",1,1,,,,"ATI Radeon IGP320M (U1) 4336"
+"0x4337","RS200_4337","RS200",1,1,,,,"ATI Radeon IGP330M/340M/350M (U2) 4337"
+"0x4354","MACH64CT","MACH64",,,,,,
+"0x4358","MACH64CX","MACH64",,,,,,
+"0x4437","RS250_4437","RS200",1,1,,,,"ATI Radeon Mobility 7000 IGP 4437"
+"0x4554","MACH64ET","MACH64",,,,,,
+"0x4742","MACH64GB","MACH64",,,,,,
+"0x4744","MACH64GD","MACH64",,,,,,
+"0x4749","MACH64GI","MACH64",,,,,,
+"0x474C","MACH64GL","MACH64",,,,,,
+"0x474D","MACH64GM","MACH64",,,,,,
+"0x474E","MACH64GN","MACH64",,,,,,
+"0x474F","MACH64GO","MACH64",,,,,,
+"0x4750","MACH64GP","MACH64",,,,,,
+"0x4751","MACH64GQ","MACH64",,,,,,
+"0x4752","MACH64GR","MACH64",,,,,,
+"0x4753","MACH64GS","MACH64",,,,,,
+"0x4754","MACH64GT","MACH64",,,,,,
+"0x4755","MACH64GU","MACH64",,,,,,
+"0x4756","MACH64GV","MACH64",,,,,,
+"0x4757","MACH64GW","MACH64",,,,,,
+"0x4758","MACH64GX","MACH64",,,,,,
+"0x4759","MACH64GY","MACH64",,,,,,
+"0x475A","MACH64GZ","MACH64",,,,,,
+"0x4966","RV250_If","RV250",,,,,,"ATI Radeon 9000/PRO If (AGP/PCI)"
+"0x4967","RV250_Ig","RV250",,,,,,"ATI Radeon 9000 Ig (AGP/PCI)"
+"0x4A48","R420_JH","R420",,,,,,"ATI Radeon X800 (R420) JH (AGP)"
+"0x4A49","R420_JI","R420",,,,,,"ATI Radeon X800PRO (R420) JI (AGP)"
+"0x4A4A","R420_JJ","R420",,,,,,"ATI Radeon X800SE (R420) JJ (AGP)"
+"0x4A4B","R420_JK","R420",,,,,,"ATI Radeon X800 (R420) JK (AGP)"
+"0x4A4C","R420_JL","R420",,,,,,"ATI Radeon X800 (R420) JL (AGP)"
+"0x4A4D","R420_JM","R420",,,,,,"ATI FireGL X3 (R420) JM (AGP)"
+"0x4A4E","R420_JN","R420",1,,,,,"ATI Radeon Mobility 9800 (M18) JN (AGP)"
+"0x4A4F","R420_4A4F","R420",,,,,,"ATI Radeon X800 SE (R420) (AGP)"
+"0x4A50","R420_JP","R420",,,,,,"ATI Radeon X800XT (R420) JP (AGP)"
+"0x4B49","R481_4B49","R420",,,,,,"ATI Radeon X850 XT (R480) (AGP)"
+"0x4B4A","R481_4B4A","R420",,,,,,"ATI Radeon X850 SE (R480) (AGP)"
+"0x4B4B","R481_4B4B","R420",,,,,,"ATI Radeon X850 PRO (R480) (AGP)"
+"0x4B4C","R481_4B4C","R420",,,,,,"ATI Radeon X850 XT PE (R480) (AGP)"
+"0x4C42","MACH64LB","MACH64",,,,,,
+"0x4C44","MACH64LD","MACH64",,,,,,
+"0x4C45","RAGE128LE","R128",,,,,,
+"0x4C46","RAGE128LF","R128",,,,,,
+"0x4C47","MACH64LG","MACH64",,,,,,
+"0x4C49","MACH64LI","MACH64",,,,,,
+"0x4C4D","MACH64LM","MACH64",,,,,,
+"0x4C4E","MACH64LN","MACH64",,,,,,
+"0x4C50","MACH64LP","MACH64",,,,,,
+"0x4C51","MACH64LQ","MACH64",,,,,,
+"0x4C52","MACH64LR","MACH64",,,,,,
+"0x4C53","MACH64LS","MACH64",,,,,,
+"0x4C57","RADEON_LW","RV200",1,,,,,"ATI Radeon Mobility M7 LW (AGP)"
+"0x4C58","RADEON_LX","RV200",1,,,,,"ATI Mobility FireGL 7800 M7 LX (AGP)"
+"0x4C59","RADEON_LY","RV100",1,,,,,"ATI Radeon Mobility M6 LY (AGP)"
+"0x4C5A","RADEON_LZ","RV100",1,,,,,"ATI Radeon Mobility M6 LZ (AGP)"
+"0x4C64","RV250_Ld","RV250",1,,,,,"ATI FireGL Mobility 9000 (M9) Ld (AGP)"
+"0x4C66","RV250_Lf","RV250",1,,,,,"ATI Radeon Mobility 9000 (M9) Lf (AGP)"
+"0x4C67","RV250_Lg","RV250",1,,,,,"ATI Radeon Mobility 9000 (M9) Lg (AGP)"
+"0x4D46","RAGE128MF","R128",,,,,,
+"0x4D4C","RAGE128ML","R128",,,,,,
+"0x4E44","R300_ND","R300",,,,,,"ATI Radeon 9700 Pro ND (AGP)"
+"0x4E45","R300_NE","R300",,,,,,"ATI Radeon 9700/9500Pro NE (AGP)"
+"0x4E46","R300_NF","R300",,,,,,"ATI Radeon 9600TX NF (AGP)"
+"0x4E47","R300_NG","R300",,,,,,"ATI FireGL X1 NG (AGP)"
+"0x4E48","R350_NH","R350",,,,,,"ATI Radeon 9800PRO NH (AGP)"
+"0x4E49","R350_NI","R350",,,,,,"ATI Radeon 9800 NI (AGP)"
+"0x4E4A","R360_NJ","R350",,,,,,"ATI FireGL X2 NK (AGP)"
+"0x4E4B","R350_NK","R350",,,,,,"ATI Radeon 9800XT NJ (AGP)"
+"0x4E50","RV350_NP","RV350",1,,,,,"ATI Radeon Mobility 9600/9700 (M10/M11) NP (AGP)"
+"0x4E51","RV350_NQ","RV350",1,,,,,"ATI Radeon Mobility 9600 (M10) NQ (AGP)"
+"0x4E52","RV350_NR","RV350",1,,,,,"ATI Radeon Mobility 9600 (M11) NR (AGP)"
+"0x4E53","RV350_NS","RV350",1,,,,,"ATI Radeon Mobility 9600 (M10) NS (AGP)"
+"0x4E54","RV350_NT","RV350",1,,,,,"ATI FireGL Mobility T2 (M10) NT (AGP)"
+"0x4E56","RV350_NV","RV350",1,,,,,"ATI FireGL Mobility T2e (M11) NV (AGP)"
+"0x5041","RAGE128PA","R128",,,,,,
+"0x5042","RAGE128PB","R128",,,,,,
+"0x5043","RAGE128PC","R128",,,,,,
+"0x5044","RAGE128PD","R128",,,,,,
+"0x5045","RAGE128PE","R128",,,,,,
+"0x5046","RAGE128PF","R128",,,,,,
+"0x5047","RAGE128PG","R128",,,,,,
+"0x5048","RAGE128PH","R128",,,,,,
+"0x5049","RAGE128PI","R128",,,,,,
+"0x504A","RAGE128PJ","R128",,,,,,
+"0x504B","RAGE128PK","R128",,,,,,
+"0x504C","RAGE128PL","R128",,,,,,
+"0x504D","RAGE128PM","R128",,,,,,
+"0x504E","RAGE128PN","R128",,,,,,
+"0x504F","RAGE128PO","R128",,,,,,
+"0x5050","RAGE128PP","R128",,,,,,
+"0x5051","RAGE128PQ","R128",,,,,,
+"0x5052","RAGE128PR","R128",,,,,,
+"0x5053","RAGE128PS","R128",,,,,,
+"0x5054","RAGE128PT","R128",,,,,,
+"0x5055","RAGE128PU","R128",,,,,,
+"0x5056","RAGE128PV","R128",,,,,,
+"0x5057","RAGE128PW","R128",,,,,,
+"0x5058","RAGE128PX","R128",,,,,,
+"0x5144","RADEON_QD","RADEON",,,1,1,,"ATI Radeon QD (AGP)"
+"0x5145","RADEON_QE","RADEON",,,1,1,,"ATI Radeon QE (AGP)"
+"0x5146","RADEON_QF","RADEON",,,1,1,,"ATI Radeon QF (AGP)"
+"0x5147","RADEON_QG","RADEON",,,1,1,,"ATI Radeon QG (AGP)"
+"0x5148","R200_QH","R200",,,,1,,"ATI FireGL 8700/8800 QH (AGP)"
+"0x514C","R200_QL","R200",,,,1,,"ATI Radeon 8500 QL (AGP)"
+"0x514D","R200_QM","R200",,,,1,,"ATI Radeon 9100 QM (AGP)"
+"0x5157","RV200_QW","RV200",,,,,,"ATI Radeon 7500 QW (AGP/PCI)"
+"0x5158","RV200_QX","RV200",,,,,,"ATI Radeon 7500 QX (AGP/PCI)"
+"0x5159","RV100_QY","RV100",,,,,,"ATI Radeon VE/7000 QY (AGP/PCI)"
+"0x515A","RV100_QZ","RV100",,,,,,"ATI Radeon VE/7000 QZ (AGP/PCI)"
+"0x515E","RN50_515E","RV100",,,1,,,"ATI ES1000 515E (PCI)"
+"0x5245","RAGE128RE","R128",,,,,,
+"0x5246","RAGE128RF","R128",,,,,,
+"0x5247","RAGE128RG","R128",,,,,,
+"0x524B","RAGE128RK","R128",,,,,,
+"0x524C","RAGE128RL","R128",,,,,,
+"0x5345","RAGE128SE","R128",,,,,,
+"0x5346","RAGE128SF","R128",,,,,,
+"0x5347","RAGE128SG","R128",,,,,,
+"0x5348","RAGE128SH","R128",,,,,,
+"0x534B","RAGE128SK","R128",,,,,,
+"0x534C","RAGE128SL","R128",,,,,,
+"0x534D","RAGE128SM","R128",,,,,,
+"0x534E","RAGE128SN","R128",,,,,,
+"0x5446","RAGE128TF","R128",,,,,,
+"0x544C","RAGE128TL","R128",,,,,,
+"0x5452","RAGE128TR","R128",,,,,,
+"0x5453","RAGE128TS","R128",,,,,,
+"0x5454","RAGE128TT","R128",,,,,,
+"0x5455","RAGE128TU","R128",,,,,,
+"0x5460","RV370_5460","RV380",1,,,,,"ATI Radeon Mobility X300 (M22) 5460 (PCIE)"
+"0x5462","RV370_5462","RV380",1,,,,,"ATI Radeon Mobility X600 SE (M24C) 5462 (PCIE)"
+"0x5464","RV370_5464","RV380",1,,,,,"ATI FireGL M22 GL 5464 (PCIE)"
+"0x5548","R423_UH","R420",,,,,,"ATI Radeon X800 (R423) UH (PCIE)"
+"0x5549","R423_UI","R420",,,,,,"ATI Radeon X800PRO (R423) UI (PCIE)"
+"0x554A","R423_UJ","R420",,,,,,"ATI Radeon X800LE (R423) UJ (PCIE)"
+"0x554B","R423_UK","R420",,,,,,"ATI Radeon X800SE (R423) UK (PCIE)"
+"0x554C","R430_554C","R420",,,,,,"ATI Radeon X800 XTP (R430) (PCIE)"
+"0x554D","R430_554D","R420",,,,,,"ATI Radeon X800 XL (R430) (PCIE)"
+"0x554E","R430_554E","R420",,,,,,"ATI Radeon X800 SE (R430) (PCIE)"
+"0x554F","R430_554F","R420",,,,,,"ATI Radeon X800 (R430) (PCIE)"
+"0x5550","R423_5550","R420",,,,,,"ATI FireGL V7100 (R423) (PCIE)"
+"0x5551","R423_UQ","R420",,,,,,"ATI FireGL V5100 (R423) UQ (PCIE)"
+"0x5552","R423_UR","R420",,,,,,"ATI FireGL unknown (R423) UR (PCIE)"
+"0x5554","R423_UT","R420",,,,,,"ATI FireGL unknown (R423) UT (PCIE)"
+"0x564A","RV410_564A","RV410",1,,,,,"ATI Mobility FireGL V5000 (M26) (PCIE)"
+"0x564B","RV410_564B","RV410",1,,,,,"ATI Mobility FireGL V5000 (M26) (PCIE)"
+"0x564F","RV410_564F","RV410",1,,,,,"ATI Mobility Radeon X700 XL (M26) (PCIE)"
+"0x5652","RV410_5652","RV410",1,,,,,"ATI Mobility Radeon X700 (M26) (PCIE)"
+"0x5653","RV410_5653","RV410",1,,,,,"ATI Mobility Radeon X700 (M26) (PCIE)"
+"0x5654","MACH64VT","MACH64",,,,,,
+"0x5655","MACH64VU","MACH64",,,,,,
+"0x5656","MACH64VV","MACH64",,,,,,
+"0x5834","RS300_5834","RS300",,1,,,1,"ATI Radeon 9100 IGP (A5) 5834"
+"0x5835","RS300_5835","RS300",1,1,,,1,"ATI Radeon Mobility 9100 IGP (U3) 5835"
+"0x5954","RS480_5954","RS400",,1,,,1,"ATI Radeon XPRESS 200 5954 (PCIE)"
+"0x5955","RS480_5955","RS400",1,1,,,1,"ATI Radeon XPRESS 200M 5955 (PCIE)"
+"0x5960","RV280_5960","RV280",,,,,,"ATI Radeon 9250 5960 (AGP)"
+"0x5961","RV280_5961","RV280",,,,,,"ATI Radeon 9200 5961 (AGP)"
+"0x5962","RV280_5962","RV280",,,,,,"ATI Radeon 9200 5962 (AGP)"
+"0x5964","RV280_5964","RV280",,,,,,"ATI Radeon 9200SE 5964 (AGP)"
+"0x5965","RV280_5965","RV280",,,,,,"ATI FireMV 2200 (PCI)"
+"0x5969","RN50_5969","RV100",,,1,,,"ATI ES1000 5969 (PCI)"
+"0x5974","RS482_5974","RS400",,1,,,1,"ATI Radeon XPRESS 200 5974 (PCIE)"
+"0x5975","RS485_5975","RS400",1,1,,,1,"ATI Radeon XPRESS 200M 5975 (PCIE)"
+"0x5A41","RS400_5A41","RS400",,1,,,1,"ATI Radeon XPRESS 200 5A41 (PCIE)"
+"0x5A42","RS400_5A42","RS400",1,1,,,1,"ATI Radeon XPRESS 200M 5A42 (PCIE)"
+"0x5A61","RC410_5A61","RS400",,1,,,1,"ATI Radeon XPRESS 200 5A61 (PCIE)"
+"0x5A62","RC410_5A62","RS400",1,1,,,1,"ATI Radeon XPRESS 200M 5A62 (PCIE)"
+"0x5B60","RV370_5B60","RV380",,,,,,"ATI Radeon X300 (RV370) 5B60 (PCIE)"
+"0x5B62","RV370_5B62","RV380",,,,,,"ATI Radeon X600 (RV370) 5B62 (PCIE)"
+"0x5B63","RV370_5B63","RV380",,,,,,"ATI Radeon X550 (RV370) 5B63 (PCIE)"
+"0x5B64","RV370_5B64","RV380",,,,,,"ATI FireGL V3100 (RV370) 5B64 (PCIE)"
+"0x5B65","RV370_5B65","RV380",,,,,,"ATI FireMV 2200 PCIE (RV370) 5B65 (PCIE)"
+"0x5C61","RV280_5C61","RV280",1,,,,,"ATI Radeon Mobility 9200 (M9+) 5C61 (AGP)"
+"0x5C63","RV280_5C63","RV280",1,,,,,"ATI Radeon Mobility 9200 (M9+) 5C63 (AGP)"
+"0x5D48","R430_5D48","R420",1,,,,,"ATI Mobility Radeon X800 XT (M28) (PCIE)"
+"0x5D49","R430_5D49","R420",1,,,,,"ATI Mobility FireGL V5100 (M28) (PCIE)"
+"0x5D4A","R430_5D4A","R420",1,,,,,"ATI Mobility Radeon X800 (M28) (PCIE)"
+"0x5D4C","R480_5D4C","R420",,,,,,"ATI Radeon X850 5D4C (PCIE)"
+"0x5D4D","R480_5D4D","R420",,,,,,"ATI Radeon X850 XT PE (R480) (PCIE)"
+"0x5D4E","R480_5D4E","R420",,,,,,"ATI Radeon X850 SE (R480) (PCIE)"
+"0x5D4F","R480_5D4F","R420",,,,,,"ATI Radeon X850 PRO (R480) (PCIE)"
+"0x5D50","R480_5D50","R420",,,,,,"ATI unknown Radeon / FireGL (R480) 5D50 (PCIE)"
+"0x5D52","R480_5D52","R420",,,,,,"ATI Radeon X850 XT (R480) (PCIE)"
+"0x5D57","R423_5D57","R420",,,,,,"ATI Radeon X800XT (R423) 5D57 (PCIE)"
+"0x5E48","RV410_5E48","RV410",,,,,,"ATI FireGL V5000 (RV410) (PCIE)"
+"0x5E4A","RV410_5E4A","RV410",,,,,,"ATI Radeon X700 XT (RV410) (PCIE)"
+"0x5E4B","RV410_5E4B","RV410",,,,,,"ATI Radeon X700 PRO (RV410) (PCIE)"
+"0x5E4C","RV410_5E4C","RV410",,,,,,"ATI Radeon X700 SE (RV410) (PCIE)"
+"0x5E4D","RV410_5E4D","RV410",,,,,,"ATI Radeon X700 (RV410) (PCIE)"
+"0x5E4F","RV410_5E4F","RV410",,,,,,"ATI Radeon X700 SE (RV410) (PCIE)"
+"0x7834","RS350_7834","RS300",,1,,,,"ATI Radeon 9100 PRO IGP 7834"
+"0x7835","RS350_7835","RS300",1,1,,,,"ATI Radeon Mobility 9200 IGP 7835"
diff --git a/src/pcidb/parse_pci_ids.pl b/src/pcidb/parse_pci_ids.pl
new file mode 100755
index 0000000..e6eac76
--- /dev/null
+++ b/src/pcidb/parse_pci_ids.pl
@@ -0,0 +1,94 @@
+#!/usr/bin/perl
+#
+# Copyright 2007 Red Hat Inc.
+# This crappy script written by Dave Airlie to avoid hassle of adding
+# ids in every place.
+#
+use strict;
+use warnings;
+use Text::CSV_XS;
+
+my $file = $ARGV[0];
+
+my $atioutfile = 'ati_pciids_gen.h';
+my $radeonpcichipsetfile = 'radeon_pci_chipset_gen.h';
+my $radeonchipsetfile = 'radeon_chipset_gen.h';
+my $radeonchipinfofile = 'radeon_chipinfo_gen.h';
+
+my $csv = Text::CSV_XS->new();
+
+open (CSV, "<", $file) or die $!;
+
+open (ATIOUT, ">", $atioutfile) or die;
+open (PCICHIPSET, ">", $radeonpcichipsetfile) or die;
+open (RADEONCHIPSET, ">", $radeonchipsetfile) or die;
+open (RADEONCHIPINFO, ">", $radeonchipinfofile) or die;
+
+print RADEONCHIPSET "/* This file is autogenerated please do not edit */\n";
+print RADEONCHIPSET "static SymTabRec RADEONChipsets[] = {\n";
+print PCICHIPSET "/* This file is autogenerated please do not edit */\n";
+print PCICHIPSET "PciChipsets RADEONPciChipsets[] = {\n";
+print RADEONCHIPINFO "/* This file is autogenerated please do not edit */\n";
+print RADEONCHIPINFO "RADEONCardInfo RADEONCards[] = {\n";
+while (<CSV>) {
+ if ($csv->parse($_)) {
+ my @columns = $csv->fields();
+
+ if ((substr($columns[0], 0, 1) ne "#")) {
+
+ print ATIOUT "#define PCI_CHIP_$columns[1] $columns[0]\n";
+
+ if (($columns[2] ne "R128") && ($columns[2] ne "MACH64") && ($columns[2] ne "MACH32")) {
+ print PCICHIPSET " { PCI_CHIP_$columns[1], PCI_CHIP_$columns[1], RES_SHARED_VGA },\n";
+
+ print RADEONCHIPSET " { PCI_CHIP_$columns[1], \"$columns[8]\" },\n";
+
+ print RADEONCHIPINFO " { $columns[0], CHIP_FAMILY_$columns[2], ";
+
+ if ($columns[3] eq "1") {
+ print RADEONCHIPINFO "1, ";
+ } else {
+ print RADEONCHIPINFO "0, ";
+ }
+
+ if ($columns[4] eq "1") {
+ print RADEONCHIPINFO "1, ";
+ } else {
+ print RADEONCHIPINFO "0, ";
+ }
+
+ if ($columns[5] eq "1") {
+ print RADEONCHIPINFO "1, ";
+ } else {
+ print RADEONCHIPINFO "0, ";
+ }
+
+ if ($columns[6] eq "1") {
+ print RADEONCHIPINFO "1, ";
+ } else {
+ print RADEONCHIPINFO "0, ";
+ }
+
+ if ($columns[7] eq "1") {
+ print RADEONCHIPINFO "1 ";
+ } else {
+ print RADEONCHIPINFO "0 ";
+ }
+
+ print RADEONCHIPINFO "},\n";
+ }
+ }
+ } else {
+ my $err = $csv->error_input;
+ print "Failed to parse line: $err";
+ }
+}
+
+print RADEONCHIPINFO "};\n";
+print RADEONCHIPSET " { -1, NULL }\n};\n";
+print PCICHIPSET " { -1, -1, RES_UNDEFINED }\n};\n";
+close CSV;
+close ATIOUT;
+close PCICHIPSET;
+close RADEONCHIPSET;
+close RADEONCHIPINFO;
diff --git a/src/radeon.h b/src/radeon.h
index 532f04c..78f756e 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -158,7 +158,9 @@ typedef enum {
OPTION_MAC_MODEL,
#endif
OPTION_DEFAULT_TMDS_PLL,
- OPTION_TVDAC_LOAD_DETECT
+ OPTION_TVDAC_LOAD_DETECT,
+ OPTION_FORCE_TVOUT,
+ OPTION_TVSTD
} RADEONOpts;
@@ -428,12 +430,19 @@ typedef enum {
CHIP_ERRATA_PLL_DELAY = 0x00000004
} RADEONErrata;
+typedef enum {
+ RADEON_SIL_164 = 0x00000001,
+ RADEON_SIL_1178 = 0x00000002
+} RADEONExtTMDSChip;
+
#if defined(__powerpc__)
typedef enum {
- RADEON_MAC_IBOOK = 0x00000001,
- RADEON_MAC_POWERBOOK_DL = 0x00000002,
- RADEON_MAC_POWERBOOK = 0x00000004,
- RADEON_MAC_MINI = 0x00000008
+ RADEON_MAC_IBOOK = 0x00000001,
+ RADEON_MAC_POWERBOOK_EXTERNAL = 0x00000002,
+ RADEON_MAC_POWERBOOK_INTERNAL = 0x00000004,
+ RADEON_MAC_POWERBOOK_VGA = 0x00000008,
+ RADEON_MAC_MINI_EXTERNAL = 0x00000016,
+ RADEON_MAC_MINI_INTERNAL = 0x00000032
} RADEONMacModel;
#endif
@@ -444,6 +453,16 @@ typedef enum {
} RADEONCardType;
typedef struct {
+ CARD32 pci_device_id;
+ RADEONChipFamily chip_family;
+ int mobility;
+ int igp;
+ int nocrtc2;
+ int nointtvout;
+ int singledac;
+} RADEONCardInfo;
+
+typedef struct {
EntityInfoPtr pEnt;
pciVideoPtr PciInfo;
PCITAG PciTag;
@@ -816,6 +835,7 @@ typedef struct {
#if defined(__powerpc__)
RADEONMacModel MacModel;
#endif
+ RADEONExtTMDSChip ext_tmds_chip;
Rotation rotation;
void (*PointerMoved)(int, int, int);
diff --git a/src/radeon_chipinfo_gen.h b/src/radeon_chipinfo_gen.h
new file mode 100644
index 0000000..a12b225
--- /dev/null
+++ b/src/radeon_chipinfo_gen.h
@@ -0,0 +1,140 @@
+/* This file is autogenerated please do not edit */
+RADEONCardInfo RADEONCards[] = {
+ { 0x3150, CHIP_FAMILY_RV380, 1, 0, 0, 0, 0 },
+ { 0x3152, CHIP_FAMILY_RV380, 1, 0, 0, 0, 0 },
+ { 0x3154, CHIP_FAMILY_RV380, 1, 0, 0, 0, 0 },
+ { 0x3E50, CHIP_FAMILY_RV380, 0, 0, 0, 0, 0 },
+ { 0x3E54, CHIP_FAMILY_RV380, 0, 0, 0, 0, 0 },
+ { 0x4136, CHIP_FAMILY_RS100, 0, 1, 0, 0, 0 },
+ { 0x4137, CHIP_FAMILY_RS200, 0, 1, 0, 0, 0 },
+ { 0x4144, CHIP_FAMILY_R300, 0, 0, 0, 0, 0 },
+ { 0x4145, CHIP_FAMILY_R300, 0, 0, 0, 0, 0 },
+ { 0x4146, CHIP_FAMILY_R300, 0, 0, 0, 0, 0 },
+ { 0x4147, CHIP_FAMILY_R300, 0, 0, 0, 0, 0 },
+ { 0x4148, CHIP_FAMILY_R350, 0, 0, 0, 0, 0 },
+ { 0x4149, CHIP_FAMILY_R350, 0, 0, 0, 0, 0 },
+ { 0x414A, CHIP_FAMILY_R350, 0, 0, 0, 0, 0 },
+ { 0x414B, CHIP_FAMILY_R350, 0, 0, 0, 0, 0 },
+ { 0x4150, CHIP_FAMILY_RV350, 0, 0, 0, 0, 0 },
+ { 0x4151, CHIP_FAMILY_RV350, 0, 0, 0, 0, 0 },
+ { 0x4152, CHIP_FAMILY_RV350, 0, 0, 0, 0, 0 },
+ { 0x4153, CHIP_FAMILY_RV350, 0, 0, 0, 0, 0 },
+ { 0x4154, CHIP_FAMILY_RV350, 0, 0, 0, 0, 0 },
+ { 0x4155, CHIP_FAMILY_RV350, 0, 0, 0, 0, 0 },
+ { 0x4156, CHIP_FAMILY_RV350, 0, 0, 0, 0, 0 },
+ { 0x4237, CHIP_FAMILY_RS200, 0, 1, 0, 0, 0 },
+ { 0x4242, CHIP_FAMILY_R200, 0, 0, 0, 1, 0 },
+ { 0x4243, CHIP_FAMILY_R200, 0, 0, 0, 1, 0 },
+ { 0x4336, CHIP_FAMILY_RS100, 1, 1, 0, 0, 0 },
+ { 0x4337, CHIP_FAMILY_RS200, 1, 1, 0, 0, 0 },
+ { 0x4437, CHIP_FAMILY_RS200, 1, 1, 0, 0, 0 },
+ { 0x4966, CHIP_FAMILY_RV250, 0, 0, 0, 0, 0 },
+ { 0x4967, CHIP_FAMILY_RV250, 0, 0, 0, 0, 0 },
+ { 0x4A48, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x4A49, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x4A4A, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x4A4B, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x4A4C, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x4A4D, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x4A4E, CHIP_FAMILY_R420, 1, 0, 0, 0, 0 },
+ { 0x4A4F, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x4A50, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x4B49, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x4B4A, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x4B4B, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x4B4C, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x4C57, CHIP_FAMILY_RV200, 1, 0, 0, 0, 0 },
+ { 0x4C58, CHIP_FAMILY_RV200, 1, 0, 0, 0, 0 },
+ { 0x4C59, CHIP_FAMILY_RV100, 1, 0, 0, 0, 0 },
+ { 0x4C5A, CHIP_FAMILY_RV100, 1, 0, 0, 0, 0 },
+ { 0x4C64, CHIP_FAMILY_RV250, 1, 0, 0, 0, 0 },
+ { 0x4C66, CHIP_FAMILY_RV250, 1, 0, 0, 0, 0 },
+ { 0x4C67, CHIP_FAMILY_RV250, 1, 0, 0, 0, 0 },
+ { 0x4E44, CHIP_FAMILY_R300, 0, 0, 0, 0, 0 },
+ { 0x4E45, CHIP_FAMILY_R300, 0, 0, 0, 0, 0 },
+ { 0x4E46, CHIP_FAMILY_R300, 0, 0, 0, 0, 0 },
+ { 0x4E47, CHIP_FAMILY_R300, 0, 0, 0, 0, 0 },
+ { 0x4E48, CHIP_FAMILY_R350, 0, 0, 0, 0, 0 },
+ { 0x4E49, CHIP_FAMILY_R350, 0, 0, 0, 0, 0 },
+ { 0x4E4A, CHIP_FAMILY_R350, 0, 0, 0, 0, 0 },
+ { 0x4E4B, CHIP_FAMILY_R350, 0, 0, 0, 0, 0 },
+ { 0x4E50, CHIP_FAMILY_RV350, 1, 0, 0, 0, 0 },
+ { 0x4E51, CHIP_FAMILY_RV350, 1, 0, 0, 0, 0 },
+ { 0x4E52, CHIP_FAMILY_RV350, 1, 0, 0, 0, 0 },
+ { 0x4E53, CHIP_FAMILY_RV350, 1, 0, 0, 0, 0 },
+ { 0x4E54, CHIP_FAMILY_RV350, 1, 0, 0, 0, 0 },
+ { 0x4E56, CHIP_FAMILY_RV350, 1, 0, 0, 0, 0 },
+ { 0x5144, CHIP_FAMILY_RADEON, 0, 0, 1, 1, 0 },
+ { 0x5145, CHIP_FAMILY_RADEON, 0, 0, 1, 1, 0 },
+ { 0x5146, CHIP_FAMILY_RADEON, 0, 0, 1, 1, 0 },
+ { 0x5147, CHIP_FAMILY_RADEON, 0, 0, 1, 1, 0 },
+ { 0x5148, CHIP_FAMILY_R200, 0, 0, 0, 1, 0 },
+ { 0x514C, CHIP_FAMILY_R200, 0, 0, 0, 1, 0 },
+ { 0x514D, CHIP_FAMILY_R200, 0, 0, 0, 1, 0 },
+ { 0x5157, CHIP_FAMILY_RV200, 0, 0, 0, 0, 0 },
+ { 0x5158, CHIP_FAMILY_RV200, 0, 0, 0, 0, 0 },
+ { 0x5159, CHIP_FAMILY_RV100, 0, 0, 0, 0, 0 },
+ { 0x515A, CHIP_FAMILY_RV100, 0, 0, 0, 0, 0 },
+ { 0x515E, CHIP_FAMILY_RV100, 0, 0, 1, 0, 0 },
+ { 0x5460, CHIP_FAMILY_RV380, 1, 0, 0, 0, 0 },
+ { 0x5462, CHIP_FAMILY_RV380, 1, 0, 0, 0, 0 },
+ { 0x5464, CHIP_FAMILY_RV380, 1, 0, 0, 0, 0 },
+ { 0x5548, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x5549, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x554A, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x554B, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x554C, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x554D, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x554E, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x554F, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x5550, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x5551, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x5552, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x5554, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x564A, CHIP_FAMILY_RV410, 1, 0, 0, 0, 0 },
+ { 0x564B, CHIP_FAMILY_RV410, 1, 0, 0, 0, 0 },
+ { 0x564F, CHIP_FAMILY_RV410, 1, 0, 0, 0, 0 },
+ { 0x5652, CHIP_FAMILY_RV410, 1, 0, 0, 0, 0 },
+ { 0x5653, CHIP_FAMILY_RV410, 1, 0, 0, 0, 0 },
+ { 0x5834, CHIP_FAMILY_RS300, 0, 1, 0, 0, 1 },
+ { 0x5835, CHIP_FAMILY_RS300, 1, 1, 0, 0, 1 },
+ { 0x5954, CHIP_FAMILY_RS400, 0, 1, 0, 0, 1 },
+ { 0x5955, CHIP_FAMILY_RS400, 1, 1, 0, 0, 1 },
+ { 0x5960, CHIP_FAMILY_RV280, 0, 0, 0, 0, 0 },
+ { 0x5961, CHIP_FAMILY_RV280, 0, 0, 0, 0, 0 },
+ { 0x5962, CHIP_FAMILY_RV280, 0, 0, 0, 0, 0 },
+ { 0x5964, CHIP_FAMILY_RV280, 0, 0, 0, 0, 0 },
+ { 0x5965, CHIP_FAMILY_RV280, 0, 0, 0, 0, 0 },
+ { 0x5969, CHIP_FAMILY_RV100, 0, 0, 1, 0, 0 },
+ { 0x5974, CHIP_FAMILY_RS400, 0, 1, 0, 0, 1 },
+ { 0x5975, CHIP_FAMILY_RS400, 1, 1, 0, 0, 1 },
+ { 0x5A41, CHIP_FAMILY_RS400, 0, 1, 0, 0, 1 },
+ { 0x5A42, CHIP_FAMILY_RS400, 1, 1, 0, 0, 1 },
+ { 0x5A61, CHIP_FAMILY_RS400, 0, 1, 0, 0, 1 },
+ { 0x5A62, CHIP_FAMILY_RS400, 1, 1, 0, 0, 1 },
+ { 0x5B60, CHIP_FAMILY_RV380, 0, 0, 0, 0, 0 },
+ { 0x5B62, CHIP_FAMILY_RV380, 0, 0, 0, 0, 0 },
+ { 0x5B63, CHIP_FAMILY_RV380, 0, 0, 0, 0, 0 },
+ { 0x5B64, CHIP_FAMILY_RV380, 0, 0, 0, 0, 0 },
+ { 0x5B65, CHIP_FAMILY_RV380, 0, 0, 0, 0, 0 },
+ { 0x5C61, CHIP_FAMILY_RV280, 1, 0, 0, 0, 0 },
+ { 0x5C63, CHIP_FAMILY_RV280, 1, 0, 0, 0, 0 },
+ { 0x5D48, CHIP_FAMILY_R420, 1, 0, 0, 0, 0 },
+ { 0x5D49, CHIP_FAMILY_R420, 1, 0, 0, 0, 0 },
+ { 0x5D4A, CHIP_FAMILY_R420, 1, 0, 0, 0, 0 },
+ { 0x5D4C, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x5D4D, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x5D4E, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x5D4F, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x5D50, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x5D52, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x5D57, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x5E48, CHIP_FAMILY_RV410, 0, 0, 0, 0, 0 },
+ { 0x5E4A, CHIP_FAMILY_RV410, 0, 0, 0, 0, 0 },
+ { 0x5E4B, CHIP_FAMILY_RV410, 0, 0, 0, 0, 0 },
+ { 0x5E4C, CHIP_FAMILY_RV410, 0, 0, 0, 0, 0 },
+ { 0x5E4D, CHIP_FAMILY_RV410, 0, 0, 0, 0, 0 },
+ { 0x5E4F, CHIP_FAMILY_RV410, 0, 0, 0, 0, 0 },
+ { 0x7834, CHIP_FAMILY_RS300, 0, 1, 0, 0, 0 },
+ { 0x7835, CHIP_FAMILY_RS300, 1, 1, 0, 0, 0 },
+};
diff --git a/src/radeon_chipset.h b/src/radeon_chipset.h
deleted file mode 100644
index 890babd..0000000
--- a/src/radeon_chipset.h
+++ /dev/null
@@ -1,142 +0,0 @@
-static SymTabRec RADEONChipsets[] = {
- { PCI_CHIP_RADEON_QD, "ATI Radeon QD (AGP)" },
- { PCI_CHIP_RADEON_QE, "ATI Radeon QE (AGP)" },
- { PCI_CHIP_RADEON_QF, "ATI Radeon QF (AGP)" },
- { PCI_CHIP_RADEON_QG, "ATI Radeon QG (AGP)" },
- { PCI_CHIP_RV100_QY, "ATI Radeon VE/7000 QY (AGP/PCI)" },
- { PCI_CHIP_RV100_QZ, "ATI Radeon VE/7000 QZ (AGP/PCI)" },
- { PCI_CHIP_RN50_515E, "ATI ES1000 515E (PCI)" },
- { PCI_CHIP_RN50_5969, "ATI ES1000 5969 (PCI)" },
- { PCI_CHIP_RADEON_LW, "ATI Radeon Mobility M7 LW (AGP)" },
- { PCI_CHIP_RADEON_LX, "ATI Mobility FireGL 7800 M7 LX (AGP)" },
- { PCI_CHIP_RADEON_LY, "ATI Radeon Mobility M6 LY (AGP)" },
- { PCI_CHIP_RADEON_LZ, "ATI Radeon Mobility M6 LZ (AGP)" },
- { PCI_CHIP_RS100_4136, "ATI Radeon IGP320 (A3) 4136" },
- { PCI_CHIP_RS100_4336, "ATI Radeon IGP320M (U1) 4336" },
- { PCI_CHIP_RS200_4137, "ATI Radeon IGP330/340/350 (A4) 4137" },
- { PCI_CHIP_RS200_4337, "ATI Radeon IGP330M/340M/350M (U2) 4337" },
- { PCI_CHIP_RS250_4237, "ATI Radeon 7000 IGP (A4+) 4237" },
- { PCI_CHIP_RS250_4437, "ATI Radeon Mobility 7000 IGP 4437" },
- { PCI_CHIP_R200_QH, "ATI FireGL 8700/8800 QH (AGP)" },
- { PCI_CHIP_R200_QL, "ATI Radeon 8500 QL (AGP)" },
- { PCI_CHIP_R200_QM, "ATI Radeon 9100 QM (AGP)" },
- { PCI_CHIP_R200_BB, "ATI Radeon 8500 AIW BB (AGP)" },
- { PCI_CHIP_R200_BC, "ATI Radeon 8500 AIW BC (AGP)" },
- { PCI_CHIP_RV200_QW, "ATI Radeon 7500 QW (AGP/PCI)" },
- { PCI_CHIP_RV200_QX, "ATI Radeon 7500 QX (AGP/PCI)" },
- { PCI_CHIP_RV250_If, "ATI Radeon 9000/PRO If (AGP/PCI)" },
- { PCI_CHIP_RV250_Ig, "ATI Radeon 9000 Ig (AGP/PCI)" },
- { PCI_CHIP_RV250_Ld, "ATI FireGL Mobility 9000 (M9) Ld (AGP)" },
- { PCI_CHIP_RV250_Lf, "ATI Radeon Mobility 9000 (M9) Lf (AGP)" },
- { PCI_CHIP_RV250_Lg, "ATI Radeon Mobility 9000 (M9) Lg (AGP)" },
- { PCI_CHIP_RS300_5834, "ATI Radeon 9100 IGP (A5) 5834" },
- { PCI_CHIP_RS300_5835, "ATI Radeon Mobility 9100 IGP (U3) 5835" },
- { PCI_CHIP_RS350_7834, "ATI Radeon 9100 PRO IGP 7834" },
- { PCI_CHIP_RS350_7835, "ATI Radeon Mobility 9200 IGP 7835" },
- { PCI_CHIP_RV280_5960, "ATI Radeon 9250 5960 (AGP)" },
- { PCI_CHIP_RV280_5961, "ATI Radeon 9200 5961 (AGP)" },
- { PCI_CHIP_RV280_5962, "ATI Radeon 9200 5962 (AGP)" },
- { PCI_CHIP_RV280_5964, "ATI Radeon 9200SE 5964 (AGP)" },
- { PCI_CHIP_RV280_5965, "ATI FireMV 2200 (PCI)" },
- { PCI_CHIP_RV280_5C61, "ATI Radeon Mobility 9200 (M9+) 5C61 (AGP)" },
- { PCI_CHIP_RV280_5C63, "ATI Radeon Mobility 9200 (M9+) 5C63 (AGP)" },
- { PCI_CHIP_R300_AD, "ATI Radeon 9500 AD (AGP)" },
- { PCI_CHIP_R300_AE, "ATI Radeon 9500 AE (AGP)" },
- { PCI_CHIP_R300_AF, "ATI Radeon 9600TX AF (AGP)" },
- { PCI_CHIP_R300_AG, "ATI FireGL Z1 AG (AGP)" },
- { PCI_CHIP_R300_ND, "ATI Radeon 9700 Pro ND (AGP)" },
- { PCI_CHIP_R300_NE, "ATI Radeon 9700/9500Pro NE (AGP)" },
- { PCI_CHIP_R300_NF, "ATI Radeon 9600TX NF (AGP)" },
- { PCI_CHIP_R300_NG, "ATI FireGL X1 NG (AGP)" },
- { PCI_CHIP_RV350_AP, "ATI Radeon 9600 AP (AGP)" },
- { PCI_CHIP_RV350_AQ, "ATI Radeon 9600SE AQ (AGP)" },
- { PCI_CHIP_RV360_AR, "ATI Radeon 9600XT AR (AGP)" },
- { PCI_CHIP_RV350_AS, "ATI Radeon 9600 AS (AGP)" },
- { PCI_CHIP_RV350_AT, "ATI FireGL T2 AT (AGP)" },
- { PCI_CHIP_RV350_AV, "ATI FireGL RV360 AV (AGP)" },
- { PCI_CHIP_RV350_NP, "ATI Radeon Mobility 9600/9700 (M10/M11) NP (AGP)" },
- { PCI_CHIP_RV350_NQ, "ATI Radeon Mobility 9600 (M10) NQ (AGP)" },
- { PCI_CHIP_RV350_NR, "ATI Radeon Mobility 9600 (M11) NR (AGP)" },
- { PCI_CHIP_RV350_NS, "ATI Radeon Mobility 9600 (M10) NS (AGP)" },
- { PCI_CHIP_RV350_NT, "ATI FireGL Mobility T2 (M10) NT (AGP)" },
- { PCI_CHIP_RV350_NV, "ATI FireGL Mobility T2e (M11) NV (AGP)" },
- { PCI_CHIP_RV350_4155, "ATI Radeon 9650" },
- { PCI_CHIP_R350_AH, "ATI Radeon 9800SE AH (AGP)" },
- { PCI_CHIP_R350_AI, "ATI Radeon 9800 AI (AGP)" },
- { PCI_CHIP_R350_AJ, "ATI Radeon 9800 AJ (AGP)" },
- { PCI_CHIP_R350_AK, "ATI FireGL X2 AK (AGP)" },
- { PCI_CHIP_R350_NH, "ATI Radeon 9800PRO NH (AGP)" },
- { PCI_CHIP_R350_NI, "ATI Radeon 9800 NI (AGP)" },
- { PCI_CHIP_R350_NK, "ATI FireGL X2 NK (AGP)" },
- { PCI_CHIP_R360_NJ, "ATI Radeon 9800XT NJ (AGP)" },
- { PCI_CHIP_RV380_3E50, "ATI Radeon X600 (RV380) 3E50 (PCIE)" },
- { PCI_CHIP_RV380_3E54, "ATI FireGL V3200 (RV380) 3E54 (PCIE)" },
- { PCI_CHIP_RV380_3150, "ATI Radeon Mobility X600 (M24) 3150 (PCIE)" },
- { PCI_CHIP_RV380_3152, "ATI Radeon Mobility X300 (M24) 3152 (PCIE)" },
- { PCI_CHIP_RV380_3154, "ATI FireGL M24 GL 3154 (PCIE)" },
- { PCI_CHIP_RV370_5B60, "ATI Radeon X300 (RV370) 5B60 (PCIE)" },
- { PCI_CHIP_RV370_5B62, "ATI Radeon X600 (RV370) 5B62 (PCIE)" },
- { PCI_CHIP_RV370_5B63, "ATI Radeon X550 (RV370) 5B63 (PCIE)" },
- { PCI_CHIP_RV370_5B64, "ATI FireGL V3100 (RV370) 5B64 (PCIE)" },
- { PCI_CHIP_RV370_5B65, "ATI FireMV 2200 PCIE (RV370) 5B65 (PCIE)" },
- { PCI_CHIP_RV370_5460, "ATI Radeon Mobility X300 (M22) 5460 (PCIE)" },
- { PCI_CHIP_RV370_5462, "ATI Radeon Mobility X600 SE (M24C) 5462 (PCIE)" },
- { PCI_CHIP_RV370_5464, "ATI FireGL M22 GL 5464 (PCIE)" },
- { PCI_CHIP_RS400_5A41, "ATI Radeon XPRESS 200 5A41 (PCIE)" },
- { PCI_CHIP_RS400_5A42, "ATI Radeon XPRESS 200M 5A42 (PCIE)" },
- { PCI_CHIP_RC410_5A61, "ATI Radeon XPRESS 200 5A61 (PCIE)" },
- { PCI_CHIP_RC410_5A62, "ATI Radeon XPRESS 200M 5A62 (PCIE)" },
- { PCI_CHIP_RS480_5954, "ATI Radeon XPRESS 200 5954 (PCIE)" },
- { PCI_CHIP_RS480_5955, "ATI Radeon XPRESS 200M 5955 (PCIE)" },
- { PCI_CHIP_RS482_5974, "ATI Radeon XPRESS 200 5974 (PCIE)" },
- { PCI_CHIP_RS485_5975, "ATI Radeon XPRESS 200M 5975 (PCIE)" },
- { PCI_CHIP_RV410_5E48, "ATI FireGL V5000 (RV410) (PCIE)" },
- { PCI_CHIP_RV410_564A, "ATI Mobility FireGL V5000 (M26) (PCIE)" },
- { PCI_CHIP_RV410_564B, "ATI Mobility FireGL V5000 (M26) (PCIE)" },
- { PCI_CHIP_RV410_564F, "ATI Mobility Radeon X700 XL (M26) (PCIE)" },
- { PCI_CHIP_RV410_5652, "ATI Mobility Radeon X700 (M26) (PCIE)" },
- { PCI_CHIP_RV410_5653, "ATI Mobility Radeon X700 (M26) (PCIE)" },
- { PCI_CHIP_RV410_5E4B, "ATI Radeon X700 PRO (RV410) (PCIE)" },
- { PCI_CHIP_RV410_5E4A, "ATI Radeon X700 XT (RV410) (PCIE)" },
- { PCI_CHIP_RV410_5E4D, "ATI Radeon X700 (RV410) (PCIE)" },
- { PCI_CHIP_RV410_5E4C, "ATI Radeon X700 SE (RV410) (PCIE)" },
- { PCI_CHIP_RV410_5E4F, "ATI Radeon X700 SE (RV410) (PCIE)" },
- { PCI_CHIP_R420_JH, "ATI Radeon X800 (R420) JH (AGP)" },
- { PCI_CHIP_R420_JI, "ATI Radeon X800PRO (R420) JI (AGP)" },
- { PCI_CHIP_R420_JJ, "ATI Radeon X800SE (R420) JJ (AGP)" },
- { PCI_CHIP_R420_JK, "ATI Radeon X800 (R420) JK (AGP)" },
- { PCI_CHIP_R420_JL, "ATI Radeon X800 (R420) JL (AGP)" },
- { PCI_CHIP_R420_JM, "ATI FireGL X3 (R420) JM (AGP)" },
- { PCI_CHIP_R420_JN, "ATI Radeon Mobility 9800 (M18) JN (AGP)" },
- { PCI_CHIP_R420_JP, "ATI Radeon X800XT (R420) JP (AGP)" },
- { PCI_CHIP_R420_4A4F, "ATI Radeon X800 SE (R420) (AGP)" },
- { PCI_CHIP_R420_4A54, "ATI Radeon AIW X800 VE (R420) JT (AGP)" },
- { PCI_CHIP_R423_UH, "ATI Radeon X800 (R423) UH (PCIE)" },
- { PCI_CHIP_R423_UI, "ATI Radeon X800PRO (R423) UI (PCIE)" },
- { PCI_CHIP_R423_UJ, "ATI Radeon X800LE (R423) UJ (PCIE)" },
- { PCI_CHIP_R423_UK, "ATI Radeon X800SE (R423) UK (PCIE)" },
- { PCI_CHIP_R423_UQ, "ATI FireGL V5100 (R423) UQ (PCIE)" },
- { PCI_CHIP_R423_UR, "ATI FireGL unknown (R423) UR (PCIE)" },
- { PCI_CHIP_R423_UT, "ATI FireGL unknown (R423) UT (PCIE)" },
- { PCI_CHIP_R423_5D57, "ATI Radeon X800XT (R423) 5D57 (PCIE)" },
- { PCI_CHIP_R423_5550, "ATI FireGL V7100 (R423) (PCIE)" },
- { PCI_CHIP_R430_5D49, "ATI Mobility FireGL V5100 (M28) (PCIE)" },
- { PCI_CHIP_R430_5D4A, "ATI Mobility Radeon X800 (M28) (PCIE)" },
- { PCI_CHIP_R430_5D48, "ATI Mobility Radeon X800 XT (M28) (PCIE)" },
- { PCI_CHIP_R430_554F, "ATI Radeon X800 (R430) (PCIE)" },
- { PCI_CHIP_R430_554D, "ATI Radeon X800 XL (R430) (PCIE)" },
- { PCI_CHIP_R430_554E, "ATI Radeon X800 SE (R430) (PCIE)" },
- { PCI_CHIP_R430_554C, "ATI Radeon X800 XTP (R430) (PCIE)" },
- { PCI_CHIP_R480_5D4C, "ATI Radeon X850 5D4C (PCIE)" },
- { PCI_CHIP_R480_5D50, "ATI unknown Radeon / FireGL (R480) 5D50 (PCIE)" },
- { PCI_CHIP_R480_5D4E, "ATI Radeon X850 SE (R480) (PCIE)" },
- { PCI_CHIP_R480_5D4F, "ATI Radeon X850 PRO (R480) (PCIE)" },
- { PCI_CHIP_R480_5D52, "ATI Radeon X850 XT (R480) (PCIE)" },
- { PCI_CHIP_R480_5D4D, "ATI Radeon X850 XT PE (R480) (PCIE)" },
- { PCI_CHIP_R481_4B4B, "ATI Radeon X850 PRO (R480) (AGP)" },
- { PCI_CHIP_R481_4B4A, "ATI Radeon X850 SE (R480) (AGP)" },
- { PCI_CHIP_R481_4B49, "ATI Radeon X850 XT (R480) (AGP)" },
- { PCI_CHIP_R481_4B4C, "ATI Radeon X850 XT PE (R480) (AGP)" },
-
- { -1, NULL }
-};
diff --git a/src/radeon_chipset_gen.h b/src/radeon_chipset_gen.h
new file mode 100644
index 0000000..0a7a9c1
--- /dev/null
+++ b/src/radeon_chipset_gen.h
@@ -0,0 +1,141 @@
+/* This file is autogenerated please do not edit */
+static SymTabRec RADEONChipsets[] = {
+ { PCI_CHIP_RV380_3150, "ATI Radeon Mobility X600 (M24) 3150 (PCIE)" },
+ { PCI_CHIP_RV380_3152, "ATI Radeon Mobility X300 (M24) 3152 (PCIE)" },
+ { PCI_CHIP_RV380_3154, "ATI FireGL M24 GL 3154 (PCIE)" },
+ { PCI_CHIP_RV380_3E50, "ATI Radeon X600 (RV380) 3E50 (PCIE)" },
+ { PCI_CHIP_RV380_3E54, "ATI FireGL V3200 (RV380) 3E54 (PCIE)" },
+ { PCI_CHIP_RS100_4136, "ATI Radeon IGP320 (A3) 4136" },
+ { PCI_CHIP_RS200_4137, "ATI Radeon IGP330/340/350 (A4) 4137" },
+ { PCI_CHIP_R300_AD, "ATI Radeon 9500 AD (AGP)" },
+ { PCI_CHIP_R300_AE, "ATI Radeon 9500 AE (AGP)" },
+ { PCI_CHIP_R300_AF, "ATI Radeon 9600TX AF (AGP)" },
+ { PCI_CHIP_R300_AG, "ATI FireGL Z1 AG (AGP)" },
+ { PCI_CHIP_R350_AH, "ATI Radeon 9800SE AH (AGP)" },
+ { PCI_CHIP_R350_AI, "ATI Radeon 9800 AI (AGP)" },
+ { PCI_CHIP_R350_AJ, "ATI Radeon 9800 AJ (AGP)" },
+ { PCI_CHIP_R350_AK, "ATI FireGL X2 AK (AGP)" },
+ { PCI_CHIP_RV350_AP, "ATI Radeon 9600 AP (AGP)" },
+ { PCI_CHIP_RV350_AQ, "ATI Radeon 9600SE AQ (AGP)" },
+ { PCI_CHIP_RV360_AR, "ATI Radeon 9600XT AR (AGP)" },
+ { PCI_CHIP_RV350_AS, "ATI Radeon 9600 AS (AGP)" },
+ { PCI_CHIP_RV350_AT, "ATI FireGL T2 AT (AGP)" },
+ { PCI_CHIP_RV350_4155, "ATI Radeon 9650" },
+ { PCI_CHIP_RV350_AV, "ATI FireGL RV360 AV (AGP)" },
+ { PCI_CHIP_RS250_4237, "ATI Radeon 7000 IGP (A4+) 4237" },
+ { PCI_CHIP_R200_BB, "ATI Radeon 8500 AIW BB (AGP)" },
+ { PCI_CHIP_R200_BC, "ATI Radeon 8500 AIW BC (AGP)" },
+ { PCI_CHIP_RS100_4336, "ATI Radeon IGP320M (U1) 4336" },
+ { PCI_CHIP_RS200_4337, "ATI Radeon IGP330M/340M/350M (U2) 4337" },
+ { PCI_CHIP_RS250_4437, "ATI Radeon Mobility 7000 IGP 4437" },
+ { PCI_CHIP_RV250_If, "ATI Radeon 9000/PRO If (AGP/PCI)" },
+ { PCI_CHIP_RV250_Ig, "ATI Radeon 9000 Ig (AGP/PCI)" },
+ { PCI_CHIP_R420_JH, "ATI Radeon X800 (R420) JH (AGP)" },
+ { PCI_CHIP_R420_JI, "ATI Radeon X800PRO (R420) JI (AGP)" },
+ { PCI_CHIP_R420_JJ, "ATI Radeon X800SE (R420) JJ (AGP)" },
+ { PCI_CHIP_R420_JK, "ATI Radeon X800 (R420) JK (AGP)" },
+ { PCI_CHIP_R420_JL, "ATI Radeon X800 (R420) JL (AGP)" },
+ { PCI_CHIP_R420_JM, "ATI FireGL X3 (R420) JM (AGP)" },
+ { PCI_CHIP_R420_JN, "ATI Radeon Mobility 9800 (M18) JN (AGP)" },
+ { PCI_CHIP_R420_4A4F, "ATI Radeon X800 SE (R420) (AGP)" },
+ { PCI_CHIP_R420_JP, "ATI Radeon X800XT (R420) JP (AGP)" },
+ { PCI_CHIP_R481_4B49, "ATI Radeon X850 XT (R480) (AGP)" },
+ { PCI_CHIP_R481_4B4A, "ATI Radeon X850 SE (R480) (AGP)" },
+ { PCI_CHIP_R481_4B4B, "ATI Radeon X850 PRO (R480) (AGP)" },
+ { PCI_CHIP_R481_4B4C, "ATI Radeon X850 XT PE (R480) (AGP)" },
+ { PCI_CHIP_RADEON_LW, "ATI Radeon Mobility M7 LW (AGP)" },
+ { PCI_CHIP_RADEON_LX, "ATI Mobility FireGL 7800 M7 LX (AGP)" },
+ { PCI_CHIP_RADEON_LY, "ATI Radeon Mobility M6 LY (AGP)" },
+ { PCI_CHIP_RADEON_LZ, "ATI Radeon Mobility M6 LZ (AGP)" },
+ { PCI_CHIP_RV250_Ld, "ATI FireGL Mobility 9000 (M9) Ld (AGP)" },
+ { PCI_CHIP_RV250_Lf, "ATI Radeon Mobility 9000 (M9) Lf (AGP)" },
+ { PCI_CHIP_RV250_Lg, "ATI Radeon Mobility 9000 (M9) Lg (AGP)" },
+ { PCI_CHIP_R300_ND, "ATI Radeon 9700 Pro ND (AGP)" },
+ { PCI_CHIP_R300_NE, "ATI Radeon 9700/9500Pro NE (AGP)" },
+ { PCI_CHIP_R300_NF, "ATI Radeon 9600TX NF (AGP)" },
+ { PCI_CHIP_R300_NG, "ATI FireGL X1 NG (AGP)" },
+ { PCI_CHIP_R350_NH, "ATI Radeon 9800PRO NH (AGP)" },
+ { PCI_CHIP_R350_NI, "ATI Radeon 9800 NI (AGP)" },
+ { PCI_CHIP_R360_NJ, "ATI FireGL X2 NK (AGP)" },
+ { PCI_CHIP_R350_NK, "ATI Radeon 9800XT NJ (AGP)" },
+ { PCI_CHIP_RV350_NP, "ATI Radeon Mobility 9600/9700 (M10/M11) NP (AGP)" },
+ { PCI_CHIP_RV350_NQ, "ATI Radeon Mobility 9600 (M10) NQ (AGP)" },
+ { PCI_CHIP_RV350_NR, "ATI Radeon Mobility 9600 (M11) NR (AGP)" },
+ { PCI_CHIP_RV350_NS, "ATI Radeon Mobility 9600 (M10) NS (AGP)" },
+ { PCI_CHIP_RV350_NT, "ATI FireGL Mobility T2 (M10) NT (AGP)" },
+ { PCI_CHIP_RV350_NV, "ATI FireGL Mobility T2e (M11) NV (AGP)" },
+ { PCI_CHIP_RADEON_QD, "ATI Radeon QD (AGP)" },
+ { PCI_CHIP_RADEON_QE, "ATI Radeon QE (AGP)" },
+ { PCI_CHIP_RADEON_QF, "ATI Radeon QF (AGP)" },
+ { PCI_CHIP_RADEON_QG, "ATI Radeon QG (AGP)" },
+ { PCI_CHIP_R200_QH, "ATI FireGL 8700/8800 QH (AGP)" },
+ { PCI_CHIP_R200_QL, "ATI Radeon 8500 QL (AGP)" },
+ { PCI_CHIP_R200_QM, "ATI Radeon 9100 QM (AGP)" },
+ { PCI_CHIP_RV200_QW, "ATI Radeon 7500 QW (AGP/PCI)" },
+ { PCI_CHIP_RV200_QX, "ATI Radeon 7500 QX (AGP/PCI)" },
+ { PCI_CHIP_RV100_QY, "ATI Radeon VE/7000 QY (AGP/PCI)" },
+ { PCI_CHIP_RV100_QZ, "ATI Radeon VE/7000 QZ (AGP/PCI)" },
+ { PCI_CHIP_RN50_515E, "ATI ES1000 515E (PCI)" },
+ { PCI_CHIP_RV370_5460, "ATI Radeon Mobility X300 (M22) 5460 (PCIE)" },
+ { PCI_CHIP_RV370_5462, "ATI Radeon Mobility X600 SE (M24C) 5462 (PCIE)" },
+ { PCI_CHIP_RV370_5464, "ATI FireGL M22 GL 5464 (PCIE)" },
+ { PCI_CHIP_R423_UH, "ATI Radeon X800 (R423) UH (PCIE)" },
+ { PCI_CHIP_R423_UI, "ATI Radeon X800PRO (R423) UI (PCIE)" },
+ { PCI_CHIP_R423_UJ, "ATI Radeon X800LE (R423) UJ (PCIE)" },
+ { PCI_CHIP_R423_UK, "ATI Radeon X800SE (R423) UK (PCIE)" },
+ { PCI_CHIP_R430_554C, "ATI Radeon X800 XTP (R430) (PCIE)" },
+ { PCI_CHIP_R430_554D, "ATI Radeon X800 XL (R430) (PCIE)" },
+ { PCI_CHIP_R430_554E, "ATI Radeon X800 SE (R430) (PCIE)" },
+ { PCI_CHIP_R430_554F, "ATI Radeon X800 (R430) (PCIE)" },
+ { PCI_CHIP_R423_5550, "ATI FireGL V7100 (R423) (PCIE)" },
+ { PCI_CHIP_R423_UQ, "ATI FireGL V5100 (R423) UQ (PCIE)" },
+ { PCI_CHIP_R423_UR, "ATI FireGL unknown (R423) UR (PCIE)" },
+ { PCI_CHIP_R423_UT, "ATI FireGL unknown (R423) UT (PCIE)" },
+ { PCI_CHIP_RV410_564A, "ATI Mobility FireGL V5000 (M26) (PCIE)" },
+ { PCI_CHIP_RV410_564B, "ATI Mobility FireGL V5000 (M26) (PCIE)" },
+ { PCI_CHIP_RV410_564F, "ATI Mobility Radeon X700 XL (M26) (PCIE)" },
+ { PCI_CHIP_RV410_5652, "ATI Mobility Radeon X700 (M26) (PCIE)" },
+ { PCI_CHIP_RV410_5653, "ATI Mobility Radeon X700 (M26) (PCIE)" },
+ { PCI_CHIP_RS300_5834, "ATI Radeon 9100 IGP (A5) 5834" },
+ { PCI_CHIP_RS300_5835, "ATI Radeon Mobility 9100 IGP (U3) 5835" },
+ { PCI_CHIP_RS480_5954, "ATI Radeon XPRESS 200 5954 (PCIE)" },
+ { PCI_CHIP_RS480_5955, "ATI Radeon XPRESS 200M 5955 (PCIE)" },
+ { PCI_CHIP_RV280_5960, "ATI Radeon 9250 5960 (AGP)" },
+ { PCI_CHIP_RV280_5961, "ATI Radeon 9200 5961 (AGP)" },
+ { PCI_CHIP_RV280_5962, "ATI Radeon 9200 5962 (AGP)" },
+ { PCI_CHIP_RV280_5964, "ATI Radeon 9200SE 5964 (AGP)" },
+ { PCI_CHIP_RV280_5965, "ATI FireMV 2200 (PCI)" },
+ { PCI_CHIP_RN50_5969, "ATI ES1000 5969 (PCI)" },
+ { PCI_CHIP_RS482_5974, "ATI Radeon XPRESS 200 5974 (PCIE)" },
+ { PCI_CHIP_RS485_5975, "ATI Radeon XPRESS 200M 5975 (PCIE)" },
+ { PCI_CHIP_RS400_5A41, "ATI Radeon XPRESS 200 5A41 (PCIE)" },
+ { PCI_CHIP_RS400_5A42, "ATI Radeon XPRESS 200M 5A42 (PCIE)" },
+ { PCI_CHIP_RC410_5A61, "ATI Radeon XPRESS 200 5A61 (PCIE)" },
+ { PCI_CHIP_RC410_5A62, "ATI Radeon XPRESS 200M 5A62 (PCIE)" },
+ { PCI_CHIP_RV370_5B60, "ATI Radeon X300 (RV370) 5B60 (PCIE)" },
+ { PCI_CHIP_RV370_5B62, "ATI Radeon X600 (RV370) 5B62 (PCIE)" },
+ { PCI_CHIP_RV370_5B63, "ATI Radeon X550 (RV370) 5B63 (PCIE)" },
+ { PCI_CHIP_RV370_5B64, "ATI FireGL V3100 (RV370) 5B64 (PCIE)" },
+ { PCI_CHIP_RV370_5B65, "ATI FireMV 2200 PCIE (RV370) 5B65 (PCIE)" },
+ { PCI_CHIP_RV280_5C61, "ATI Radeon Mobility 9200 (M9+) 5C61 (AGP)" },
+ { PCI_CHIP_RV280_5C63, "ATI Radeon Mobility 9200 (M9+) 5C63 (AGP)" },
+ { PCI_CHIP_R430_5D48, "ATI Mobility Radeon X800 XT (M28) (PCIE)" },
+ { PCI_CHIP_R430_5D49, "ATI Mobility FireGL V5100 (M28) (PCIE)" },
+ { PCI_CHIP_R430_5D4A, "ATI Mobility Radeon X800 (M28) (PCIE)" },
+ { PCI_CHIP_R480_5D4C, "ATI Radeon X850 5D4C (PCIE)" },
+ { PCI_CHIP_R480_5D4D, "ATI Radeon X850 XT PE (R480) (PCIE)" },
+ { PCI_CHIP_R480_5D4E, "ATI Radeon X850 SE (R480) (PCIE)" },
+ { PCI_CHIP_R480_5D4F, "ATI Radeon X850 PRO (R480) (PCIE)" },
+ { PCI_CHIP_R480_5D50, "ATI unknown Radeon / FireGL (R480) 5D50 (PCIE)" },
+ { PCI_CHIP_R480_5D52, "ATI Radeon X850 XT (R480) (PCIE)" },
+ { PCI_CHIP_R423_5D57, "ATI Radeon X800XT (R423) 5D57 (PCIE)" },
+ { PCI_CHIP_RV410_5E48, "ATI FireGL V5000 (RV410) (PCIE)" },
+ { PCI_CHIP_RV410_5E4A, "ATI Radeon X700 XT (RV410) (PCIE)" },
+ { PCI_CHIP_RV410_5E4B, "ATI Radeon X700 PRO (RV410) (PCIE)" },
+ { PCI_CHIP_RV410_5E4C, "ATI Radeon X700 SE (RV410) (PCIE)" },
+ { PCI_CHIP_RV410_5E4D, "ATI Radeon X700 (RV410) (PCIE)" },
+ { PCI_CHIP_RV410_5E4F, "ATI Radeon X700 SE (RV410) (PCIE)" },
+ { PCI_CHIP_RS350_7834, "ATI Radeon 9100 PRO IGP 7834" },
+ { PCI_CHIP_RS350_7835, "ATI Radeon Mobility 9200 IGP 7835" },
+ { -1, NULL }
+};
diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c
index de24273..b1d216d 100644
--- a/src/radeon_crtc.c
+++ b/src/radeon_crtc.c
@@ -769,8 +769,8 @@ RADEONInitBIOSRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
RADEONInfoPtr info = RADEONPTR(pScrn);
/* tell the bios not to muck with the hardware on events */
- save->bios_4_scratch = 0;
- save->bios_5_scratch = 0xff00;
+ save->bios_4_scratch = 0x4; /* 0x4 needed for backlight */
+ save->bios_5_scratch = (info->SavedReg.bios_5_scratch & 0xff) | 0xff00; /* bits 0-3 keep backlight level */
save->bios_6_scratch = info->SavedReg.bios_6_scratch | 0x40000000;
}
diff --git a/src/radeon_dri.c b/src/radeon_dri.c
index 2c533b1..7136e4e 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -559,12 +559,12 @@ static void RADEONDRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg,
if (nbox > 1) {
/* Keep ordering in each band, reverse order of bands */
- pboxNew1 = (BoxPtr)ALLOCATE_LOCAL(sizeof(BoxRec)*nbox);
+ pboxNew1 = (BoxPtr)xalloc(sizeof(BoxRec)*nbox);
if (!pboxNew1) return;
- pptNew1 = (DDXPointPtr)ALLOCATE_LOCAL(sizeof(DDXPointRec)*nbox);
+ pptNew1 = (DDXPointPtr)xalloc(sizeof(DDXPointRec)*nbox);
if (!pptNew1) {
- DEALLOCATE_LOCAL(pboxNew1);
+ xfree(pboxNew1);
return;
}
@@ -601,14 +601,14 @@ static void RADEONDRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg,
if (nbox > 1) {
/* reverse order of rects in each band */
- pboxNew2 = (BoxPtr)ALLOCATE_LOCAL(sizeof(BoxRec)*nbox);
- pptNew2 = (DDXPointPtr)ALLOCATE_LOCAL(sizeof(DDXPointRec)*nbox);
+ pboxNew2 = (BoxPtr)xalloc(sizeof(BoxRec)*nbox);
+ pptNew2 = (DDXPointPtr)xalloc(sizeof(DDXPointRec)*nbox);
if (!pboxNew2 || !pptNew2) {
- DEALLOCATE_LOCAL(pptNew2);
- DEALLOCATE_LOCAL(pboxNew2);
- DEALLOCATE_LOCAL(pptNew1);
- DEALLOCATE_LOCAL(pboxNew1);
+ xfree(pptNew2);
+ xfree(pboxNew2);
+ xfree(pptNew1);
+ xfree(pboxNew1);
return;
}
@@ -679,10 +679,10 @@ static void RADEONDRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg,
info->dst_pitch_offset = info->frontPitchOffset;;
- DEALLOCATE_LOCAL(pptNew2);
- DEALLOCATE_LOCAL(pboxNew2);
- DEALLOCATE_LOCAL(pptNew1);
- DEALLOCATE_LOCAL(pboxNew1);
+ xfree(pptNew2);
+ xfree(pboxNew2);
+ xfree(pptNew1);
+ xfree(pboxNew1);
info->accel->NeedToSync = TRUE;
#endif /* USE_XAA */
@@ -722,7 +722,9 @@ static Bool RADEONSetAgpMode(RADEONInfoPtr info, ScreenPtr pScreen)
unsigned long mode = drmAgpGetMode(info->drmFD); /* Default mode */
unsigned int vendor = drmAgpVendorId(info->drmFD);
unsigned int device = drmAgpDeviceId(info->drmFD);
- CARD32 agp_status = INREG(RADEON_AGP_STATUS) & mode;
+ /* ignore agp 3.0 mode bit from the chip as it's buggy on some cards with
+ pcie-agp rialto bridge chip - use the one from bridge which must match */
+ CARD32 agp_status = (INREG(RADEON_AGP_STATUS) | RADEON_AGPv3_MODE) & mode;
Bool is_v3 = (agp_status & RADEON_AGPv3_MODE);
unsigned int defaultMode;
MessageType from;
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index e027379..3422b66 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -107,9 +107,10 @@
#include <X11/extensions/dpms.h>
#include "atipciids.h"
-#include "radeon_chipset.h"
+#include "radeon_chipset_gen.h"
+#include "radeon_chipinfo_gen.h"
/* Forward definitions for driver functions */
static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen);
@@ -191,6 +192,8 @@ static const OptionInfoRec RADEONOptions[] = {
{ OPTION_MAC_MODEL, "MacModel", OPTV_STRING, {0}, FALSE },
#endif
{ OPTION_TVDAC_LOAD_DETECT, "TVDACLoadDetect", OPTV_BOOLEAN, {0}, FALSE },
+ { OPTION_FORCE_TVOUT, "ForceTVOut", OPTV_BOOLEAN, {0}, FALSE },
+ { OPTION_TVSTD, "TVStandard", OPTV_STRING, {0}, FALSE },
{ -1, NULL, OPTV_NONE, {0}, FALSE }
};
@@ -1472,6 +1475,7 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
GDevPtr dev = pEnt->device;
unsigned char *RADEONMMIO = info->MMIO;
MessageType from = X_PROBED;
+ int i;
#ifdef XF86DRI
const char *s;
uint32_t cmd_stat;
@@ -1511,20 +1515,25 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
info->IsDellServer = FALSE;
info->HasSingleDAC = FALSE;
info->InternalTVOut = TRUE;
- switch (info->Chipset) {
- case PCI_CHIP_RADEON_LY:
- case PCI_CHIP_RADEON_LZ:
- info->IsMobility = TRUE;
- info->ChipFamily = CHIP_FAMILY_RV100;
- break;
+ for (i = 0; i < sizeof(RADEONCards) / sizeof(RADEONCardInfo); i++) {
+ if (info->Chipset == RADEONCards[i].pci_device_id) {
+ RADEONCardInfo *card = &RADEONCards[i];
+ info->ChipFamily = card->chip_family;
+ info->IsMobility = card->mobility;
+ info->IsIGP = card->igp;
+ pRADEONEnt->HasCRTC2 = !card->nocrtc2;
+ info->HasSingleDAC = card->singledac;
+ info->InternalTVOut = !card->nointtvout;
+ break;
+ }
+ }
+
+ switch (info->Chipset) {
case PCI_CHIP_RN50_515E: /* RN50 is based on the RV100 but 3D isn't guaranteed to work. YMMV. */
case PCI_CHIP_RN50_5969:
- pRADEONEnt->HasCRTC2 = FALSE;
case PCI_CHIP_RV100_QY:
case PCI_CHIP_RV100_QZ:
- info->ChipFamily = CHIP_FAMILY_RV100;
-
/* DELL triple-head configuration. */
if ((PCI_SUB_VENDOR_ID(info->PciInfo) == PCI_VENDOR_DELL) &&
((PCI_SUB_DEVICE_ID(info->PciInfo) == 0x016c) ||
@@ -1540,220 +1549,9 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
info->IsDellServer = TRUE;
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "DELL server detected, force to special setup\n");
}
-
- break;
-
- case PCI_CHIP_RS100_4336:
- info->IsMobility = TRUE;
- case PCI_CHIP_RS100_4136:
- info->ChipFamily = CHIP_FAMILY_RS100;
- info->IsIGP = TRUE;
- break;
-
- case PCI_CHIP_RS200_4337:
- info->IsMobility = TRUE;
- case PCI_CHIP_RS200_4137:
- info->ChipFamily = CHIP_FAMILY_RS200;
- info->IsIGP = TRUE;
- break;
-
- case PCI_CHIP_RS250_4437:
- info->IsMobility = TRUE;
- case PCI_CHIP_RS250_4237:
- info->ChipFamily = CHIP_FAMILY_RS200;
- info->IsIGP = TRUE;
- break;
-
- case PCI_CHIP_R200_BB:
- case PCI_CHIP_R200_BC:
- case PCI_CHIP_R200_QH:
- case PCI_CHIP_R200_QL:
- case PCI_CHIP_R200_QM:
- info->ChipFamily = CHIP_FAMILY_R200;
- info->InternalTVOut = FALSE;
- break;
-
- case PCI_CHIP_RADEON_LW:
- case PCI_CHIP_RADEON_LX:
- info->IsMobility = TRUE;
- case PCI_CHIP_RV200_QW: /* RV200 desktop */
- case PCI_CHIP_RV200_QX:
- info->ChipFamily = CHIP_FAMILY_RV200;
- break;
-
- case PCI_CHIP_RV250_Ld:
- case PCI_CHIP_RV250_Lf:
- case PCI_CHIP_RV250_Lg:
- info->IsMobility = TRUE;
- case PCI_CHIP_RV250_If:
- case PCI_CHIP_RV250_Ig:
- info->ChipFamily = CHIP_FAMILY_RV250;
- break;
-
- case PCI_CHIP_RS300_5835:
- case PCI_CHIP_RS350_7835:
- info->IsMobility = TRUE;
- case PCI_CHIP_RS300_5834:
- case PCI_CHIP_RS350_7834:
- info->ChipFamily = CHIP_FAMILY_RS300;
- info->IsIGP = TRUE;
- info->HasSingleDAC = TRUE;
- break;
-
- case PCI_CHIP_RV280_5C61:
- case PCI_CHIP_RV280_5C63:
- info->IsMobility = TRUE;
- case PCI_CHIP_RV280_5960:
- case PCI_CHIP_RV280_5961:
- case PCI_CHIP_RV280_5962:
- case PCI_CHIP_RV280_5964:
- case PCI_CHIP_RV280_5965:
- info->ChipFamily = CHIP_FAMILY_RV280;
break;
-
- case PCI_CHIP_R300_AD:
- case PCI_CHIP_R300_AE:
- case PCI_CHIP_R300_AF:
- case PCI_CHIP_R300_AG:
- case PCI_CHIP_R300_ND:
- case PCI_CHIP_R300_NE:
- case PCI_CHIP_R300_NF:
- case PCI_CHIP_R300_NG:
- info->ChipFamily = CHIP_FAMILY_R300;
- break;
-
- case PCI_CHIP_RV350_NP:
- case PCI_CHIP_RV350_NQ:
- case PCI_CHIP_RV350_NR:
- case PCI_CHIP_RV350_NS:
- case PCI_CHIP_RV350_NT:
- case PCI_CHIP_RV350_NV:
- info->IsMobility = TRUE;
- case PCI_CHIP_RV350_AP:
- case PCI_CHIP_RV350_AQ:
- case PCI_CHIP_RV360_AR:
- case PCI_CHIP_RV350_AS:
- case PCI_CHIP_RV350_AT:
- case PCI_CHIP_RV350_AV:
- case PCI_CHIP_RV350_4155:
- info->ChipFamily = CHIP_FAMILY_RV350;
- break;
-
- case PCI_CHIP_R350_AH:
- case PCI_CHIP_R350_AI:
- case PCI_CHIP_R350_AJ:
- case PCI_CHIP_R350_AK:
- case PCI_CHIP_R350_NH:
- case PCI_CHIP_R350_NI:
- case PCI_CHIP_R350_NK:
- case PCI_CHIP_R360_NJ:
- info->ChipFamily = CHIP_FAMILY_R350;
- break;
-
- case PCI_CHIP_RV380_3150:
- case PCI_CHIP_RV380_3152:
- case PCI_CHIP_RV380_3154:
- info->IsMobility = TRUE;
- case PCI_CHIP_RV380_3E50:
- case PCI_CHIP_RV380_3E54:
- info->ChipFamily = CHIP_FAMILY_RV380;
- break;
-
- case PCI_CHIP_RV370_5460:
- case PCI_CHIP_RV370_5462:
- case PCI_CHIP_RV370_5464:
- info->IsMobility = TRUE;
- case PCI_CHIP_RV370_5B60:
- case PCI_CHIP_RV370_5B62:
- case PCI_CHIP_RV370_5B63:
- case PCI_CHIP_RV370_5B64:
- case PCI_CHIP_RV370_5B65:
- info->ChipFamily = CHIP_FAMILY_RV380;
- break;
-
- case PCI_CHIP_RS400_5A42:
- case PCI_CHIP_RC410_5A62:
- case PCI_CHIP_RS480_5955:
- case PCI_CHIP_RS485_5975:
- info->IsMobility = TRUE;
- case PCI_CHIP_RS400_5A41:
- case PCI_CHIP_RC410_5A61:
- case PCI_CHIP_RS480_5954:
- case PCI_CHIP_RS482_5974:
- info->ChipFamily = CHIP_FAMILY_RS400;
- info->IsIGP = TRUE;
- info->HasSingleDAC = TRUE;
- break;
-
- case PCI_CHIP_RV410_564A:
- case PCI_CHIP_RV410_564B:
- case PCI_CHIP_RV410_564F:
- case PCI_CHIP_RV410_5652:
- case PCI_CHIP_RV410_5653:
- info->IsMobility = TRUE;
- case PCI_CHIP_RV410_5E48:
- case PCI_CHIP_RV410_5E4B:
- case PCI_CHIP_RV410_5E4A:
- case PCI_CHIP_RV410_5E4D:
- case PCI_CHIP_RV410_5E4C:
- case PCI_CHIP_RV410_5E4F:
- info->ChipFamily = CHIP_FAMILY_RV410;
- break;
-
- case PCI_CHIP_R420_JN:
- info->IsMobility = TRUE;
- case PCI_CHIP_R420_JH:
- case PCI_CHIP_R420_JI:
- case PCI_CHIP_R420_JJ:
- case PCI_CHIP_R420_JK:
- case PCI_CHIP_R420_JL:
- case PCI_CHIP_R420_JM:
- case PCI_CHIP_R420_JP:
- case PCI_CHIP_R420_4A4F:
- info->ChipFamily = CHIP_FAMILY_R420;
- break;
-
- case PCI_CHIP_R423_UH:
- case PCI_CHIP_R423_UI:
- case PCI_CHIP_R423_UJ:
- case PCI_CHIP_R423_UK:
- case PCI_CHIP_R423_UQ:
- case PCI_CHIP_R423_UR:
- case PCI_CHIP_R423_UT:
- case PCI_CHIP_R423_5D57:
- case PCI_CHIP_R423_5550:
- info->ChipFamily = CHIP_FAMILY_R420;
- break;
-
- case PCI_CHIP_R430_5D49:
- case PCI_CHIP_R430_5D4A:
- case PCI_CHIP_R430_5D48:
- info->IsMobility = TRUE;
- case PCI_CHIP_R430_554F:
- case PCI_CHIP_R430_554D:
- case PCI_CHIP_R430_554E:
- case PCI_CHIP_R430_554C:
- info->ChipFamily = CHIP_FAMILY_R420; /*CHIP_FAMILY_R430*/
- break;
-
- case PCI_CHIP_R480_5D4C:
- case PCI_CHIP_R480_5D50:
- case PCI_CHIP_R480_5D4E:
- case PCI_CHIP_R480_5D4F:
- case PCI_CHIP_R480_5D52:
- case PCI_CHIP_R480_5D4D:
- case PCI_CHIP_R481_4B4B:
- case PCI_CHIP_R481_4B4A:
- case PCI_CHIP_R481_4B49:
- case PCI_CHIP_R481_4B4C:
- info->ChipFamily = CHIP_FAMILY_R420; /*CHIP_FAMILY_R480*/
- break;
-
default:
- /* Original Radeon/7200 */
- info->ChipFamily = CHIP_FAMILY_RADEON;
- pRADEONEnt->HasCRTC2 = FALSE;
- info->InternalTVOut = FALSE;
+ break;
}
@@ -4245,10 +4043,13 @@ void RADEONRestoreBIOSRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
+ CARD32 bios_5_scratch = INREG(RADEON_BIOS_5_SCRATCH);
CARD32 bios_6_scratch = INREG(RADEON_BIOS_6_SCRATCH);
OUTREG(RADEON_BIOS_4_SCRATCH, restore->bios_4_scratch);
- OUTREG(RADEON_BIOS_5_SCRATCH, restore->bios_5_scratch);
+ bios_5_scratch &= 0xF;
+ bios_5_scratch |= (restore->bios_5_scratch & ~0xF);
+ OUTREG(RADEON_BIOS_5_SCRATCH, bios_5_scratch);
if (restore->bios_6_scratch & 0x40000000)
bios_6_scratch |= 0x40000000;
else
@@ -4904,9 +4705,9 @@ void RADEONChangeSurfaces(ScrnInfoPtr pScrn)
retvalue = drmCommandWrite(info->drmFD, DRM_RADEON_SURF_FREE,
&drmsurffree, sizeof(drmsurffree));
- if ((info->ChipFamily != CHIP_FAMILY_RV100) ||
- (info->ChipFamily != CHIP_FAMILY_RS100) ||
- (info->ChipFamily != CHIP_FAMILY_RS200)) {
+ if (!((info->ChipFamily == CHIP_FAMILY_RV100) ||
+ (info->ChipFamily == CHIP_FAMILY_RS100) ||
+ (info->ChipFamily == CHIP_FAMILY_RS200))) {
drmsurffree.address = info->depthOffset;
retvalue = drmCommandWrite(info->drmFD, DRM_RADEON_SURF_FREE,
&drmsurffree, sizeof(drmsurffree));
@@ -4961,9 +4762,10 @@ void RADEONChangeSurfaces(ScrnInfoPtr pScrn)
}
/* rv100 and probably the derivative igps don't have depth tiling on all the time? */
- if (info->have3DWindows && ((info->ChipFamily != CHIP_FAMILY_RV100) ||
- (info->ChipFamily != CHIP_FAMILY_RS100) ||
- (info->ChipFamily != CHIP_FAMILY_RS200))) {
+ if (info->have3DWindows &&
+ (!((info->ChipFamily == CHIP_FAMILY_RV100) ||
+ (info->ChipFamily == CHIP_FAMILY_RS100) ||
+ (info->ChipFamily == CHIP_FAMILY_RS200)))) {
drmRadeonSurfaceAlloc drmsurfalloc;
drmsurfalloc.size = depthBufferSize;
drmsurfalloc.address = info->depthOffset;
diff --git a/src/radeon_output.c b/src/radeon_output.c
index 599a89c..4e5aded 100644
--- a/src/radeon_output.c
+++ b/src/radeon_output.c
@@ -218,22 +218,33 @@ RADEONRestoreDVOChip(ScrnInfoPtr pScrn, xf86OutputPtr output)
(CARD32)~(RADEON_GPIO_A_0 | RADEON_GPIO_A_1));
if (!RADEONInitExtTMDSInfoFromBIOS(output)) {
- /* do mac stuff here */
-#if defined(__powerpc__)
if (radeon_output->DVOChip) {
- switch(info->MacModel) {
- case RADEON_MAC_POWERBOOK_DL:
+ switch(info->ext_tmds_chip) {
+ case RADEON_SIL_164:
RADEONDVOWriteByte(radeon_output->DVOChip, 0x08, 0x30);
RADEONDVOWriteByte(radeon_output->DVOChip, 0x09, 0x00);
RADEONDVOWriteByte(radeon_output->DVOChip, 0x0a, 0x90);
RADEONDVOWriteByte(radeon_output->DVOChip, 0x0c, 0x89);
RADEONDVOWriteByte(radeon_output->DVOChip, 0x08, 0x3b);
break;
+#if 0
+ /* needs work see bug 10418 */
+ case RADEON_SIL_1178:
+ RADEONDVOWriteByte(radeon_output->DVOChip, 0x0f, 0x44);
+ RADEONDVOWriteByte(radeon_output->DVOChip, 0x0f, 0x4c);
+ RADEONDVOWriteByte(radeon_output->DVOChip, 0x0e, 0x01);
+ RADEONDVOWriteByte(radeon_output->DVOChip, 0x0a, 0x80);
+ RADEONDVOWriteByte(radeon_output->DVOChip, 0x09, 0x30);
+ RADEONDVOWriteByte(radeon_output->DVOChip, 0x0c, 0xc9);
+ RADEONDVOWriteByte(radeon_output->DVOChip, 0x0d, 0x70);
+ RADEONDVOWriteByte(radeon_output->DVOChip, 0x08, 0x32);
+ RADEONDVOWriteByte(radeon_output->DVOChip, 0x08, 0x33);
+ break;
+#endif
default:
break;
}
}
-#endif
}
}
@@ -623,11 +634,18 @@ void RADEONConnectorFindMonitor(ScrnInfoPtr pScrn, xf86OutputPtr output)
if (radeon_output->MonType == MT_UNKNOWN) {
if (radeon_output->type == OUTPUT_STV || radeon_output->type == OUTPUT_CTV) {
- if (info->InternalTVOut) {
- if (radeon_output->load_detection)
- radeon_output->MonType = radeon_detect_tv(pScrn);
+ if (xf86ReturnOptValBool(info->Options, OPTION_FORCE_TVOUT, FALSE)) {
+ if (radeon_output->type == OUTPUT_STV)
+ radeon_output->MonType = MT_STV;
else
- radeon_output->MonType = MT_NONE;
+ radeon_output->MonType = MT_CTV;
+ } else {
+ if (info->InternalTVOut) {
+ if (radeon_output->load_detection)
+ radeon_output->MonType = radeon_detect_tv(pScrn);
+ else
+ radeon_output->MonType = MT_NONE;
+ }
}
} else {
radeon_output->MonType = RADEONDisplayDDCConnected(pScrn, output);
@@ -1039,11 +1057,12 @@ static void RADEONInitDACRegisters(xf86OutputPtr output, RADEONSavePtr save,
save->dac_macro_cntl = info->SavedReg.dac_macro_cntl;
}
-/* XXX: fix me */
static void
-RADEONInitTvDacCntl(ScrnInfoPtr pScrn, RADEONSavePtr save)
+RADEONInitTvDacCntl(xf86OutputPtr output, RADEONSavePtr save)
{
+ ScrnInfoPtr pScrn = output->scrn;
RADEONInfoPtr info = RADEONPTR(pScrn);
+ RADEONOutputPrivatePtr radeon_output = output->driver_private;
if (info->ChipFamily == CHIP_FAMILY_R420 ||
info->ChipFamily == CHIP_FAMILY_RV410) {
@@ -1064,10 +1083,11 @@ RADEONInitTvDacCntl(ScrnInfoPtr pScrn, RADEONSavePtr save)
RADEON_TV_DAC_GDACPD |
RADEON_TV_DAC_GDACPD);
}
- /* FIXME: doesn't make sense, this just replaces the previous value... */
+
save->tv_dac_cntl |= (RADEON_TV_DAC_NBLANK |
- RADEON_TV_DAC_NHOLD |
- RADEON_TV_DAC_STD_PS2);
+ RADEON_TV_DAC_NHOLD |
+ RADEON_TV_DAC_STD_PS2 |
+ radeon_output->tv_dac_adj);
}
@@ -1078,7 +1098,7 @@ static void RADEONInitDAC2Registers(xf86OutputPtr output, RADEONSavePtr save,
RADEONInfoPtr info = RADEONPTR(pScrn);
/*0x0028023;*/
- RADEONInitTvDacCntl(pScrn, save);
+ RADEONInitTvDacCntl(output, save);
if (IS_R300_VARIANT)
save->gpiopad_a = info->SavedReg.gpiopad_a | 1;
@@ -1670,10 +1690,16 @@ radeon_detect(xf86OutputPtr output)
/* default to unknown for flaky chips/connectors
* so we can get something on the screen
*/
- if (((radeon_output->type == OUTPUT_VGA || radeon_output->type == OUTPUT_DVI) &&
- radeon_output->DACType == DAC_TVDAC) ||
- (info->IsIGP && radeon_output->type == OUTPUT_DVI))
+ if ((radeon_output->type == OUTPUT_VGA || radeon_output->type == OUTPUT_DVI) &&
+ (radeon_output->DACType == DAC_TVDAC) &&
+ (info->ChipFamily == CHIP_FAMILY_RS400)) {
+ radeon_output->MonType = MT_CRT;
+ return XF86OutputStatusUnknown;
+ } else if ((info->ChipFamily == CHIP_FAMILY_RS400) &&
+ radeon_output->type == OUTPUT_DVI) {
+ radeon_output->MonType = MT_DFP; /* MT_LCD ??? */
return XF86OutputStatusUnknown;
+ }
}
if (connected)
@@ -1740,6 +1766,7 @@ radeon_create_resources(xf86OutputPtr output)
INT32 range[2];
int data, err;
const char *s;
+ char *optstr;
/* backlight control */
if (radeon_output->type == OUTPUT_LVDS) {
@@ -1975,6 +2002,26 @@ radeon_create_resources(xf86OutputPtr output)
s = "ntsc";
break;
}
+
+ optstr = (char *)xf86GetOptValString(info->Options, OPTION_TVSTD);
+ if (optstr) {
+ if (!strncmp("ntsc", optstr, strlen("ntsc")))
+ radeon_output->tvStd = TV_STD_NTSC;
+ else if (!strncmp("pal", optstr, strlen("pal")))
+ radeon_output->tvStd = TV_STD_PAL;
+ else if (!strncmp("pal-m", optstr, strlen("pal-m")))
+ radeon_output->tvStd = TV_STD_PAL_M;
+ else if (!strncmp("pal-60", optstr, strlen("pal-60")))
+ radeon_output->tvStd = TV_STD_PAL_60;
+ else if (!strncmp("ntsc-j", optstr, strlen("ntsc-j")))
+ radeon_output->tvStd = TV_STD_NTSC_J;
+ else if (!strncmp("scart-pal", optstr, strlen("scart-pal")))
+ radeon_output->tvStd = TV_STD_SCART_PAL;
+ else {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Invalid TV Standard: %s\n", optstr);
+ }
+ }
+
err = RRChangeOutputProperty(output->randr_output, tv_std_atom,
XA_STRING, 8, PropModeReplace, strlen(s), (pointer)s,
FALSE, FALSE);
@@ -2623,6 +2670,7 @@ void RADEONInitConnector(xf86OutputPtr output)
if (radeon_output->type == OUTPUT_STV ||
radeon_output->type == OUTPUT_CTV) {
RADEONGetTVInfo(output);
+ RADEONGetTVDacAdjInfo(output);
}
if (radeon_output->DACType == DAC_TVDAC) {
@@ -2658,7 +2706,7 @@ static Bool RADEONSetupAppleConnectors(ScrnInfoPtr pScrn)
info->BiosConnector[2].DDCType = DDC_NONE_DETECTED;
info->BiosConnector[2].valid = TRUE;
return TRUE;
- case RADEON_MAC_POWERBOOK_DL:
+ case RADEON_MAC_POWERBOOK_EXTERNAL:
info->BiosConnector[0].DDCType = DDC_DVI;
info->BiosConnector[0].DACType = DAC_NONE;
info->BiosConnector[0].TMDSType = TMDS_NONE;
@@ -2677,7 +2725,7 @@ static Bool RADEONSetupAppleConnectors(ScrnInfoPtr pScrn)
info->BiosConnector[2].DDCType = DDC_NONE_DETECTED;
info->BiosConnector[2].valid = TRUE;
return TRUE;
- case RADEON_MAC_POWERBOOK:
+ case RADEON_MAC_POWERBOOK_INTERNAL:
info->BiosConnector[0].DDCType = DDC_DVI;
info->BiosConnector[0].DACType = DAC_NONE;
info->BiosConnector[0].TMDSType = TMDS_NONE;
@@ -2696,7 +2744,26 @@ static Bool RADEONSetupAppleConnectors(ScrnInfoPtr pScrn)
info->BiosConnector[2].DDCType = DDC_NONE_DETECTED;
info->BiosConnector[2].valid = TRUE;
return TRUE;
- case RADEON_MAC_MINI:
+ case RADEON_MAC_POWERBOOK_VGA:
+ info->BiosConnector[0].DDCType = DDC_DVI;
+ info->BiosConnector[0].DACType = DAC_NONE;
+ info->BiosConnector[0].TMDSType = TMDS_NONE;
+ info->BiosConnector[0].ConnectorType = CONNECTOR_CRT;
+ info->BiosConnector[0].valid = TRUE;
+
+ info->BiosConnector[1].DDCType = DDC_VGA;
+ info->BiosConnector[1].DACType = DAC_PRIMARY;
+ info->BiosConnector[1].TMDSType = TMDS_INT;
+ info->BiosConnector[1].ConnectorType = CONNECTOR_DVI_I;
+ info->BiosConnector[1].valid = TRUE;
+
+ info->BiosConnector[2].ConnectorType = CONNECTOR_STV;
+ info->BiosConnector[2].DACType = DAC_TVDAC;
+ info->BiosConnector[2].TMDSType = TMDS_NONE;
+ info->BiosConnector[2].DDCType = DDC_NONE_DETECTED;
+ info->BiosConnector[2].valid = TRUE;
+ return TRUE;
+ case RADEON_MAC_MINI_EXTERNAL:
info->BiosConnector[0].DDCType = DDC_CRT2;
info->BiosConnector[0].DACType = DAC_TVDAC;
info->BiosConnector[0].TMDSType = TMDS_EXT;
@@ -2709,6 +2776,19 @@ static Bool RADEONSetupAppleConnectors(ScrnInfoPtr pScrn)
info->BiosConnector[1].DDCType = DDC_NONE_DETECTED;
info->BiosConnector[1].valid = TRUE;
return TRUE;
+ case RADEON_MAC_MINI_INTERNAL:
+ info->BiosConnector[0].DDCType = DDC_CRT2;
+ info->BiosConnector[0].DACType = DAC_TVDAC;
+ info->BiosConnector[0].TMDSType = TMDS_INT;
+ info->BiosConnector[0].ConnectorType = CONNECTOR_DVI_I;
+ info->BiosConnector[0].valid = TRUE;
+
+ info->BiosConnector[1].ConnectorType = CONNECTOR_STV;
+ info->BiosConnector[1].DACType = DAC_TVDAC;
+ info->BiosConnector[1].TMDSType = TMDS_NONE;
+ info->BiosConnector[1].DDCType = DDC_NONE_DETECTED;
+ info->BiosConnector[1].valid = TRUE;
+ return TRUE;
default:
return FALSE;
}
@@ -2793,11 +2873,19 @@ static void RADEONSetupGenericConnectors(ScrnInfoPtr pScrn)
info->BiosConnector[0].ConnectorType = CONNECTOR_DVI_I;
info->BiosConnector[0].valid = TRUE;
+#if defined(__powerpc__)
info->BiosConnector[1].DDCType = DDC_VGA;
info->BiosConnector[1].DACType = DAC_PRIMARY;
info->BiosConnector[1].TMDSType = TMDS_EXT;
+ info->BiosConnector[1].ConnectorType = CONNECTOR_DVI_I;
+ info->BiosConnector[1].valid = TRUE;
+#else
+ info->BiosConnector[1].DDCType = DDC_VGA;
+ info->BiosConnector[1].DACType = DAC_PRIMARY;
+ info->BiosConnector[1].TMDSType = TMDS_NONE;
info->BiosConnector[1].ConnectorType = CONNECTOR_CRT;
info->BiosConnector[1].valid = TRUE;
+#endif
}
}
@@ -2826,25 +2914,63 @@ static void RADEONSetupGenericConnectors(ScrnInfoPtr pScrn)
* in /proc/cpuinfo (on Linux) */
static RADEONMacModel RADEONDetectMacModel(ScrnInfoPtr pScrn)
{
+ RADEONInfoPtr info = RADEONPTR(pScrn);
RADEONMacModel ret = 0;
#ifdef __linux__
char cpuline[50]; /* 50 should be sufficient for our purposes */
FILE *f = fopen ("/proc/cpuinfo", "r");
+ /* Some macs (minis and powerbooks) use internal tmds, others use external tmds
+ * and not just for dual-link TMDS, it shows up with single-link as well.
+ * Unforunately, there doesn't seem to be any good way to figure it out.
+ */
+
+ /*
+ * PowerBook5,[1-5]: external tmds, single-link
+ * PowerBook5,[789]: external tmds, dual-link
+ * PowerBook5,6: external tmds, single-link or dual-link
+ * need to add another option to specify the external tmds chip
+ * or find out what's used and add it.
+ */
+
+
if (f != NULL) {
while (fgets(cpuline, sizeof cpuline, f)) {
if (!strncmp(cpuline, "machine", strlen ("machine"))) {
- if (strstr(cpuline, "PowerBook5,6") ||
- strstr(cpuline, "PowerBook5,7") ||
+ if (strstr(cpuline, "PowerBook5,1") ||
+ strstr(cpuline, "PowerBook5,2") ||
+ strstr(cpuline, "PowerBook5,3") ||
+ strstr(cpuline, "PowerBook5,4") ||
+ strstr(cpuline, "PowerBook5,5")) {
+ ret = RADEON_MAC_POWERBOOK_EXTERNAL; /* single link */
+ info->ext_tmds_chip = RADEON_SIL_164; /* works on 5,2 */
+ break;
+ }
+
+ if (strstr(cpuline, "PowerBook5,6")) {
+ ret = RADEON_MAC_POWERBOOK_EXTERNAL; /* dual or single link */
+ break;
+ }
+
+ if (strstr(cpuline, "PowerBook5,7") ||
strstr(cpuline, "PowerBook5,8") ||
strstr(cpuline, "PowerBook5,9")) {
- ret = RADEON_MAC_POWERBOOK_DL;
+ ret = RADEON_MAC_POWERBOOK_EXTERNAL; /* dual link */
+ info->ext_tmds_chip = RADEON_SIL_1178; /* guess */
+ break;
+ }
+
+ if (strstr(cpuline, "PowerBook3,3")) {
+ ret = RADEON_MAC_POWERBOOK_VGA; /* vga rather than dvi */
break;
}
- if (strstr(cpuline, "PowerMac10,1") ||
- strstr(cpuline, "PowerMac10,2")) {
- ret = RADEON_MAC_MINI;
+ if (strstr(cpuline, "PowerMac10,1")) {
+ ret = RADEON_MAC_MINI_INTERNAL; /* internal tmds */
+ break;
+ }
+ if (strstr(cpuline, "PowerMac10,2")) {
+ ret = RADEON_MAC_MINI_EXTERNAL; /* external tmds */
break;
}
} else if (!strncmp(cpuline, "detected as", strlen("detected as"))) {
@@ -2852,7 +2978,7 @@ static RADEONMacModel RADEONDetectMacModel(ScrnInfoPtr pScrn)
ret = RADEON_MAC_IBOOK;
break;
} else if (strstr(cpuline, "PowerBook")) {
- ret = RADEON_MAC_POWERBOOK_DL;
+ ret = RADEON_MAC_POWERBOOK_INTERNAL; /* internal tmds */
break;
}
@@ -2871,10 +2997,12 @@ static RADEONMacModel RADEONDetectMacModel(ScrnInfoPtr pScrn)
if (ret) {
xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, "Detected %s.\n",
- ret == RADEON_MAC_POWERBOOK_DL ? "PowerBook with dual link DVI" :
- ret == RADEON_MAC_POWERBOOK ? "PowerBook with single link DVI" :
+ ret == RADEON_MAC_POWERBOOK_EXTERNAL ? "PowerBook with external DVI" :
+ ret == RADEON_MAC_POWERBOOK_INTERNAL ? "PowerBook with integrated DVI" :
+ ret == RADEON_MAC_POWERBOOK_VGA ? "PowerBook with VGA" :
ret == RADEON_MAC_IBOOK ? "iBook" :
- "Mac Mini");
+ ret == RADEON_MAC_MINI_EXTERNAL ? "Mac Mini with external DVI" :
+ "Mac Mini with integrated DVI");
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"If this is not correct, try Option \"MacModel\" and "
"consider reporting to the\n");
@@ -2921,12 +3049,22 @@ Bool RADEONSetupConnectors(ScrnInfoPtr pScrn)
if (optstr) {
if (!strncmp("ibook", optstr, strlen("ibook")))
info->MacModel = RADEON_MAC_IBOOK;
- else if (!strncmp("powerbook-duallink", optstr, strlen("powerbook-duallink")))
- info->MacModel = RADEON_MAC_POWERBOOK_DL;
- else if (!strncmp("powerbook", optstr, strlen("powerbook")))
- info->MacModel = RADEON_MAC_POWERBOOK;
- else if (!strncmp("mini", optstr, strlen("mini")))
- info->MacModel = RADEON_MAC_MINI;
+ else if (!strncmp("powerbook-duallink", optstr, strlen("powerbook-duallink"))) /* alias */
+ info->MacModel = RADEON_MAC_POWERBOOK_EXTERNAL;
+ else if (!strncmp("powerbook-external", optstr, strlen("powerbook-external")))
+ info->MacModel = RADEON_MAC_POWERBOOK_EXTERNAL;
+ else if (!strncmp("powerbook-internal", optstr, strlen("powerbook-internal")))
+ info->MacModel = RADEON_MAC_POWERBOOK_INTERNAL;
+ else if (!strncmp("powerbook-vga", optstr, strlen("powerbook-vga")))
+ info->MacModel = RADEON_MAC_POWERBOOK_VGA;
+ else if (!strncmp("powerbook", optstr, strlen("powerbook"))) /* alias */
+ info->MacModel = RADEON_MAC_POWERBOOK_INTERNAL;
+ else if (!strncmp("mini-internal", optstr, strlen("mini-internal")))
+ info->MacModel = RADEON_MAC_MINI_INTERNAL;
+ else if (!strncmp("mini-external", optstr, strlen("mini-external")))
+ info->MacModel = RADEON_MAC_MINI_EXTERNAL;
+ else if (!strncmp("mini", optstr, strlen("mini"))) /* alias */
+ info->MacModel = RADEON_MAC_MINI_EXTERNAL;
else {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Invalid Mac Model: %s\n", optstr);
}
diff --git a/src/radeon_pci_chipset_gen.h b/src/radeon_pci_chipset_gen.h
new file mode 100644
index 0000000..7a36242
--- /dev/null
+++ b/src/radeon_pci_chipset_gen.h
@@ -0,0 +1,141 @@
+/* This file is autogenerated please do not edit */
+PciChipsets RADEONPciChipsets[] = {
+ { PCI_CHIP_RV380_3150, PCI_CHIP_RV380_3150, RES_SHARED_VGA },
+ { PCI_CHIP_RV380_3152, PCI_CHIP_RV380_3152, RES_SHARED_VGA },
+ { PCI_CHIP_RV380_3154, PCI_CHIP_RV380_3154, RES_SHARED_VGA },
+ { PCI_CHIP_RV380_3E50, PCI_CHIP_RV380_3E50, RES_SHARED_VGA },
+ { PCI_CHIP_RV380_3E54, PCI_CHIP_RV380_3E54, RES_SHARED_VGA },
+ { PCI_CHIP_RS100_4136, PCI_CHIP_RS100_4136, RES_SHARED_VGA },
+ { PCI_CHIP_RS200_4137, PCI_CHIP_RS200_4137, RES_SHARED_VGA },
+ { PCI_CHIP_R300_AD, PCI_CHIP_R300_AD, RES_SHARED_VGA },
+ { PCI_CHIP_R300_AE, PCI_CHIP_R300_AE, RES_SHARED_VGA },
+ { PCI_CHIP_R300_AF, PCI_CHIP_R300_AF, RES_SHARED_VGA },
+ { PCI_CHIP_R300_AG, PCI_CHIP_R300_AG, RES_SHARED_VGA },
+ { PCI_CHIP_R350_AH, PCI_CHIP_R350_AH, RES_SHARED_VGA },
+ { PCI_CHIP_R350_AI, PCI_CHIP_R350_AI, RES_SHARED_VGA },
+ { PCI_CHIP_R350_AJ, PCI_CHIP_R350_AJ, RES_SHARED_VGA },
+ { PCI_CHIP_R350_AK, PCI_CHIP_R350_AK, RES_SHARED_VGA },
+ { PCI_CHIP_RV350_AP, PCI_CHIP_RV350_AP, RES_SHARED_VGA },
+ { PCI_CHIP_RV350_AQ, PCI_CHIP_RV350_AQ, RES_SHARED_VGA },
+ { PCI_CHIP_RV360_AR, PCI_CHIP_RV360_AR, RES_SHARED_VGA },
+ { PCI_CHIP_RV350_AS, PCI_CHIP_RV350_AS, RES_SHARED_VGA },
+ { PCI_CHIP_RV350_AT, PCI_CHIP_RV350_AT, RES_SHARED_VGA },
+ { PCI_CHIP_RV350_4155, PCI_CHIP_RV350_4155, RES_SHARED_VGA },
+ { PCI_CHIP_RV350_AV, PCI_CHIP_RV350_AV, RES_SHARED_VGA },
+ { PCI_CHIP_RS250_4237, PCI_CHIP_RS250_4237, RES_SHARED_VGA },
+ { PCI_CHIP_R200_BB, PCI_CHIP_R200_BB, RES_SHARED_VGA },
+ { PCI_CHIP_R200_BC, PCI_CHIP_R200_BC, RES_SHARED_VGA },
+ { PCI_CHIP_RS100_4336, PCI_CHIP_RS100_4336, RES_SHARED_VGA },
+ { PCI_CHIP_RS200_4337, PCI_CHIP_RS200_4337, RES_SHARED_VGA },
+ { PCI_CHIP_RS250_4437, PCI_CHIP_RS250_4437, RES_SHARED_VGA },
+ { PCI_CHIP_RV250_If, PCI_CHIP_RV250_If, RES_SHARED_VGA },
+ { PCI_CHIP_RV250_Ig, PCI_CHIP_RV250_Ig, RES_SHARED_VGA },
+ { PCI_CHIP_R420_JH, PCI_CHIP_R420_JH, RES_SHARED_VGA },
+ { PCI_CHIP_R420_JI, PCI_CHIP_R420_JI, RES_SHARED_VGA },
+ { PCI_CHIP_R420_JJ, PCI_CHIP_R420_JJ, RES_SHARED_VGA },
+ { PCI_CHIP_R420_JK, PCI_CHIP_R420_JK, RES_SHARED_VGA },
+ { PCI_CHIP_R420_JL, PCI_CHIP_R420_JL, RES_SHARED_VGA },
+ { PCI_CHIP_R420_JM, PCI_CHIP_R420_JM, RES_SHARED_VGA },
+ { PCI_CHIP_R420_JN, PCI_CHIP_R420_JN, RES_SHARED_VGA },
+ { PCI_CHIP_R420_4A4F, PCI_CHIP_R420_4A4F, RES_SHARED_VGA },
+ { PCI_CHIP_R420_JP, PCI_CHIP_R420_JP, RES_SHARED_VGA },
+ { PCI_CHIP_R481_4B49, PCI_CHIP_R481_4B49, RES_SHARED_VGA },
+ { PCI_CHIP_R481_4B4A, PCI_CHIP_R481_4B4A, RES_SHARED_VGA },
+ { PCI_CHIP_R481_4B4B, PCI_CHIP_R481_4B4B, RES_SHARED_VGA },
+ { PCI_CHIP_R481_4B4C, PCI_CHIP_R481_4B4C, RES_SHARED_VGA },
+ { PCI_CHIP_RADEON_LW, PCI_CHIP_RADEON_LW, RES_SHARED_VGA },
+ { PCI_CHIP_RADEON_LX, PCI_CHIP_RADEON_LX, RES_SHARED_VGA },
+ { PCI_CHIP_RADEON_LY, PCI_CHIP_RADEON_LY, RES_SHARED_VGA },
+ { PCI_CHIP_RADEON_LZ, PCI_CHIP_RADEON_LZ, RES_SHARED_VGA },
+ { PCI_CHIP_RV250_Ld, PCI_CHIP_RV250_Ld, RES_SHARED_VGA },
+ { PCI_CHIP_RV250_Lf, PCI_CHIP_RV250_Lf, RES_SHARED_VGA },
+ { PCI_CHIP_RV250_Lg, PCI_CHIP_RV250_Lg, RES_SHARED_VGA },
+ { PCI_CHIP_R300_ND, PCI_CHIP_R300_ND, RES_SHARED_VGA },
+ { PCI_CHIP_R300_NE, PCI_CHIP_R300_NE, RES_SHARED_VGA },
+ { PCI_CHIP_R300_NF, PCI_CHIP_R300_NF, RES_SHARED_VGA },
+ { PCI_CHIP_R300_NG, PCI_CHIP_R300_NG, RES_SHARED_VGA },
+ { PCI_CHIP_R350_NH, PCI_CHIP_R350_NH, RES_SHARED_VGA },
+ { PCI_CHIP_R350_NI, PCI_CHIP_R350_NI, RES_SHARED_VGA },
+ { PCI_CHIP_R360_NJ, PCI_CHIP_R360_NJ, RES_SHARED_VGA },
+ { PCI_CHIP_R350_NK, PCI_CHIP_R350_NK, RES_SHARED_VGA },
+ { PCI_CHIP_RV350_NP, PCI_CHIP_RV350_NP, RES_SHARED_VGA },
+ { PCI_CHIP_RV350_NQ, PCI_CHIP_RV350_NQ, RES_SHARED_VGA },
+ { PCI_CHIP_RV350_NR, PCI_CHIP_RV350_NR, RES_SHARED_VGA },
+ { PCI_CHIP_RV350_NS, PCI_CHIP_RV350_NS, RES_SHARED_VGA },
+ { PCI_CHIP_RV350_NT, PCI_CHIP_RV350_NT, RES_SHARED_VGA },
+ { PCI_CHIP_RV350_NV, PCI_CHIP_RV350_NV, RES_SHARED_VGA },
+ { PCI_CHIP_RADEON_QD, PCI_CHIP_RADEON_QD, RES_SHARED_VGA },
+ { PCI_CHIP_RADEON_QE, PCI_CHIP_RADEON_QE, RES_SHARED_VGA },
+ { PCI_CHIP_RADEON_QF, PCI_CHIP_RADEON_QF, RES_SHARED_VGA },
+ { PCI_CHIP_RADEON_QG, PCI_CHIP_RADEON_QG, RES_SHARED_VGA },
+ { PCI_CHIP_R200_QH, PCI_CHIP_R200_QH, RES_SHARED_VGA },
+ { PCI_CHIP_R200_QL, PCI_CHIP_R200_QL, RES_SHARED_VGA },
+ { PCI_CHIP_R200_QM, PCI_CHIP_R200_QM, RES_SHARED_VGA },
+ { PCI_CHIP_RV200_QW, PCI_CHIP_RV200_QW, RES_SHARED_VGA },
+ { PCI_CHIP_RV200_QX, PCI_CHIP_RV200_QX, RES_SHARED_VGA },
+ { PCI_CHIP_RV100_QY, PCI_CHIP_RV100_QY, RES_SHARED_VGA },
+ { PCI_CHIP_RV100_QZ, PCI_CHIP_RV100_QZ, RES_SHARED_VGA },
+ { PCI_CHIP_RN50_515E, PCI_CHIP_RN50_515E, RES_SHARED_VGA },
+ { PCI_CHIP_RV370_5460, PCI_CHIP_RV370_5460, RES_SHARED_VGA },
+ { PCI_CHIP_RV370_5462, PCI_CHIP_RV370_5462, RES_SHARED_VGA },
+ { PCI_CHIP_RV370_5464, PCI_CHIP_RV370_5464, RES_SHARED_VGA },
+ { PCI_CHIP_R423_UH, PCI_CHIP_R423_UH, RES_SHARED_VGA },
+ { PCI_CHIP_R423_UI, PCI_CHIP_R423_UI, RES_SHARED_VGA },
+ { PCI_CHIP_R423_UJ, PCI_CHIP_R423_UJ, RES_SHARED_VGA },
+ { PCI_CHIP_R423_UK, PCI_CHIP_R423_UK, RES_SHARED_VGA },
+ { PCI_CHIP_R430_554C, PCI_CHIP_R430_554C, RES_SHARED_VGA },
+ { PCI_CHIP_R430_554D, PCI_CHIP_R430_554D, RES_SHARED_VGA },
+ { PCI_CHIP_R430_554E, PCI_CHIP_R430_554E, RES_SHARED_VGA },
+ { PCI_CHIP_R430_554F, PCI_CHIP_R430_554F, RES_SHARED_VGA },
+ { PCI_CHIP_R423_5550, PCI_CHIP_R423_5550, RES_SHARED_VGA },
+ { PCI_CHIP_R423_UQ, PCI_CHIP_R423_UQ, RES_SHARED_VGA },
+ { PCI_CHIP_R423_UR, PCI_CHIP_R423_UR, RES_SHARED_VGA },
+ { PCI_CHIP_R423_UT, PCI_CHIP_R423_UT, RES_SHARED_VGA },
+ { PCI_CHIP_RV410_564A, PCI_CHIP_RV410_564A, RES_SHARED_VGA },
+ { PCI_CHIP_RV410_564B, PCI_CHIP_RV410_564B, RES_SHARED_VGA },
+ { PCI_CHIP_RV410_564F, PCI_CHIP_RV410_564F, RES_SHARED_VGA },
+ { PCI_CHIP_RV410_5652, PCI_CHIP_RV410_5652, RES_SHARED_VGA },
+ { PCI_CHIP_RV410_5653, PCI_CHIP_RV410_5653, RES_SHARED_VGA },
+ { PCI_CHIP_RS300_5834, PCI_CHIP_RS300_5834, RES_SHARED_VGA },
+ { PCI_CHIP_RS300_5835, PCI_CHIP_RS300_5835, RES_SHARED_VGA },
+ { PCI_CHIP_RS480_5954, PCI_CHIP_RS480_5954, RES_SHARED_VGA },
+ { PCI_CHIP_RS480_5955, PCI_CHIP_RS480_5955, RES_SHARED_VGA },
+ { PCI_CHIP_RV280_5960, PCI_CHIP_RV280_5960, RES_SHARED_VGA },
+ { PCI_CHIP_RV280_5961, PCI_CHIP_RV280_5961, RES_SHARED_VGA },
+ { PCI_CHIP_RV280_5962, PCI_CHIP_RV280_5962, RES_SHARED_VGA },
+ { PCI_CHIP_RV280_5964, PCI_CHIP_RV280_5964, RES_SHARED_VGA },
+ { PCI_CHIP_RV280_5965, PCI_CHIP_RV280_5965, RES_SHARED_VGA },
+ { PCI_CHIP_RN50_5969, PCI_CHIP_RN50_5969, RES_SHARED_VGA },
+ { PCI_CHIP_RS482_5974, PCI_CHIP_RS482_5974, RES_SHARED_VGA },
+ { PCI_CHIP_RS485_5975, PCI_CHIP_RS485_5975, RES_SHARED_VGA },
+ { PCI_CHIP_RS400_5A41, PCI_CHIP_RS400_5A41, RES_SHARED_VGA },
+ { PCI_CHIP_RS400_5A42, PCI_CHIP_RS400_5A42, RES_SHARED_VGA },
+ { PCI_CHIP_RC410_5A61, PCI_CHIP_RC410_5A61, RES_SHARED_VGA },
+ { PCI_CHIP_RC410_5A62, PCI_CHIP_RC410_5A62, RES_SHARED_VGA },
+ { PCI_CHIP_RV370_5B60, PCI_CHIP_RV370_5B60, RES_SHARED_VGA },
+ { PCI_CHIP_RV370_5B62, PCI_CHIP_RV370_5B62, RES_SHARED_VGA },
+ { PCI_CHIP_RV370_5B63, PCI_CHIP_RV370_5B63, RES_SHARED_VGA },
+ { PCI_CHIP_RV370_5B64, PCI_CHIP_RV370_5B64, RES_SHARED_VGA },
+ { PCI_CHIP_RV370_5B65, PCI_CHIP_RV370_5B65, RES_SHARED_VGA },
+ { PCI_CHIP_RV280_5C61, PCI_CHIP_RV280_5C61, RES_SHARED_VGA },
+ { PCI_CHIP_RV280_5C63, PCI_CHIP_RV280_5C63, RES_SHARED_VGA },
+ { PCI_CHIP_R430_5D48, PCI_CHIP_R430_5D48, RES_SHARED_VGA },
+ { PCI_CHIP_R430_5D49, PCI_CHIP_R430_5D49, RES_SHARED_VGA },
+ { PCI_CHIP_R430_5D4A, PCI_CHIP_R430_5D4A, RES_SHARED_VGA },
+ { PCI_CHIP_R480_5D4C, PCI_CHIP_R480_5D4C, RES_SHARED_VGA },
+ { PCI_CHIP_R480_5D4D, PCI_CHIP_R480_5D4D, RES_SHARED_VGA },
+ { PCI_CHIP_R480_5D4E, PCI_CHIP_R480_5D4E, RES_SHARED_VGA },
+ { PCI_CHIP_R480_5D4F, PCI_CHIP_R480_5D4F, RES_SHARED_VGA },
+ { PCI_CHIP_R480_5D50, PCI_CHIP_R480_5D50, RES_SHARED_VGA },
+ { PCI_CHIP_R480_5D52, PCI_CHIP_R480_5D52, RES_SHARED_VGA },
+ { PCI_CHIP_R423_5D57, PCI_CHIP_R423_5D57, RES_SHARED_VGA },
+ { PCI_CHIP_RV410_5E48, PCI_CHIP_RV410_5E48, RES_SHARED_VGA },
+ { PCI_CHIP_RV410_5E4A, PCI_CHIP_RV410_5E4A, RES_SHARED_VGA },
+ { PCI_CHIP_RV410_5E4B, PCI_CHIP_RV410_5E4B, RES_SHARED_VGA },
+ { PCI_CHIP_RV410_5E4C, PCI_CHIP_RV410_5E4C, RES_SHARED_VGA },
+ { PCI_CHIP_RV410_5E4D, PCI_CHIP_RV410_5E4D, RES_SHARED_VGA },
+ { PCI_CHIP_RV410_5E4F, PCI_CHIP_RV410_5E4F, RES_SHARED_VGA },
+ { PCI_CHIP_RS350_7834, PCI_CHIP_RS350_7834, RES_SHARED_VGA },
+ { PCI_CHIP_RS350_7835, PCI_CHIP_RS350_7835, RES_SHARED_VGA },
+ { -1, -1, RES_UNDEFINED }
+};
diff --git a/src/radeon_probe.c b/src/radeon_probe.c
index d68a956..baea47c 100644
--- a/src/radeon_probe.c
+++ b/src/radeon_probe.c
@@ -51,150 +51,9 @@
#include <X11/extensions/xf86misc.h>
#include "xf86Resources.h"
-#include "radeon_chipset.h"
+#include "radeon_chipset_gen.h"
-PciChipsets RADEONPciChipsets[] = {
- { PCI_CHIP_RADEON_QD, PCI_CHIP_RADEON_QD, RES_SHARED_VGA },
- { PCI_CHIP_RADEON_QE, PCI_CHIP_RADEON_QE, RES_SHARED_VGA },
- { PCI_CHIP_RADEON_QF, PCI_CHIP_RADEON_QF, RES_SHARED_VGA },
- { PCI_CHIP_RADEON_QG, PCI_CHIP_RADEON_QG, RES_SHARED_VGA },
- { PCI_CHIP_RV100_QY, PCI_CHIP_RV100_QY, RES_SHARED_VGA },
- { PCI_CHIP_RV100_QZ, PCI_CHIP_RV100_QZ, RES_SHARED_VGA },
- { PCI_CHIP_RN50_515E, PCI_CHIP_RN50_515E, RES_SHARED_VGA },
- { PCI_CHIP_RN50_5969, PCI_CHIP_RN50_5969, RES_SHARED_VGA },
- { PCI_CHIP_RADEON_LW, PCI_CHIP_RADEON_LW, RES_SHARED_VGA },
- { PCI_CHIP_RADEON_LX, PCI_CHIP_RADEON_LX, RES_SHARED_VGA },
- { PCI_CHIP_RADEON_LY, PCI_CHIP_RADEON_LY, RES_SHARED_VGA },
- { PCI_CHIP_RADEON_LZ, PCI_CHIP_RADEON_LZ, RES_SHARED_VGA },
- { PCI_CHIP_RS100_4136, PCI_CHIP_RS100_4136, RES_SHARED_VGA },
- { PCI_CHIP_RS100_4336, PCI_CHIP_RS100_4336, RES_SHARED_VGA },
- { PCI_CHIP_RS200_4137, PCI_CHIP_RS200_4137, RES_SHARED_VGA },
- { PCI_CHIP_RS200_4337, PCI_CHIP_RS200_4337, RES_SHARED_VGA },
- { PCI_CHIP_RS250_4237, PCI_CHIP_RS250_4237, RES_SHARED_VGA },
- { PCI_CHIP_RS250_4437, PCI_CHIP_RS250_4437, RES_SHARED_VGA },
- { PCI_CHIP_R200_QH, PCI_CHIP_R200_QH, RES_SHARED_VGA },
- { PCI_CHIP_R200_QL, PCI_CHIP_R200_QL, RES_SHARED_VGA },
- { PCI_CHIP_R200_QM, PCI_CHIP_R200_QM, RES_SHARED_VGA },
- { PCI_CHIP_R200_BB, PCI_CHIP_R200_BB, RES_SHARED_VGA },
- { PCI_CHIP_R200_BC, PCI_CHIP_R200_BC, RES_SHARED_VGA },
- { PCI_CHIP_RV200_QW, PCI_CHIP_RV200_QW, RES_SHARED_VGA },
- { PCI_CHIP_RV200_QX, PCI_CHIP_RV200_QX, RES_SHARED_VGA },
- { PCI_CHIP_RV250_If, PCI_CHIP_RV250_If, RES_SHARED_VGA },
- { PCI_CHIP_RV250_Ig, PCI_CHIP_RV250_Ig, RES_SHARED_VGA },
- { PCI_CHIP_RV250_Ld, PCI_CHIP_RV250_Ld, RES_SHARED_VGA },
- { PCI_CHIP_RV250_Lf, PCI_CHIP_RV250_Lf, RES_SHARED_VGA },
- { PCI_CHIP_RV250_Lg, PCI_CHIP_RV250_Lg, RES_SHARED_VGA },
- { PCI_CHIP_RS300_5834, PCI_CHIP_RS300_5834, RES_SHARED_VGA },
- { PCI_CHIP_RS300_5835, PCI_CHIP_RS300_5835, RES_SHARED_VGA },
- { PCI_CHIP_RS350_7834, PCI_CHIP_RS350_7834, RES_SHARED_VGA },
- { PCI_CHIP_RS350_7835, PCI_CHIP_RS350_7835, RES_SHARED_VGA },
- { PCI_CHIP_RV280_5960, PCI_CHIP_RV280_5960, RES_SHARED_VGA },
- { PCI_CHIP_RV280_5961, PCI_CHIP_RV280_5961, RES_SHARED_VGA },
- { PCI_CHIP_RV280_5962, PCI_CHIP_RV280_5962, RES_SHARED_VGA },
- { PCI_CHIP_RV280_5964, PCI_CHIP_RV280_5964, RES_SHARED_VGA },
- { PCI_CHIP_RV280_5965, PCI_CHIP_RV280_5965, RES_SHARED_VGA },
- { PCI_CHIP_RV280_5C61, PCI_CHIP_RV280_5C61, RES_SHARED_VGA },
- { PCI_CHIP_RV280_5C63, PCI_CHIP_RV280_5C63, RES_SHARED_VGA },
- { PCI_CHIP_R300_AD, PCI_CHIP_R300_AD, RES_SHARED_VGA },
- { PCI_CHIP_R300_AE, PCI_CHIP_R300_AE, RES_SHARED_VGA },
- { PCI_CHIP_R300_AF, PCI_CHIP_R300_AF, RES_SHARED_VGA },
- { PCI_CHIP_R300_AG, PCI_CHIP_R300_AG, RES_SHARED_VGA },
- { PCI_CHIP_R300_ND, PCI_CHIP_R300_ND, RES_SHARED_VGA },
- { PCI_CHIP_R300_NE, PCI_CHIP_R300_NE, RES_SHARED_VGA },
- { PCI_CHIP_R300_NF, PCI_CHIP_R300_NF, RES_SHARED_VGA },
- { PCI_CHIP_R300_NG, PCI_CHIP_R300_NG, RES_SHARED_VGA },
- { PCI_CHIP_RV350_AP, PCI_CHIP_RV350_AP, RES_SHARED_VGA },
- { PCI_CHIP_RV350_AQ, PCI_CHIP_RV350_AQ, RES_SHARED_VGA },
- { PCI_CHIP_RV360_AR, PCI_CHIP_RV360_AR, RES_SHARED_VGA },
- { PCI_CHIP_RV350_AS, PCI_CHIP_RV350_AS, RES_SHARED_VGA },
- { PCI_CHIP_RV350_AT, PCI_CHIP_RV350_AT, RES_SHARED_VGA },
- { PCI_CHIP_RV350_AV, PCI_CHIP_RV350_AV, RES_SHARED_VGA },
- { PCI_CHIP_RV350_NP, PCI_CHIP_RV350_NP, RES_SHARED_VGA },
- { PCI_CHIP_RV350_NQ, PCI_CHIP_RV350_NQ, RES_SHARED_VGA },
- { PCI_CHIP_RV350_NR, PCI_CHIP_RV350_NR, RES_SHARED_VGA },
- { PCI_CHIP_RV350_NS, PCI_CHIP_RV350_NS, RES_SHARED_VGA },
- { PCI_CHIP_RV350_NT, PCI_CHIP_RV350_NT, RES_SHARED_VGA },
- { PCI_CHIP_RV350_NV, PCI_CHIP_RV350_NV, RES_SHARED_VGA },
- { PCI_CHIP_RV350_4155, PCI_CHIP_RV350_4155, RES_SHARED_VGA },
- { PCI_CHIP_R350_AH, PCI_CHIP_R350_AH, RES_SHARED_VGA },
- { PCI_CHIP_R350_AI, PCI_CHIP_R350_AI, RES_SHARED_VGA },
- { PCI_CHIP_R350_AJ, PCI_CHIP_R350_AJ, RES_SHARED_VGA },
- { PCI_CHIP_R350_AK, PCI_CHIP_R350_AK, RES_SHARED_VGA },
- { PCI_CHIP_R350_NH, PCI_CHIP_R350_NH, RES_SHARED_VGA },
- { PCI_CHIP_R350_NI, PCI_CHIP_R350_NI, RES_SHARED_VGA },
- { PCI_CHIP_R350_NK, PCI_CHIP_R350_NK, RES_SHARED_VGA },
- { PCI_CHIP_R360_NJ, PCI_CHIP_R360_NJ, RES_SHARED_VGA },
- { PCI_CHIP_RV380_3E50, PCI_CHIP_RV380_3E50, RES_SHARED_VGA },
- { PCI_CHIP_RV380_3E54, PCI_CHIP_RV380_3E54, RES_SHARED_VGA },
- { PCI_CHIP_RV380_3150, PCI_CHIP_RV380_3150, RES_SHARED_VGA },
- { PCI_CHIP_RV380_3152, PCI_CHIP_RV380_3152, RES_SHARED_VGA },
- { PCI_CHIP_RV380_3154, PCI_CHIP_RV380_3154, RES_SHARED_VGA },
- { PCI_CHIP_RV370_5B60, PCI_CHIP_RV370_5B60, RES_SHARED_VGA },
- { PCI_CHIP_RV370_5B62, PCI_CHIP_RV370_5B62, RES_SHARED_VGA },
- { PCI_CHIP_RV370_5B63, PCI_CHIP_RV370_5B63, RES_SHARED_VGA },
- { PCI_CHIP_RV370_5B64, PCI_CHIP_RV370_5B64, RES_SHARED_VGA },
- { PCI_CHIP_RV370_5B65, PCI_CHIP_RV370_5B65, RES_SHARED_VGA },
- { PCI_CHIP_RV370_5460, PCI_CHIP_RV370_5460, RES_SHARED_VGA },
- { PCI_CHIP_RV370_5462, PCI_CHIP_RV370_5462, RES_SHARED_VGA },
- { PCI_CHIP_RV370_5464, PCI_CHIP_RV370_5464, RES_SHARED_VGA },
- { PCI_CHIP_RS400_5A41, PCI_CHIP_RS400_5A41, RES_SHARED_VGA },
- { PCI_CHIP_RS400_5A42, PCI_CHIP_RS400_5A42, RES_SHARED_VGA },
- { PCI_CHIP_RC410_5A61, PCI_CHIP_RC410_5A61, RES_SHARED_VGA },
- { PCI_CHIP_RC410_5A62, PCI_CHIP_RC410_5A62, RES_SHARED_VGA },
- { PCI_CHIP_RS480_5954, PCI_CHIP_RS480_5954, RES_SHARED_VGA },
- { PCI_CHIP_RS480_5955, PCI_CHIP_RS480_5955, RES_SHARED_VGA },
- { PCI_CHIP_RS482_5974, PCI_CHIP_RS482_5974, RES_SHARED_VGA },
- { PCI_CHIP_RS485_5975, PCI_CHIP_RS485_5975, RES_SHARED_VGA },
- { PCI_CHIP_RV410_5E48, PCI_CHIP_RV410_5E48, RES_SHARED_VGA },
- { PCI_CHIP_RV410_564A, PCI_CHIP_RV410_564A, RES_SHARED_VGA },
- { PCI_CHIP_RV410_564B, PCI_CHIP_RV410_564B, RES_SHARED_VGA },
- { PCI_CHIP_RV410_564F, PCI_CHIP_RV410_564F, RES_SHARED_VGA },
- { PCI_CHIP_RV410_5652, PCI_CHIP_RV410_5652, RES_SHARED_VGA },
- { PCI_CHIP_RV410_5653, PCI_CHIP_RV410_5653, RES_SHARED_VGA },
- { PCI_CHIP_RV410_5E4B, PCI_CHIP_RV410_5E4B, RES_SHARED_VGA },
- { PCI_CHIP_RV410_5E4A, PCI_CHIP_RV410_5E4A, RES_SHARED_VGA },
- { PCI_CHIP_RV410_5E4D, PCI_CHIP_RV410_5E4D, RES_SHARED_VGA },
- { PCI_CHIP_RV410_5E4C, PCI_CHIP_RV410_5E4C, RES_SHARED_VGA },
- { PCI_CHIP_RV410_5E4F, PCI_CHIP_RV410_5E4F, RES_SHARED_VGA },
- { PCI_CHIP_R420_JH, PCI_CHIP_R420_JH, RES_SHARED_VGA },
- { PCI_CHIP_R420_JI, PCI_CHIP_R420_JI, RES_SHARED_VGA },
- { PCI_CHIP_R420_JJ, PCI_CHIP_R420_JJ, RES_SHARED_VGA },
- { PCI_CHIP_R420_JK, PCI_CHIP_R420_JK, RES_SHARED_VGA },
- { PCI_CHIP_R420_JL, PCI_CHIP_R420_JL, RES_SHARED_VGA },
- { PCI_CHIP_R420_JM, PCI_CHIP_R420_JM, RES_SHARED_VGA },
- { PCI_CHIP_R420_JN, PCI_CHIP_R420_JN, RES_SHARED_VGA },
- { PCI_CHIP_R420_JP, PCI_CHIP_R420_JP, RES_SHARED_VGA },
- { PCI_CHIP_R420_4A4F, PCI_CHIP_R420_4A4F, RES_SHARED_VGA },
- { PCI_CHIP_R420_4A54, PCI_CHIP_R420_4A54, RES_SHARED_VGA },
- { PCI_CHIP_R423_UH, PCI_CHIP_R423_UH, RES_SHARED_VGA },
- { PCI_CHIP_R423_UI, PCI_CHIP_R423_UI, RES_SHARED_VGA },
- { PCI_CHIP_R423_UJ, PCI_CHIP_R423_UJ, RES_SHARED_VGA },
- { PCI_CHIP_R423_UK, PCI_CHIP_R423_UK, RES_SHARED_VGA },
- { PCI_CHIP_R423_UQ, PCI_CHIP_R423_UQ, RES_SHARED_VGA },
- { PCI_CHIP_R423_UR, PCI_CHIP_R423_UR, RES_SHARED_VGA },
- { PCI_CHIP_R423_UT, PCI_CHIP_R423_UT, RES_SHARED_VGA },
- { PCI_CHIP_R423_5D57, PCI_CHIP_R423_5D57, RES_SHARED_VGA },
- { PCI_CHIP_R423_5550, PCI_CHIP_R423_5550, RES_SHARED_VGA },
- { PCI_CHIP_R430_5D49, PCI_CHIP_R430_5D49, RES_SHARED_VGA },
- { PCI_CHIP_R430_5D4A, PCI_CHIP_R430_5D4A, RES_SHARED_VGA },
- { PCI_CHIP_R430_5D48, PCI_CHIP_R430_5D48, RES_SHARED_VGA },
- { PCI_CHIP_R430_554F, PCI_CHIP_R430_554F, RES_SHARED_VGA },
- { PCI_CHIP_R430_554D, PCI_CHIP_R430_554D, RES_SHARED_VGA },
- { PCI_CHIP_R430_554E, PCI_CHIP_R430_554E, RES_SHARED_VGA },
- { PCI_CHIP_R430_554C, PCI_CHIP_R430_554C, RES_SHARED_VGA },
- { PCI_CHIP_R480_5D4C, PCI_CHIP_R480_5D4C, RES_SHARED_VGA },
- { PCI_CHIP_R480_5D50, PCI_CHIP_R480_5D50, RES_SHARED_VGA },
- { PCI_CHIP_R480_5D4E, PCI_CHIP_R480_5D4E, RES_SHARED_VGA },
- { PCI_CHIP_R480_5D4F, PCI_CHIP_R480_5D4F, RES_SHARED_VGA },
- { PCI_CHIP_R480_5D52, PCI_CHIP_R480_5D52, RES_SHARED_VGA },
- { PCI_CHIP_R480_5D4D, PCI_CHIP_R480_5D4D, RES_SHARED_VGA },
- { PCI_CHIP_R481_4B4B, PCI_CHIP_R481_4B4B, RES_SHARED_VGA },
- { PCI_CHIP_R481_4B4A, PCI_CHIP_R481_4B4A, RES_SHARED_VGA },
- { PCI_CHIP_R481_4B49, PCI_CHIP_R481_4B49, RES_SHARED_VGA },
- { PCI_CHIP_R481_4B4C, PCI_CHIP_R481_4B4C, RES_SHARED_VGA },
-
- { -1, -1, RES_UNDEFINED }
-};
+#include "radeon_pci_chipset_gen.h"
int gRADEONEntityIndex = -1;
diff --git a/src/radeon_render.c b/src/radeon_render.c
index 5074fe1..490dec1 100644
--- a/src/radeon_render.c
+++ b/src/radeon_render.c
@@ -392,7 +392,7 @@ static Bool FUNC_NAME(R100SetupTexture)(
#endif
ACCEL_PREAMBLE();
- if ((width > 2048) || (height > 2048))
+ if ((width > 2047) || (height > 2047))
return FALSE;
txformat = RadeonGetTextureFormat(format);
@@ -424,7 +424,7 @@ static Bool FUNC_NAME(R100SetupTexture)(
txformat |= ATILog2(width) << RADEON_TXFORMAT_WIDTH_SHIFT;
txformat |= ATILog2(height) << RADEON_TXFORMAT_HEIGHT_SHIFT;
} else {
- tex_size = ((height - 1) << 16) | (width - 1);
+ tex_size = (height << 16) | width;
txformat |= RADEON_TXFORMAT_NON_POWER2;
}
diff --git a/src/radeon_tv.c b/src/radeon_tv.c
index 3a26a0a..2a8873c 100644
--- a/src/radeon_tv.c
+++ b/src/radeon_tv.c
@@ -434,7 +434,7 @@ void RADEONInitTVRegisters(xf86OutputPtr output, RADEONSavePtr save,
save->tv_vscaler_cntl2 = ((save->tv_vscaler_cntl2 & 0x00fffff0)
| (0x10 << 24)
- | RADEON_DITHER_MODE
+ | RADEON_DITHER_MODE
| RADEON_Y_OUTPUT_DITHER_EN
| RADEON_UV_OUTPUT_DITHER_EN
| RADEON_UV_TO_BUF_DITHER_EN);
@@ -444,10 +444,12 @@ void RADEONInitTVRegisters(xf86OutputPtr output, RADEONSavePtr save,
tmp = (tmp << RADEON_UV_OUTPUT_POST_SCALE_SHIFT) | 0x000b0000;
save->tv_timing_cntl = tmp;
- save->tv_dac_cntl = RADEON_TV_DAC_NBLANK | RADEON_TV_DAC_NHOLD | (8 << 16) | (6 << 20);
+ save->tv_dac_cntl = (RADEON_TV_DAC_NBLANK |
+ RADEON_TV_DAC_NHOLD |
+ radeon_output->tv_dac_adj /*(8 << 16) | (6 << 20)*/);
if (radeon_output->tvStd == TV_STD_NTSC ||
- radeon_output->tvStd == TV_STD_NTSC_J)
+ radeon_output->tvStd == TV_STD_NTSC_J)
save->tv_dac_cntl |= RADEON_TV_DAC_STD_NTSC;
else
save->tv_dac_cntl |= RADEON_TV_DAC_STD_PAL;
diff --git a/src/radeon_video.c b/src/radeon_video.c
index 26857a5..3f0209e 100644
--- a/src/radeon_video.c
+++ b/src/radeon_video.c
@@ -414,11 +414,11 @@ static XF86AttributeRec Attributes[NUM_DEC_ATTRIBUTES+1] =
#define FOURCC_RGB24 0x00000000
-#define XVIMAGE_RGB24(byte_order) \
+#define XVIMAGE_RGB24 \
{ \
FOURCC_RGB24, \
XvRGB, \
- byte_order, \
+ LSBFirst, \
{ 'R', 'G', 'B', 0, \
0x00,0x00,0x00,0x10,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71}, \
24, \
@@ -473,15 +473,14 @@ static XF86ImageRec Images[NUM_IMAGES] =
{
#if X_BYTE_ORDER == X_BIG_ENDIAN
XVIMAGE_RGBA32(MSBFirst),
- XVIMAGE_RGB24(MSBFirst),
XVIMAGE_RGBT16(MSBFirst),
XVIMAGE_RGB16(MSBFirst),
#else
XVIMAGE_RGBA32(LSBFirst),
- XVIMAGE_RGB24(LSBFirst),
XVIMAGE_RGBT16(LSBFirst),
XVIMAGE_RGB16(LSBFirst),
#endif
+ XVIMAGE_RGB24,
XVIMAGE_YUY2,
XVIMAGE_UYVY,
XVIMAGE_YV12,
@@ -2199,7 +2198,7 @@ RADEONCopyRGB24Data(
unsigned int w
){
CARD32 *dptr;
- CARD8 *sptr = 0;
+ CARD8 *sptr;
int i,j;
RADEONInfoPtr info = RADEONPTR(pScrn);
#ifdef XF86DRI
@@ -2210,11 +2209,9 @@ RADEONCopyRGB24Data(
int x, y;
unsigned int hpass;
- /* XXX Fix endian flip on R300 */
-
RADEONHostDataParams( pScrn, dst, dstPitch, 4, &dstPitchOff, &x, &y );
- while ( (dptr = ( CARD32* )RADEONHostDataBlit( pScrn, 4, w, dstPitch,
+ while ( (dptr = ( CARD32* )RADEONHostDataBlit( pScrn, 4, w, dstPitchOff,
&bufPitch, x, &y, &h,
&hpass )) )
{
@@ -2224,11 +2221,11 @@ RADEONCopyRGB24Data(
for ( i = 0 ; i < w; i++, sptr += 3 )
{
- *dptr++ = (sptr[0] << 24) | (sptr[1] << 16) | sptr[2];
+ dptr[i] = (sptr[2] << 16) | (sptr[1] << 8) | sptr[0];
}
- src += hpass * srcPitch;
- dptr += hpass * bufPitch;
+ src += srcPitch;
+ dptr += bufPitch / 4;
}
}
@@ -2246,14 +2243,12 @@ RADEONCopyRGB24Data(
& ~RADEON_NONSURF_AP0_SWP_16BPP);
#endif
- for(j=0;j<h;j++){
- dptr=(CARD32 *)(dst+j*dstPitch);
- sptr=src+j*srcPitch;
+ for (j = 0; j < h; j++) {
+ dptr = (CARD32 *)(dst + j * dstPitch);
+ sptr = src + j * srcPitch;
- for(i=w;i>0;i--){
- dptr[0]=((sptr[0])<<24)|((sptr[1])<<16)|(sptr[2]);
- dptr++;
- sptr+=3;
+ for (i = 0; i < w; i++, sptr += 3) {
+ dptr[i] = (sptr[2] << 16) | (sptr[1] << 8) | sptr[0];
}
}
@@ -2927,17 +2922,17 @@ RADEONPutImage(
switch(id) {
case FOURCC_RGB24:
- dstPitch=(width*4+0x0f)&(~0x0f);
- srcPitch=width*3;
+ dstPitch = width * 4;
+ srcPitch = width * 3;
break;
case FOURCC_RGBA32:
- dstPitch=(width*4+0x0f)&(~0x0f);
- srcPitch=width*4;
+ dstPitch = width * 4;
+ srcPitch = width * 4;
break;
case FOURCC_RGB16:
case FOURCC_RGBT16:
- dstPitch=(width*2+0x0f)&(~0x0f);
- srcPitch=(width*2+3)&(~0x03);
+ dstPitch = width * 2;
+ srcPitch = (width * 2 + 3) & ~3;
break;
case FOURCC_YV12:
case FOURCC_I420:
@@ -2950,11 +2945,20 @@ RADEONPutImage(
case FOURCC_UYVY:
case FOURCC_YUY2:
default:
- dstPitch = ((width << 1) + 63) & ~63;
- srcPitch = (width << 1);
+ dstPitch = width * 2;
+ srcPitch = width * 2;
break;
}
+#ifdef XF86DRI
+ if (info->directRenderingEnabled && info->DMAForXv) {
+ /* The upload blit only supports multiples of 64 bytes */
+ dstPitch = (dstPitch + 63) & ~63;
+ } else
+#endif
+ /* The overlay only supports multiples of 16 bytes */
+ dstPitch = (dstPitch + 15) & ~15;
+
new_size = dstPitch * height;
if (id == FOURCC_YV12 || id == FOURCC_I420) {
new_size += (dstPitch >> 1) * ((height + 1) & ~1);
generated by cgit v1.2.3 (git 2.25.1) at 2025-07-24 19:57:57 +0000