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| author | Thomas Hilber <sparkie@lowbyte.de> | 2008-08-11 08:00:00 +0000 |
|---|---|---|
| committer | Paul Menzel <paulepanter@users.sourceforge.net> | 2009-06-06 13:49:27 +0200 |
| commit | 4d3a9ea7070578aa14b6cd16ab714018a56a73e4 (patch) | |
| tree | d891695567584720182275dc39d6f1e44b2ec3a0 | |
| parent | 8cdd8d457213440325006316a7a39f640337b39a (diff) | |
| download | xf86-video-ati-frc-4d3a9ea7070578aa14b6cd16ab714018a56a73e4.tar.gz xf86-video-ati-frc-4d3a9ea7070578aa14b6cd16ab714018a56a73e4.tar.bz2 | |
Increased precision to determine position of 'trim' scanline.
Signed-off-by: Thomas Hilber <sparkie@lowbyte.de>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
| -rw-r--r-- | src/radeon_video.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/radeon_video.c b/src/radeon_video.c index c72e131..677fddb 100644 --- a/src/radeon_video.c +++ b/src/radeon_video.c @@ -2962,8 +2962,8 @@ RADEONDisplayVideo( * this delimits 'maximum voltage' being fed into our software PLL. */ #define VBL_MAX_TRIM_ABS 37 -#define VBL_MIN_TRIM_ABS 27 -#define VBL_RSYNC_FPOLAR 80 +#define VBL_MIN_TRIM_ABS 37 +#define VBL_RSYNC_FPOLAR 140 /* * field polarity correction is clearly a task of the calling layer |