Age | Commit message (Collapse) | Author |
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Signed-off-by: Thomas Hilber <sparkie@lowbyte.de>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
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Signed-off-by: Thomas Hilber <sparkie@lowbyte.de>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
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- made 'git clone git://anongit.freedesktop.org/git/mesa/drm' obsolete
- introduced new xorg.conf options for both intel and radeon FRC patches
- FRC (aka sync_fields) switch (default on)
- process priority (default 0)
- FRC debug output (default off)
- fixed a driver bug in radeon DRM with possible cause of crash
- removed code looking for lost VBLANK interrupt in radeon DRM. This issue
has been fixed by standard lenny kernel.
Signed-off-by: Thomas Hilber <sparkie@lowbyte.de>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
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Signed-off-by: Thomas Hilber <sparkie@lowbyte.de>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
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Signed-off-by: Thomas Hilber <sparkie@lowbyte.de>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
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- implemented a workaround for sporadically lost interrupts on
Radeon type hardware
Signed-off-by: Thomas Hilber <sparkie@lowbyte.de>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
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- fixed a bug that erroneously could trigger recovery actions as if
stray updates would have been occurred
- since 40ms enhancement (see below) issues with DVB budget cards
are considered as fixed. You now also can watch live-TV with the
patch. But the time to switch a channel still should be optimized.
It sometimes takes too long for the Soft-PLL to lock.
Signed-off-by: Thomas Hilber <sparkie@lowbyte.de>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
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- frame rate now adapted every 1/25 second instead of only once per
second as before. This should make rate adaptions invisible even
if they change by large values
- implemented a simple graphic which should give you a better
overview of how regularly frame updates are issued from your decoder.
And how the Soft-PLL copes with these updates
- automatic sync of initial field polarity now has been removed. It's
now part of 40ms double buffer update improvement (see vers. 0.0.4)
- simplified/changed interface to DRM-module
Signed-off-by: Thomas Hilber <sparkie@lowbyte.de>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
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- now widened time window for double buffer updates from 20ms to 40ms.
This is done via drm-ioctl() since the chip doesn't provide
a native interface for this.
- this greatly reduces Soft-PLLs sensitivity to any timing interference
- thus we now even can fully enable live-viewing with DVB drivers and
a budget card. Though DVB driver timing problems are not yet solved.
- changed interface to DRM-module
Signed-off-by: Thomas Hilber <sparkie@lowbyte.de>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
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Signed-off-by: Thomas Hilber <sparkie@lowbyte.de>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
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Signed-off-by: Thomas Hilber <sparkie@lowbyte.de>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
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- reworked everything from scratch
- first approach to implement a PLL in software to lock VGA frame rate
to an external signal source (e.g. DVB stream frame rate)
- fixed scaler bug in RADEONDisplayVideo() (Thanks to Roland Scheidegger)
- found a way how to detect initial field parity on RADEON cards
- added patches from various sources to fix bugs in current
CVS xf86-video-ati (Thanks to Andy Burns)
- successfully tested on various mainboards and ATI RADEON type graphics car
including RV100/Radeon 7000 and Asus Pundit ID-3 (RS300/Radeon 9100 IGP)
Signed-off-by: Thomas Hilber <sparkie@lowbyte.de>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
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128 MB."
This reverts commit 96ff37226ef6f06a05535f3a6f73a4c104f4024d.
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Always set the overlay base address such that the buffer offsets are as small
as possible. This could still break in theory if the buffers were more than
128 MB apart, but in reality this can't happen ATM because we always allocate
a single memory area for all buffers.
Fixes http://bugs.freedesktop.org/show_bug.cgi?id=16845 .
(cherry picked from commit a55e85f742d1334bf88e4681e553f025d2de38df)
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More pending. See bug 16001
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RS400 (intel based IGP) and RS480 (AMD based IGP) have different
MC setups and need to be handled differently
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As has been done with xf86-video-intel, replace all CARD* datatypes with
uint*_t datatypes available from stdint.h.
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The MMIO paths eventually lead to a hang on r5xx/IGP. I haven't
been able to find out why yet.
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The YUV->RGB conversion in the texture engine is broken
on RV250 so the colors come out wrong.
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RS6xx paths seem to work fine on RS4xx
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http://bugs.freedesktop.org/show_bug.cgi?id=14668
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Still need to sort out the VAP and PVS stuff
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Based on the kdrive ati video code by Eric Anholt.
R3xx/R4xx still have some clipping issues in certain situations
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Here's a patch to bring back the code for converting planar yuv to packed yuv,
if a RS400 family chip is used (though I've no idea if they really all fail
with planar yuv).
fixes bug 12744
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compile-tested only
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Conflicts:
src/radeon_display.c
src/radeon_driver.c
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use xf86_crtc_clip_video_helper() from the server if available.
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* Make sure pitch constraints are always met for DMA upload blits.
* RGB24 is not affected by endianness.
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See https://bugs.freedesktop.org/show_bug.cgi?id=13274 .
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Surprisingly easy, thanks to George's pci-rework changes.
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This reverts commit 9109e62e3be7f96b41b534ab517fdf1baf458806.
This breaks ABI. better fix to come.
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Should fix bug 12175
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For printf vs. CARD32, use %u or %x and and a cast to unsigned.
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(cherry picked from commit 8e3a6f83016cd8c4cfd43ceee4cbf0a8dc018b2a)
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- Basically just copied from the intel driver. I'm planning to push
this to the server soon, but add it now to get things working
and to provide compat for older servers.
- Overlay crtc source control attribute now called XV_CRTC
The old attribute XV_SWITCHCRT has been removed. If anyone cares,
we can add it back as an alias to XV_CRTC
XV_CRTC: -1 auto, 0 crtc0, 1 crtc1
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reported by Stefan Buehler
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