summaryrefslogtreecommitdiff
path: root/src
AgeCommit message (Collapse)Author
2008-03-30r500/r600: fix rotation to fill screenDave Airlie
I'm not 100% sure this is the correct fix (maybe we shouldn't be using scrn virtualX/Y)... this will fix it for now until I get more time.
2008-03-28Include config.h, so FGL_LINUX can actually be defined when it's tested...Michel Dänzer
2008-03-27RADEON: fix lid issues on AVIVO chips for real this time :)Alex Deucher
2008-03-27Revert "RADEON: attempt to fix lid issues"Alex Deucher
This reverts commit 9b4473c1d830b88866dd22e8174a07195bd6fcf4. This doesn't help.
2008-03-27radeon: size bios to max of bar vs 64k.Dave Airlie
reported by dwmw2: rhbz 438299
2008-03-26AVIVO: no need to call PreinitXv() on AVIVO chips as they have no overlayAlex Deucher
2008-03-26XAA: update message about render so as to not confuse usersAlex Deucher
2008-03-26RADEON: attempt to fix lid issuesAlex Deucher
On some laptops the bios attempts to re-program the chip when a lid event comes in. This should hopefully prevent the bios from doing that.
2008-03-25RV250: disable textured video due to HW bugAlex Deucher
The YUV->RGB conversion in the texture engine is broken on RV250 so the colors come out wrong.
2008-03-24R3xx/R5xx: flush PVS state before enabling pvs-bypassAlex Deucher
2008-03-24R3xx/R5xx: move more VAP, etc. state setup into common init3d() functionAlex Deucher
Also some minor code cleanups
2008-03-24R3xx/R5xx: use non VAP/TCP for textured videoAlex Deucher
Just extra state to emit.
2008-03-24r300: don't bother with VAP/TCL for render.Dave Airlie
We just send more data to the card to process per transaction, without getting any actual gains, as we already pre-compute the vertices without needing any clipping or transforms from the card. Perhaps some stuff could be done on-card, but so far the code is a lot faster if we avoid sending this extra info. pre: 150000 glyphs/sec post: 185000 glyphs/sec
2008-03-23RS4xx: Revert back to previous fifo settings for nowAlex Deucher
Setup of these registers needs more investigation.
2008-03-22RS4xx: more work on disp/disp2 fifo setupAlex Deucher
2008-03-22RS4xx: missed this on the last commit.Alex Deucher
2008-03-21RS4xx: attempt to set up disp/disp2 fifos correctlyAlex Deucher
If you have an XPRESS chip, please test!!!
2008-03-21RS4xx: attempt to fix TMDS/DVO supportAlex Deucher
XPRESS chips added a second set of FP control registers. I don't have the hw to test however.
2008-03-20Merge branch 'master' of ↵Brice Goglin
git://git.freedesktop.org/git/xorg/driver/xf86-video-ati into debian-experimental
2008-03-19Disable the setting of HARDWARE_CURSOR_BIT_ORDER_MSBFIRSTAlex Deucher
See bug 11796
2008-03-19Enable BSR in Log2 functionsMatt Turner
This patch edits RADEONLog2 and ATILog2 to use the x86 BSR instruction instead of looping through bits. It should provide a somewhat of a speed increase in this function on x86 and AMD64 architectures. Note: the BSR instruction was added with the 80386 CPU and is therefore not compatible with earlier CPUs, though I highly doubt it's even possible to use a 286 in conjunction with a Radeon. The inline assembly also works with Intel's compiler (icc).
2008-03-19[PATCH] Compile warning fixes.Paulo Cesar Pereira de Andrade
Minor changes to avoid declarations mixed with code. Ansified functions with empty prototype to specify they don't receive arguments. Added some prototypes to radeon.h, and major reorder on radeon.h adding prototypes in alphabetical order and specifying to file that defines it.
2008-03-19Merge branch 'master' of ↵Alex Deucher
ssh://agd5f@git.freedesktop.org/git/xorg/driver/xf86-video-ati into r3xx-render
2008-03-19R3xx/R5xx: Make sure to clamp the output of the FSAlex Deucher
2008-03-19R5xx: bump textured video limits to 4096Alex Deucher
2008-03-19RADEON: add new macros to distinguish between R3xx and R5xx 3DAlex Deucher
2008-03-19RADEON: fixed textured video with XAA and tilingAlex Deucher
2008-03-19RV515: fix textured video and EXA CompositeAlex Deucher
There seems to be an issue with the PVS setup on RV515, but bypassing it seems to work fine.
2008-03-19r500: make it work from startup.Dave Airlie
I'm not sure why this worked or what is going wrong here, really the VAP internal architecture escapes me :)
2008-03-18R3xx/R5xx: remove extra return after last commitAlex Deucher
2008-03-18R3xx/R5xx: switch an ErrorF() to RADEONFALLBACK()Alex Deucher
2008-03-18R3xx: we only use 2 temps, not 3Alex Deucher
2008-03-18R3xx/R5xx: fix up a8-src-something_with_colorsTilman Sauerbeck
2008-03-18R3xx/R5xx: remove some cruftAlex Deucher
2008-03-18R5xx: fix typ in r5xx render accelDave Airlie
This gets render working on r5xx
2008-03-18R5xx: first pass at render support (untested)Alex Deucher
2008-03-18R5xx: bump tex/dst limits to 4096Alex Deucher
2008-03-17R3xx/R5xx: whitespace cleanup and cruft removalAlex Deucher
2008-03-17R3xx: get masks working and cleanupAlex Deucher
RS offset was wrong for mask texture
2008-03-17R3xx: minor adjustmentsAlex Deucher
2008-03-17RADEON: Revert to old behavior when resetting the memmap on VT switchAlban Browaeys
Not sure why this needs to be done twice. Should fix bug 14980 Probably needs more investigation.
2008-03-17R3xx: some progressAlex Deucher
2008-03-17R3xx: fix errant wAlex Deucher
2008-03-17RADEON: fix typo in RADEONAdjustMemMapRegisters()Alex Deucher
2008-03-17RADEON: make sure var is initialized properly in RADEONAdjustMemMapRegisters()Alex Deucher
2008-03-16radeon: the 0x5974 appears to be a mobility chip...Dave Airlie
After debugging with partymola on #radeon, adding this allowed his Dell Vostro 1000 to work properly
2008-03-14R3xx: odds and ends...Alex Deucher
still not working. - swizzle US output for BGR formats - no need to write to temps in ALU ops, write to output only - flush the PVS before updating
2008-03-14R3xx: theoretical support for component alphaAlex Deucher
masks are still broken so...
2008-03-14R3xx: VS WIPAlex Deucher
2008-03-14R3xx/R5xx: enable VS for mask textureAlex Deucher
generated by cgit v1.2.3 (git 2.25.1) at 2025-07-29 16:03:36 +0000