sync with vidix cvs

CVS patchset: 5755
CVS date: 2003/11/16 17:18:09

8 files changed, 405 insertions, 250 deletions

diff --git a/src/video_out/vidix/drivers/mach64_vid.c b/src/video_out/vidix/drivers/mach64_vid.c
index 746af5865..0f965234f 100644
--- a/src/video_out/vidix/drivers/mach64_vid.c
+++ b/src/video_out/vidix/drivers/mach64_vid.c
@@ -523,6 +523,7 @@ typedef struct saved_regs_s
     uint32_t overlay_graphics_key_clr;
     uint32_t overlay_graphics_key_msk;
     uint32_t overlay_key_cntl;
+    uint32_t bus_cntl;
 }saved_regs_t;
 static saved_regs_t savreg;
 
@@ -534,6 +535,7 @@ static void save_regs( void )
     savreg.overlay_graphics_key_clr	= INREG(OVERLAY_GRAPHICS_KEY_CLR);
     savreg.overlay_graphics_key_msk	= INREG(OVERLAY_GRAPHICS_KEY_MSK);
     savreg.overlay_key_cntl		= INREG(OVERLAY_KEY_CNTL);
+    savreg.bus_cntl			= INREG(BUS_CNTL);
 }
 
 static void restore_regs( void )
@@ -544,15 +546,16 @@ static void restore_regs( void )
     OUTREG(OVERLAY_GRAPHICS_KEY_CLR,savreg.overlay_graphics_key_clr);
     OUTREG(OVERLAY_GRAPHICS_KEY_MSK,savreg.overlay_graphics_key_msk);
     OUTREG(OVERLAY_KEY_CNTL,savreg.overlay_key_cntl);
+    OUTREG(BUS_CNTL,savreg.bus_cntl|BUS_MASTER_DIS);
 }
 
-static int forced_irq=UINT_MAX;
+static int forced_irq=INT_MAX;
 static int can_use_irq=0;
 static int irq_installed=0;
 static void init_irq(void)
 {
 	irq_installed=1;
-	if(forced_irq != UINT_MAX) pci_info.irq=forced_irq;
+	if(forced_irq != INT_MAX) pci_info.irq=forced_irq;
 	if(hwirq_install(pci_info.bus,pci_info.card,pci_info.func,
 			 2,CRTC_INT_CNTL,CRTC_BUSMASTER_EOL_INT) == 0)
 	{
@@ -976,6 +979,8 @@ for(i=0; i<32; i++){
 	  tmp = config->offset.u;
 	  config->offset.u = config->offset.v;
 	  config->offset.v = tmp;
+	  src_offset_u=config->offset.u;
+	  src_offset_v=config->offset.v;
 	}
     }
     else if(besr.fourcc == IMGFMT_YVU9)
@@ -1326,7 +1331,7 @@ static int mach64_transfer_frame( unsigned long ba_dma_desc,int sync_mode )
 {
     uint32_t crtc_int;
     mach64_wait_for_idle();
-    mach64_fifo_wait(10);
+    mach64_fifo_wait(4);
     OUTREG(BUS_CNTL,(INREG(BUS_CNTL)|BUS_EXT_REG_EN)&(~BUS_MASTER_DIS));
     crtc_int = INREG(CRTC_INT_CNTL);
     if(sync_mode && can_use_irq) OUTREG(CRTC_INT_CNTL,crtc_int|CRTC_BUSMASTER_EOL_INT|CRTC_BUSMASTER_EOL_INT_EN);
@@ -1351,6 +1356,8 @@ int VIDIX_NAME(vixQueryDMAStatus)( void )
 {
     int bm_off;
     unsigned crtc_int_cntl;
+    mach64_wait_for_idle();
+    mach64_fifo_wait(2);
     crtc_int_cntl = INREG(CRTC_INT_CNTL);
     bm_off = crtc_int_cntl & CRTC_BUSMASTER_EOL_INT;
 //    if(bm_off) OUTREG(CRTC_INT_CNTL,crtc_int_cntl | CRTC_BUSMASTER_EOL_INT);
diff --git a/src/video_out/vidix/drivers/mga_vid.c b/src/video_out/vidix/drivers/mga_vid.c
index 43eab455a..6e28ae4ce 100644
--- a/src/video_out/vidix/drivers/mga_vid.c
+++ b/src/video_out/vidix/drivers/mga_vid.c
@@ -1361,7 +1361,7 @@ int VIDIX_NAME(vixInit)(const char *args)
 	}
     }
 
-    if (mga_verbose > 1) printf(MGA_MSG" hardware addresses: mmio: 0x%x, framebuffer: 0x%x\n",
+    if (mga_verbose > 1) printf(MGA_MSG" hardware addresses: mmio: 0x%lx, framebuffer: 0x%lx\n",
 				pci_info.base1, pci_info.base0);
 
     mga_mmio_base = map_phys_mem(pci_info.base1,0x4000);
diff --git a/src/video_out/vidix/drivers/pm3_vid.c b/src/video_out/vidix/drivers/pm3_vid.c
index 20b35a14a..375e28b9c 100644
--- a/src/video_out/vidix/drivers/pm3_vid.c
+++ b/src/video_out/vidix/drivers/pm3_vid.c
@@ -1,7 +1,7 @@
 /**
     Driver for 3DLabs GLINT R3 and Permedia3 chips.
 
-    Copyright (C) 2002  Måns Rullgård
+    Copyright (C) 2002, 2003  Måns Rullgård
 
     This program is free software; you can redistribute it and/or modify
     it under the terms of the GNU General Public License as published by
@@ -58,6 +58,8 @@ static int pm3_vidmem = PM3_VIDMEM;
 static int pm3_blank = 0;
 static int pm3_dma = 0;
 
+static int pm3_ckey_red, pm3_ckey_green, pm3_ckey_blue;
+
 static u_int page_size;
 
 static vidix_capability_t pm3_cap =
@@ -145,43 +147,57 @@ int VIDIX_NAME(vixProbe)(int verbose, int force)
 
 int VIDIX_NAME(vixInit)(const char *args)
 {
-    char *ac = strdup(args), *s, *opt;
+    if(args != NULL){
+	char *ac = strdup(args), *s, *opt;
 
-    opt = strtok_r(ac, ",", &s);
-    while(opt){
-	char *a = strchr(opt, '=');
+	opt = strtok_r(ac, ",", &s);
+	while(opt){
+	    char *a = strchr(opt, '=');
 
-	if(a)
-	    *a++ = 0;
-	if(!strcmp(opt, "mem")){
 	    if(a)
-		pm3_vidmem = strtol(a, NULL, 0);
-	} else if(!strcmp(opt, "blank")){
-	    pm3_blank = a? strtol(a, NULL, 0): 1;
+		*a++ = 0;
+	    if(!strcmp(opt, "mem")){
+		if(a)
+		    pm3_vidmem = strtol(a, NULL, 0);
+	    } else if(!strcmp(opt, "blank")){
+		pm3_blank = a? strtol(a, NULL, 0): 1;
+	    }
+
+	    opt = strtok_r(NULL, ",", &s);
 	}
 
-	opt = strtok_r(NULL, ",", &s);
+	free(ac);
     }
 
-    free(ac);
-
     pm3_reg_base = map_phys_mem(pci_info.base0, 0x20000);
     pm3_mem = map_phys_mem(pci_info.base1, 0x2000000);
 
     if(bm_open() == 0){
-	printf(PM3_MSG" Using DMA.\n");
-	pm3_cap.flags |= FLAG_DMA;
+	fprintf(stderr, PM3_MSG" DMA available.\n");
+	pm3_cap.flags |= FLAG_DMA | FLAG_SYNC_DMA;
 	page_size = sysconf(_SC_PAGESIZE);
 	hwirq_install(pci_info.bus, pci_info.card, pci_info.func,
 		      0, PM3IntFlags, -1);
+	WRITE_REG(PM3IntEnable, (1 << 7));
 	pm3_dma = 1;
     }
 
+    RAMDAC_GET_REG(PM3RD_VideoOverlayKeyR, pm3_ckey_red);
+    RAMDAC_GET_REG(PM3RD_VideoOverlayKeyG, pm3_ckey_green);
+    RAMDAC_GET_REG(PM3RD_VideoOverlayKeyB, pm3_ckey_blue);
+
     return 0;
 }
 
 void VIDIX_NAME(vixDestroy)(void)
 {
+    if(pm3_dma)
+	WRITE_REG(PM3IntEnable, 0);
+
+    RAMDAC_SET_REG(PM3RD_VideoOverlayKeyR, pm3_ckey_red);
+    RAMDAC_SET_REG(PM3RD_VideoOverlayKeyG, pm3_ckey_green);
+    RAMDAC_SET_REG(PM3RD_VideoOverlayKeyB, pm3_ckey_blue);
+
     unmap_phys_mem(pm3_reg_base, 0x20000);
     unmap_phys_mem(pm3_mem, 0x2000000);
     hwirq_uninstall(pci_info.bus, pci_info.card, pci_info.func);
@@ -222,7 +238,8 @@ int VIDIX_NAME(vixQueryFourcc)(vidix_fourcc_t *to)
 }
 
 static int frames[VID_PLAY_MAXFRAMES], vid_base;
-static long overlay_mode, overlay_control, video_control, int_enable;
+static int overlay_mode, overlay_control, video_control, int_enable;
+static int rdoverlay_mode;
 static int src_w, drw_w;
 static int src_h, drw_h;
 static int drw_x, drw_y;
@@ -289,6 +306,7 @@ pm3_setup_overlay(vidix_playback_t *info)
 
     compute_scale_factor(&sw, &drw_w, &shrink, &zoom);
 
+    WAIT_FIFO(9);
     WRITE_REG(PM3VideoOverlayBase0, vid_base >> 1);
     WRITE_REG(PM3VideoOverlayStride, PM3VideoOverlayStride_STRIDE(src_w));
     WRITE_REG(PM3VideoOverlayWidth, PM3VideoOverlayWidth_WIDTH(sw));
@@ -326,10 +344,6 @@ pm3_setup_overlay(vidix_playback_t *info)
     RAMDAC_SET_REG(PM3RD_VideoOverlayYEndHigh,
 		   ((drw_y+drw_h) & 0xf00)>>8);
 
-    RAMDAC_SET_REG(PM3RD_VideoOverlayKeyR, 0xff);
-    RAMDAC_SET_REG(PM3RD_VideoOverlayKeyG, 0x00);
-    RAMDAC_SET_REG(PM3RD_VideoOverlayKeyB, 0xff);
-
     overlay_mode =
 	1 << 5 |
 	format |
@@ -339,11 +353,37 @@ pm3_setup_overlay(vidix_playback_t *info)
 
     overlay_control = 
 	PM3RD_VideoOverlayControl_KEY_COLOR |
-	PM3RD_VideoOverlayControl_MODE_ALWAYS |
 	PM3RD_VideoOverlayControl_DIRECTCOLOR_ENABLED;
 }
 
-int VIDIX_NAME(vixConfigPlayback)(vidix_playback_t *info)
+extern int
+VIDIX_NAME(vixSetGrKeys)(const vidix_grkey_t *key)
+{
+    if(key->ckey.op == CKEY_TRUE){
+	RAMDAC_SET_REG(PM3RD_VideoOverlayKeyR, key->ckey.red);
+	RAMDAC_SET_REG(PM3RD_VideoOverlayKeyG, key->ckey.green);
+	RAMDAC_SET_REG(PM3RD_VideoOverlayKeyB, key->ckey.blue);
+	rdoverlay_mode = PM3RD_VideoOverlayControl_MODE_MAINKEY;
+    } else {
+	rdoverlay_mode = PM3RD_VideoOverlayControl_MODE_ALWAYS;
+    }
+    RAMDAC_SET_REG(PM3RD_VideoOverlayControl,
+		   overlay_control | rdoverlay_mode);
+
+    return 0;
+}
+
+extern int
+VIDIX_NAME(vixGetGrKeys)(vidix_grkey_t *key)
+{
+    RAMDAC_GET_REG(PM3RD_VideoOverlayKeyR, key->ckey.red);
+    RAMDAC_GET_REG(PM3RD_VideoOverlayKeyG, key->ckey.green);
+    RAMDAC_GET_REG(PM3RD_VideoOverlayKeyB, key->ckey.blue);
+    return 0;
+}
+
+extern int
+VIDIX_NAME(vixConfigPlayback)(vidix_playback_t *info)
 {
     unsigned int i;
     u_int frame_size;
@@ -403,10 +443,10 @@ int VIDIX_NAME(vixPlaybackOn)(void)
 
     WRITE_REG(PM3VideoOverlayMode,
 	      overlay_mode | PM3VideoOverlayMode_ENABLE);
+    overlay_control |= PM3RD_VideoOverlayControl_ENABLE;
     RAMDAC_SET_REG(PM3RD_VideoOverlayControl,
-		   overlay_control | PM3RD_VideoOverlayControl_ENABLE);
-    WRITE_REG(PM3VideoOverlayUpdate,
-	      PM3VideoOverlayUpdate_ENABLE);
+		   overlay_control | rdoverlay_mode);
+    WRITE_REG(PM3VideoOverlayUpdate, PM3VideoOverlayUpdate_ENABLE);
 
     if(pm3_blank)
 	WRITE_REG(PM3VideoControl,
@@ -418,20 +458,15 @@ int VIDIX_NAME(vixPlaybackOn)(void)
 
 int VIDIX_NAME(vixPlaybackOff)(void)
 {
+    overlay_control &= ~PM3RD_VideoOverlayControl_ENABLE;
     RAMDAC_SET_REG(PM3RD_VideoOverlayControl,
 		   PM3RD_VideoOverlayControl_DISABLE);
     WRITE_REG(PM3VideoOverlayMode,
 	      PM3VideoOverlayMode_DISABLE);
 
-    RAMDAC_SET_REG(PM3RD_VideoOverlayKeyR, 0x01);
-    RAMDAC_SET_REG(PM3RD_VideoOverlayKeyG, 0x01);
-    RAMDAC_SET_REG(PM3RD_VideoOverlayKeyB, 0xfe);
-
     if(video_control)
-	WRITE_REG(PM3VideoControl, video_control);
-
-    if(pm3_dma)
-	WRITE_REG(PM3IntEnable, 0);
+	WRITE_REG(PM3VideoControl,
+		  video_control & ~PM3VideoControl_DISPLAY_ENABLE);
 
     return 0;
 }
@@ -457,11 +492,10 @@ struct pm3_bydma_frame {
 };
 
 static struct pm3_bydma_frame *
-pm3_setup_bydma(vidix_dma_t *dma)
+pm3_setup_bydma(vidix_dma_t *dma, struct pm3_bydma_frame *bdf)
 {
     u_int size = dma->size;
     u_int pages = (size + page_size-1) / page_size;
-    struct pm3_bydma_frame *bdf;
     long baddr[pages];
     u_int i;
     uint32_t dest;
@@ -469,8 +503,13 @@ pm3_setup_bydma(vidix_dma_t *dma)
     if(bm_virt_to_bus(dma->src, dma->size, baddr))
 	return NULL;
 
-    bdf = malloc(sizeof(*bdf));
-    bdf->cmds = valloc(pages * sizeof(struct pm3_bydma_cmd));
+    if(!bdf){
+	bdf = malloc(sizeof(*bdf));
+	bdf->cmds = valloc(pages * sizeof(struct pm3_bydma_cmd));
+	if(dma->flags & BM_DMA_FIXED_BUFFS){
+	    mlock(bdf->cmds, page_size);
+	}
+    }
 
     dest = vid_base + dma->dest_offset;
     for(i = 0; i < pages; i++, dest += page_size, size -= page_size){
@@ -496,27 +535,19 @@ VIDIX_NAME(vixPlaybackCopyFrame)(vidix_dma_t *dma)
 {
     u_int frame = dma->idx;
     struct pm3_bydma_frame *bdf;
+    static int s = 0;
 
-    if(dma->internal[frame]){
-	bdf = dma->internal[frame];
-    } else {
-	if(!(bdf = pm3_setup_bydma(dma))){
-	    return -1;
-	} else if(dma->flags & BM_DMA_FIXED_BUFFS){
-	    if(mlock(bdf->cmds, page_size) == 0){
-		dma->internal[frame] = bdf;
-	    } else {
-		printf(PM3_MSG" Can't lock page @ %p\n", bdf->cmds);
-	    }
-	}
-    }
+    bdf = dma->internal[frame];
+    if(!bdf || !(dma->flags & BM_DMA_FIXED_BUFFS))
+	bdf = pm3_setup_bydma(dma, bdf);
+    if(!bdf)
+	return -1;
+
+    if(!dma->internal[frame])
+	dma->internal[frame] = bdf;
 
     if(dma->flags & BM_DMA_SYNC){
-	WRITE_REG(PM3IntEnable, (1 << 7));
-	while(READ_REG(PM3ByDMAReadMode) & PM3ByDMAReadMode_Active){
-	    hwirq_wait(pci_info.irq);
-	}
-	WRITE_REG(PM3IntEnable, 0);
+	hwirq_wait(pci_info.irq);
     }
 
     WAIT_FIFO(3);
@@ -530,6 +561,10 @@ VIDIX_NAME(vixPlaybackCopyFrame)(vidix_dma_t *dma)
 	      PM3ByDMAReadMode_Burst(7) |
 	      PM3ByDMAReadMode_Align);
 
+    if(dma->flags & BM_DMA_BLOCK){
+	hwirq_wait(pci_info.irq);
+    }
+
     return 0;
 }
 
diff --git a/src/video_out/vidix/drivers/radeon_vid.c b/src/video_out/vidix/drivers/radeon_vid.c
index 528f513e2..d53e1acf7 100644
--- a/src/video_out/vidix/drivers/radeon_vid.c
+++ b/src/video_out/vidix/drivers/radeon_vid.c
@@ -26,7 +26,7 @@
 #define X_ADJUST 0
 #else
 #define RADEON_MSG "radeon_vid:"
-#define X_ADJUST (is_shift_required ? 8 : 0)
+#define X_ADJUST (((besr.chip_flags&R_OVL_SHIFT)==R_OVL_SHIFT)?8:0)
 #ifndef RADEON
 #define RADEON
 #endif
@@ -60,9 +60,6 @@ typedef struct
 
 #define VERBOSE_LEVEL 0
 static int __verbose = 0;
-#ifndef RAGE128
-static int is_shift_required=0;
-#endif
 typedef struct bes_registers_s
 {
   /* base address of yuv framebuffer */
@@ -117,7 +114,7 @@ typedef struct bes_registers_s
   
   int deinterlace_on;
   uint32_t deinterlace_pattern;
-  
+  unsigned chip_flags;
 } bes_registers_t;
 
 typedef struct video_registers_s
@@ -128,9 +125,6 @@ typedef struct video_registers_s
 }video_registers_t;
 
 static bes_registers_t besr;
-#ifndef RAGE128
-static int RadeonFamily=100;
-#endif
 #define DECLARE_VREG(name) { #name, name, 0 }
 static video_registers_t vregs[] = 
 {
@@ -263,6 +257,163 @@ static video_registers_t vregs[] =
 #endif
 };
 
+#define R_FAMILY	0x000000FF
+#define R_100		0x00000001
+#define R_120		0x00000002
+#define R_150		0x00000003
+#define R_200		0x00000004
+#define R_250		0x00000005
+#define R_280		0x00000006
+#define R_300		0x00000007
+#define R_350		0x00000008
+#define R_OVL_SHIFT	0x00000100
+#define R_INTEGRATED	0x00000200
+
+typedef struct ati_card_ids_s
+{
+    unsigned short id;
+    unsigned flags;
+}ati_card_ids_t;
+
+static const ati_card_ids_t ati_card_ids[] = 
+{
+#ifdef RAGE128
+ /*
+    This driver should be compatible with Rage128 (pro) chips.
+    (include adaptive deinterlacing!!!).
+    Moreover: the same logic can be used with Mach64 chips.
+    (I mean: mach64xx, 3d rage, 3d rage IIc, 3D rage pro, 3d rage mobility).
+    but they are incompatible by i/o ports. So if enthusiasts will want
+    then they can redefine OUTREG and INREG macros and redefine OV0_*
+    constants. Also it seems that mach64 chips supports only: YUY2, YV12, UYVY
+    fourccs (422 and 420 formats only).
+  */
+/* Rage128 Pro GL */
+ { DEVICE_ATI_RAGE_128_PA_PRO, 0 },
+ { DEVICE_ATI_RAGE_128_PB_PRO, 0 },
+ { DEVICE_ATI_RAGE_128_PC_PRO, 0 },
+ { DEVICE_ATI_RAGE_128_PD_PRO, 0 },
+ { DEVICE_ATI_RAGE_128_PE_PRO, 0 },
+ { DEVICE_ATI_RAGE_128_PF_PRO, 0 },
+/* Rage128 Pro VR */
+ { DEVICE_ATI_RAGE_128_PG_PRO, 0 },
+ { DEVICE_ATI_RAGE_128_PH_PRO, 0 },
+ { DEVICE_ATI_RAGE_128_PI_PRO, 0 },
+ { DEVICE_ATI_RAGE_128_PJ_PRO, 0 },
+ { DEVICE_ATI_RAGE_128_PK_PRO, 0 },
+ { DEVICE_ATI_RAGE_128_PL_PRO, 0 },
+ { DEVICE_ATI_RAGE_128_PM_PRO, 0 },
+ { DEVICE_ATI_RAGE_128_PN_PRO, 0 },
+ { DEVICE_ATI_RAGE_128_PO_PRO, 0 },
+ { DEVICE_ATI_RAGE_128_PP_PRO, 0 },
+ { DEVICE_ATI_RAGE_128_PQ_PRO, 0 },
+ { DEVICE_ATI_RAGE_128_PR_PRO, 0 },
+ { DEVICE_ATI_RAGE_128_PS_PRO, 0 },
+ { DEVICE_ATI_RAGE_128_PT_PRO, 0 },
+ { DEVICE_ATI_RAGE_128_PU_PRO, 0 },
+ { DEVICE_ATI_RAGE_128_PV_PRO, 0 },
+ { DEVICE_ATI_RAGE_128_PW_PRO, 0 },
+ { DEVICE_ATI_RAGE_128_PX_PRO, 0 },
+/* Rage128 GL */
+ { DEVICE_ATI_RAGE_128_RE_SG, 0 },
+ { DEVICE_ATI_RAGE_128_RF_SG, 0 },
+ { DEVICE_ATI_RAGE_128_RG, 0 },
+ { DEVICE_ATI_RAGE_128_RK_VR, 0 },
+ { DEVICE_ATI_RAGE_128_RL_VR, 0 },
+ { DEVICE_ATI_RAGE_128_SE_4X, 0 },
+ { DEVICE_ATI_RAGE_128_SF_4X, 0 },
+ { DEVICE_ATI_RAGE_128_SG_4X, 0 },
+ { DEVICE_ATI_RAGE_128_SH, 0 },
+ { DEVICE_ATI_RAGE_128_SK_4X, 0 },
+ { DEVICE_ATI_RAGE_128_SL_4X, 0 },
+ { DEVICE_ATI_RAGE_128_SM_4X, 0 },
+ { DEVICE_ATI_RAGE_128_4X, 0 },
+ { DEVICE_ATI_RAGE_128_PRO, 0 },
+ { DEVICE_ATI_RAGE_128_PRO2, 0 },
+ { DEVICE_ATI_RAGE_128_PRO3, 0 },
+/* these seem to be based on rage 128 instead of mach64 */
+ { DEVICE_ATI_RAGE_MOBILITY_M3, 0 },
+ { DEVICE_ATI_RAGE_MOBILITY_M32, 0 },
+#else
+/* Radeon1 (indeed: Rage 256 Pro ;) */
+ { DEVICE_ATI_RADEON_R100_QD,		R_100|R_OVL_SHIFT },
+ { DEVICE_ATI_RADEON_R100_QE,		R_100|R_OVL_SHIFT },
+ { DEVICE_ATI_RADEON_R100_QF,		R_100|R_OVL_SHIFT },
+ { DEVICE_ATI_RADEON_R100_QG,		R_100|R_OVL_SHIFT },
+ { DEVICE_ATI_RADEON_RS100_IGP320,	R_150|R_OVL_SHIFT|R_INTEGRATED },
+ { DEVICE_ATI_RADEON_RS100_MOBILITY,	R_150|R_OVL_SHIFT|R_INTEGRATED },
+ { DEVICE_ATI_RADEON_VE_QY,		R_120|R_OVL_SHIFT },
+ { DEVICE_ATI_RADEON_VE_QZ,		R_120|R_OVL_SHIFT },
+ { DEVICE_ATI_RADEON_MOBILITY_M7,	R_150|R_OVL_SHIFT },
+ { DEVICE_ATI_RADEON_MOBILITY_M72,	R_150|R_OVL_SHIFT },
+ { DEVICE_ATI_RADEON_MOBILITY_M6,	R_120|R_OVL_SHIFT },
+ { DEVICE_ATI_RADEON_MOBILITY_M62,	R_120|R_OVL_SHIFT },
+/* Radeon2 (indeed: Rage 512 Pro ;) */
+ { DEVICE_ATI_RADEON_R200_BB,		R_200 },
+ { DEVICE_ATI_RADEON_R200_QH,		R_200 },
+ { DEVICE_ATI_RADEON_R200_QI,		R_200 },
+ { DEVICE_ATI_RADEON_R200_QJ,		R_200 },
+ { DEVICE_ATI_RADEON_R200_QK,		R_200 },
+ { DEVICE_ATI_RADEON_R200_QL,		R_200 },
+ { DEVICE_ATI_RADEON_R200_QM,		R_200 },
+ { DEVICE_ATI_RADEON_R200_QN,		R_200 },
+ { DEVICE_ATI_RADEON_R200_QO,		R_200 },
+ { DEVICE_ATI_RADEON_R200_QH2,		R_200 },
+ { DEVICE_ATI_RADEON_R200_QI2,		R_200 },
+ { DEVICE_ATI_RADEON_R200_QJ2,		R_200 },
+ { DEVICE_ATI_RADEON_R200_QK2,		R_200 },
+ { DEVICE_ATI_RADEON_R200_QL2,		R_200 },
+ { DEVICE_ATI_RADEON_RV200_QW,		R_150|R_OVL_SHIFT },
+ { DEVICE_ATI_RADEON_RV200_QX,		R_150|R_OVL_SHIFT },
+ { DEVICE_ATI_RADEON_RS200_IGP330_340_350,R_200|R_INTEGRATED },
+ { DEVICE_ATI_RADEON_RS200_MOBILITY,	R_200|R_INTEGRATED },
+ { DEVICE_ATI_RADEON_R250_IG,		R_250|R_OVL_SHIFT },
+ { DEVICE_ATI_RADEON_RS250_7000,	R_250|R_OVL_SHIFT|R_INTEGRATED },
+ { DEVICE_ATI_RADEON_RS250_MOBILITY,	R_250|R_OVL_SHIFT|R_INTEGRATED },
+ { DEVICE_ATI_RADEON_RV250_ID,		R_250|R_OVL_SHIFT },
+ { DEVICE_ATI_RADEON_RV250_IE,		R_250|R_OVL_SHIFT },
+ { DEVICE_ATI_RADEON_RV250_IF,		R_250|R_OVL_SHIFT },
+ { DEVICE_ATI_RADEON_RV250_IG,		R_250|R_OVL_SHIFT },
+ { DEVICE_ATI_RADEON_RV250_LD,		R_250|R_OVL_SHIFT },
+ { DEVICE_ATI_RADEON_RV250_LE,		R_250|R_OVL_SHIFT },
+ { DEVICE_ATI_RADEON_RV250_LF,		R_250|R_OVL_SHIFT },
+ { DEVICE_ATI_RADEON_RV250_LG,		R_250|R_OVL_SHIFT },
+ { DEVICE_ATI_RADEON_RV280_9200,	R_280 },
+ { DEVICE_ATI_RADEON_RV280_92002,	R_280 },
+ { DEVICE_ATI_RADEON_RV280_92003,	R_280 },
+ { DEVICE_ATI_RADEON_RV280_92004,	R_280 },
+ { DEVICE_ATI_RADEON_RV280_M9,		R_280 },
+ { DEVICE_ATI_RADEON_RV280_M92,		R_280 },
+ { DEVICE_ATI_RADEON_RV280_M93,		R_280 },
+ { DEVICE_ATI_RADEON_RV280_M94,		R_280 },
+/* Radeon3 (indeed: Rage 1024 Pro ;) */
+ { DEVICE_ATI_RADEON_R300,		R_300 },
+ { DEVICE_ATI_RADEON_R300_ND,		R_300 },
+ { DEVICE_ATI_RADEON_R300_NE,		R_300 },
+ { DEVICE_ATI_RADEON_R300_NF,		R_300 },
+ { DEVICE_ATI_RADEON_R300_NG,		R_300 },
+ { DEVICE_ATI_RADEON_RV300_9500,	R_300 },
+ { DEVICE_ATI_RADEON_RV300_95002,	R_300 },
+ { DEVICE_ATI_RADEON_RV300_95003,	R_300 },
+ { DEVICE_ATI_RADEON_RS300_9000,	R_300|R_INTEGRATED },
+ { DEVICE_ATI_RADEON_RS300_MOBILITY,	R_300|R_INTEGRATED },
+ { DEVICE_ATI_RADEON_RS300_5836,	R_300|R_INTEGRATED },
+ { DEVICE_ATI_RADEON_RS300_5837,	R_300|R_INTEGRATED },
+ { DEVICE_ATI_RADEON_R350,		R_350 },
+ { DEVICE_ATI_RADEON_R3502,		R_350 },
+ { DEVICE_ATI_RADEON_R3503,		R_350 },
+ { DEVICE_ATI_RADEON_R3504,		R_350 },
+ { DEVICE_ATI_RADEON_R350_NH,		R_350 },
+ { DEVICE_ATI_RADEON_R350_NI,		R_350 },
+ { DEVICE_ATI_RADEON_R350_NJ,		R_350 },
+ { DEVICE_ATI_RADEON_R350_NK,		R_350 },
+ { DEVICE_ATI_RADEON_RV350_9600,	R_350 },
+ { DEVICE_ATI_RADEON_RV350_9600PRO,	R_350 },
+ { DEVICE_ATI_RADEON_RV350_NP,		R_350 }
+#endif
+};
+
+
 static void * radeon_mmio_base = 0;
 static void * radeon_mem_base = 0; 
 static int32_t radeon_overlay_off = 0;
@@ -765,7 +916,9 @@ GAMMA_SETTINGS r100_def_gamma[6] =
 static void make_default_gamma_correction( void )
 {
     size_t i;
-    if(RadeonFamily == 100){
+    if((besr.chip_flags & R_100)==R_100||
+	(besr.chip_flags & R_120)==R_120||
+	(besr.chip_flags & R_150)==R_150){
 	OUTREG(OV0_LIN_TRANS_A, 0x12A00000);
 	OUTREG(OV0_LIN_TRANS_B, 0x199018FE);
 	OUTREG(OV0_LIN_TRANS_C, 0x12A0F9B0);
@@ -818,110 +971,13 @@ static void radeon_vid_make_default(void)
 
 unsigned VIDIX_NAME(vixGetVersion)( void ) { return VIDIX_VERSION; }
 
-static unsigned short ati_card_ids[] = 
-{
-#ifdef RAGE128
- /*
-    This driver should be compatible with Rage128 (pro) chips.
-    (include adaptive deinterlacing!!!).
-    Moreover: the same logic can be used with Mach64 chips.
-    (I mean: mach64xx, 3d rage, 3d rage IIc, 3D rage pro, 3d rage mobility).
-    but they are incompatible by i/o ports. So if enthusiasts will want
-    then they can redefine OUTREG and INREG macros and redefine OV0_*
-    constants. Also it seems that mach64 chips supports only: YUY2, YV12, UYVY
-    fourccs (422 and 420 formats only).
-  */
-/* Rage128 Pro GL */
- DEVICE_ATI_RAGE_128_PA_PRO,
- DEVICE_ATI_RAGE_128_PB_PRO,
- DEVICE_ATI_RAGE_128_PC_PRO,
- DEVICE_ATI_RAGE_128_PD_PRO,
- DEVICE_ATI_RAGE_128_PE_PRO,
- DEVICE_ATI_RAGE_128_PF_PRO,
-/* Rage128 Pro VR */
- DEVICE_ATI_RAGE_128_PG_PRO,
- DEVICE_ATI_RAGE_128_PH_PRO,
- DEVICE_ATI_RAGE_128_PI_PRO,
- DEVICE_ATI_RAGE_128_PJ_PRO,
- DEVICE_ATI_RAGE_128_PK_PRO,
- DEVICE_ATI_RAGE_128_PL_PRO,
- DEVICE_ATI_RAGE_128_PM_PRO,
- DEVICE_ATI_RAGE_128_PN_PRO,
- DEVICE_ATI_RAGE_128_PO_PRO,
- DEVICE_ATI_RAGE_128_PP_PRO,
- DEVICE_ATI_RAGE_128_PQ_PRO,
- DEVICE_ATI_RAGE_128_PR_PRO,
- DEVICE_ATI_RAGE_128_PS_PRO,
- DEVICE_ATI_RAGE_128_PT_PRO,
- DEVICE_ATI_RAGE_128_PU_PRO,
- DEVICE_ATI_RAGE_128_PV_PRO,
- DEVICE_ATI_RAGE_128_PW_PRO,
- DEVICE_ATI_RAGE_128_PX_PRO,
-/* Rage128 GL */
- DEVICE_ATI_RAGE_128_RE_SG,
- DEVICE_ATI_RAGE_128_RF_SG,
- DEVICE_ATI_RAGE_128_RG,
- DEVICE_ATI_RAGE_128_RK_VR,
- DEVICE_ATI_RAGE_128_RL_VR,
- DEVICE_ATI_RAGE_128_SE_4X,
- DEVICE_ATI_RAGE_128_SF_4X,
- DEVICE_ATI_RAGE_128_SG_4X,
- DEVICE_ATI_RAGE_128_SH,
- DEVICE_ATI_RAGE_128_SK_4X,
- DEVICE_ATI_RAGE_128_SL_4X,
- DEVICE_ATI_RAGE_128_SM_4X,
- DEVICE_ATI_RAGE_128_4X,
- DEVICE_ATI_RAGE_128_PRO,
- DEVICE_ATI_RAGE_128_PRO2,
- DEVICE_ATI_RAGE_128_PRO3,
-/* these seem to be based on rage 128 instead of mach64 */
- DEVICE_ATI_RAGE_MOBILITY_M3,
- DEVICE_ATI_RAGE_MOBILITY_M32
-#else
-/* Radeons (indeed: Rage 256 Pro ;) */
- DEVICE_ATI_RADEON_R100_QD,
- DEVICE_ATI_RADEON_R100_QE,
- DEVICE_ATI_RADEON_R100_QF,
- DEVICE_ATI_RADEON_R100_QG,
- DEVICE_ATI_RADEON_VE_QY,
- DEVICE_ATI_RADEON_VE_QZ,
- DEVICE_ATI_RADEON_MOBILITY_M7,
- DEVICE_ATI_RADEON_MOBILITY_M72,
- DEVICE_ATI_RADEON_MOBILITY_M6,
- DEVICE_ATI_RADEON_MOBILITY_M62,
- DEVICE_ATI_RADEON_R200_BB,
- DEVICE_ATI_RADEON_R200_QH,
- DEVICE_ATI_RADEON_R200_QI,
- DEVICE_ATI_RADEON_R200_QJ,
- DEVICE_ATI_RADEON_R200_QK,
- DEVICE_ATI_RADEON_R200_QL,
- DEVICE_ATI_RADEON_R200_QH2,
- DEVICE_ATI_RADEON_R200_QI2,
- DEVICE_ATI_RADEON_R200_QJ2,
- DEVICE_ATI_RADEON_R200_QK2,
- DEVICE_ATI_RADEON_RV200_QW,
- DEVICE_ATI_RADEON_RV200_QX,
- DEVICE_ATI_RADEON_R250_ID,
- DEVICE_ATI_RADEON_R250_IE,
- DEVICE_ATI_RADEON_R250_IF,
- DEVICE_ATI_RADEON_R250_IG,
- DEVICE_ATI_RADEON_R250_LD,
- DEVICE_ATI_RADEON_R250_LE,
- DEVICE_ATI_RADEON_R250_LF,
- DEVICE_ATI_RADEON_R250_LG,
- DEVICE_ATI_RADEON_R300_ND,
- DEVICE_ATI_RADEON_R300_NE,
- DEVICE_ATI_RADEON_R300_NF,
- DEVICE_ATI_RADEON_R300_NG
-#endif
-};
 
 static int find_chip(unsigned chip_id)
 {
   unsigned i;
   for(i = 0;i < sizeof(ati_card_ids)/sizeof(unsigned short);i++)
   {
-    if(chip_id == ati_card_ids[i]) return i;
+    if(chip_id == ati_card_ids[i].id) return i;
   }
   return -1;
 }
@@ -977,72 +1033,7 @@ int VIDIX_NAME(vixProbe)( int verbose,int force )
 	dname = pci_device_name(VENDOR_ATI,lst[i].device);
 	dname = dname ? dname : "Unknown chip";
 	printf(RADEON_MSG" Found chip: %s\n",dname);
-#ifndef RAGE128 
-	if(idx != -1)
-	{
-          switch(ati_card_ids[idx]) {
-            /* Original radeon */
-            case DEVICE_ATI_RADEON_R100_QD:
-            case DEVICE_ATI_RADEON_R100_QE:
-            case DEVICE_ATI_RADEON_R100_QF:
-            case DEVICE_ATI_RADEON_R100_QG:
-              RadeonFamily = 100;
-              break;
-              
-            /* Radeon VE / Radeon Mobility */
-            case DEVICE_ATI_RADEON_VE_QY:
-            case DEVICE_ATI_RADEON_VE_QZ:
-            case DEVICE_ATI_RADEON_MOBILITY_M6:
-            case DEVICE_ATI_RADEON_MOBILITY_M62:
-              RadeonFamily = 120;
-              break;
-              
-            /* Radeon 7500 / Radeon Mobility 7500 */
-            case DEVICE_ATI_RADEON_RV200_QW:
-            case DEVICE_ATI_RADEON_RV200_QX: 
-            case DEVICE_ATI_RADEON_MOBILITY_M7:
-            case DEVICE_ATI_RADEON_MOBILITY_M72:
-              RadeonFamily = 150;
-              break;
-              
-            /* Radeon 8500 */
-            case DEVICE_ATI_RADEON_R200_BB:
-            case DEVICE_ATI_RADEON_R200_QH:
-            case DEVICE_ATI_RADEON_R200_QI:
-            case DEVICE_ATI_RADEON_R200_QJ:
-            case DEVICE_ATI_RADEON_R200_QK:
-            case DEVICE_ATI_RADEON_R200_QL:
-            case DEVICE_ATI_RADEON_R200_QH2:
-            case DEVICE_ATI_RADEON_R200_QI2:
-            case DEVICE_ATI_RADEON_R200_QJ2:
-            case DEVICE_ATI_RADEON_R200_QK2:
-              RadeonFamily = 200;
-              break;
-              
-            /* Radeon 9000 */
-            case DEVICE_ATI_RADEON_R250_ID:
-            case DEVICE_ATI_RADEON_R250_IE:
-            case DEVICE_ATI_RADEON_R250_IF:
-            case DEVICE_ATI_RADEON_R250_IG:
-            case DEVICE_ATI_RADEON_R250_LD:
-            case DEVICE_ATI_RADEON_R250_LE:
-            case DEVICE_ATI_RADEON_R250_LF:
-            case DEVICE_ATI_RADEON_R250_LG:
-              RadeonFamily = 250;
-              break;
-              
-            /* Radeon 9700 */
-            case DEVICE_ATI_RADEON_R300_ND:
-            case DEVICE_ATI_RADEON_R300_NE:
-            case DEVICE_ATI_RADEON_R300_NF:
-            case DEVICE_ATI_RADEON_R300_NG:
-              RadeonFamily = 300;
-              break;
-            default:
-              break;
-          }
-	}
-#endif
+	memset(&besr,0,sizeof(bes_registers_t));
 	if(force > PROBE_NORMAL)
 	{
 	    printf(RADEON_MSG" Driver was forced. Was found %sknown chip\n",idx == -1 ? "un" : "");
@@ -1052,7 +1043,9 @@ int VIDIX_NAME(vixProbe)( int verbose,int force )
 #else
 		printf(RADEON_MSG" Assuming it as Radeon1\n");
 #endif
+	    besr.chip_flags=R_100|R_OVL_SHIFT;
 	}
+	if(idx != -1) besr.chip_flags=ati_card_ids[idx].flags;
 	def_cap.device_id = lst[i].device;
 	err = 0;
 	memcpy(&pci_info,&lst[i],sizeof(pciinfo_t));
@@ -1206,7 +1199,6 @@ int VIDIX_NAME(vixInit)( const char *args )
   }
 #endif
   if((radeon_mem_base = map_phys_mem(pci_info.base0,radeon_ram_size))==(void *)-1) return ENOMEM;
-  memset(&besr,0,sizeof(bes_registers_t));
   radeon_vid_make_default();
   printf(RADEON_MSG" Video memory = %uMb\n",radeon_ram_size/0x100000);
   err = mtrr_set_type(pci_info.base0,radeon_ram_size,MTRR_TYPE_WRCOMB);
@@ -1214,19 +1206,8 @@ int VIDIX_NAME(vixInit)( const char *args )
 #ifndef RAGE128
   {
     memset(&rinfo,0,sizeof(rinfo_t));
-    if(RadeonFamily > 100) rinfo.hasCRTC2 = 1;
+    if((besr.chip_flags&R_100) != R_100) rinfo.hasCRTC2 = 1;
     
-  switch(RadeonFamily)
-    {
-    case 100:
-    case 120:
-    case 150:
-    case 250:
-      is_shift_required=1;
-      break;
-    default:
-      break;
-    }
     radeon_get_moninfo(&rinfo);
 	if(rinfo.hasCRTC2) {
 	    printf(RADEON_MSG" DVI port has %s monitor connected\n",GET_MON_NAME(rinfo.dviDispType));
@@ -2713,6 +2694,11 @@ static int radeon_vid_init_video( vidix_playback_t *config )
     if(radeon_is_interlace())	interlace_factor = 2;
     else			interlace_factor = 1;
     /* TODO: must be checked in doublescan mode!!! */
+    if((besr.chip_flags&R_INTEGRATED)==R_INTEGRATED)
+    {
+	/* Force the overlay clock on for integrated chips */
+        OUTPLL(VCLK_ECP_CNTL, (INPLL(VCLK_ECP_CNTL) | (1<<18)));
+    }
     horz_repl_factor = 1 << (uint32_t)((INPLL(VCLK_ECP_CNTL) & 0x300) >> 8);
     H_scale_ratio = (double)ceil(((double)dest_w+1)/horz_repl_factor)/src_w;
     V_scale_ratio = (double)(dest_h+1)/src_h;
@@ -3244,8 +3230,8 @@ static void set_gr_key( void )
 	besr.graphics_key_msk=(1<<dbpp)-1;
 	besr.ckey_cntl = VIDEO_KEY_FN_TRUE|GRAPHIC_KEY_FN_NE|CMP_MIX_AND;
 #else
-	besr.graphics_key_msk=(0xFF<<24)|besr.graphics_key_clr;
-	besr.ckey_cntl = VIDEO_KEY_FN_FALSE|GRAPHIC_KEY_FN_EQ|CMP_MIX_OR;
+	besr.graphics_key_msk=besr.graphics_key_clr;
+	besr.ckey_cntl = VIDEO_KEY_FN_TRUE|CMP_MIX_AND|GRAPHIC_KEY_FN_EQ;
 #endif
     }
     else
diff --git a/src/video_out/vidix/fourcc.h b/src/video_out/vidix/fourcc.h
index 0c540f5da..891f0b6ff 100644
--- a/src/video_out/vidix/fourcc.h
+++ b/src/video_out/vidix/fourcc.h
@@ -60,6 +60,9 @@
 #define IMGFMT_CLJR    vid_fourcc('C','L','J','R') /* 7.9 YUV 4:1:1 */
 #define IMGFMT_YUVP    vid_fourcc('Y','U','V','P') /* 24 Y0U0Y1V0 */
 #define IMGFMT_UYVP    vid_fourcc('U','Y','V','P') /* 24 U0Y0V0Y1 */
+#define IMGFMT_411P    vid_fourcc('4','1','1','P') /* 12 alias of Y41B */
+#define IMGFMT_422P    vid_fourcc('4','2','2','P') /* 16 alias of Y42B */
+#define IMGFMT_444P    vid_fourcc('4','4','4','P') /* 24 alias of Y44B */
 
 /*  Vendor-specific formats   */
 #define IMGFMT_WNVA    vid_fourcc('W','N','V','A') /* Winnov hw compress */
diff --git a/src/video_out/vidix/vidix.h b/src/video_out/vidix/vidix.h
index 6e1104bb2..bcf6b4ae0 100644
--- a/src/video_out/vidix/vidix.h
+++ b/src/video_out/vidix/vidix.h
@@ -58,6 +58,10 @@ typedef struct vidix_capability_s
 #define FLAG_NONE		0x00000000 /* No flags defined */
 #define FLAG_DMA		0x00000001 /* Card can use DMA */
 #define FLAG_EQ_DMA		0x00000002 /* Card can use DMA only if src pitch == dest pitch */
+#define FLAG_SYNC_DMA           0x00000004 /* Possible to wait for DMA
+					    * to finish.  See
+					    * BM_DMA_SYNC and
+					    * BM_DMA_BLOCK below */
 #define FLAG_UPSCALER		0x00000010 /* Card supports hw upscaling */
 #define FLAG_DOWNSCALER		0x00000020 /* Card supports hw downscaling */
 #define FLAG_SUBPIC		0x00001000 /* Card supports DVD subpictures */
@@ -108,7 +112,7 @@ extern int	vixQueryFourcc(vidix_fourcc_t *);
 
 typedef struct vidix_yuv_s
 {
-	unsigned y,u,v;
+	unsigned y,u,v,a;
 }vidix_yuv_t;
 
 typedef struct vidix_rect_s
@@ -251,8 +255,9 @@ typedef struct vidix_dma_s
 	unsigned 	dest_offset;	/* app -> driver. Destinition offset within of video memory */
 	unsigned 	size;		/* app -> driver. Size of transaction */
 #define BM_DMA_ASYNC		0
-#define BM_DMA_SYNC		1	/* means: wait dma transfer completion */
+#define BM_DMA_SYNC		1	/* await previous dma transfer completion */
 #define BM_DMA_FIXED_BUFFS	2	/* app -> driver: app uses buffers which are fixed in memory  */
+#define BM_DMA_BLOCK            4       /* block until the transfer is complete */
 	unsigned	flags;		/* app -> driver */
 	unsigned 	idx;		/* app -> driver: idx of src buffer */
 	void *		internal[VID_PLAY_MAXFRAMES];	/* for internal use by driver */
diff --git a/src/video_out/vidix/vidixlib.c b/src/video_out/vidix/vidixlib.c
index e43a68088..a513c9811 100644
--- a/src/video_out/vidix/vidixlib.c
+++ b/src/video_out/vidix/vidixlib.c
@@ -386,3 +386,95 @@ int	  vdlSetOemEffect(VDL_HANDLE handle, const vidix_oem_fx_t * f)
 {
   return t_vdl(handle)->set_fx ? t_vdl(handle)->set_fx(f) : ENOSYS;
 }
+
+/* ABI related extensions */
+vidix_capability_t *	vdlAllocCapabilityS( void )
+{
+    vidix_capability_t *retval;
+    retval=malloc(sizeof(vidix_capability_t));
+    if(retval) memset(retval,0,sizeof(vidix_capability_t));
+    return retval;
+}
+
+vidix_fourcc_t *		vdlAllocFourccS( void )
+{
+    vidix_fourcc_t *retval;
+    retval=malloc(sizeof(vidix_fourcc_t));
+    if(retval) memset(retval,0,sizeof(vidix_fourcc_t));
+    return retval;
+}
+
+vidix_yuv_t *		vdlAllocYUVS( void )
+{
+    vidix_yuv_t *retval;
+    retval=malloc(sizeof(vidix_yuv_t));
+    if(retval) memset(retval,0,sizeof(vidix_yuv_t));
+    return retval;
+}
+
+vidix_rect_t *		vdlAllocRectS( void )
+{
+    vidix_rect_t *retval;
+    retval=malloc(sizeof(vidix_rect_t));
+    if(retval) memset(retval,0,sizeof(vidix_rect_t));
+    return retval;
+}
+
+vidix_playback_t *	vdlAllocPlaybackS( void )
+{
+    vidix_playback_t *retval;
+    retval=malloc(sizeof(vidix_playback_t));
+    if(retval) memset(retval,0,sizeof(vidix_playback_t));
+    return retval;
+}
+
+vidix_grkey_t *		vdlAllocGrKeyS( void )
+{
+    vidix_grkey_t *retval;
+    retval=malloc(sizeof(vidix_grkey_t));
+    if(retval) memset(retval,0,sizeof(vidix_grkey_t));
+    return retval;
+}
+
+vidix_video_eq_t *	vdlAllocVideoEqS( void )
+{
+    vidix_video_eq_t *retval;
+    retval=malloc(sizeof(vidix_video_eq_t));
+    if(retval) memset(retval,0,sizeof(vidix_video_eq_t));
+    return retval;
+}
+
+vidix_deinterlace_t *	vdlAllocDeinterlaceS( void )
+{
+    vidix_deinterlace_t *retval;
+    retval=malloc(sizeof(vidix_deinterlace_t));
+    if(retval) memset(retval,0,sizeof(vidix_deinterlace_t));
+    return retval;
+}
+
+vidix_dma_t *		vdlAllocDmaS( void )
+{
+    vidix_dma_t *retval;
+    retval=malloc(sizeof(vidix_dma_t));
+    if(retval) memset(retval,0,sizeof(vidix_dma_t));
+    return retval;
+}
+
+vidix_oem_fx_t *		vdlAllocOemFxS( void )
+{
+    vidix_oem_fx_t *retval;
+    retval=malloc(sizeof(vidix_oem_fx_t));
+    if(retval) memset(retval,0,sizeof(vidix_oem_fx_t));
+    return retval;
+}
+
+void	vdlFreeCapabilityS(vidix_capability_t * _this) { free(_this); }
+void 	vdlFreeFourccS( vidix_fourcc_t * _this ) { free(_this); }
+void	vdlFreePlaybackS( vidix_playback_t * _this ) { free(_this); }
+void	vdlFreeYUVS( vidix_yuv_t * _this) { free(_this); }
+void	vdlFreeRectS( vidix_rect_t * _this) { free(_this); }
+void	vdlFreeGrKeyS( vidix_grkey_t * _this) { free(_this); }
+void	vdlFreeVideoEqS( vidix_video_eq_t * _this) { free(_this); }
+void	vdlFreeDeinterlaceS( vidix_deinterlace_t * _this) { free(_this); }
+void	vdlFreeDmaS( vidix_dma_t * _this) { free(_this); }
+void	vdlFreeOemFxS( vidix_oem_fx_t * _this) { free(_this); }
diff --git a/src/video_out/vidix/vidixlib.h b/src/video_out/vidix/vidixlib.h
index 9c4325e9b..ebc3dd309 100644
--- a/src/video_out/vidix/vidixlib.h
+++ b/src/video_out/vidix/vidixlib.h
@@ -94,6 +94,33 @@ extern int	  vdlPlaybackCopyFrame(VDL_HANDLE, vidix_dma_t * );
 			/* Returns 0 if DMA is available else errno (EBUSY) */
 extern int	  vdlQueryDMAStatus( VDL_HANDLE );
 
+/*
+  ABI related extensions.
+  Note: you should use this functions if you are using shared version
+  of vidix.
+*/
+extern vidix_capability_t *	vdlAllocCapabilityS( void );
+extern vidix_fourcc_t *		vdlAllocFourccS( void );
+extern vidix_playback_t *	vdlAllocPlaybackS( void );
+extern vidix_yuv_t *		vdlAllocYUVS( void );
+extern vidix_rect_t *		vdlAllocRectS( void );
+extern vidix_grkey_t *		vdlAllocGrKeyS( void );
+extern vidix_video_eq_t *	vdlAllocVideoEqS( void );
+extern vidix_deinterlace_t *	vdlAllocDeinterlaceS( void );
+extern vidix_dma_t *		vdlAllocDmaS( void );
+extern vidix_oem_fx_t *		vdlAllocOemFxS( void );
+
+extern void	vdlFreeCapabilityS(vidix_capability_t * );
+extern void 	vdlFreeFourccS( vidix_fourcc_t * );
+extern void	vdlFreePlaybackS( vidix_playback_t * );
+extern void	vdlFreeYUVS( vidix_yuv_t * );
+extern void	vdlFreeRectS( vidix_rect_t * );
+extern void	vdlFreeGrKeyS( vidix_grkey_t * );
+extern void	vdlFreeVideoEqS( vidix_video_eq_t * );
+extern void	vdlFreeDeinterlaceS( vidix_deinterlace_t * );
+extern void	vdlFreeDmaS( vidix_dma_t * );
+extern void	vdlFreeOemFxS( vidix_oem_fx_t * );
+
 #ifdef __cplusplus
 }
 #endif