Sync with vidix cvs

CVS patchset: 7435
CVS date: 2005/03/06 13:08:10

11 files changed, 1918 insertions, 159 deletions

diff --git a/src/video_out/vidix/drivers/Makefile.am b/src/video_out/vidix/drivers/Makefile.am
index 272c20d3b..9e31be6cb 100644
--- a/src/video_out/vidix/drivers/Makefile.am
+++ b/src/video_out/vidix/drivers/Makefile.am
@@ -16,7 +16,8 @@ vidix_drivers = \
 	cyberblade_vid.la \
 	unichrome_vid.la \
 	nvidia_vid.la \
-	sis_vid.la
+	sis_vid.la \
+	savage_vid.la 
 endif
 
 lib_LTLIBRARIES = $(vidix_drivers)
@@ -59,8 +60,12 @@ nvidia_vid_la_LDFLAGS = -avoid-version -module
 sis_vid_la_SOURCES = sis_vid.c sis_bridge.c
 sis_vid_la_LDFLAGS = -avoid-version -module
 
-noinst_HEADERS = mach64.h nvidia.h glint_regs.h pm3_regs.h radeon.h \
-	cyberblade_regs.h unichrome_regs.h nvidia.h sis_defs.h sis_regs.h
+savage_vid_la_SOURCES = savage_vid.c
+savage_vid_la_LIBADD = -lm
+savage_vid_la_LDFLAGS = -avoid-version -module
+
+noinst_HEADERS = mach64.h glint_regs.h pm3_regs.h radeon.h savage_regs.h \
+	cyberblade_regs.h unichrome_regs.h sis_defs.h sis_regs.h
 
 AM_CPPFLAGS = -I$(top_srcdir)/src/video_out/vidix \
 	-I$(top_srcdir)/src/video_out/libdha \
diff --git a/src/video_out/vidix/drivers/cyberblade_regs.h b/src/video_out/vidix/drivers/cyberblade_regs.h
index 49c4ec52d..1bae61d4a 100644
--- a/src/video_out/vidix/drivers/cyberblade_regs.h
+++ b/src/video_out/vidix/drivers/cyberblade_regs.h
@@ -133,3 +133,5 @@
 #define SROUTB(reg,val) (OUTPORT8(0x3c4,reg), OUTPORT8(0x3c5,val))
 
 /* --- */
+
+
diff --git a/src/video_out/vidix/drivers/cyberblade_vid.c b/src/video_out/vidix/drivers/cyberblade_vid.c
index 0c2c6ef37..4b2f243f5 100644
--- a/src/video_out/vidix/drivers/cyberblade_vid.c
+++ b/src/video_out/vidix/drivers/cyberblade_vid.c
@@ -2,6 +2,8 @@
     Driver for CyberBlade/i1 - Version 0.1.4
 
     Copyright (C) 2002 by Alastair M. Robinson.
+    Official homepage: http://www.blackfiveservices.co.uk/EPIAVidix.shtml
+
     Based on Permedia 3 driver by Måns Rullgård
 
     Thanks to Gilles Frattini for bugfixes
@@ -20,6 +22,14 @@
     along with this program; if not, write to the Free Software
     Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 
+    Changes:
+    18/01/03
+      MMIO is no longer used, sidestepping cache issues on EPIA-800
+      TV-Out modes are now better supported - this should be the end
+        of the magenta stripes :)
+      Brightness/Contrast controls disabled for the time being - they were
+        seriously degrading picture quality, especially with TV-Out.
+
     To Do:
     Implement Hue/Saturation controls
     Support / Test multiple frames
@@ -42,10 +52,6 @@
 
 #include "cyberblade_regs.h"
 
-#define CYBERBLADE_MSG "cyberblade_vid:"
-
-#define VIDIX_STATIC cyberblade_
-
 pciinfo_t pci_info;
 
 char save_colourkey[6];
@@ -58,7 +64,7 @@ FILE *logfile=0;
 #define LOGWRITE(x)
 #endif
 
-/* Helper functions for reading registers. */
+/* Helper functions for reading registers. */    
 
 #if 0 /* unused */
 static int CRINW(int reg)
@@ -136,7 +142,7 @@ static vidix_capability_t cyberblade_cap =
 };
 
 
-unsigned int VIDIX_NAME(vixGetVersion)(void)
+unsigned int vixGetVersion(void)
 {
 	return(VIDIX_VERSION);
 }
@@ -144,7 +150,12 @@ unsigned int VIDIX_NAME(vixGetVersion)(void)
 
 static unsigned short cyberblade_card_ids[] =
 {
-	DEVICE_TRIDENT_CYBERBLADE_I1
+	DEVICE_TRIDENT_CYBERBLADE_I7,
+	DEVICE_TRIDENT_CYBERBLADE_I7D,
+	DEVICE_TRIDENT_CYBERBLADE_I1,
+	DEVICE_TRIDENT_CYBERBLADE_I12,
+	DEVICE_TRIDENT_CYBERBLADE_I13,
+	DEVICE_TRIDENT_CYBERBLADE_XPAI1
 };
 
 
@@ -158,7 +169,7 @@ static int find_chip(unsigned chip_id)
   return -1;
 }
 
-int VIDIX_NAME(vixProbe)(int verbose, int force)
+int vixProbe(int verbose, int force)
 {
 	pciinfo_t lst[MAX_PCI_DEVICES];
 	unsigned i,num_pci;
@@ -166,7 +177,7 @@ int VIDIX_NAME(vixProbe)(int verbose, int force)
 	err = pci_scan(lst,&num_pci);
 	if(err)
 	{
-		printf(CYBERBLADE_MSG" Error occured during pci scan: %s\n",strerror(err));
+		printf("[cyberblade] Error occurred during pci scan: %s\n",strerror(err));
 		return err;
 	}
 	else
@@ -183,7 +194,7 @@ int VIDIX_NAME(vixProbe)(int verbose, int force)
 					continue;
 				dname = pci_device_name(VENDOR_TRIDENT, lst[i].device);
 				dname = dname ? dname : "Unknown chip";
-				printf(CYBERBLADE_MSG" Found chip: %s\n", dname);
+				printf("[cyberblade] Found chip: %s\n", dname);
 				cyberblade_cap.device_id = lst[i].device;
 				err = 0;
 				memcpy(&pci_info, &lst[i], sizeof(pciinfo_t));
@@ -192,14 +203,14 @@ int VIDIX_NAME(vixProbe)(int verbose, int force)
 		}
 	}
 
-	if(err && verbose) printf(CYBERBLADE_MSG" Can't find chip\n");
+	if(err && verbose) printf("[cyberblade] Can't find chip\n");
 		return err;
 }
 
 
-int VIDIX_NAME(vixInit)(const char *args)
+int vixInit(const char *args)
 {
-	cyberblade_mem = map_phys_mem(pci_info.base0, 0x800000);
+	cyberblade_mem = map_phys_mem(pci_info.base0, 0x800000); 
 	enable_app_io();
 	save_colourkey[0]=SRINB(0x50);
 	save_colourkey[1]=SRINB(0x51);
@@ -213,7 +224,7 @@ int VIDIX_NAME(vixInit)(const char *args)
 	return 0;
 }
 
-void VIDIX_NAME(vixDestroy)(void)
+void vixDestroy(void)
 {
 	int protect;
 #ifdef DEBUG_LOGFILE
@@ -231,10 +242,11 @@ void VIDIX_NAME(vixDestroy)(void)
 	SROUTB(0x56,save_colourkey[5]);
 	SROUTB(0x11, protect);
 	disable_app_io();
+	unmap_phys_mem(cyberblade_mem, 0x800000); 
 }
 
 
-int VIDIX_NAME(vixGetCapability)(vidix_capability_t *to)
+int vixGetCapability(vidix_capability_t *to)
 {
 	memcpy(to, &cyberblade_cap, sizeof(vidix_capability_t));
 	return 0;
@@ -247,6 +259,7 @@ static int is_supported_fourcc(uint32_t fourcc)
 	{
 		case IMGFMT_YUY2:
 		case IMGFMT_YV12:
+		case IMGFMT_I420:
 		case IMGFMT_YVU9:
 		case IMGFMT_BGR16:
 			return 1;
@@ -277,17 +290,17 @@ static int frames[VID_PLAY_MAXFRAMES];
 
 static vidix_grkey_t cyberblade_grkey;
 
-int VIDIX_NAME(vixGetGrKeys)(vidix_grkey_t *grkey)
+int vixGetGrKeys(vidix_grkey_t *grkey)
 {
 	memcpy(grkey, &cyberblade_grkey, sizeof(vidix_grkey_t));
 	return(0);
 }
 
-int VIDIX_NAME(vixSetGrKeys)(const vidix_grkey_t *grkey)
+int vixSetGrKeys(const vidix_grkey_t *grkey)
 {
 	int pixfmt=CRINB(0x38);
 	int protect;
-		memcpy(&cyberblade_grkey, grkey, sizeof(vidix_grkey_t));
+	memcpy(&cyberblade_grkey, grkey, sizeof(vidix_grkey_t));
 
 	protect=SRINB(0x11);
 	SROUTB(0x11, 0x92);
@@ -324,13 +337,13 @@ vidix_video_eq_t equal =
 	300, 100, 0, 0, 0, 0, 0, 0
 };
 
-int VIDIX_NAME(vixPlaybackGetEq)( vidix_video_eq_t * eq)
+int vixPlaybackGetEq( vidix_video_eq_t * eq)
 {
   memcpy(eq,&equal,sizeof(vidix_video_eq_t));
   return 0;
 }
 
-int VIDIX_NAME(vixPlaybackSetEq)( const vidix_video_eq_t * eq)
+int vixPlaybackSetEq( const vidix_video_eq_t * eq)
 {
 	int br,sat,cr,protect;
 	if(eq->cap & VEQ_CAP_BRIGHTNESS) equal.brightness = eq->brightness;
@@ -370,7 +383,7 @@ int VIDIX_NAME(vixPlaybackSetEq)( const vidix_video_eq_t * eq)
 
 static int YOffs,UOffs,VOffs;
 
-int VIDIX_NAME(vixConfigPlayback)(vidix_playback_t *info)
+int vixConfigPlayback(vidix_playback_t *info)
 {
 	int src_w, drw_w;
 	int src_h, drw_h;
@@ -401,6 +414,7 @@ int VIDIX_NAME(vixConfigPlayback)(vidix_playback_t *info)
 			layout=0x0; /* packed */
 			break;
 		case IMGFMT_YV12:
+		case IMGFMT_I420:
 			y_pitch = (src_w+15) & ~15;
 			uv_pitch = ((src_w/2)+7) & ~7;
 			YOffs=info->offset.y = 0;
@@ -452,7 +466,7 @@ int VIDIX_NAME(vixConfigPlayback)(vidix_playback_t *info)
 	SROUTB(0x21, 0x34); /* Signature control */
 	SROUTB(0x37, 0x30); /* Video key mode */
 
-	vixSetGrKeys(&cyberblade_grkey);
+        vixSetGrKeys(&cyberblade_grkey);
 
 	/* compute_scale_factor(&src_w, &drw_w, &shrink, &zoom); */
 	{
@@ -460,18 +474,18 @@ int VIDIX_NAME(vixConfigPlayback)(vidix_playback_t *info)
 		int HWinStart,VWinStart;
 		int tx1,ty1,tx2,ty2;
 
-			HTotal=CRINB(0x00);
-			HSync=CRINB(0x04);
-			VTotal=CRINB(0x06);
-			VSync=CRINB(0x10);
-			Overflow=CRINB(0x07);
-			HTotal <<=3;
-			HSync <<=3;
-			VTotal |= (Overflow & 1) <<8;
-			VTotal |= (Overflow & 0x20) <<4;
-			VTotal +=4;
-			VSync |= (Overflow & 4) <<6;
-			VSync |= (Overflow & 0x80) <<2;
+		HTotal=CRINB(0x00);
+		HSync=CRINB(0x04);
+		VTotal=CRINB(0x06);
+		VSync=CRINB(0x10);
+		Overflow=CRINB(0x07);
+		HTotal <<=3;
+		HSync <<=3;
+		VTotal |= (Overflow & 1) <<8;
+		VTotal |= (Overflow & 0x20) <<4;
+		VTotal +=4;
+		VSync |= (Overflow & 4) <<6;
+		VSync |= (Overflow & 0x80) <<2;
 
 		if(CRINB(0xd1)&0x80)
 		{
@@ -499,18 +513,15 @@ int VIDIX_NAME(vixConfigPlayback)(vidix_playback_t *info)
 			HWinStart=(TVHTotal-HDisp)&15;
 			HWinStart|=(HTotal-HDisp)&15;
 			HWinStart+=(TVHTotal-TVHSyncStart)-49;
- 
-			VWinStart=(TVVTotal-VDisp)/2-1;
-			VWinStart-=(1-((TVVTotal-VDisp)&1))+4;
 		}
 		else
 		{
 			LOGWRITE("[cyberblade] Using Standard CRTC\n");
 			HWinStart=(HTotal-HSync)+15;
-			VWinStart=(VTotal-VSync)-8;
 		}
+                VWinStart=(VTotal-VSync)-8;
 
-		printf(CYBERBLADE_MSG" HTotal: 0x%x, HSStart: 0x%x\n",HTotal,HSync); 
+		printf("[cyberblade] HTotal: 0x%x, HSStart: 0x%x\n",HTotal,HSync); 
 		printf("  VTotal: 0x%x, VStart: 0x%x\n",VTotal,VSync);
 		tx1=HWinStart+info->dest.x;
 		ty1=VWinStart+info->dest.y;
@@ -596,7 +607,7 @@ int VIDIX_NAME(vixConfigPlayback)(vidix_playback_t *info)
 }
 
 
-int VIDIX_NAME(vixPlaybackOn)(void)
+int vixPlaybackOn(void)
 {
 	LOGWRITE("Enable overlay\n");
 	CROUTB(0x8E, 0xd4); /* VDE Flags*/
@@ -605,7 +616,7 @@ int VIDIX_NAME(vixPlaybackOn)(void)
 }
 
 
-int VIDIX_NAME(vixPlaybackOff)(void)
+int vixPlaybackOff(void)
 {
         LOGWRITE("Disable overlay\n"); 
 	CROUTB(0x8E, 0xc4); /* VDE Flags*/
@@ -614,7 +625,7 @@ int VIDIX_NAME(vixPlaybackOff)(void)
 }
 
 
-int VIDIX_NAME(vixPlaybackFrameSelect)(unsigned int frame)
+int vixPlaybackFrameSelect(unsigned int frame)
 {
 	int protect;
         LOGWRITE("Frame select\n"); 
@@ -635,3 +646,4 @@ int VIDIX_NAME(vixPlaybackFrameSelect)(unsigned int frame)
 }
 
 
+
diff --git a/src/video_out/vidix/drivers/mach64_vid.c b/src/video_out/vidix/drivers/mach64_vid.c
index df1571bad..02447af19 100644
--- a/src/video_out/vidix/drivers/mach64_vid.c
+++ b/src/video_out/vidix/drivers/mach64_vid.c
@@ -32,8 +32,6 @@
 
 #define UNUSED(x) ((void)(x)) /**< Removes warning about unused arguments */
 
-#define MACH64_MSG "mach64_vid:"
-
 #define VIDIX_STATIC mach64_
 
 #ifdef MACH64_ENABLE_BM
@@ -333,7 +331,7 @@ static int mach64_get_vert_stretch(void)
     int yres= mach64_get_yres();
 
     if(!supports_lcd_v_stretch){
-        if(__verbose>0) printf(MACH64_MSG" vertical stretching not supported\n");
+        if(__verbose>0) printf("[mach64] vertical stretching not supported\n");
         return 1<<16;
     }
 
@@ -356,7 +354,7 @@ static int mach64_get_vert_stretch(void)
     
     OUTREG(LCD_INDEX, lcd_index);
     
-    if(__verbose>0) printf(MACH64_MSG" vertical stretching factor= %d\n", ret);
+    if(__verbose>0) printf("[mach64] vertical stretching factor= %d\n", ret);
     
     return ret;
 }
@@ -379,20 +377,20 @@ static void mach64_vid_make_default()
 static void mach64_vid_dump_regs( void )
 {
   size_t i;
-  printf(MACH64_MSG" *** Begin of DRIVER variables dump ***\n");
-  printf(MACH64_MSG" mach64_mmio_base=%p\n",mach64_mmio_base);
-  printf(MACH64_MSG" mach64_mem_base=%p\n",mach64_mem_base);
-  printf(MACH64_MSG" mach64_overlay_off=%08X\n",mach64_overlay_offset);
-  printf(MACH64_MSG" mach64_ram_size=%08X\n",mach64_ram_size);
-  printf(MACH64_MSG" video mode: %ux%u@%u\n",mach64_get_xres(),mach64_get_yres(),mach64_vid_get_dbpp());
-  printf(MACH64_MSG" *** Begin of OV0 registers dump ***\n");
+  printf("[mach64] *** Begin of DRIVER variables dump ***\n");
+  printf("[mach64] mach64_mmio_base=%p\n",mach64_mmio_base);
+  printf("[mach64] mach64_mem_base=%p\n",mach64_mem_base);
+  printf("[mach64] mach64_overlay_off=%08X\n",mach64_overlay_offset);
+  printf("[mach64] mach64_ram_size=%08X\n",mach64_ram_size);
+  printf("[mach64] video mode: %ux%u@%u\n",mach64_get_xres(),mach64_get_yres(),mach64_vid_get_dbpp());
+  printf("[mach64] *** Begin of OV0 registers dump ***\n");
   for(i=0;i<sizeof(vregs)/sizeof(video_registers_t);i++)
   {
 	mach64_wait_for_idle();
 	mach64_fifo_wait(2);
-	printf(MACH64_MSG" %s = %08X\n",vregs[i].sname,INREG(vregs[i].name));
+	printf("[mach64] %s = %08X\n",vregs[i].sname,INREG(vregs[i].name));
   }
-  printf(MACH64_MSG" *** End of OV0 registers dump ***\n");
+  printf("[mach64] *** End of OV0 registers dump ***\n");
 }
 
 
@@ -470,7 +468,7 @@ int VIDIX_NAME(vixProbe)(int verbose,int force)
   err = pci_scan(lst,&num_pci);
   if(err)
   {
-    printf(MACH64_MSG" Error occured during pci scan: %s\n",strerror(err));
+    printf("[mach64] Error occured during pci scan: %s\n",strerror(err));
     return err;
   }
   else
@@ -486,12 +484,12 @@ int VIDIX_NAME(vixProbe)(int verbose,int force)
 	if(idx == -1 && force == PROBE_NORMAL) continue;
 	dname = pci_device_name(VENDOR_ATI,lst[i].device);
 	dname = dname ? dname : "Unknown chip";
-	printf(MACH64_MSG" Found chip: %s\n",dname);
+	printf("[mach64] Found chip: %s\n",dname);
 	if(force > PROBE_NORMAL)
 	{
-	    printf(MACH64_MSG" Driver was forced. Was found %sknown chip\n",idx == -1 ? "un" : "");
+	    printf("[mach64] Driver was forced. Was found %sknown chip\n",idx == -1 ? "un" : "");
 	    if(idx == -1)
-		printf(MACH64_MSG" Assuming it as Mach64\n");
+		printf("[mach64] Assuming it as Mach64\n");
 	}
 	if(idx != -1) is_agp = ati_card_ids[idx].is_agp;
 	mach64_cap.device_id = lst[i].device;
@@ -502,7 +500,7 @@ int VIDIX_NAME(vixProbe)(int verbose,int force)
       }
     }
   }
-  if(err && verbose) printf(MACH64_MSG" Can't find chip\n");
+  if(err && verbose) printf("[mach64] Can't find chip\n");
   return err;
 }
 
@@ -563,11 +561,11 @@ static void init_irq(void)
 			 2,CRTC_INT_CNTL,CRTC_BUSMASTER_EOL_INT) == 0)
 	{
 	    can_use_irq=1;
-	    if(__verbose) printf(MACH64_MSG" Will use %u irq line\n",pci_info.irq);
+	    if(__verbose) printf("[mach64] Will use %u irq line\n",pci_info.irq);
 	}
 	else 
-	    if(__verbose) printf(MACH64_MSG" Can't initialize irq handling: %s\n"
-				 MACH64_MSG"irq_param: line=%u pin=%u gnt=%u lat=%u\n"
+	    if(__verbose) printf("[mach64] Can't initialize irq handling: %s\n"
+				 "[mach64]irq_param: line=%u pin=%u gnt=%u lat=%u\n"
 				 ,strerror(errno)
 				 ,pci_info.irq,pci_info.ipin,pci_info.gnt,pci_info.lat);
 }
@@ -581,15 +579,15 @@ int VIDIX_NAME(vixInit)(const char *args)
 #endif
   if(!probed)
   {
-    printf(MACH64_MSG" Driver was not probed but is being initializing\n");
+    printf("[mach64] Driver was not probed but is being initializing\n");
     return EINTR;
   }
-  if(__verbose>0) printf(MACH64_MSG" version %d args='%s'\n", VIDIX_VERSION,args);
+  if(__verbose>0) printf("[mach64] version %d args='%s'\n", VIDIX_VERSION,args);
   if(args)
   if(strncmp(args,"irq=",4) == 0) 
   {
     forced_irq=atoi(&args[4]);
-    if(__verbose>0) printf(MACH64_MSG" forcing IRQ to %u\n",forced_irq);     
+    if(__verbose>0) printf("[mach64] forcing IRQ to %u\n",forced_irq);     
   }
 
   if((mach64_mmio_base = map_phys_mem(pci_info.base2,0x4000))==(void *)-1) return ENOMEM;
@@ -601,9 +599,9 @@ int VIDIX_NAME(vixInit)(const char *args)
   mach64_ram_size *= 0x400; /* KB -> bytes */
   if((mach64_mem_base = map_phys_mem(pci_info.base0,mach64_ram_size))==(void *)-1) return ENOMEM;
   memset(&besr,0,sizeof(bes_registers_t));
-  printf(MACH64_MSG" Video memory = %uMb\n",mach64_ram_size/0x100000);
+  printf("[mach64] Video memory = %uMb\n",mach64_ram_size/0x100000);
   err = mtrr_set_type(pci_info.base0,mach64_ram_size,MTRR_TYPE_WRCOMB);
-  if(!err) printf(MACH64_MSG" Set write-combining type of video memory\n");
+  if(!err) printf("[mach64] Set write-combining type of video memory\n");
   
   save_regs();
   /* check if planar formats are supported */
@@ -621,7 +619,7 @@ int VIDIX_NAME(vixInit)(const char *args)
 
 	if(INREG(SCALER_BUF0_OFFSET_U)) 	supports_planar=1;
   }
-  printf(MACH64_MSG" Planar YUV formats are %s supported\n",supports_planar?"":"not");
+  printf("[mach64] Planar YUV formats are %s supported\n",supports_planar?"":"not");
   supports_colour_adj=0;
   OUTREG(SCALER_COLOUR_CNTL,-1);
   if(INREG(SCALER_COLOUR_CNTL)) supports_colour_adj=1;
@@ -629,12 +627,12 @@ int VIDIX_NAME(vixInit)(const char *args)
   OUTREG(IDCT_CONTROL,-1);
   if(INREG(IDCT_CONTROL)) supports_idct=1;
   OUTREG(IDCT_CONTROL,0);
-  printf(MACH64_MSG" IDCT is %s supported\n",supports_idct?"":"not");
+  printf("[mach64] IDCT is %s supported\n",supports_idct?"":"not");
   supports_subpic=0;
   OUTREG(SUBPIC_CNTL,-1);
   if(INREG(SUBPIC_CNTL)) supports_subpic=1;
   OUTREG(SUBPIC_CNTL,0);
-  printf(MACH64_MSG" subpictures are %s supported\n",supports_subpic?"":"not");
+  printf("[mach64] subpictures are %s supported\n",supports_subpic?"":"not");
   if(   mach64_cap.device_id==DEVICE_ATI_RAGE_MOBILITY_P_M
      || mach64_cap.device_id==DEVICE_ATI_RAGE_MOBILITY_P_M2
      || mach64_cap.device_id==DEVICE_ATI_RAGE_MOBILITY_L
@@ -655,7 +653,7 @@ int VIDIX_NAME(vixInit)(const char *args)
 	if((dma_phys_addrs = malloc(mach64_ram_size*sizeof(unsigned long)/4096)) == 0)
 	{
 	    out_mem:
-	    printf(MACH64_MSG" Can't allocate temporary buffer for DMA\n");
+	    printf("[mach64] Can't allocate temporary buffer for DMA\n");
 	    mach64_cap.flags &= ~FLAG_DMA & ~FLAG_EQ_DMA;
 	    return 0;
 	}
@@ -678,7 +676,7 @@ int VIDIX_NAME(vixInit)(const char *args)
 #endif
   }
   else
-    if(__verbose) printf(MACH64_MSG" Can't initialize busmastering: %s\n",strerror(errno));
+    if(__verbose) printf("[mach64] Can't initialize busmastering: %s\n",strerror(errno));
 #endif
   return 0;
 }
@@ -946,7 +944,7 @@ for(i=0; i<32; i++){
 }
 }
 #endif
-    if(__verbose>0) printf(MACH64_MSG" ecp: %d\n", ecp);
+    if(__verbose>0) printf("[mach64] ecp: %d\n", ecp);
     v_inc = src_h * mach64_get_vert_stretch();
     
     if(mach64_is_interlace()) v_inc<<=1;
@@ -1076,7 +1074,7 @@ int VIDIX_NAME(vixConfigPlayback)(vidix_playback_t *info)
   if(!is_supported_fourcc(info->fourcc)) return ENOSYS;
   if(info->src.h > 720 || info->src.w > 720)
   {
-    printf(MACH64_MSG" Can't apply width or height > 720\n");
+    printf("[mach64] Can't apply width or height > 720\n");
     return EINVAL;
   }
   if(info->num_frames>VID_PLAY_MAXFRAMES) info->num_frames=VID_PLAY_MAXFRAMES;
@@ -1121,8 +1119,8 @@ int VIDIX_NAME(vixPlaybackOn)(void)
   err = INREG(SCALER_BUF_PITCH) == besr.vid_buf_pitch ? 0 : EINTR;
   if(err)
   {
-    printf(MACH64_MSG" *** Internal fatal error ***: Detected pitch corruption\n"
-	   MACH64_MSG" Try decrease number of buffers\n");
+    printf("[mach64] *** Internal fatal error ***: Detected pitch corruption\n"
+	   "[mach64] Try decrease number of buffers\n");
   }
   return err;
 }
@@ -1148,7 +1146,7 @@ int VIDIX_NAME(vixPlaybackFrameSelect)(unsigned int frame)
     	off[i]  = mach64_buffer_base[frame][i];
     	off[i+3]= mach64_buffer_base[last_frame][i];
     }
-    if(__verbose > VERBOSE_LEVEL) printf(MACH64_MSG" flip_page = %u\n",frame);
+    if(__verbose > VERBOSE_LEVEL) printf("mach64_vid: flip_page = %u\n",frame);
 
 #if 0 // delay routine so the individual frames can be ssen better
 {
diff --git a/src/video_out/vidix/drivers/mga_vid.c b/src/video_out/vidix/drivers/mga_vid.c
index 89e7b2d00..eed2b9e65 100644
--- a/src/video_out/vidix/drivers/mga_vid.c
+++ b/src/video_out/vidix/drivers/mga_vid.c
@@ -76,10 +76,10 @@
 
 #ifdef CRTC2
 #define VIDIX_STATIC mga_crtc2_
-#define MGA_MSG "mga_crtc2_vid:"
+#define MGA_MSG "[mga_crtc2]"
 #else
 #define VIDIX_STATIC mga_
-#define MGA_MSG "mga_vid:"
+#define MGA_MSG "[mga]"
 #endif
 
 /* from radeon_vid */
diff --git a/src/video_out/vidix/drivers/nvidia.h b/src/video_out/vidix/drivers/nvidia.h
deleted file mode 100644
index f19e9a634..000000000
--- a/src/video_out/vidix/drivers/nvidia.h
+++ /dev/null
@@ -1,55 +0,0 @@
-#include <inttypes.h>
-
-#define RIVA_FIFO_FREE(hwptr, cnt) \
-{ \
-    while (nv_fifo_space < (cnt)) { \
-	nv_fifo_space = hwptr->fifo_free >> 2; \
-    } \
-    nv_fifo_space -= (cnt); \
-}
-
-typedef struct {
-    uint32_t	reserved00[4];
-    uint16_t	fifo_free;
-    uint16_t	nop[1];
-    uint32_t	reserved01[0x03b];
-    
-    uint32_t	no_operation;
-    uint32_t	notify;
-    uint32_t	reserved02[0x01e];
-    uint32_t	set_context_dma_notifies;
-    uint32_t	set_context_dma_image;
-    uint32_t	set_context_pattern;
-    uint32_t	set_context_rop;
-    uint32_t	set_context_beta1;
-    uint32_t	set_context_surface;
-    uint32_t	reserved03[0x05a];
-    uint32_t	set_color_format;
-    uint32_t	set_operation;
-    int16_t	clip_x;
-    int16_t	clip_y;
-    uint16_t	clip_height;
-    uint16_t	clip_width;
-    int16_t	image_out_x;
-    int16_t	image_out_y;
-    uint16_t	image_out_height;
-    uint16_t	image_out_width;
-    uint32_t	du_dx;
-    uint32_t	du_dy;
-    uint32_t	reserved04[0x38];
-    uint16_t	image_in_height;
-    uint16_t	image_in_width;
-    uint32_t	image_in_format;
-    uint32_t	image_in_offset;
-    uint32_t	image_in_point;
-    uint32_t	reserved05[0x6fc];
-} RivaScaledImage;
-
-#define dump_scaledimage(x) { \
-    printf("clip: pos: %dx%d, size: %dx%d\n", \
-	x->clip_x, x->clip_y, x->clip_height, x->clip_width); \
-    printf("image_out: pos: %dx%d, size: %dx%d\n", \
-	x->image_out_x, x->image_out_y, x->image_out_height, x->image_out_width); \
-    printf("image_in: size: %dx%d format: %x offset: %x\n", \
-	x->image_in_height, x->image_in_width, x->image_in_format, x->image_in_offset); \
-}
diff --git a/src/video_out/vidix/drivers/pm2_vid.c b/src/video_out/vidix/drivers/pm2_vid.c
index 1974600f8..1422bbd8b 100644
--- a/src/video_out/vidix/drivers/pm2_vid.c
+++ b/src/video_out/vidix/drivers/pm2_vid.c
@@ -34,8 +34,6 @@
 
 #include "glint_regs.h"
 
-#define PM2_MSG "pm2_vid:"
-
 #define VIDIX_STATIC pm2_
 
 /* MBytes of video memory to use */
@@ -109,7 +107,7 @@ int VIDIX_NAME(vixProbe)(int verbose, int force)
     err = pci_scan(lst,&num_pci);
     if(err)
     {
-	printf(PM2_MSG" Error occured during pci scan: %s\n",strerror(err));
+	printf("[pm2] Error occured during pci scan: %s\n",strerror(err));
 	return err;
     }
     else
@@ -124,21 +122,21 @@ int VIDIX_NAME(vixProbe)(int verbose, int force)
 		continue;
 	    dname = pci_device_name(lst[i].vendor, lst[i].device);
 	    dname = dname ? dname : "Unknown chip";
-	    printf(PM2_MSG" Found chip: %s\n", dname);
+	    printf("[pm2] Found chip: %s\n", dname);
 	    pm2_cap.device_id = lst[i].device;
 	    err = 0;
 	    memcpy(&pci_info, &lst[i], sizeof(pciinfo_t));
 	    break;
 	}
     }
-    if(err && verbose) printf(PM2_MSG" Can't find chip.\n");
+    if(err && verbose) printf("[pm2] Can't find chip.\n");
     return err;
 }
 
 #define PRINT_REG(reg)							\
 {									\
     long _foo = READ_REG(reg);						\
-    printf(PM2_MSG" " #reg " (%x) = %#lx (%li)\n", reg, _foo, _foo);	\
+    printf("[pm2] " #reg " (%x) = %#lx (%li)\n", reg, _foo, _foo);	\
 }
 
 int VIDIX_NAME(vixInit)(const char *args)
diff --git a/src/video_out/vidix/drivers/pm3_vid.c b/src/video_out/vidix/drivers/pm3_vid.c
index 0dff334ca..0777e8ccf 100644
--- a/src/video_out/vidix/drivers/pm3_vid.c
+++ b/src/video_out/vidix/drivers/pm3_vid.c
@@ -34,8 +34,6 @@
 
 #include "pm3_regs.h"
 
-#define PM3_MSG "pm3_vid:"
-
 #define VIDIX_STATIC pm3_
 
 /* MBytes of video memory to use */
@@ -109,7 +107,7 @@ int VIDIX_NAME(vixProbe)(int verbose, int force)
     err = pci_scan(lst,&num_pci);
     if(err)
     {
-	printf(PM3_MSG" Error occured during pci scan: %s\n",strerror(err));
+	printf("[pm3] Error occured during pci scan: %s\n",strerror(err));
 	return err;
     }
     else
@@ -126,7 +124,7 @@ int VIDIX_NAME(vixProbe)(int verbose, int force)
 		    continue;
 		dname = pci_device_name(VENDOR_3DLABS, lst[i].device);
 		dname = dname ? dname : "Unknown chip";
-		printf(PM3_MSG" Found chip: %s with IRQ %i\n",
+		printf("[pm3] Found chip: %s with IRQ %i\n",
 		       dname, lst[i].irq);
 		pm3_cap.device_id = lst[i].device;
 		err = 0;
@@ -135,14 +133,14 @@ int VIDIX_NAME(vixProbe)(int verbose, int force)
 	    }
 	}
     }
-    if(err && verbose) printf(PM3_MSG" Can't find chip\n");
+    if(err && verbose) printf("[pm3] Can't find chip\n");
     return err;
 }
 
 #define PRINT_REG(reg)							\
 {									\
     long _foo = READ_REG(reg);						\
-    printf(PM3_MSG" " #reg " (%x) = %#lx (%li)\n", reg, _foo, _foo);	\
+    printf("[pm3] " #reg " (%x) = %#lx (%li)\n", reg, _foo, _foo);	\
 }
 
 int VIDIX_NAME(vixInit)(const char *args)
@@ -173,7 +171,7 @@ int VIDIX_NAME(vixInit)(const char *args)
     pm3_mem = map_phys_mem(pci_info.base1, 0x2000000);
 
     if(bm_open() == 0){
-	fprintf(stderr, PM3_MSG" DMA available.\n");
+	fprintf(stderr, "[pm3] DMA available.\n");
 	pm3_cap.flags |= FLAG_DMA | FLAG_SYNC_DMA;
 	page_size = sysconf(_SC_PAGESIZE);
 	hwirq_install(pci_info.bus, pci_info.card, pci_info.func,
diff --git a/src/video_out/vidix/drivers/radeon_vid.c b/src/video_out/vidix/drivers/radeon_vid.c
index 7872f0540..de4e66194 100644
--- a/src/video_out/vidix/drivers/radeon_vid.c
+++ b/src/video_out/vidix/drivers/radeon_vid.c
@@ -22,10 +22,10 @@
 #include "radeon.h"
 
 #ifdef RAGE128
-#define RADEON_MSG "rage128_vid:"
+#define RADEON_MSG "[rage128]"
 #define X_ADJUST 0
 #else
-#define RADEON_MSG "radeon_vid:"
+#define RADEON_MSG "[radeon]"
 #define X_ADJUST (((besr.chip_flags&R_OVL_SHIFT)==R_OVL_SHIFT)?8:0)
 #ifndef RADEON
 #define RADEON
@@ -266,8 +266,12 @@ static video_registers_t vregs[] =
 #define R_280		0x00000006
 #define R_300		0x00000007
 #define R_350		0x00000008
+#define R_370		0x00000010
+#define R_380		0x00000020
+#define R_420		0x00000040
 #define R_OVL_SHIFT	0x00000100
 #define R_INTEGRATED	0x00000200
+#define R_PCIE		0x00000400
 
 typedef struct ati_card_ids_s
 {
@@ -386,7 +390,6 @@ static const ati_card_ids_t ati_card_ids[] =
  { DEVICE_ATI_R300_AG_FIREGL,		R_300 },
  { DEVICE_ATI_RADEON_R300_ND,		R_300 },
  { DEVICE_ATI_RADEON_R300_NE,		R_300 },
- { DEVICE_ATI_RV350_NF_RADEON,		R_300 },
  { DEVICE_ATI_RADEON_R300_NG,		R_300 },
  { DEVICE_ATI_R300_AD_RADEON,		R_300 },
  { DEVICE_ATI_R300_AE_RADEON,		R_300 },
@@ -396,22 +399,44 @@ static const ati_card_ids_t ati_card_ids[] =
  { DEVICE_ATI_R350_AH_RADEON,		R_350 },
  { DEVICE_ATI_R350_AI_RADEON,		R_350 },
  { DEVICE_ATI_R350_AJ_RADEON,		R_350 },
- { DEVICE_ATI_R350_AK_FIRE,			R_350 },
+ { DEVICE_ATI_R350_AK_FIRE,		R_350 },
  { DEVICE_ATI_RADEON_R350_RADEON2,	R_350 },
  { DEVICE_ATI_RADEON_R350_RADEON3,	R_350 },
  { DEVICE_ATI_RV350_NJ_RADEON,		R_350 },
- { DEVICE_ATI_R350_NK_FIRE,			R_350 },
+ { DEVICE_ATI_R350_NK_FIRE,		R_350 },
  { DEVICE_ATI_RV350_AP_RADEON,		R_350 },
  { DEVICE_ATI_RV350_AQ_RADEON,		R_350 },
  { DEVICE_ATI_RV350_AR_RADEON,		R_350 },
+ { DEVICE_ATI_RV350_AS_RADEON,		R_350 },
  { DEVICE_ATI_RV350_AT_FIRE,		R_350 },
+ { DEVICE_ATI_RV350_AU_FIRE,		R_350 },
  { DEVICE_ATI_RV350_AV_FIRE,		R_350 },
- { DEVICE_ATI_RV350_MOBILITY_RADEON,R_350 },
+ { DEVICE_ATI_RV350_AW_FIRE,		R_350 },
+ { DEVICE_ATI_RV350_MOBILITY_RADEON,	R_350 },
+ { DEVICE_ATI_RV350_NF_RADEON,		R_300 },
+ { DEVICE_ATI_RV350_NJ_RADEON,		R_300 },
  { DEVICE_ATI_M10_NQ_RADEON,		R_350 },
- { DEVICE_ATI_RV350_MOBILITY_RADEON2,R_350 },
+ { DEVICE_ATI_RV350_MOBILITY_RADEON2,	R_350 },
  { DEVICE_ATI_M10_NS_RADEON,		R_350 },
  { DEVICE_ATI_M10_NT_FIREGL,		R_350 },
- { DEVICE_ATI_M11_NV_FIREGL,		R_350 }
+ { DEVICE_ATI_M11_NV_FIREGL,		R_350 },
+ { DEVICE_ATI_RV370_5B60_RADEON,	R_370|R_PCIE  },
+ { DEVICE_ATI_RV370_5B62_RADEON,	R_370|R_PCIE  },
+ { DEVICE_ATI_RV370_5B64_FIREGL,	R_370|R_PCIE  },
+ { DEVICE_ATI_RV370_5B65_FIREGL,	R_370|R_PCIE  },
+ { DEVICE_ATI_RV380_0X3E50_RADEON,	R_380|R_PCIE  },
+ { DEVICE_ATI_RV380_0X3E54_FIREGL,	R_380|R_PCIE  },
+ { DEVICE_ATI_RV380_RADEON_X600,	R_380|R_PCIE  },
+ { DEVICE_ATI_R420_JH_RADEON,		R_420|R_PCIE  },
+ { DEVICE_ATI_R420_JI_RADEON,		R_420|R_PCIE  },
+ { DEVICE_ATI_R420_JJ_RADEON,		R_420|R_PCIE  },
+ { DEVICE_ATI_R420_JK_RADEON,		R_420|R_PCIE  },
+ { DEVICE_ATI_R420_JL_RADEON,		R_420|R_PCIE  },
+ { DEVICE_ATI_R420_JM_FIREGL,		R_420|R_PCIE  },
+ { DEVICE_ATI_M18_JN_RADEON,		R_420|R_PCIE  },
+ { DEVICE_ATI_R420_JP_RADEON,		R_420|R_PCIE  },
+ { DEVICE_ATI_R420_JM_FIREGL,		R_420|R_PCIE  },
+ { DEVICE_ATI_R423_5F57_RADEON,		R_420|R_PCIE  }
 #endif
 };
 
diff --git a/src/video_out/vidix/drivers/savage_regs.h b/src/video_out/vidix/drivers/savage_regs.h
new file mode 100644
index 000000000..a8a44c7c3
--- /dev/null
+++ b/src/video_out/vidix/drivers/savage_regs.h
@@ -0,0 +1,304 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/savage/savage_regs.h,v 1.10 2001/11/04 22:17:48 alanh Exp $ */
+
+#ifndef _SAVAGE_REGS_H
+#define _SAVAGE_REGS_H
+
+/* These are here until xf86PciInfo.h is updated. */
+
+#ifndef PCI_CHIP_S3TWISTER_P
+#define PCI_CHIP_S3TWISTER_P	0x8d01
+#endif
+#ifndef PCI_CHIP_S3TWISTER_K
+#define PCI_CHIP_S3TWISTER_K	0x8d02
+#endif
+#ifndef PCI_CHIP_SUPSAV_MX128
+#define PCI_CHIP_SUPSAV_MX128		0x8c22
+#define PCI_CHIP_SUPSAV_MX64		0x8c24
+#define PCI_CHIP_SUPSAV_MX64C		0x8c26
+#define PCI_CHIP_SUPSAV_IX128SDR	0x8c2a
+#define PCI_CHIP_SUPSAV_IX128DDR	0x8c2b
+#define PCI_CHIP_SUPSAV_IX64SDR		0x8c2c
+#define PCI_CHIP_SUPSAV_IX64DDR		0x8c2d
+#define PCI_CHIP_SUPSAV_IXCSDR		0x8c2e
+#define PCI_CHIP_SUPSAV_IXCDDR		0x8c2f
+#endif
+#ifndef PCI_CHIP_PROSAVAGE_DDR
+#define PCI_CHIP_PROSAVAGE_DDR	0x8d03
+#define PCI_CHIP_PROSAVAGE_DDRK	0x8d04
+#endif
+
+#define S3_SAVAGE3D_SERIES(chip)  ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE_MX))
+
+#define S3_SAVAGE4_SERIES(chip)   ((chip==S3_SAVAGE4) || (chip==S3_PROSAVAGE))
+
+#define	S3_SAVAGE_MOBILE_SERIES(chip)	((chip==S3_SAVAGE_MX) || (chip==S3_SUPERSAVAGE))
+
+#define S3_SAVAGE_SERIES(chip)    ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE2000))
+
+
+/* Chip tags.  These are used to group the adapters into 
+ * related families.
+ */
+
+
+enum S3CHIPTAGS {
+    S3_UNKNOWN = 0,
+    S3_SAVAGE3D,
+    S3_SAVAGE_MX,
+    S3_SAVAGE4,
+    S3_PROSAVAGE,
+    S3_SUPERSAVAGE,
+    S3_SAVAGE2000,
+    S3_LAST
+};
+
+typedef struct {
+    unsigned int mode, refresh;
+    unsigned char SR08, SR0E, SR0F;
+    unsigned char SR10, SR11, SR12, SR13, SR15, SR18, SR1B, SR29, SR30;
+    unsigned char SR54[8];
+    unsigned char Clock;
+    unsigned char CR31, CR32, CR33, CR34, CR36, CR3A, CR3B, CR3C;
+    unsigned char CR40, CR41, CR42, CR43, CR45;
+    unsigned char CR50, CR51, CR53, CR55, CR58, CR5B, CR5D, CR5E;
+    unsigned char CR60, CR63, CR65, CR66, CR67, CR68, CR69, CR6D, CR6F;
+    unsigned char CR86, CR88;
+    unsigned char CR90, CR91, CRB0;
+    unsigned int  STREAMS[22];	/* yuck, streams regs */
+    unsigned int  MMPR0, MMPR1, MMPR2, MMPR3;
+} SavageRegRec, *SavageRegPtr;
+
+
+
+#define BIOS_BSIZE			1024
+#define BIOS_BASE			0xc0000
+
+#define SAVAGE_NEWMMIO_REGBASE_S3	0x1000000  /* 16MB */
+#define SAVAGE_NEWMMIO_REGBASE_S4	0x0000000 
+#define SAVAGE_NEWMMIO_REGSIZE		0x0080000	/* 512kb */
+#define SAVAGE_NEWMMIO_VGABASE		0x8000
+
+#define BASE_FREQ			14.31818	
+
+#define FIFO_CONTROL_REG		0x8200
+#define MIU_CONTROL_REG			0x8204
+#define STREAMS_TIMEOUT_REG		0x8208
+#define MISC_TIMEOUT_REG		0x820c
+
+/* Stream Processor 1 */
+
+/* Primary Stream 1 Frame Buffer Address 0 */
+#define PRI_STREAM_FBUF_ADDR0           0x81c0
+/* Primary Stream 1 Frame Buffer Address 0 */
+#define PRI_STREAM_FBUF_ADDR1           0x81c4
+/* Primary Stream 1 Stride */
+#define PRI_STREAM_STRIDE               0x81c8
+/* Primary Stream 1 Frame Buffer Size */
+#define PRI_STREAM_BUFFERSIZE           0x8214
+
+/* Secondary stream 1 Color/Chroma Key Control */
+#define SEC_STREAM_CKEY_LOW             0x8184
+/* Secondary stream 1 Chroma Key Upper Bound */
+#define SEC_STREAM_CKEY_UPPER           0x8194
+/* Blend Control of Secondary Stream 1 & 2 */
+#define BLEND_CONTROL                   0x8190
+/* Secondary Stream 1 Color conversion/Adjustment 1 */
+#define SEC_STREAM_COLOR_CONVERT1       0x8198
+/* Secondary Stream 1 Color conversion/Adjustment 2 */
+#define SEC_STREAM_COLOR_CONVERT2       0x819c
+/* Secondary Stream 1 Color conversion/Adjustment 3 */
+#define SEC_STREAM_COLOR_CONVERT3       0x81e4
+/* Secondary Stream 1 Horizontal Scaling */
+#define SEC_STREAM_HSCALING             0x81a0
+/* Secondary Stream 1 Frame Buffer Size */
+#define SEC_STREAM_BUFFERSIZE           0x81a8
+/* Secondary Stream 1 Horizontal Scaling Normalization (2K only) */
+#define SEC_STREAM_HSCALE_NORMALIZE	0x81ac
+/* Secondary Stream 1 Horizontal Scaling */
+#define SEC_STREAM_VSCALING             0x81e8
+/* Secondary Stream 1 Frame Buffer Address 0 */
+#define SEC_STREAM_FBUF_ADDR0           0x81d0
+/* Secondary Stream 1 Frame Buffer Address 1 */
+#define SEC_STREAM_FBUF_ADDR1           0x81d4
+/* Secondary Stream 1 Frame Buffer Address 2 */
+#define SEC_STREAM_FBUF_ADDR2           0x81ec
+/* Secondary Stream 1 Stride */
+#define SEC_STREAM_STRIDE               0x81d8
+/* Secondary Stream 1 Window Start Coordinates */
+#define SEC_STREAM_WINDOW_START         0x81f8
+/* Secondary Stream 1 Window Size */
+#define SEC_STREAM_WINDOW_SZ            0x81fc
+/* Secondary Streams Tile Offset */
+#define SEC_STREAM_TILE_OFF             0x821c
+/* Secondary Stream 1 Opaque Overlay Control */
+#define SEC_STREAM_OPAQUE_OVERLAY       0x81dc
+
+
+/* Stream Processor 2 */
+
+/* Primary Stream 2 Frame Buffer Address 0 */
+#define PRI_STREAM2_FBUF_ADDR0          0x81b0
+/* Primary Stream 2 Frame Buffer Address 1 */
+#define PRI_STREAM2_FBUF_ADDR1          0x81b4
+/* Primary Stream 2 Stride */
+#define PRI_STREAM2_STRIDE              0x81b8
+/* Primary Stream 2 Frame Buffer Size */
+#define PRI_STREAM2_BUFFERSIZE          0x8218
+
+/* Secondary Stream 2 Color/Chroma Key Control */
+#define SEC_STREAM2_CKEY_LOW            0x8188
+/* Secondary Stream 2 Chroma Key Upper Bound */
+#define SEC_STREAM2_CKEY_UPPER          0x818c
+/* Secondary Stream 2 Horizontal Scaling */
+#define SEC_STREAM2_HSCALING            0x81a4
+/* Secondary Stream 2 Horizontal Scaling */
+#define SEC_STREAM2_VSCALING            0x8204
+/* Secondary Stream 2 Frame Buffer Size */
+#define SEC_STREAM2_BUFFERSIZE          0x81ac
+/* Secondary Stream 2 Frame Buffer Address 0 */
+#define SEC_STREAM2_FBUF_ADDR0          0x81bc
+/* Secondary Stream 2 Frame Buffer Address 1 */
+#define SEC_STREAM2_FBUF_ADDR1          0x81e0
+/* Secondary Stream 2 Frame Buffer Address 2 */
+#define SEC_STREAM2_FBUF_ADDR2          0x8208
+/* Multiple Buffer/LPB and Secondary Stream 2 Stride */
+#define SEC_STREAM2_STRIDE_LPB          0x81cc
+/* Secondary Stream 2 Color conversion/Adjustment 1 */
+#define SEC_STREAM2_COLOR_CONVERT1      0x81f0
+/* Secondary Stream 2 Color conversion/Adjustment 2 */
+#define SEC_STREAM2_COLOR_CONVERT2      0x81f4
+/* Secondary Stream 2 Color conversion/Adjustment 3 */
+#define SEC_STREAM2_COLOR_CONVERT3      0x8200
+/* Secondary Stream 2 Window Start Coordinates */
+#define SEC_STREAM2_WINDOW_START        0x820c
+/* Secondary Stream 2 Window Size */
+#define SEC_STREAM2_WINDOW_SZ           0x8210
+/* Secondary Stream 2 Opaque Overlay Control */
+#define SEC_STREAM2_OPAQUE_OVERLAY      0x8180
+
+
+/* savage 2000 */
+#define SEC_STREAM_COLOR_CONVERT0_2000       0x8198
+#define SEC_STREAM_COLOR_CONVERT1_2000       0x819c
+#define SEC_STREAM_COLOR_CONVERT2_2000       0x81e0
+#define SEC_STREAM_COLOR_CONVERT3_2000       0x81e4
+
+#define SUBSYS_STAT_REG			0x8504
+
+#define SRC_BASE			0xa4d4
+#define DEST_BASE			0xa4d8
+#define CLIP_L_R			0xa4dc
+#define CLIP_T_B			0xa4e0
+#define DEST_SRC_STR			0xa4e4
+#define MONO_PAT_0			0xa4e8
+#define MONO_PAT_1			0xa4ec
+
+/* Constants for CR69. */
+
+#define CRT_ACTIVE	0x01
+#define LCD_ACTIVE	0x02
+#define TV_ACTIVE	0x04
+#define CRT_ATTACHED	0x10
+#define LCD_ATTACHED	0x20
+#define TV_ATTACHED	0x40
+
+
+/*
+ * reads from SUBSYS_STAT
+ */
+#define STATUS_WORD0            (INREG(0x48C00))
+#define ALT_STATUS_WORD0        (INREG(0x48C60))
+#define MAXLOOP			0xffffff
+#define IN_SUBSYS_STAT()	(INREG(SUBSYS_STAT_REG))
+
+#define MAXFIFO		0x7f00
+
+/*
+ * NOTE: don't remove 'VGAIN8(vgaCRIndex);'.
+ * If not present it will cause lockups on Savage4.
+ * Ask S3, why.
+ */
+/*#define VerticalRetraceWait() \
+{ \
+        VGAIN8(0x3d0+4); \
+	VGAOUT8(0x3d0+4, 0x17); \
+	if (VGAIN8(0x3d0+5) & 0x80) { \
+		while ((VGAIN8(0x3d0 + 0x0a) & 0x08) == 0x08) ; \
+		while ((VGAIN8(0x3d0 + 0x0a) & 0x08) == 0x00) ; \
+	} \
+}
+*/
+
+#define VerticalRetraceWait()           \
+do {                                    \
+	VGAIN8(0x3d4);            \
+	VGAOUT8(0x3d4, 0x17);     \
+	if (VGAIN8(0x3d5) & 0x80) {  \
+		int i = 0x10000;                \
+		while ((VGAIN8(0x3da) & 0x08) == 0x08 && i--) ; \
+		i = 0x10000;                                                  \
+		while ((VGAIN8(0x3da) & 0x08) == 0x00 && i--) ; \
+	} \
+} while (0)
+
+
+#define	I2C_REG		0xa0
+#define InI2CREG(a)	\
+{ \
+    VGAOUT8(0x3d0 + 4, I2C_REG);	\
+    a = VGAIN8(0x3d0 + 5);		\
+}
+
+#define OutI2CREG(a)	\
+{ \
+    VGAOUT8(0x3d0 + 4, I2C_REG);	\
+    VGAOUT8(0x3d0 + 5, a);		\
+}
+ 
+#define HZEXP_COMP_1		0x54
+#define HZEXP_BORDER		0x58
+#define HZEXP_FACTOR_IGA1	0x59
+
+#define VTEXP_COMP_1		0x56
+#define VTEXP_BORDER		0x5a
+#define VTEXP_FACTOR_IGA1	0x5b
+
+#define EC1_CENTER_ON	0x10
+#define EC1_EXPAND_ON	0x0c
+
+#define MODE_24 24
+
+#if (MODE_24 == 32)
+# define  BYTES_PP24 4
+#else
+# define BYTES_PP24 3
+#endif
+
+#define OVERLAY_DEPTH 16
+
+#define  STREAMS_MODE32 0x7
+#define  STREAMS_MODE24 0x6
+#define  STREAMS_MODE16 0x5 /* @@@ */
+
+
+#define DEPTH_BPP(depth) (depth == 24 ? (BYTES_PP24 << 3) : (depth + 7) & ~0x7)
+#define DEPTH_2ND(depth) (depth > 8 ? depth\
+                              : OVERLAY_DEPTH)
+#define SSTREAMS_MODE(bpp) (bpp > 16 ? (bpp > 24 ? STREAMS_MODE32 :\
+				       STREAMS_MODE24) : STREAMS_MODE16)
+
+#define HSCALING_Shift    0
+#define HSCALING_Mask     (((1L << 16)-1) << HSCALING_Shift)
+#define HSCALING(w0,w1)   ((((unsigned int)(((double)w0/(double)w1) * (1 << 15))) \
+                               << HSCALING_Shift) \
+                           & HSCALING_Mask)
+                                                                                                                    
+#define VSCALING_Shift    0
+#define VSCALING_Mask     (((1L << 20)-1) << VSCALING_Shift)
+#define VSCALING(h0,h1)   ((((unsigned int) (((double)h0/(double)h1) * (1 << 15))) \
+                               << VSCALING_Shift) \
+                           & VSCALING_Mask)
+
+
+#endif /* _SAVAGE_REGS_H */
+
diff --git a/src/video_out/vidix/drivers/savage_vid.c b/src/video_out/vidix/drivers/savage_vid.c
new file mode 100644
index 000000000..2ac76198d
--- /dev/null
+++ b/src/video_out/vidix/drivers/savage_vid.c
@@ -0,0 +1,1472 @@
+/*
+    Driver for S3 Savage Series
+
+    Copyright (C) 2004 by Reza Jelveh
+
+    Based on the X11 driver and nvidia vid 
+
+    Thanks to Alex Deucher for Support
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+    Changes:
+    2004-11-09
+      Initial version
+
+    To Do:
+			
+*/
+
+
+#include <errno.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <inttypes.h>
+#include <unistd.h>
+#include <math.h>
+
+#include "vidix.h"
+#include "fourcc.h"
+#include "libdha.h"
+#include "pci_ids.h"
+#include "pci_names.h"
+
+#include "savage_regs.h"
+
+
+#define VF_STREAMS_ON   0x0001
+#define BASE_PAD 0xf
+#define FRAMEBUFFER_SIZE 1024*2000*4
+/**************************************
+   S3 streams processor
+**************************************/
+
+#define EXT_MISC_CTRL2              0x67
+
+/* New streams */
+
+/* CR67[2] = 1 : enable stream 1 */
+#define ENABLE_STREAM1              0x04
+/* CR67[1] = 1 : enable stream 2 */
+#define ENABLE_STREAM2              0x02
+/* mask to clear CR67[2,1] */
+#define NO_STREAMS                  0xF9
+/* CR67[3] = 1 : Mem-mapped regs */
+#define USE_MM_FOR_PRI_STREAM       0x08
+
+#define HDM_SHIFT	16
+#define HDSCALE_4	(2 << HDM_SHIFT)
+#define HDSCALE_8	(3 << HDM_SHIFT)
+#define HDSCALE_16	(4 << HDM_SHIFT)
+#define HDSCALE_32	(5 << HDM_SHIFT)
+#define HDSCALE_64	(6 << HDM_SHIFT)
+
+/* Old Streams */
+
+#define ENABLE_STREAMS_OLD	    0x0c
+#define NO_STREAMS_OLD		    0xf3
+/* CR69[0] = 1 : Mem-mapped regs */
+#define USE_MM_FOR_PRI_STREAM_OLD   0x01
+
+static void SavageStreamsOn(void);
+
+/*
+ * There are two different streams engines used in the Savage line.
+ * The old engine is in the 3D, 4, Pro, and Twister.
+ * The new engine is in the 2000, MX, IX, and Super.
+ */
+
+
+/* streams registers for old engine */
+#define PSTREAM_CONTROL_REG		0x8180
+#define COL_CHROMA_KEY_CONTROL_REG	0x8184
+#define SSTREAM_CONTROL_REG		0x8190
+#define CHROMA_KEY_UPPER_BOUND_REG	0x8194
+#define SSTREAM_STRETCH_REG		0x8198
+#define COLOR_ADJUSTMENT_REG		0x819C
+#define BLEND_CONTROL_REG		0x81A0
+#define PSTREAM_FBADDR0_REG		0x81C0
+#define PSTREAM_FBADDR1_REG		0x81C4
+#define PSTREAM_STRIDE_REG		0x81C8
+#define DOUBLE_BUFFER_REG		0x81CC
+#define SSTREAM_FBADDR0_REG		0x81D0
+#define SSTREAM_FBADDR1_REG		0x81D4
+#define SSTREAM_STRIDE_REG		0x81D8
+#define SSTREAM_VSCALE_REG		0x81E0
+#define SSTREAM_VINITIAL_REG		0x81E4
+#define SSTREAM_LINES_REG		0x81E8
+#define STREAMS_FIFO_REG		0x81EC
+#define PSTREAM_WINDOW_START_REG	0x81F0
+#define PSTREAM_WINDOW_SIZE_REG		0x81F4
+#define SSTREAM_WINDOW_START_REG	0x81F8
+#define SSTREAM_WINDOW_SIZE_REG		0x81FC
+#define FIFO_CONTROL			0x8200
+#define PSTREAM_FBSIZE_REG		0x8300
+#define SSTREAM_FBSIZE_REG		0x8304
+#define SSTREAM_FBADDR2_REG		0x8308
+
+#define OS_XY(x,y)	(((x+1)<<16)|(y+1))
+#define OS_WH(x,y)	(((x-1)<<16)|(y))
+
+#define PCI_COMMAND_MEM 0x2
+#define MAX_FRAMES 3
+/**
+ * @brief Information on PCI device.
+ */
+pciinfo_t pci_info;
+
+/**
+ * @brief Unichrome driver colorkey settings.
+ */
+/* static vidix_grkey_t savage_grkey; */
+
+/* static int frames[VID_PLAY_MAXFRAMES]; */
+uint8_t *vio;
+uint8_t mclk_save[3];
+
+#define outb(reg,val)	OUTPORT8(reg,val)
+#define inb(reg)	INPORT8(reg)
+#define outw(reg,val)	OUTPORT16(reg,val)
+#define inw(reg)	INPORT16(reg)
+#define outl(reg,val)	OUTPORT32(reg,val)
+#define inl(reg)	INPORT32(reg)
+
+
+/*
+ * PCI-Memory IO access macros.
+ */
+#define VID_WR08(p,i,val)  (((uint8_t *)(p))[(i)]=(val))
+#define VID_RD08(p,i)	   (((uint8_t *)(p))[(i)])
+
+#define VID_WR32(p,i,val)  (((uint32_t *)(p))[(i)/4]=(val))
+#define VID_RD32(p,i)	   (((uint32_t *)(p))[(i)/4])
+
+#ifndef USE_RMW_CYCLES
+/*
+ * Can be used to inhibit READ-MODIFY-WRITE cycles. On by default.
+ */
+
+#define MEM_BARRIER() __asm__ __volatile__ ("" : : : "memory")
+
+#undef	VID_WR08
+#define VID_WR08(p,i,val) ({ MEM_BARRIER(); ((uint8_t *)(p))[(i)]=(val); })
+#undef	VID_RD08
+#define VID_RD08(p,i)     ({ MEM_BARRIER(); ((uint8_t *)(p))[(i)]; })
+
+#undef	VID_WR16
+#define VID_WR16(p,i,val) ({ MEM_BARRIER(); ((uint16_t *)(p))[(i)/2]=(val); })
+#undef	VID_RD16
+#define VID_RD16(p,i)     ({ MEM_BARRIER(); ((uint16_t *)(p))[(i)/2]; })
+
+#undef	VID_WR32
+#define VID_WR32(p,i,val) ({ MEM_BARRIER(); ((uint32_t *)(p))[(i)/4]=(val); })
+#undef	VID_RD32
+#define VID_RD32(p,i)     ({ MEM_BARRIER(); ((uint32_t *)(p))[(i)/4]; })
+#endif /* USE_RMW_CYCLES */
+
+#define VID_AND32(p,i,val) VID_WR32(p,i,VID_RD32(p,i)&(val))
+#define VID_OR32(p,i,val)  VID_WR32(p,i,VID_RD32(p,i)|(val))
+#define VID_XOR32(p,i,val) VID_WR32(p,i,VID_RD32(p,i)^(val))
+
+
+/* from x driver */
+
+#define VGAIN8(addr) VID_RD08(info->control_base+0x8000, addr)
+#define VGAIN16(addr) VID_RD16(info->control_base+0x8000, addr)
+#define VGAIN(addr) VID_RD32(info->control_base+0x8000, addr)
+
+#define VGAOUT8(addr,val) VID_WR08(info->control_base+0x8000, addr, val)
+#define VGAOUT16(addr,val) VID_WR16(info->control_base+0x8000, addr, val)
+#define VGAOUT(addr,val) VID_WR32(info->control_base+0x8000, addr, val)
+
+#define INREG(addr) VID_RD32(info->control_base, addr)
+#define OUTREG(addr,val) VID_WR32(info->control_base, addr, val)
+#define INREG8(addr) VID_RD08(info->control_base, addr)
+#define OUTREG8(addr,val) VID_WR08(info->control_base, addr, val)
+#define INREG16(addr) VID_RD16(info->control_base, addr)
+#define OUTREG16(addr,val) VID_WR16(info->control_base, addr, val)
+
+#define ALIGN_TO(v, n) (((v) + (n-1)) & ~(n-1))
+
+
+void debugout(unsigned int addr, unsigned int val);
+
+
+struct savage_chip {
+	volatile uint32_t *PMC;	   /* general control			*/
+	volatile uint32_t *PME;	   /* multimedia port			*/
+	volatile uint32_t *PFB;	   /* framebuffer control		*/
+	volatile uint32_t *PVIDEO; /* overlay control			*/
+	volatile uint8_t  *PCIO;   /* SVGA (CRTC, ATTR) registers	*/
+	volatile uint8_t  *PVIO;   /* SVGA (MISC, GRAPH, SEQ) registers */
+	volatile uint32_t *PRAMIN; /* instance memory			*/
+	volatile uint32_t *PRAMHT; /* hash table			*/
+	volatile uint32_t *PRAMFC; /* fifo context table		*/
+	volatile uint32_t *PRAMRO; /* fifo runout table			*/
+	volatile uint32_t *PFIFO;  /* fifo control region		*/
+	volatile uint32_t *FIFO;   /* fifo channels (USER)		*/
+	volatile uint32_t *PGRAPH; /* graphics engine                   */
+
+	int arch;		   /* compatible NV_ARCH_XX define */
+	unsigned long fbsize;		   /* framebuffer size		   */
+	void (* lock) (struct savage_chip *, int);
+};
+typedef struct savage_chip savage_chip;
+
+
+struct savage_info {
+    unsigned int use_colorkey;    
+    unsigned int colorkey; /* saved xv colorkey*/
+    unsigned int vidixcolorkey; /*currently used colorkey*/
+    unsigned int depth; 
+    unsigned int bpp; 
+    unsigned int videoFlags;
+    unsigned int format;
+    unsigned int pitch;
+    unsigned int blendBase;
+    unsigned int lastKnownPitch;
+    unsigned int displayWidth, displayHeight;
+    unsigned int brightness,hue,saturation,contrast;
+    unsigned int src_w,src_h;
+    unsigned int drw_w,drw_h;  /*scaled width && height*/
+    unsigned int wx,wy;                /*window x && y*/
+    unsigned int screen_x;            /*screen width*/
+    unsigned int screen_y;            /*screen height*/
+    unsigned long buffer_size;		 /* size of the image buffer	       */
+    struct savage_chip chip;	 /* NV architecture structure		       */
+    void* video_base;		 /* virtual address of control region	       */
+    void* control_base;		 /* virtual address of fb region	       */
+    unsigned long picture_base;	 /* direct pointer to video picture	       */
+    unsigned long picture_offset;	 /* offset of video picture in frame buffer    */
+//	struct savage_dma dma;           /* DMA structure                              */
+    unsigned int cur_frame;
+    unsigned int num_frames;             /* number of buffers                          */
+    int bps;			/* bytes per line */
+  void (*SavageWaitIdle) ();
+  void (*SavageWaitFifo) (int space);
+};
+typedef struct savage_info savage_info;
+
+
+static savage_info* info;
+
+
+/**
+ * @brief Unichrome driver vidix capabilities.
+ */
+static vidix_capability_t savage_cap = {
+  "Savage/ProSavage/Twister vidix",
+  "Reza Jelveh <reza.jelveh@tuhh.de>",
+  TYPE_OUTPUT,
+  {0, 0, 0, 0},
+  4096,
+  4096,
+  4,
+  4,
+  -1,
+  FLAG_UPSCALER | FLAG_DOWNSCALER,
+  VENDOR_S3_INC,
+  -1,
+  {0, 0, 0, 0}
+};
+
+struct savage_cards {
+  unsigned short chip_id;
+  unsigned short arch;
+};
+
+
+static
+unsigned int GetBlendForFourCC( int id )
+{
+    switch( id ) {
+	case IMGFMT_YUY2:
+	case IMGFMT_YV12:
+	case IMGFMT_I420:
+	    return 1;
+	case IMGFMT_Y211:
+	    return 4;
+	case IMGFMT_RGB15:
+	    return 3;
+	case IMGFMT_RGB16:
+	    return 5;
+        default:
+	    return 0;
+    }
+}
+
+/**
+ * @brief list of card IDs compliant with the Unichrome driver .
+ */
+static struct savage_cards savage_card_ids[] = {
+	/*[ProSavage PN133] AGP4X VGA Controller (Twister)*/
+	{ PCI_CHIP_S3TWISTER_P, 	       		S3_PROSAVAGE },
+	/*[ProSavage KN133] AGP4X VGA Controller (TwisterK)*/
+	{ PCI_CHIP_S3TWISTER_K, 	       		S3_PROSAVAGE },
+	/*ProSavage DDR*/
+	{ PCI_CHIP_PROSAVAGE_DDR	, 		       		S3_PROSAVAGE },
+	/*[ProSavageDDR P4M266 K] */
+	{ PCI_CHIP_PROSAVAGE_DDRK	, 			S3_PROSAVAGE },
+};
+
+static void SavageSetColorOld(void)
+{
+
+
+  if( 
+  (info->format == IMGFMT_RGB15) ||
+	(info->format == IMGFMT_RGB16)
+    )
+    {
+  OUTREG( COLOR_ADJUSTMENT_REG, 0 );
+    }
+    else
+    {
+        /* Change 0..255 into 0..15 */
+  long sat = info->saturation * 16 / 256;
+  double hue = info->hue * 0.017453292;
+  unsigned long hs1 = ((long)(sat * cos(hue))) & 0x1f;
+  unsigned long hs2 = ((long)(sat * sin(hue))) & 0x1f;
+
+  OUTREG( COLOR_ADJUSTMENT_REG, 
+      0x80008000 |
+      (info->brightness + 128) |
+      ((info->contrast & 0xf8) << (12-7)) | 
+      (hs1 << 16) |
+      (hs2 << 24)
+  );
+  debugout( COLOR_ADJUSTMENT_REG, 
+      0x80008000 |
+      (info->brightness + 128) |
+      ((info->contrast & 0xf8) << (12-7)) | 
+      (hs1 << 16) |
+      (hs2 << 24)
+  );
+  
+  }
+}
+
+static void SavageSetColorKeyOld(void)
+{
+    int red, green, blue;
+
+    /* Here, we reset the colorkey and all the controls. */
+
+    red = (info->vidixcolorkey & 0x00FF0000) >> 16;
+    green = (info->vidixcolorkey & 0x0000FF00) >> 8;
+    blue = info->vidixcolorkey & 0x000000FF;
+
+    if( !info->vidixcolorkey ) {
+      printf("SavageSetColorKey disabling colorkey\n");
+      OUTREG( COL_CHROMA_KEY_CONTROL_REG, 0 );
+      OUTREG( CHROMA_KEY_UPPER_BOUND_REG, 0 );
+      OUTREG( BLEND_CONTROL_REG, 0 );
+    }
+    else {
+	switch (info->depth) {
+		// FIXME: isnt fixed yet
+	case 8:
+	    OUTREG( COL_CHROMA_KEY_CONTROL_REG,
+		0x37000000 | (info->vidixcolorkey & 0xFF) );
+	    OUTREG( CHROMA_KEY_UPPER_BOUND_REG,
+		0x00000000 | (info->vidixcolorkey & 0xFF) );
+	    break;
+	case 15:
+			/* 15 bpp 555 */
+      red&=0x1f;
+      green&=0x1f;
+      blue&=0x1f;
+	    OUTREG( COL_CHROMA_KEY_CONTROL_REG, 
+		0x05000000 | (red<<19) | (green<<11) | (blue<<3) );
+	    OUTREG( CHROMA_KEY_UPPER_BOUND_REG, 
+		0x00000000 | (red<<19) | (green<<11) | (blue<<3) );
+	    break;
+	case 16:
+			/* 16 bpp 565 */
+      red&=0x1f;
+      green&=0x3f;
+      blue&=0x1f;
+	    OUTREG( COL_CHROMA_KEY_CONTROL_REG, 
+		0x16000000 | (red<<19) | (green<<10) | (blue<<3) );
+	    OUTREG( CHROMA_KEY_UPPER_BOUND_REG, 
+		0x00020002 | (red<<19) | (green<<10) | (blue<<3) );
+	    break;
+	case 24:
+			/* 24 bpp 888 */
+	    OUTREG( COL_CHROMA_KEY_CONTROL_REG, 
+		0x17000000 | (red<<16) | (green<<8) | (blue) );
+	    OUTREG( CHROMA_KEY_UPPER_BOUND_REG, 
+		0x00000000 | (red<<16) | (green<<8) | (blue) );
+	    break;
+	}    
+
+	/* We use destination colorkey */
+	OUTREG( BLEND_CONTROL_REG, 0x05000000 );
+  }
+}
+
+
+static void SavageDisplayVideoOld(void)
+{
+    int vgaCRIndex, vgaCRReg, vgaIOBase;
+    unsigned int ssControl;
+    int cr92;
+
+
+    vgaIOBase = 0x3d0;
+    vgaCRIndex = vgaIOBase + 4;
+    vgaCRReg = vgaIOBase + 5;
+
+//    if( psav->videoFourCC != id )
+//	SavageStreamsOff(pScrn);
+
+    if( !info->videoFlags & VF_STREAMS_ON )
+    {
+				SavageStreamsOn();
+	//	SavageResetVideo();
+        SavageSetColorOld();
+				SavageSetColorKeyOld();
+    }
+   
+
+
+
+    /* Set surface format. */
+
+		OUTREG(SSTREAM_CONTROL_REG,GetBlendForFourCC(info->format) << 24 | info->src_w);
+
+		debugout(SSTREAM_CONTROL_REG,GetBlendForFourCC(info->format) << 24 | info->src_w);
+
+    /* Calculate horizontal scale factor. */
+
+    //FIXME: enable scaling
+    OUTREG(SSTREAM_STRETCH_REG, (info->src_w << 15) / info->drw_w );
+//    debugout(SSTREAM_STRETCH_REG, 1 << 15);
+
+    OUTREG(SSTREAM_LINES_REG, info->src_h );
+    debugout(SSTREAM_LINES_REG, info->src_h );
+
+
+    OUTREG(SSTREAM_VINITIAL_REG, 0 );
+    debugout(SSTREAM_VINITIAL_REG, 0 );
+    /* Calculate vertical scale factor. */
+
+//    OUTREG(SSTREAM_VSCALE_REG, 1 << 15);
+    OUTREG(SSTREAM_VSCALE_REG, VSCALING(info->src_h,info->drw_h) );
+    debugout(SSTREAM_VSCALE_REG, VSCALING(info->src_h,info->drw_h) );
+//    OUTREG(SSTREAM_VSCALE_REG, (info->src_h << 15) / info->drw_h );
+
+    /* Set surface location and stride. */
+
+    OUTREG(SSTREAM_FBADDR0_REG, info->picture_offset  );
+    debugout(SSTREAM_FBADDR0_REG, info->picture_offset  );
+
+    OUTREG(SSTREAM_FBADDR1_REG, 0 );
+    debugout(SSTREAM_FBADDR1_REG, 0 );
+    
+    OUTREG(SSTREAM_STRIDE_REG, info->pitch );
+    debugout(SSTREAM_STRIDE_REG, info->pitch );
+
+    OUTREG(SSTREAM_WINDOW_START_REG, OS_XY(info->wx, info->wy) );
+    debugout(SSTREAM_WINDOW_START_REG, OS_XY(info->wx, info->wy) );
+    OUTREG(SSTREAM_WINDOW_SIZE_REG, OS_WH(info->drw_w, info->drw_h) );
+    debugout(SSTREAM_WINDOW_SIZE_REG, OS_WH(info->drw_w, info->drw_h) );
+
+
+
+    ssControl = 0;
+
+    if( info->src_w > (info->drw_w << 1) )
+    {
+	/* BUGBUG shouldn't this be >=?  */
+	if( info->src_w <= (info->drw_w << 2) )
+	    ssControl |= HDSCALE_4;
+	else if( info->src_w > (info->drw_w << 3) )
+	    ssControl |= HDSCALE_8;
+	else if( info->src_w > (info->drw_w << 4) )
+	    ssControl |= HDSCALE_16;
+	else if( info->src_w > (info->drw_w << 5) )
+	    ssControl |= HDSCALE_32;
+	else if( info->src_w > (info->drw_w << 6) )
+	    ssControl |= HDSCALE_64;
+    }
+
+    ssControl |= info->src_w;
+    ssControl |= (1 << 24);
+
+    //FIXME: enable scaling
+    OUTREG(SSTREAM_CONTROL_REG, ssControl);
+    debugout(SSTREAM_CONTROL_REG, ssControl);
+
+		// FIXME: this should actually be enabled
+		
+    info->pitch = (info->pitch + 7) / 8;
+    VGAOUT8(vgaCRIndex, 0x92);
+    cr92 = VGAIN8(vgaCRReg);
+    VGAOUT8(vgaCRReg, (cr92 & 0x40) | (info->pitch >> 8) | 0x80);
+    VGAOUT8(vgaCRIndex, 0x93);
+    VGAOUT8(vgaCRReg, info->pitch);
+    OUTREG(STREAMS_FIFO_REG, 2 | 25 << 5 | 32 << 11);
+		
+    
+    
+
+}
+
+static void SavageInitStreamsOld()
+{
+    /*unsigned long jDelta;*/
+    unsigned long format = 0;
+
+    /*
+     * For the OLD streams engine, several of these registers
+     * cannot be touched unless streams are on.  Seems backwards to me;
+     * I'd want to set 'em up, then cut 'em loose.
+     */
+
+
+	/*jDelta = pScrn->displayWidth * (pScrn->bitsPerPixel + 7) / 8;*/
+	switch( info->depth ) {
+	    case  8: format = 0 << 24; break;
+	    case 15: format = 3 << 24; break;
+	    case 16: format = 5 << 24; break;
+	    case 24: format = 7 << 24; break;
+	}
+#warning enable this again
+	OUTREG(PSTREAM_FBSIZE_REG, 
+		info->screen_y * info->screen_x * (info->bpp >> 3));
+    
+    OUTREG( PSTREAM_WINDOW_START_REG, OS_XY(0,0) );
+    OUTREG( PSTREAM_WINDOW_SIZE_REG, OS_WH(info->screen_x, info->screen_y) );
+    OUTREG( PSTREAM_FBADDR1_REG, 0 ); 
+    /*OUTREG( PSTREAM_STRIDE_REG, jDelta );*/
+    OUTREG( PSTREAM_CONTROL_REG, format );
+    OUTREG( PSTREAM_FBADDR0_REG, 0 );
+		
+    /*OUTREG( PSTREAM_FBSIZE_REG, jDelta * pScrn->virtualY >> 3 );*/
+
+    OUTREG( COL_CHROMA_KEY_CONTROL_REG, 0 );
+    OUTREG( SSTREAM_CONTROL_REG, 0 );
+    OUTREG( CHROMA_KEY_UPPER_BOUND_REG, 0 );
+    OUTREG( SSTREAM_STRETCH_REG, 0 );
+    OUTREG( COLOR_ADJUSTMENT_REG, 0 );
+    OUTREG( BLEND_CONTROL_REG, 1 << 24 );
+    OUTREG( DOUBLE_BUFFER_REG, 0 );
+    OUTREG( SSTREAM_FBADDR0_REG, 0 );
+    OUTREG( SSTREAM_FBADDR1_REG, 0 );
+    OUTREG( SSTREAM_FBADDR2_REG, 0 );
+    OUTREG( SSTREAM_FBSIZE_REG, 0 );
+    OUTREG( SSTREAM_STRIDE_REG, 0 );
+    OUTREG( SSTREAM_VSCALE_REG, 0 );
+    OUTREG( SSTREAM_LINES_REG, 0 );
+    OUTREG( SSTREAM_VINITIAL_REG, 0 );
+#warning is this needed?
+    OUTREG( SSTREAM_WINDOW_START_REG, OS_XY(0xfffe, 0xfffe) );
+    OUTREG( SSTREAM_WINDOW_SIZE_REG, OS_WH(10,2) );
+
+}
+
+static void SavageStreamsOn()
+{
+     unsigned char jStreamsControl;
+     unsigned short vgaCRIndex = 0x3d0 + 4;
+     unsigned short vgaCRReg = 0x3d0 + 5;
+
+//    xf86ErrorFVerb(STREAMS_TRACE, "SavageStreamsOn\n" );
+
+    /* Sequence stolen from streams.c in M7 NT driver */
+
+
+		enable_app_io ();
+
+    /* Unlock extended registers. */
+
+	/* FIXME: it looks like mmaped io is broken with vgaout16  */
+    VGAOUT16(vgaCRIndex, 0x4838 );
+    VGAOUT16(vgaCRIndex, 0xa039);
+    VGAOUT16(0x3c4, 0x0608);
+
+		
+	
+    VGAOUT8( vgaCRIndex, EXT_MISC_CTRL2 );
+
+    if( S3_SAVAGE_MOBILE_SERIES(info->chip.arch) )
+    {
+//	SavageInitStreamsNew( pScrn );
+
+	jStreamsControl = VGAIN8( vgaCRReg ) | ENABLE_STREAM1;
+
+	    /* Wait for VBLANK. */	
+	    VerticalRetraceWait();
+	    /* Fire up streams! */
+	    VGAOUT16( vgaCRIndex, (jStreamsControl << 8) | EXT_MISC_CTRL2 );
+	/* These values specify brightness, contrast, saturation and hue. */
+	    OUTREG( SEC_STREAM_COLOR_CONVERT1, 0x0000C892 );
+	    OUTREG( SEC_STREAM_COLOR_CONVERT2, 0x00039F9A );
+	    OUTREG( SEC_STREAM_COLOR_CONVERT3, 0x01F1547E );
+    }
+    else if (info->chip.arch == S3_SAVAGE2000)
+    {
+//	SavageInitStreams2000( pScrn );
+
+	jStreamsControl = VGAIN8( vgaCRReg ) | ENABLE_STREAM1;
+
+	/* Wait for VBLANK. */	
+	VerticalRetraceWait();
+	/* Fire up streams! */
+	VGAOUT16( vgaCRIndex, (jStreamsControl << 8) | EXT_MISC_CTRL2 );
+	/* These values specify brightness, contrast, saturation and hue. */
+	OUTREG( SEC_STREAM_COLOR_CONVERT0_2000, 0x0000C892 );
+	OUTREG( SEC_STREAM_COLOR_CONVERT1_2000, 0x00033400 );
+	OUTREG( SEC_STREAM_COLOR_CONVERT2_2000, 0x000001CF );
+	OUTREG( SEC_STREAM_COLOR_CONVERT3_2000, 0x01F1547E );
+    }
+    else
+    {
+	jStreamsControl = VGAIN8( vgaCRReg ) | ENABLE_STREAMS_OLD;
+
+	/* Wait for VBLANK. */
+	
+	VerticalRetraceWait();
+
+	/* Fire up streams! */
+
+	VGAOUT16( vgaCRIndex, (jStreamsControl << 8) | EXT_MISC_CTRL2 );
+
+	SavageInitStreamsOld( );
+    }
+
+    /* Wait for VBLANK. */
+    
+    VerticalRetraceWait();
+
+    /* Turn on secondary stream TV flicker filter, once we support TV. */
+
+    /* SR70 |= 0x10 */
+
+    info->videoFlags |= VF_STREAMS_ON;
+
+}
+
+
+
+
+static void savage_getscreenproperties(struct savage_info *info){
+  unsigned char bpp=0;
+  /* uint32_t width=0; unused */
+
+  uint32_t vgaIOBase, vgaCRIndex, vgaCRReg;
+
+  vgaIOBase = 0x3d0;
+  vgaCRIndex = vgaIOBase + 4;
+  vgaCRReg = vgaIOBase + 5;
+
+
+  /* a little reversed from x driver source code */
+  VGAOUT8(vgaCRIndex, 0x67);
+  bpp = VGAIN8(vgaCRReg);
+
+
+  switch (bpp&0xf0) {
+  case 0x00:
+  case 0x10:
+      info->depth=8;
+      info->bpp=8;
+      break;
+  case 0x20:
+  case 0x30:
+      info->depth=15;
+      info->bpp=16;
+      break;
+  case 0x40:
+  case 0x50:
+      info->depth=16;
+      info->bpp=16;
+      break;
+  case 0x70:
+  case 0xd0:
+      info->depth=24;
+      info->bpp=32;
+      break;
+
+
+  }
+
+
+  VGAOUT8(vgaCRIndex, 0x1);
+  info->screen_x = (1 + VGAIN8(vgaCRReg))  <<3;
+  /*get screen height*/
+  /* get first 8 bits in VT_DISPLAY_END*/
+  VGAOUT8(0x03D4, 0x12);
+  info->screen_y = VGAIN8(0x03D5);
+  VGAOUT8(0x03D4,0x07);
+  /* get 9th bit in CRTC_OVERFLOW*/
+  info->screen_y |= (VGAIN8(0x03D5) &0x02)<<7;
+  /* and the 10th in CRTC_OVERFLOW*/
+  info->screen_y |=(VGAIN8(0x03D5) &0x40)<<3;
+  ++info->screen_y;
+
+	printf("screen_x = %d, screen_y = %d, bpp = %d\n",info->screen_x,info->screen_y,info->bpp);
+}
+
+
+static void SavageStreamsOff()
+{
+    unsigned char jStreamsControl;
+    unsigned short vgaCRIndex = 0x3d0 + 4;
+    unsigned short vgaCRReg = 0x3d0 + 5;
+
+
+    /* Unlock extended registers. */
+
+    VGAOUT16(vgaCRIndex, 0x4838);
+    VGAOUT16(vgaCRIndex, 0xa039);
+    VGAOUT16(0x3c4, 0x0608);
+
+    VGAOUT8( vgaCRIndex, EXT_MISC_CTRL2 );
+    if( S3_SAVAGE_MOBILE_SERIES(info->chip.arch)  ||
+        (info->chip.arch == S3_SUPERSAVAGE) ||
+        (info->chip.arch == S3_SAVAGE2000) )
+	jStreamsControl = VGAIN8( vgaCRReg ) & NO_STREAMS;
+    else
+	jStreamsControl = VGAIN8( vgaCRReg ) & NO_STREAMS_OLD;
+
+    /* Wait for VBLANK. */
+
+    VerticalRetraceWait();
+
+    /* Kill streams. */
+
+    VGAOUT16(vgaCRIndex, (jStreamsControl << 8) | EXT_MISC_CTRL2 );
+
+    VGAOUT16(vgaCRIndex, 0x0093 );
+    VGAOUT8( vgaCRIndex, 0x92 );
+    VGAOUT8( vgaCRReg, VGAIN8(vgaCRReg) & 0x40 );
+
+    info->videoFlags &= ~VF_STREAMS_ON;
+}
+
+
+/**
+ * @brief Check age of driver.
+ *
+ * @return vidix version number.
+ */
+unsigned int
+vixGetVersion (void)
+{
+  return (VIDIX_VERSION);
+}
+
+/**
+ * @brief Find chip index in Unichrome compliant devices list.
+ *
+ * @param chip_id PCI device ID.
+ *
+ * @returns index position in savage_card_ids if successful.
+ *          -1 if chip_id is not a compliant chipset ID.
+ */
+
+static int find_chip(unsigned chip_id){
+  unsigned i;
+  for(i = 0;i < sizeof(savage_card_ids)/sizeof(struct savage_cards);i++)
+  {
+    if(chip_id == savage_card_ids[i].chip_id)return i;
+  }
+  return -1;
+}
+
+/**
+ * @brief Probe hardware to find some useable chipset.
+ *
+ * @param verbose specifies verbose level.
+ * @param force specifies force mode : driver should ignore
+ *              device_id (danger but useful for new devices)
+ *
+ * @returns 0 if it can handle something in PC.
+ *          a negative error code otherwise.
+ */
+
+int vixProbe(int verbose, int force){
+    pciinfo_t lst[MAX_PCI_DEVICES];
+    unsigned i,num_pci;
+    int err;
+
+    if (force)
+	    printf("[savage_vid]: warning: forcing not supported yet!\n");
+    err = pci_scan(lst,&num_pci);
+    if(err){
+	printf("[savage_vid] Error occurred during pci scan: %s\n",strerror(err));
+	return err;
+    }
+    else {
+	err = ENXIO;
+	for(i=0; i < num_pci; i++){
+	    if(lst[i].vendor == VENDOR_S3_INC) {
+		int idx;
+		const char *dname;
+		idx = find_chip(lst[i].device);
+		if(idx == -1)
+		    continue;
+		dname = pci_device_name(lst[i].vendor, lst[i].device);
+		dname = dname ? dname : "Unknown chip";
+		printf("[savage_vid] Found chip: %s\n", dname);
+		savage_cap.device_id = lst[i].device;
+		err = 0;
+		memcpy(&pci_info, &lst[i], sizeof(pciinfo_t));
+		break;
+	    }
+	}
+    }
+    if(err && verbose) printf("[savage_vid] Can't find chip\n");
+    return err;
+}
+
+/**
+ * @brief Initializes driver.
+ *
+ * @returns 0 if ok.
+ *          a negative error code otherwise.
+ */
+int
+vixInit (const char *args)
+{
+	int mtrr;
+  unsigned char config1, /* m, n, n1, n2, sr8, cr3f, cr66 = 0, */ tmp;
+
+  static unsigned char RamSavage3D[] = { 8, 4, 4, 2 };
+  static unsigned char RamSavage4[] =  { 2, 4, 8, 12, 16, 32, 64, 32 };
+  static unsigned char RamSavageMX[] = { 2, 8, 4, 16, 8, 16, 4, 16 };
+  static unsigned char RamSavageNB[] = { 0, 2, 4, 8, 16, 32, 16, 2 };
+
+  int videoRam /*, videoRambytes */;
+
+  uint32_t   vgaIOBase, vgaCRIndex, vgaCRReg ;
+
+  unsigned char val;
+
+  vgaIOBase = 0x3d0;
+  vgaCRIndex = vgaIOBase + 4;
+  vgaCRReg = vgaIOBase + 5;
+
+	fprintf(stderr, "vixInit enter \n");
+//	//getc(stdin);
+	
+  info = (savage_info*)calloc(1,sizeof(savage_info));
+  
+
+  /* need this if we want direct outb and inb access? */
+  enable_app_io ();
+
+  /* 12mb + 32kb ? */
+  /* allocate some space for control registers */
+  info->chip.arch =  savage_card_ids[find_chip(pci_info.device)].arch;  
+
+  if (info->chip.arch == S3_SAVAGE3D) {
+      info->control_base = map_phys_mem(pci_info.base0+SAVAGE_NEWMMIO_REGBASE_S3, SAVAGE_NEWMMIO_REGSIZE);
+  }
+  else {
+      info->control_base = map_phys_mem(pci_info.base0+SAVAGE_NEWMMIO_REGBASE_S4, SAVAGE_NEWMMIO_REGSIZE);
+  }
+
+//  info->chip.PCIO   = (uint8_t *)  (info->control_base + SAVAGE_NEWMMIO_VGABASE);
+
+  // FIXME: enable mmio?
+  val = VGAIN8 (0x3c3);
+  VGAOUT8 (0x3c3, val | 0x01);
+  val = VGAIN8 (0x3cc);
+  VGAOUT8 (0x3c2, val | 0x01);
+
+  if (info->chip.arch >= S3_SAVAGE4)
+	{
+		VGAOUT8 (0x3d4, 0x40);
+		val = VGAIN8 (0x3d5);
+		VGAOUT8 (0x3d5, val | 1);
+	}
+
+
+
+  /* unprotect CRTC[0-7] */
+  VGAOUT8(vgaCRIndex, 0x11);
+  tmp = VGAIN8(vgaCRReg);
+//  printf("$########## tmp = %d\n",tmp);
+  VGAOUT8(vgaCRReg, tmp & 0x7f);
+
+
+  /* unlock extended regs */
+  VGAOUT16(vgaCRIndex, 0x4838);
+  VGAOUT16(vgaCRIndex, 0xa039);
+  VGAOUT16(0x3c4, 0x0608);
+
+  VGAOUT8(vgaCRIndex, 0x40);
+  tmp = VGAIN8(vgaCRReg);
+  VGAOUT8(vgaCRReg, tmp & ~0x01);
+
+  /* unlock sys regs */
+  VGAOUT8(vgaCRIndex, 0x38);
+  VGAOUT8(vgaCRReg, 0x48);
+
+  /* Unlock system registers. */
+  VGAOUT16(vgaCRIndex, 0x4838);
+
+  /* Next go on to detect amount of installed ram */
+
+  VGAOUT8(vgaCRIndex, 0x36);            /* for register CR36 (CONFG_REG1), */
+  config1 = VGAIN8(vgaCRReg);           /* get amount of vram installed */
+
+
+  switch( info->chip.arch ) {
+    case S3_SAVAGE3D:
+      videoRam = RamSavage3D[ (config1 & 0xC0) >> 6 ] * 1024;
+      break;
+
+    case S3_SAVAGE4:
+		/* 
+			* The Savage4 has one ugly special case to consider.  On
+			* systems with 4 banks of 2Mx32 SDRAM, the BIOS says 4MB
+			* when it really means 8MB.  Why do it the same when you
+			* can do it different...
+			*/
+			VGAOUT8(0x3d4, 0x68);  /* memory control 1 */
+			if( (VGAIN8(0x3d5) & 0xC0) == (0x01 << 6) )
+				RamSavage4[1] = 8;
+
+			/*FALLTHROUGH*/
+
+		case S3_SAVAGE2000:
+			videoRam = RamSavage4[ (config1 & 0xE0) >> 5 ] * 1024;
+			break;
+
+		case S3_SAVAGE_MX:
+			videoRam = RamSavageMX[ (config1 & 0x0E) >> 1 ] * 1024;
+			break;
+
+		case S3_PROSAVAGE:
+			videoRam = RamSavageNB[ (config1 & 0xE0) >> 5 ] * 1024;
+			break;
+
+		default:
+			/* How did we get here? */
+			videoRam = 0;
+			break;
+	}
+
+
+	printf("###### videoRam = %d\n",videoRam);
+	info->chip.fbsize = videoRam * 1024;
+
+
+  /* reset graphics engine to avoid memory corruption */
+#if 0
+  VGAOUT8 (0x3d4, 0x66);
+  cr66 = VGAIN8 (0x3d5);
+  VGAOUT8 (0x3d5, cr66 | 0x02);
+  udelay (10000);
+
+  VGAOUT8 (0x3d4, 0x66);
+  VGAOUT8 (0x3d5, cr66 & ~0x02); /* clear reset flag */
+#endif
+ /* udelay (10000); */
+
+	/* This maps framebuffer @6MB, thus 2MB are left for video. */
+	if (info->chip.arch == S3_SAVAGE3D) {
+		info->video_base = map_phys_mem(pci_info.base0, info->chip.fbsize);
+		info->picture_offset = 1024*768* 4 * ((info->chip.fbsize > 4194304)?2:1);
+	}
+	else {
+		info->video_base = map_phys_mem(pci_info.base1, info->chip.fbsize);
+		info->picture_offset = info->chip.fbsize - FRAMEBUFFER_SIZE;
+//			info->picture_offset = 1024*1024* 4 * 2;
+	}
+	if ( info->video_base < 0 ){
+		printf("errno = %s\n",  strerror(errno));
+		return -1; 
+	}
+
+
+	info->picture_base = (uint32_t) info->video_base + info->picture_offset;
+
+	if ( info->chip.arch == S3_SAVAGE3D ){
+		mtrr = mtrr_set_type(pci_info.base0, info->chip.fbsize, MTRR_TYPE_WRCOMB);
+	}
+	else{ 
+		mtrr = mtrr_set_type(pci_info.base1, info->chip.fbsize, MTRR_TYPE_WRCOMB);
+	}
+
+	if (mtrr!= 0)
+		printf("[savage_vid] unable to setup MTRR: %s\n", strerror(mtrr));
+	else
+		printf("[savage_vid] MTRR set up\n");
+
+	/* This may trash your screen for resolutions greater than 1024x768, sorry. */
+	
+
+	savage_getscreenproperties(info);
+//	return -1;
+	info->videoFlags = 0;
+
+	SavageStreamsOn();
+	//getc(stdin);
+	//FIXME ADD
+  return 0;
+}
+
+/**
+ * @brief Destroys driver.
+ */
+void
+vixDestroy (void)
+{
+	unmap_phys_mem(info->video_base, info->chip.fbsize);
+	unmap_phys_mem(info->control_base, SAVAGE_NEWMMIO_REGSIZE);
+	//FIXME ADD
+}
+
+/**
+ * @brief Get chipset's hardware capabilities.
+ *
+ * @param to Pointer to the vidix_capability_t structure to be filled.
+ *
+ * @returns 0.
+ */
+int
+vixGetCapability (vidix_capability_t * to)
+{
+  memcpy (to, &savage_cap, sizeof (vidix_capability_t));
+  return 0;
+}
+
+/**
+ * @brief Report if the video FourCC is supported by hardware.
+ *
+ * @param fourcc input image format.
+ *
+ * @returns 1 if the fourcc is supported.
+ *          0 otherwise.
+ */
+static int
+is_supported_fourcc (uint32_t fourcc)
+{
+  switch (fourcc)
+    {
+//FIXME: YV12 isnt working properly yet			
+//    case IMGFMT_YV12:
+//    case IMGFMT_I420:
+    case IMGFMT_UYVY:
+    case IMGFMT_YVYU:
+    case IMGFMT_YUY2:
+    case IMGFMT_RGB15:
+    case IMGFMT_RGB16:
+//    case IMGFMT_BGR32:
+      return 1;
+    default:
+      return 0;
+    }
+}
+
+/**
+ * @brief Try to configure video memory for given fourcc.
+ *
+ * @param to Pointer to the vidix_fourcc_t structure to be filled.
+ *
+ * @returns 0 if ok.
+ *          errno otherwise.
+ */
+int
+vixQueryFourcc (vidix_fourcc_t * to)
+{
+  if (is_supported_fourcc (to->fourcc))
+    {
+      to->depth = VID_DEPTH_1BPP | VID_DEPTH_2BPP |
+	VID_DEPTH_4BPP | VID_DEPTH_8BPP |
+	VID_DEPTH_12BPP | VID_DEPTH_15BPP |
+	VID_DEPTH_16BPP | VID_DEPTH_24BPP | VID_DEPTH_32BPP;
+      to->flags = VID_CAP_EXPAND | VID_CAP_SHRINK | VID_CAP_COLORKEY;
+      return 0;
+    }
+  else
+    to->depth = to->flags = 0;
+
+  return ENOSYS;
+}
+
+/**
+ * @brief Get the GrKeys
+ *
+ * @param grkey Pointer to the vidix_grkey_t structure to be filled by driver.
+ *
+ * @return 0.
+ */
+/*int
+vixGetGrKeys (vidix_grkey_t * grkey)
+{
+
+//  if(info->d_width && info->d_height)savage_overlay_start(info,0);
+
+  return (0);
+}
+ * */
+
+/**
+ * @brief Set the GrKeys
+ *
+ * @param grkey Colorkey to be set.
+ *
+ * @return 0.
+ */
+int
+vixSetGrKeys (const vidix_grkey_t * grkey)
+{
+  if (grkey->ckey.op == CKEY_FALSE)
+  {
+    info->use_colorkey = 0;
+    info->vidixcolorkey=0;
+    printf("[savage_vid] colorkeying disabled\n");
+  }
+  else {
+    info->use_colorkey = 1;
+    info->vidixcolorkey = ((grkey->ckey.red<<16)|(grkey->ckey.green<<8)|grkey->ckey.blue);
+
+    printf("[savage_vid] set colorkey 0x%x\n",info->vidixcolorkey);
+  }
+	//FIXME: freezes if streams arent enabled
+  SavageSetColorKeyOld();
+  return (0);
+}
+
+/**
+ * @brief Unichrome driver equalizer capabilities.
+ */
+vidix_video_eq_t equal = {
+  VEQ_CAP_BRIGHTNESS | VEQ_CAP_SATURATION | VEQ_CAP_HUE,
+  300, 100, 0, 0, 0, 0, 0, 0
+};
+
+
+/**
+ * @brief Get the equalizer capabilities.
+ *
+ * @param eq Pointer to the vidix_video_eq_t structure to be filled by driver.
+ *
+ * @return 0.
+ */
+int
+vixPlaybackGetEq (vidix_video_eq_t * eq)
+{
+  memcpy (eq, &equal, sizeof (vidix_video_eq_t));
+  return 0;
+}
+
+/**
+ * @brief Set the equalizer capabilities for color correction
+ *
+ * @param eq equalizer capabilities to be set.
+ *
+ * @return 0.
+ */
+int
+vixPlaybackSetEq (const vidix_video_eq_t * eq)
+{
+  return 0;
+}
+
+/**
+ * @brief Y, U, V offsets.
+ */
+/* static int YOffs, UOffs, VOffs; */
+
+/**
+ * @brief Configure driver for playback. Driver should prepare BES.
+ *
+ * @param info configuration description for playback.
+ *
+ * @returns  0 in case of success.
+ *          -1 otherwise.
+ */
+int
+vixConfigPlayback (vidix_playback_t * vinfo)
+{
+  int uv_size, swap_uv;
+  unsigned int i;
+#if 0
+  int extfifo_on;
+  int srcPitch,srcPitch2;
+
+  /* Overlay register settings */
+  uint32_t win_start, win_end;
+  uint32_t zoom, mini;
+  uint32_t dcount, falign, qwfetch;
+  uint32_t y_start, u_start, v_start;
+  uint32_t v_ctrl, fifo_ctrl;
+#endif
+
+  if (!is_supported_fourcc (vinfo->fourcc))
+    return -1;
+
+
+
+  info->src_w = vinfo->src.w;
+  info->src_h = vinfo->src.h;
+
+  info->drw_w = vinfo->dest.w;
+  info->drw_h = vinfo->dest.h;
+  
+  info->wx = vinfo->dest.x;
+  info->wy = vinfo->dest.y;
+  info->format = vinfo->fourcc;
+
+  info->lastKnownPitch = 0;
+  info->brightness = 0;
+  info->contrast = 128;
+  info->saturation = 128;
+  info->hue = 0;
+
+
+  vinfo->dga_addr=(void*)(info->picture_base);
+
+
+		  vinfo->offset.y = 0;
+		  vinfo->offset.v = 0;
+		  vinfo->offset.u = 0;
+
+		  vinfo->dest.pitch.y = 32;
+		  vinfo->dest.pitch.u = 32;
+		  vinfo->dest.pitch.v = 32;
+	//	  vinfo->dest.pitch.u = 0;
+	//	  vinfo->dest.pitch.v = 0;
+			
+
+   info->pitch = ((info->src_w << 1) + 15) & ~15;
+
+  swap_uv = 0;
+  switch (vinfo->fourcc)
+  {
+	  case IMGFMT_YUY2:
+	  case IMGFMT_UYVY:
+			
+		  info->pitch = ((info->src_w << 1) + (vinfo->dest.pitch.y-1)) & ~(vinfo->dest.pitch.y-1);
+
+			info->pitch = info->src_w << 1;
+      info->pitch = ALIGN_TO (info->src_w << 1, 32);
+      uv_size = 0;
+		  break;
+	  case IMGFMT_YV12:
+		swap_uv = 1;
+
+
+	
+		/*
+			srcPitch = (info->src_w + 3) & ~3;
+			vinfo->offset.u = srcPitch * info->src_h;
+			srcPitch2 = ((info->src_w >> 1) + 3) & ~3;
+			vinfo->offset.v = (srcPitch2 * (info->src_h >> 1)) + vinfo->offset.v;
+
+			vinfo->dest.pitch.y=srcPitch ;
+			vinfo->dest.pitch.v=srcPitch2 ;
+			vinfo->dest.pitch.u=srcPitch2 ;
+			*/
+	
+
+      info->pitch = ALIGN_TO (info->src_w, 32);
+      uv_size = (info->pitch >> 1) * (info->src_h >> 1);
+
+  vinfo->offset.y = 0;
+  vinfo->offset.v = vinfo->offset.y + info->pitch * info->src_h;
+  vinfo->offset.u = vinfo->offset.v + uv_size;
+  vinfo->frame_size = vinfo->offset.u + uv_size;
+/*  YOffs = info->offset.y;
+  UOffs = (swap_uv ? vinfo->offset.v : vinfo->offset.u);
+  VOffs = (swap_uv ? vinfo->offset.u : vinfo->offset.v);
+	*/
+//	  vinfo->offset.y = info->src_w;
+//	  vinfo->offset.v = vinfo->offset.y + info->src_w /2 * info->src_h;
+//	  vinfo->offset.u = vinfo->offset.v + (info->src_w >> 1) * (info->src_h >> 1) ;
+
+		  break;
+  }
+			info->pitch |= ((info->pitch >> 1) << 16);
+
+		  vinfo->frame_size = info->pitch * info->src_h;
+
+			printf("$#### destination pitch = %u\n", info->pitch&0xffff);
+
+
+
+
+  info->buffer_size = vinfo->frame_size;
+  info->num_frames = vinfo->num_frames= (info->chip.fbsize - info->picture_offset)/vinfo->frame_size;
+  if(vinfo->num_frames > MAX_FRAMES)vinfo->num_frames = MAX_FRAMES;
+//    vinfo->num_frames = 1;
+//    printf("[nvidia_vid] Number of frames %i\n",vinfo->num_frames);
+  for(i=0;i <vinfo->num_frames;i++)vinfo->offsets[i] = vinfo->frame_size*i;
+
+  return 0;
+}
+
+/**
+ * @brief Set playback on : driver should activate BES on this call.
+ *
+ * @return 0.
+ */
+int
+vixPlaybackOn (void)
+{
+ // FIXME: enable
+  SavageDisplayVideoOld();
+//FIXME ADD
+  return 0;
+}
+
+/**
+ * @brief Set playback off : driver should deactivate BES on this call.
+ *
+ * @return 0.
+ */
+int
+vixPlaybackOff (void)
+{
+	// otherwise we wont disable streams properly in new xorg
+	// FIXME: shouldnt this be enabled?
+//  SavageStreamsOn();
+  SavageStreamsOff();
+//  info->vidixcolorkey=0x0;
+
+//  OUTREG( SSTREAM_WINDOW_START_REG, OS_XY(0xfffe, 0xfffe) );
+//  SavageSetColorKeyOld();
+//FIXME ADD
+  return 0;
+}
+
+/**
+ * @brief Driver should prepare and activate corresponded frame.
+ *
+ * @param frame the frame index.
+ *
+ * @return 0.
+ *
+ * @note This function is used only for double and triple buffering
+ *       and never used for single buffering playback.
+ */
+#if 0
+int
+vixPlaybackFrameSelect (unsigned int frame)
+{
+////FIXME ADD
+//    savage_overlay_start(info, frame);
+    //if (info->num_frames >= 1)
+//	    info->cur_frame = frame//(frame+1)%info->num_frames;
+//
+//	savage4_waitidle(info); 
+ 	
+   printf("vixPlaybackFrameSelect Leave\n" );
+	 // FIXME: does this work to avoid tearing?
+//   VerticalRetraceWait();
+   
+  return 0;
+}
+
+#endif 
+
+
+
+void debugout(unsigned int addr, unsigned int val){
+	return ;
+    switch ( addr ){
+	case PSTREAM_CONTROL_REG:
+	    fprintf(stderr,"PSTREAM_CONTROL_REG");
+	    break;
+	case COL_CHROMA_KEY_CONTROL_REG:
+	    fprintf(stderr,"COL_CHROMA_KEY_CONTROL_REG");
+	    break;
+	case SSTREAM_CONTROL_REG:
+	    fprintf(stderr,"SSTREAM_CONTROL_REG");
+	    break;
+	case CHROMA_KEY_UPPER_BOUND_REG:
+	    fprintf(stderr,"CHROMA_KEY_UPPER_BOUND_REG");
+	    break;
+	case SSTREAM_STRETCH_REG:
+	    fprintf(stderr,"SSTREAM_STRETCH_REG");
+	    break;
+	case COLOR_ADJUSTMENT_REG:
+	    fprintf(stderr,"COLOR_ADJUSTMENT_REG");
+	    break;
+	case BLEND_CONTROL_REG:
+	    fprintf(stderr,"BLEND_CONTROL_REG");
+	    break;
+	case PSTREAM_FBADDR0_REG:
+	    fprintf(stderr,"PSTREAM_FBADDR0_REG");
+	    break;
+	case PSTREAM_FBADDR1_REG:
+	    fprintf(stderr,"PSTREAM_FBADDR1_REG");
+	    break;
+	case PSTREAM_STRIDE_REG:
+	    fprintf(stderr,"PSTREAM_STRIDE_REG");
+	    break;
+	case DOUBLE_BUFFER_REG:
+	    fprintf(stderr,"DOUBLE_BUFFER_REG");
+	    break;
+	case SSTREAM_FBADDR0_REG:
+	    fprintf(stderr,"SSTREAM_FBADDR0_REG");
+	    break;
+	case SSTREAM_FBADDR1_REG:
+	    fprintf(stderr,"SSTREAM_FBADDR1_REG");
+	    break;
+	case SSTREAM_STRIDE_REG:
+	    fprintf(stderr,"SSTREAM_STRIDE_REG");
+	    break;
+	case SSTREAM_VSCALE_REG:
+	    fprintf(stderr,"SSTREAM_VSCALE_REG");
+	    break;
+	case SSTREAM_VINITIAL_REG:
+	    fprintf(stderr,"SSTREAM_VINITIAL_REG");
+	    break;
+	case SSTREAM_LINES_REG:
+	    fprintf(stderr,"SSTREAM_LINES_REG");
+	    break;
+	case STREAMS_FIFO_REG:
+	    fprintf(stderr,"STREAMS_FIFO_REG");
+	    break;
+	case PSTREAM_WINDOW_START_REG:
+	    fprintf(stderr,"PSTREAM_WINDOW_START_REG");
+	    break;
+	case PSTREAM_WINDOW_SIZE_REG:
+	    fprintf(stderr,"PSTREAM_WINDOW_SIZE_REG");
+	    break;
+	case SSTREAM_WINDOW_START_REG:
+	    fprintf(stderr,"SSTREAM_WINDOW_START_REG");
+	    break;
+	case SSTREAM_WINDOW_SIZE_REG:
+	    fprintf(stderr,"SSTREAM_WINDOW_SIZE_REG");
+	    break;
+	case FIFO_CONTROL:
+	    fprintf(stderr,"FIFO_CONTROL");
+	    break;
+	case PSTREAM_FBSIZE_REG:
+	    fprintf(stderr,"PSTREAM_FBSIZE_REG");
+	    break;
+	case SSTREAM_FBSIZE_REG:
+	    fprintf(stderr,"SSTREAM_FBSIZE_REG");
+	    break;
+	case SSTREAM_FBADDR2_REG:
+	    fprintf(stderr,"SSTREAM_FBADDR2_REG");
+	    break;
+
+    }
+    fprintf(stderr,":\t\t 0x%08X = %u\n",val,val);
+}
+
+
+