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authorMiguel Freitas <miguelfreitas@users.sourceforge.net>2001-10-22 01:05:20 +0000
committerMiguel Freitas <miguelfreitas@users.sourceforge.net>2001-10-22 01:05:20 +0000
commit3b328e0475bc5cd8c55d0fbc17e687066629edf3 (patch)
treeb5e66abe0cd2b9103286140b87f187ade7b6d8fb /src
parentd68f03f0e0804f6e5c5dfac69baf9afb0e2ddff5 (diff)
downloadxine-lib-3b328e0475bc5cd8c55d0fbc17e687066629edf3.tar.gz
xine-lib-3b328e0475bc5cd8c55d0fbc17e687066629edf3.tar.bz2
remove prefetchnta from mmx1 code
(hopefully will fix k6-2 problems) CVS patchset: 854 CVS date: 2001/10/22 01:05:20
Diffstat (limited to 'src')
-rw-r--r--src/xine-utils/memcpy.c36
1 files changed, 24 insertions, 12 deletions
diff --git a/src/xine-utils/memcpy.c b/src/xine-utils/memcpy.c
index 23a17059c..511dd38ef 100644
--- a/src/xine-utils/memcpy.c
+++ b/src/xine-utils/memcpy.c
@@ -91,6 +91,19 @@ If you have questions please contact with me: Nick Kurshev: nickols_k@mail.ru.
on K7 and P3 about 500% (5 times).
*/
+/* Additional notes on gcc assembly and processors: [MF]
+prefetch is specific for AMD processors, the intel ones should be
+prefetch0, prefetch1, prefetch2 which are not recognized by my gcc.
+prefetchnta is supported both on athlon and pentium 3.
+
+therefore i will take off prefetchnta instructions from the mmx1 version
+to avoid problems on pentium mmx and k6-2.
+
+quote of the day:
+"Using prefetches efficiently is more of an art than a science"
+*/
+
+
#ifdef ARCH_X86
/* for small memory blocks (<256 bytes) this version is faster */
@@ -142,8 +155,17 @@ static void * sse_memcpy(void * to, const void * from, size_t len)
{
void *retval;
size_t i;
- retval = to;
-
+ retval = to;
+
+ /* PREFETCH has effect even for MOVSB instruction ;) */
+ __asm__ __volatile__ (
+ " prefetchnta (%0)\n"
+ " prefetchnta 64(%0)\n"
+ " prefetchnta 128(%0)\n"
+ " prefetchnta 192(%0)\n"
+ " prefetchnta 256(%0)\n"
+ : : "r" (from) );
+
if(len >= MIN_LEN)
{
register unsigned long int delta;
@@ -216,15 +238,6 @@ static void * mmx_memcpy(void * to, const void * from, size_t len)
size_t i;
retval = to;
- /* PREFETCH has effect even for MOVSB instruction ;) */
- __asm__ __volatile__ (
- " prefetchnta (%0)\n"
- " prefetchnta 64(%0)\n"
- " prefetchnta 128(%0)\n"
- " prefetchnta 192(%0)\n"
- " prefetchnta 256(%0)\n"
- : : "r" (from) );
-
if(len >= MMX1_MIN_LEN)
{
register unsigned long int delta;
@@ -241,7 +254,6 @@ static void * mmx_memcpy(void * to, const void * from, size_t len)
for(; i>0; i--)
{
__asm__ __volatile__ (
- "prefetchnta 320(%0)\n"
"movq (%0), %%mm0\n"
"movq 8(%0), %%mm1\n"
"movq 16(%0), %%mm2\n"