diff options
36 files changed, 6828 insertions, 2703 deletions
diff --git a/src/video_out/libdha/AsmMacros.h b/src/video_out/libdha/AsmMacros.h index 5e4e1addc..1549a6a7c 100644 --- a/src/video_out/libdha/AsmMacros.h +++ b/src/video_out/libdha/AsmMacros.h @@ -74,8 +74,10 @@ #include "sysdep/AsmMacros_arm32.h" #elif defined(__powerpc__) #include "sysdep/AsmMacros_powerpc.h" -#else +#elif defined (__i386__) #include "sysdep/AsmMacros_x86.h" +#else +#include "sysdep/AsmMacros_generic.h" #endif #else /* __GNUC__ */ @@ -85,12 +87,12 @@ /* inb, outb, inw and outw are defined in the library */ /* ... but I've no idea if the same is true for inl & outl */ -u8_t inb(U16_t); -void outb(U16_t, U8_t); -u16_t inw(U16_t); -void outw(U16_t, U16_t); -u32_t inl(U16_t); -void outl(U16_t, U32_t); +extern u8_t inb(U16_t); +extern void outb(U16_t, U8_t); +extern u16_t inw(U16_t); +extern void outw(U16_t, U16_t); +extern u32_t inl(U16_t); +extern void outl(U16_t, U32_t); #else /* not _MINIX and _ACK */ diff --git a/src/video_out/libdha/Makefile.am b/src/video_out/libdha/Makefile.am index 11ca3ef3c..cb74a6178 100644 --- a/src/video_out/libdha/Makefile.am +++ b/src/video_out/libdha/Makefile.am @@ -12,7 +12,7 @@ awk_generated = pci_dev_ids.c pci_ids.h pci_names.c pci_names.h pci_vendors.h noinst_LTLIBRARIES = $(dha_lib) -libdha_la_SOURCES = libdha.c mtrr.c pci.c pci_names.c mmi.c +libdha_la_SOURCES = libdha.c mtrr.c pci.c pci_names.c mmi.c ports.c irq.c cpu_flush.c EXTRA_PROGRAMS = test diff --git a/src/video_out/libdha/kernelhelper/dhahelper.c b/src/video_out/libdha/kernelhelper/dhahelper.c index f85b4efd1..b438364d0 100644 --- a/src/video_out/libdha/kernelhelper/dhahelper.c +++ b/src/video_out/libdha/kernelhelper/dhahelper.c @@ -2,7 +2,8 @@ Direct Hardware Access kernel helper (C) 2002 Alex Beregszaszi <alex@naxine.org> - + (C) 2002 Nick Kurshev <nickols_k@mail.ru> + Accessing hardware from userspace as USER (no root needed!) Tested on 2.2.x (2.2.19) and 2.4.x (2.4.3,2.4.17). @@ -12,6 +13,9 @@ WARNING! THIS MODULE VIOLATES SEVERAL SECURITY LINES! DON'T USE IT ON PRODUCTION SYSTEMS, ONLY AT HOME, ON A "SINGLE-USER" SYSTEM. NO WARRANTY! + + IF YOU WANT TO USE IT ON PRODUCTION SYSTEMS THEN PLEASE READ 'README' + FILE TO KNOW HOW TO PREVENT ANONYMOUS ACCESS TO THIS MODULE. Tech: Communication between userspace and kernelspace goes over character @@ -26,8 +30,6 @@ Note: do not use other than minor==0, the module forbids it. TODO: - * do memory mapping without fops:mmap - * implement unmap memory * select (request?) a "valid" major number (from Linux project? ;) * make security * is pci handling needed? (libdha does this with lowlevel port funcs) @@ -56,8 +58,18 @@ #include <linux/kernel.h> #include <linux/sched.h> #include <linux/mm.h> +#include <linux/pagemap.h> +#include <linux/init.h> +#include <linux/pci.h> +#include <linux/interrupt.h> +#include <linux/wrapper.h> +#include <linux/vmalloc.h> #include <linux/string.h> #include <linux/errno.h> +#include <asm/io.h> +#include <asm/pgtable.h> +#include <asm/unistd.h> +#include <asm/uaccess.h> #if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,0) #include <linux/malloc.h> @@ -78,10 +90,14 @@ #include <linux/fs.h> #include <linux/unistd.h> +#ifdef CONFIG_DEVFS_FS +#include <linux/devfs_fs_kernel.h> +#endif + #include "dhahelper.h" -MODULE_AUTHOR("Alex Beregszaszi <alex@naxine.org>"); -MODULE_DESCRIPTION("Provides userspace access to hardware (security violation!)"); +MODULE_AUTHOR("Alex Beregszaszi <alex@naxine.org> and Nick Kurshev <nickols_k@mail.ru>"); +MODULE_DESCRIPTION("Provides userspace access to hardware"); #ifdef MODULE_LICENSE MODULE_LICENSE("GPL"); #endif @@ -97,9 +113,6 @@ static int dhahelper_verbosity = 1; MODULE_PARM(dhahelper_verbosity, "i"); MODULE_PARM_DESC(dhahelper_verbosity, "Level of verbosity (0 = silent, 1 = only errors, 2 = debug)"); -static dhahelper_memory_t last_mem_request; - - static int dhahelper_open(struct inode *inode, struct file *file) { if (dhahelper_verbosity > 1) @@ -209,44 +222,176 @@ static int dhahelper_port(dhahelper_port_t * arg) return 0; } -static int dhahelper_memory(dhahelper_memory_t * arg) +/*******************************/ +/* Memory management functions */ +/* from kernel:/drivers/media/video/bttv-driver.c */ +/*******************************/ + +#define MDEBUG(x) do { } while(0) /* Debug memory management */ + +/* [DaveM] I've recoded most of this so that: + * 1) It's easier to tell what is happening + * 2) It's more portable, especially for translating things + * out of vmalloc mapped areas in the kernel. + * 3) Less unnecessary translations happen. + * + * The code used to assume that the kernel vmalloc mappings + * existed in the page tables of every process, this is simply + * not guarenteed. We now use pgd_offset_k which is the + * defined way to get at the kernel page tables. + */ + +/* Given PGD from the address space's page table, return the kernel + * virtual mapping of the physical memory mapped at ADR. + */ +static inline unsigned long uvirt_to_kva(pgd_t *pgd, unsigned long adr) +{ + unsigned long ret = 0UL; + pmd_t *pmd; + pte_t *ptep, pte; + + if (!pgd_none(*pgd)) { + pmd = pmd_offset(pgd, adr); + if (!pmd_none(*pmd)) { + ptep = pte_offset(pmd, adr); + pte = *ptep; + if(pte_present(pte)) { + ret = (unsigned long) page_address(pte_page(pte)); + ret |= (adr & (PAGE_SIZE - 1)); + + } + } + } + MDEBUG(printk("uv2kva(%lx-->%lx)", adr, ret)); + return ret; +} + +static inline unsigned long uvirt_to_bus(unsigned long adr) { - dhahelper_memory_t mem; - if (copy_from_user(&mem, arg, sizeof(dhahelper_memory_t))) + unsigned long kva, ret; + + kva = uvirt_to_kva(pgd_offset(current->mm, adr), adr); + ret = virt_to_bus((void *)kva); + MDEBUG(printk("uv2b(%lx-->%lx)", adr, ret)); + return ret; +} + +static inline unsigned long uvirt_to_pa(unsigned long adr) +{ + unsigned long kva, ret; + + kva = uvirt_to_kva(pgd_offset(current->mm, adr), adr); + ret = virt_to_phys((void *)kva); + MDEBUG(printk("uv2b(%lx-->%lx)", adr, ret)); + return ret; +} + +static inline unsigned long kvirt_to_bus(unsigned long adr) +{ + unsigned long va, kva, ret; + + va = VMALLOC_VMADDR(adr); + kva = uvirt_to_kva(pgd_offset_k(va), va); + ret = virt_to_bus((void *)kva); + MDEBUG(printk("kv2b(%lx-->%lx)", adr, ret)); + return ret; +} + +/* Here we want the physical address of the memory. + * This is used when initializing the contents of the + * area and marking the pages as reserved. + */ +static inline unsigned long kvirt_to_pa(unsigned long adr) +{ + unsigned long va, kva, ret; + + va = VMALLOC_VMADDR(adr); + kva = uvirt_to_kva(pgd_offset_k(va), va); + ret = __pa(kva); + MDEBUG(printk("kv2pa(%lx-->%lx)", adr, ret)); + return ret; +} + +static void * rvmalloc(signed long size) +{ + void * mem; + unsigned long adr, page; + + mem=vmalloc_32(size); + if (mem) { - if (dhahelper_verbosity > 0) - printk(KERN_ERR "dhahelper: failed copy from userspace\n"); - return -EFAULT; + memset(mem, 0, size); /* Clear the ram out, no junk to the user */ + adr=(unsigned long) mem; + while (size > 0) + { + page = kvirt_to_pa(adr); + mem_map_reserve(virt_to_page(__va(page))); + adr+=PAGE_SIZE; + size-=PAGE_SIZE; + } } - switch(mem.operation) + return mem; +} + +static int pag_lock(unsigned long addr) +{ + unsigned long page; + unsigned long kva; + + kva = uvirt_to_kva(pgd_offset(current->mm, addr), addr); + if(kva) { - case MEMORY_OP_MAP: - { -#if 1 - memcpy(&last_mem_request, &mem, sizeof(dhahelper_memory_t)); -#else - mem.ret = do_mmap(file, mem.start, mem.size, PROT_READ|PROT_WRITE, - MAP_SHARED, mem.offset); -#endif - break; - } - case MEMORY_OP_UNMAP: - break; - default: - if (dhahelper_verbosity > 0) - printk(KERN_ERR "dhahelper: invalid memory operation (%d)\n", - mem.operation); - return -EINVAL; + lock_it: + page = uvirt_to_pa((unsigned long)addr); + LockPage(virt_to_page(__va(page))); + SetPageReserved(virt_to_page(__va(page))); } - if (copy_to_user(arg, &mem, sizeof(dhahelper_memory_t))) + else { - if (dhahelper_verbosity > 0) - printk(KERN_ERR "dhahelper: failed copy to userspace\n"); - return -EFAULT; + copy_from_user(&page,(char *)addr,1); /* try access it */ + kva = uvirt_to_kva(pgd_offset(current->mm, addr), addr); + if(kva) goto lock_it; + else return EPERM; } return 0; } +static int pag_unlock(unsigned long addr) +{ + unsigned long page; + unsigned long kva; + + kva = uvirt_to_kva(pgd_offset(current->mm, addr), addr); + if(kva) + { + page = uvirt_to_pa((unsigned long)addr); + UnlockPage(virt_to_page(__va(page))); + ClearPageReserved(virt_to_page(__va(page))); + return 0; + } + return EPERM; +} + + +static void rvfree(void * mem, signed long size) +{ + unsigned long adr, page; + + if (mem) + { + adr=(unsigned long) mem; + while (size > 0) + { + page = kvirt_to_pa(adr); + mem_map_unreserve(virt_to_page(__va(page))); + adr+=PAGE_SIZE; + size-=PAGE_SIZE; + } + vfree(mem); + } +} + + static int dhahelper_virt_to_phys(dhahelper_vmi_t *arg) { dhahelper_vmi_t mem; @@ -264,7 +409,7 @@ static int dhahelper_virt_to_phys(dhahelper_vmi_t *arg) for(i=0;i<nitems;i++) { unsigned long result; - result = virt_to_phys(addr); + result = uvirt_to_pa((unsigned long)addr); if (copy_to_user(&mem.realaddr[i], &result, sizeof(unsigned long))) { if (dhahelper_verbosity > 0) @@ -293,7 +438,7 @@ static int dhahelper_virt_to_bus(dhahelper_vmi_t *arg) for(i=0;i<nitems;i++) { unsigned long result; - result = virt_to_bus(addr); + result = uvirt_to_bus((unsigned long)addr); if (copy_to_user(&mem.realaddr[i], &result, sizeof(unsigned long))) { if (dhahelper_verbosity > 0) @@ -305,6 +450,291 @@ static int dhahelper_virt_to_bus(dhahelper_vmi_t *arg) return 0; } + +static int dhahelper_alloc_pa(dhahelper_mem_t *arg) +{ + dhahelper_mem_t mem; + if (copy_from_user(&mem, arg, sizeof(dhahelper_mem_t))) + { + if (dhahelper_verbosity > 0) + printk(KERN_ERR "dhahelper: failed copy from userspace\n"); + return -EFAULT; + } + mem.addr = rvmalloc(mem.length); + if (copy_to_user(arg, &mem, sizeof(dhahelper_mem_t))) + { + if (dhahelper_verbosity > 0) + printk(KERN_ERR "dhahelper: failed copy to userspace\n"); + return -EFAULT; + } + return 0; +} + +static int dhahelper_free_pa(dhahelper_mem_t *arg) +{ + dhahelper_mem_t mem; + if (copy_from_user(&mem, arg, sizeof(dhahelper_mem_t))) + { + if (dhahelper_verbosity > 0) + printk(KERN_ERR "dhahelper: failed copy from userspace\n"); + return -EFAULT; + } + rvfree(mem.addr,mem.length); + return 0; +} + +static int dhahelper_lock_mem(dhahelper_mem_t *arg) +{ + dhahelper_mem_t mem; + int retval; + unsigned long i,nitems,addr; + if (copy_from_user(&mem, arg, sizeof(dhahelper_mem_t))) + { + if (dhahelper_verbosity > 0) + printk(KERN_ERR "dhahelper: failed copy from userspace\n"); + return -EFAULT; + } + nitems = mem.length / PAGE_SIZE; + if(mem.length % PAGE_SIZE) nitems++; + addr = (unsigned long)mem.addr; + for(i=0;i<nitems;i++) + { + retval = pag_lock((unsigned long)addr); + if(retval) + { + unsigned long j; + addr = (unsigned long)mem.addr; + for(j=0;j<i;j++) + { + pag_unlock(addr); + addr += PAGE_SIZE; + } + return retval; + } + addr += PAGE_SIZE; + } + return 0; +} + +static int dhahelper_unlock_mem(dhahelper_mem_t *arg) +{ + dhahelper_mem_t mem; + int retval; + unsigned long i,nitems,addr; + if (copy_from_user(&mem, arg, sizeof(dhahelper_mem_t))) + { + if (dhahelper_verbosity > 0) + printk(KERN_ERR "dhahelper: failed copy from userspace\n"); + return -EFAULT; + } + nitems = mem.length / PAGE_SIZE; + if(mem.length % PAGE_SIZE) nitems++; + addr = (unsigned long)mem.addr; + for(i=0;i<nitems;i++) + { + retval = pag_unlock((unsigned long)addr); + if(retval) return retval; + addr += PAGE_SIZE; + } + return 0; +} + +static struct dha_irq { + spinlock_t lock; + long flags; + int handled; + int rcvd; + volatile u32 *ack_addr; + u32 ack_data; + struct pci_dev *dev; + wait_queue_head_t wait; + unsigned long count; +} dha_irqs[256]; + +static void dhahelper_irq_handler(int irq, void *dev_id, struct pt_regs *regs) +{ + spin_lock_irqsave(&dha_irqs[irq].lock, dha_irqs[irq].flags); + if(dha_irqs[irq].handled){ + dha_irqs[irq].rcvd = 1; + dha_irqs[irq].count++; + if(dha_irqs[irq].ack_addr){ + *dha_irqs[irq].ack_addr = dha_irqs[irq].ack_data; + mb(); + } + wake_up_interruptible(&dha_irqs[irq].wait); + } + spin_unlock_irqrestore(&dha_irqs[irq].lock, dha_irqs[irq].flags); +} + +static int dhahelper_install_irq(dhahelper_irq_t *arg) +{ + dhahelper_irq_t my_irq; + struct pci_dev *pci; + long rlen; + int retval; + long ack_addr; + int irqn; + + if (copy_from_user(&my_irq, arg, sizeof(dhahelper_irq_t))) + { + if (dhahelper_verbosity > 0) + printk(KERN_ERR "dhahelper: failed copy from userspace\n"); + return -EFAULT; + } + + if(!(pci = pci_find_slot(my_irq.bus, PCI_DEVFN(my_irq.dev, my_irq.func)))) + return -EINVAL; + + rlen = pci_resource_len(pci, my_irq.ack_region); + if(my_irq.ack_offset > rlen - 4) + return -EINVAL; + + irqn = pci->irq; + + spin_lock_irqsave(&dha_irqs[irqn].lock, + dha_irqs[irqn].flags); + + if(dha_irqs[irqn].handled){ + retval = -EBUSY; + goto fail; + } + + if(my_irq.ack_region >= 0){ + ack_addr = pci_resource_start(pci, my_irq.ack_region); + ack_addr += my_irq.ack_offset; +#ifdef CONFIG_ALPHA + ack_addr += ((struct pci_controller *) pci->sysdata)->dense_mem_base; +#endif + /* FIXME: Other architectures */ + + dha_irqs[irqn].ack_addr = phys_to_virt(ack_addr); + dha_irqs[irqn].ack_data = my_irq.ack_data; + } else { + dha_irqs[irqn].ack_addr = 0; + } + + dha_irqs[irqn].lock = SPIN_LOCK_UNLOCKED; + dha_irqs[irqn].flags = 0; + dha_irqs[irqn].rcvd = 0; + dha_irqs[irqn].dev = pci; + init_waitqueue_head(&dha_irqs[irqn].wait); + dha_irqs[irqn].count = 0; + + retval = request_irq(irqn, dhahelper_irq_handler, + SA_SHIRQ, "dhahelper", pci); + + if(retval < 0) + goto fail; + + copy_to_user(&arg->num, &irqn, sizeof(irqn)); + + dha_irqs[irqn].handled = 1; + +out: + spin_unlock_irqrestore(&dha_irqs[irqn].lock, + dha_irqs[irqn].flags); + return retval; + +fail: + if(retval == -EINVAL){ + printk("dhahelper: bad irq number or handler\n"); + } else if(retval == -EBUSY){ + printk("dhahelper: IRQ %u busy\n", irqn); + } else { + printk("dhahelper: Could not install irq handler...\n"); + } + printk("dhahelper: Perhaps you need to let your BIOS assign an IRQ to your video card\n"); + goto out; +} + +static int dhahelper_free_irq(dhahelper_irq_t *arg) +{ + dhahelper_irq_t irq; + struct pci_dev *pci; + int irqn; + + if (copy_from_user(&irq, arg, sizeof(dhahelper_irq_t))) + { + if (dhahelper_verbosity > 0) + printk(KERN_ERR "dhahelper: failed copy from userspace\n"); + return -EFAULT; + } + + pci = pci_find_slot(irq.bus, PCI_DEVFN(irq.dev, irq.func)); + if(!pci) + return -EINVAL; + + irqn = pci->irq; + + spin_lock_irqsave(&dha_irqs[irqn].lock, dha_irqs[irqn].flags); + if(dha_irqs[irqn].handled) { + free_irq(irqn, pci); + dha_irqs[irqn].handled = 0; + printk("IRQ %i: %li\n", irqn, dha_irqs[irqn].count); + } + spin_unlock_irqrestore(&dha_irqs[irqn].lock, dha_irqs[irqn].flags); + return 0; +} + +static int dhahelper_ack_irq(dhahelper_irq_t *arg) +{ + dhahelper_irq_t irq; + int retval = 0; + DECLARE_WAITQUEUE(wait, current); + if (copy_from_user(&irq, arg, sizeof(dhahelper_irq_t))) + { + if (dhahelper_verbosity > 0) + printk(KERN_ERR "dhahelper: failed copy from userspace\n"); + return -EFAULT; + } + if(irq.num > 255) return -EINVAL; + if(!dha_irqs[irq.num].handled) return -ESRCH; + add_wait_queue(&dha_irqs[irq.num].wait, &wait); + set_current_state(TASK_INTERRUPTIBLE); + for(;;){ + int r; + spin_lock_irqsave(&dha_irqs[irq.num].lock, + dha_irqs[irq.num].flags); + r = dha_irqs[irq.num].rcvd; + spin_unlock_irqrestore(&dha_irqs[irq.num].lock, + dha_irqs[irq.num].flags); + + if(r){ + dha_irqs[irq.num].rcvd = 0; + break; + } + + if(signal_pending(current)){ + retval = -ERESTARTSYS; + break; + } + + schedule(); + } + set_current_state(TASK_RUNNING); + remove_wait_queue(&dha_irqs[irq.num].wait, &wait); + return retval; +} + +static int dhahelper_cpu_flush(dhahelper_cpu_flush_t *arg) +{ + dhahelper_cpu_flush_t my_l2; + if (copy_from_user(&my_l2, arg, sizeof(dhahelper_cpu_flush_t))) + { + if (dhahelper_verbosity > 0) + printk(KERN_ERR "dhahelper: failed copy from userspace\n"); + return -EFAULT; + } +#if defined(__i386__) + /* WBINVD writes all modified cache lines back to main memory */ + if(boot_cpu_data.x86 > 3) { __asm __volatile("wbinvd":::"memory"); } +#else + /* FIXME!!!*/ + mb(); /* declared in "asm/system.h" */ +#endif + return 0; +} + static int dhahelper_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg) { @@ -319,9 +749,16 @@ static int dhahelper_ioctl(struct inode *inode, struct file *file, { case DHAHELPER_GET_VERSION: return dhahelper_get_version((int *)arg); case DHAHELPER_PORT: return dhahelper_port((dhahelper_port_t *)arg); - case DHAHELPER_MEMORY: return dhahelper_memory((dhahelper_memory_t *)arg); case DHAHELPER_VIRT_TO_PHYS:return dhahelper_virt_to_phys((dhahelper_vmi_t *)arg); case DHAHELPER_VIRT_TO_BUS: return dhahelper_virt_to_bus((dhahelper_vmi_t *)arg); + case DHAHELPER_ALLOC_PA:return dhahelper_alloc_pa((dhahelper_mem_t *)arg); + case DHAHELPER_FREE_PA: return dhahelper_free_pa((dhahelper_mem_t *)arg); + case DHAHELPER_LOCK_MEM: return dhahelper_lock_mem((dhahelper_mem_t *)arg); + case DHAHELPER_UNLOCK_MEM: return dhahelper_unlock_mem((dhahelper_mem_t *)arg); + case DHAHELPER_INSTALL_IRQ: return dhahelper_install_irq((dhahelper_irq_t *)arg); + case DHAHELPER_ACK_IRQ: return dhahelper_ack_irq((dhahelper_irq_t *)arg); + case DHAHELPER_FREE_IRQ: return dhahelper_free_irq((dhahelper_irq_t *)arg); + case DHAHELPER_CPU_FLUSH: return dhahelper_cpu_flush((dhahelper_cpu_flush_t *)arg); default: if (dhahelper_verbosity > 0) printk(KERN_ERR "dhahelper: invalid ioctl (%x)\n", cmd); @@ -330,36 +767,196 @@ static int dhahelper_ioctl(struct inode *inode, struct file *file, return 0; } -static int dhahelper_mmap(struct file *file, struct vm_area_struct *vma) +/* + fops functions were shamelessly stolen from linux-kernel project ;) +*/ + +static loff_t dhahelper_lseek(struct file * file, loff_t offset, int orig) { - if (last_mem_request.operation != MEMORY_OP_MAP) - { - if (dhahelper_verbosity > 0) - printk(KERN_ERR "dhahelper: mapping not requested before mmap\n"); - return -EFAULT; - } - - if (dhahelper_verbosity > 1) - printk(KERN_INFO "dhahelper: mapping %x (size: %x)\n", - last_mem_request.start+last_mem_request.offset, last_mem_request.size); - - if (remap_page_range(0, last_mem_request.start + last_mem_request.offset, - last_mem_request.size, vma->vm_page_prot)) - { - if (dhahelper_verbosity > 0) - printk(KERN_ERR "dhahelper: error mapping memory\n"); - return -EFAULT; - } + switch (orig) { + case 0: + file->f_pos = offset; + return file->f_pos; + case 1: + file->f_pos += offset; + return file->f_pos; + default: + return -EINVAL; + } +} - return 0; +/* + * This funcion reads the *physical* memory. The f_pos points directly to the + * memory location. + */ +static ssize_t dhahelper_read(struct file * file, char * buf, + size_t count, loff_t *ppos) +{ + unsigned long p = *ppos; + unsigned long end_mem; + ssize_t read; + + end_mem = __pa(high_memory); + if (p >= end_mem) + return 0; + if (count > end_mem - p) + count = end_mem - p; + read = 0; +#if defined(__sparc__) || defined(__mc68000__) + /* we don't have page 0 mapped on sparc and m68k.. */ + if (p < PAGE_SIZE) { + unsigned long sz = PAGE_SIZE-p; + if (sz > count) + sz = count; + if (sz > 0) { + if (clear_user(buf, sz)) + return -EFAULT; + buf += sz; + p += sz; + count -= sz; + read += sz; + } + } +#endif + if (copy_to_user(buf, __va(p), count)) + return -EFAULT; + read += count; + *ppos += read; + return read; +} + +static ssize_t do_write_mem(struct file * file, void *p, unsigned long realp, + const char * buf, size_t count, loff_t *ppos) +{ + ssize_t written; + + written = 0; +#if defined(__sparc__) || defined(__mc68000__) + /* we don't have page 0 mapped on sparc and m68k.. */ + if (realp < PAGE_SIZE) { + unsigned long sz = PAGE_SIZE-realp; + if (sz > count) sz = count; + /* Hmm. Do something? */ + buf+=sz; + p+=sz; + count-=sz; + written+=sz; + } +#endif + if (copy_from_user(p, buf, count)) + return -EFAULT; + written += count; + *ppos += written; + return written; +} + +static ssize_t dhahelper_write(struct file * file, const char * buf, + size_t count, loff_t *ppos) +{ + unsigned long p = *ppos; + unsigned long end_mem; + + end_mem = __pa(high_memory); + if (p >= end_mem) + return 0; + if (count > end_mem - p) + count = end_mem - p; + return do_write_mem(file, __va(p), p, buf, count, ppos); +} + +#ifndef pgprot_noncached + +/* + * This should probably be per-architecture in <asm/pgtable.h> + */ +static inline pgprot_t pgprot_noncached(pgprot_t _prot) +{ + unsigned long prot = pgprot_val(_prot); + +#if defined(__i386__) || defined(__x86_64__) + /* On PPro and successors, PCD alone doesn't always mean + uncached because of interactions with the MTRRs. PCD | PWT + means definitely uncached. */ + if (boot_cpu_data.x86 > 3) + prot |= _PAGE_PCD | _PAGE_PWT; +#elif defined(__powerpc__) + prot |= _PAGE_NO_CACHE | _PAGE_GUARDED; +#elif defined(__mc68000__) +#ifdef SUN3_PAGE_NOCACHE + if (MMU_IS_SUN3) + prot |= SUN3_PAGE_NOCACHE; + else +#endif + if (MMU_IS_851 || MMU_IS_030) + prot |= _PAGE_NOCACHE030; + /* Use no-cache mode, serialized */ + else if (MMU_IS_040 || MMU_IS_060) + prot = (prot & _CACHEMASK040) | _PAGE_NOCACHE_S; +#endif + + return __pgprot(prot); +} + +#endif /* !pgprot_noncached */ + +/* + * Architectures vary in how they handle caching for addresses + * outside of main memory. + */ +static inline int noncached_address(unsigned long addr) +{ +#if defined(__i386__) + /* + * On the PPro and successors, the MTRRs are used to set + * memory types for physical addresses outside main memory, + * so blindly setting PCD or PWT on those pages is wrong. + * For Pentiums and earlier, the surround logic should disable + * caching for the high addresses through the KEN pin, but + * we maintain the tradition of paranoia in this code. + */ + return !( test_bit(X86_FEATURE_MTRR, &boot_cpu_data.x86_capability) || + test_bit(X86_FEATURE_K6_MTRR, &boot_cpu_data.x86_capability) || + test_bit(X86_FEATURE_CYRIX_ARR, &boot_cpu_data.x86_capability) || + test_bit(X86_FEATURE_CENTAUR_MCR, &boot_cpu_data.x86_capability) ) + && addr >= __pa(high_memory); +#else + return addr >= __pa(high_memory); +#endif +} + +static int dhahelper_mmap(struct file * file, struct vm_area_struct * vma) +{ + unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; + + /* + * Accessing memory above the top the kernel knows about or + * through a file pointer that was marked O_SYNC will be + * done non-cached. + */ + if (noncached_address(offset) || (file->f_flags & O_SYNC)) + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + + /* Don't try to swap out physical pages.. */ + vma->vm_flags |= VM_RESERVED; + + /* + * Don't dump addresses that are not real memory to a core file. + */ + if (offset >= __pa(high_memory) || (file->f_flags & O_SYNC)) + vma->vm_flags |= VM_IO; + + if (remap_page_range(vma->vm_start, offset, vma->vm_end-vma->vm_start, + vma->vm_page_prot)) + return -EAGAIN; + return 0; } #if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,0) static struct file_operations dhahelper_fops = { - /*llseek*/ NULL, - /*read*/ NULL, - /*write*/ NULL, + /*llseek*/ dhahelper_lseek, + /*read*/ dhahelper_read, + /*write*/ dhahelper_write, /*readdir*/ NULL, /*poll*/ NULL, /*ioctl*/ dhahelper_ioctl, @@ -374,43 +971,73 @@ static struct file_operations dhahelper_fops = { owner: THIS_MODULE, ioctl: dhahelper_ioctl, - mmap: dhahelper_mmap, open: dhahelper_open, - release: dhahelper_release + release: dhahelper_release, + llseek: dhahelper_lseek, + read: dhahelper_read, + write: dhahelper_write, + mmap: dhahelper_mmap, }; #endif -#if KERNEL_VERSION < KERNEL_VERSION(2,4,0) +#ifdef CONFIG_DEVFS_FS +devfs_handle_t dha_devfsh; +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,0) int init_module(void) #else static int __init init_dhahelper(void) #endif { + int err = 0; printk(KERN_INFO "Direct Hardware Access kernel helper (C) Alex Beregszaszi\n"); +#ifdef CONFIG_DEVFS_FS + dha_devfsh = devfs_register(NULL, "dhahelper", DEVFS_FL_NONE, + dhahelper_major, 0, + S_IFCHR | S_IRUSR | S_IWUSR, + &dhahelper_fops, NULL); + if(!dha_devfsh){ + err = -EIO; + } +#else if(register_chrdev(dhahelper_major, "dhahelper", &dhahelper_fops)) { + err = -EIO; + } +#endif + if(err){ if (dhahelper_verbosity > 0) printk(KERN_ERR "dhahelper: unable to register character device (major: %d)\n", dhahelper_major); - return -EIO; + return err; } - + memset(dha_irqs, 0, sizeof(dha_irqs)); return 0; } -#if KERNEL_VERSION < KERNEL_VERSION(2,4,0) +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,0) void cleanup_module(void) #else static void __exit exit_dhahelper(void) #endif { + unsigned i; + for(i=0;i<256;i++) + if(dha_irqs[i].handled) + free_irq(i, dha_irqs[i].dev); + +#ifdef CONFIG_DEVFS_FS + devfs_unregister(dha_devfsh); +#else unregister_chrdev(dhahelper_major, "dhahelper"); +#endif } EXPORT_NO_SYMBOLS; -#if KERNEL_VERSION >= KERNEL_VERSION(2,4,0) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0) module_init(init_dhahelper); module_exit(exit_dhahelper); #endif diff --git a/src/video_out/libdha/kernelhelper/dhahelper.h b/src/video_out/libdha/kernelhelper/dhahelper.h index 2cbcb5550..3932b96ab 100644 --- a/src/video_out/libdha/kernelhelper/dhahelper.h +++ b/src/video_out/libdha/kernelhelper/dhahelper.h @@ -10,9 +10,9 @@ #include <linux/ioctl.h> /* feel free to change */ -#define DEFAULT_MAJOR 180 +#define DEFAULT_MAJOR 252 /* 240-254 LOCAL/EXPERIMENTAL USE */ -#define API_VERSION 0x2 +#define API_VERSION 0x21 /* 2.1*/ typedef struct dhahelper_port_s { @@ -20,23 +20,10 @@ typedef struct dhahelper_port_s #define PORT_OP_WRITE 2 int operation; int size; - int addr; + int addr; // FIXME - switch to void* (64bit) int value; } dhahelper_port_t; -typedef struct dhahelper_memory_s -{ -#define MEMORY_OP_MAP 1 -#define MEMORY_OP_UNMAP 2 - int operation; - int start; - int offset; - int size; - int ret; -#define MEMORY_FLAG_NOCACHE 1 - int flags; -} dhahelper_memory_t; - typedef struct dhahelper_mtrr_s { #define MTRR_OP_ADD 1 @@ -67,12 +54,40 @@ typedef struct dhahelper_vmi_s unsigned long *realaddr; }dhahelper_vmi_t; +typedef struct dhahelper_mem_s +{ + void * addr; + unsigned long length; +}dhahelper_mem_t; + +typedef struct dhahelper_irq_s +{ + unsigned num; + int bus, dev, func; + int ack_region; + unsigned long ack_offset; + unsigned int ack_data; +}dhahelper_irq_t; + +typedef struct dhahelper_cpu_flush_s +{ + void *va; + unsigned long length; +}dhahelper_cpu_flush_t; + #define DHAHELPER_GET_VERSION _IOW('D', 0, int) #define DHAHELPER_PORT _IOWR('D', 1, dhahelper_port_t) -#define DHAHELPER_MEMORY _IOWR('D', 2, dhahelper_memory_t) -#define DHAHELPER_MTRR _IOWR('D', 3, dhahelper_mtrr_t) -#define DHAHELPER_PCI _IOWR('D', 4, dhahelper_pci_t) -#define DHAHELPER_VIRT_TO_PHYS _IOWR('D', 5, dhahelper_vmi_t) -#define DHAHELPER_VIRT_TO_BUS _IOWR('D', 6, dhahelper_vmi_t) +#define DHAHELPER_MTRR _IOWR('D', 2, dhahelper_mtrr_t) +#define DHAHELPER_PCI _IOWR('D', 3, dhahelper_pci_t) +#define DHAHELPER_VIRT_TO_PHYS _IOWR('D', 4, dhahelper_vmi_t) +#define DHAHELPER_VIRT_TO_BUS _IOWR('D', 5, dhahelper_vmi_t) +#define DHAHELPER_ALLOC_PA _IOWR('D', 6, dhahelper_mem_t) +#define DHAHELPER_FREE_PA _IOWR('D', 7, dhahelper_mem_t) +#define DHAHELPER_LOCK_MEM _IOWR('D', 8, dhahelper_mem_t) +#define DHAHELPER_UNLOCK_MEM _IOWR('D', 9, dhahelper_mem_t) +#define DHAHELPER_INSTALL_IRQ _IOWR('D', 10, dhahelper_irq_t) +#define DHAHELPER_ACK_IRQ _IOWR('D', 11, dhahelper_irq_t) +#define DHAHELPER_FREE_IRQ _IOWR('D', 12, dhahelper_irq_t) +#define DHAHELPER_CPU_FLUSH _IOWR('D', 13, dhahelper_cpu_flush_t) #endif /* DHAHELPER_H */ diff --git a/src/video_out/libdha/kernelhelper/test.c b/src/video_out/libdha/kernelhelper/test.c index 3dca94c74..3dfdaa02b 100644 --- a/src/video_out/libdha/kernelhelper/test.c +++ b/src/video_out/libdha/kernelhelper/test.c @@ -22,38 +22,22 @@ int main(int argc, char *argv[]) printf("incompatible api!\n"); { - dhahelper_memory_t mem; - - mem.operation = MEMORY_OP_MAP; - //mem.start = 0xe0000000; - mem.start = 0xe4000008; - mem.offset = 0; - mem.size = 0x4000; - mem.ret = 0; - - ret = ioctl(fd, DHAHELPER_MEMORY, &mem); - - printf("ret: %s\n", strerror(errno)); - - mem.ret = (int)mmap(NULL, (size_t)mem.size, PROT_READ, MAP_SHARED, fd, (off_t)0); - printf("allocated to %x\n", mem.ret); + void *mem; + unsigned long size=256; + mem = mmap(0,size,PROT_READ|PROT_WRITE,MAP_SHARED,fd,0); + printf("allocated to %p\n", mem); if (argc > 1) - if (mem.ret != 0) + if (mem != 0) { int i; for (i = 0; i < 256; i++) - printf("[%x] ", *(int *)(mem.ret+i)); + printf("[%x] ", *(int *)(mem+i)); printf("\n"); } - munmap((void *)mem.ret, mem.size); - - mem.operation = MEMORY_OP_UNMAP; - mem.start = mem.ret; - - ioctl(fd, DHAHELPER_MEMORY, &mem); + munmap((void *)mem, size); } return(0); diff --git a/src/video_out/libdha/libdha.c b/src/video_out/libdha/libdha.c index dda6a6abd..cb99e1c2d 100644 --- a/src/video_out/libdha/libdha.c +++ b/src/video_out/libdha/libdha.c @@ -16,12 +16,10 @@ Licence: GPL Original location: www.linuxvideo.org/gatos */ -#ifdef HAVE_CONFIG_H + #include "config.h" -#endif #include "libdha.h" -#include "AsmMacros.h" #include <stdio.h> #include <stdlib.h> #include <string.h> @@ -61,96 +59,41 @@ void libdha_exit(const char *message, int level) /* Generic version */ #include <sys/mman.h> - +#include <sys/ioctl.h> #ifndef DEV_MEM #define DEV_MEM "/dev/mem" #endif -#ifdef CONFIG_DHAHELPER - #include "kernelhelper/dhahelper.h" -static int mem=-1; +static int devmem_fd=-1; +static unsigned devmem_locks=0; void *map_phys_mem(unsigned long base, unsigned long size) { #ifdef ARCH_ALPHA /* TODO: move it into sysdep */ base += bus_base(); #endif - if ( (mem = open("/dev/dhahelper",O_RDWR)) < 0) - { - if ( (mem = open(DEV_MEM,O_RDWR)) == -1) { - perror("libdha: open(/dev/mem) failed") ; exit(1) ; - } - } - else + if( devmem_fd == -1) { - dhahelper_memory_t mem_req; - - mem_req.operation = MEMORY_OP_MAP; - mem_req.start = base; - mem_req.offset = 0; - mem_req.size = size; - - if (ioctl(mem, DHAHELPER_MEMORY, &mem_req) < 0) + if ( (devmem_fd = open("/dev/dhahelper",O_RDWR)) < 0) { - perror("libdha: failed mapping throught kernel helper"); - return NULL; + if ( (devmem_fd = open(DEV_MEM,O_RDWR)) == -1) + { + perror("libdha: open(/dev/mem) failed"); + exit(1); + } } } - return mmap(0,size,PROT_READ|PROT_WRITE,MAP_SHARED,mem,base) ; + devmem_locks++; + return mmap(0,size,PROT_READ|PROT_WRITE,MAP_SHARED,devmem_fd,base) ; } -#else - -static int mem=-1; -void *map_phys_mem(unsigned long base, unsigned long size) -{ -#ifdef ARCH_ALPHA -/* TODO: move it into sysdep */ - base += bus_base(); -#endif - if ( (mem = open(DEV_MEM,O_RDWR)) == -1) { - perror("libdha: open(/dev/mem) failed") ; exit(1) ; - } - return mmap(0,size,PROT_READ|PROT_WRITE,MAP_SHARED,mem,base) ; -} -#endif /* CONFIG_DHAHELPER */ void unmap_phys_mem(void *ptr, unsigned long size) { int res=munmap(ptr,size) ; if (res == -1) { perror("libdha: munmap() failed") ; exit(1) ; } - close(mem); + devmem_locks--; + if(!devmem_locks) { close(devmem_fd); devmem_fd=-1; } } #endif - -unsigned char INPORT8(unsigned idx) -{ - return inb(idx); -} - -unsigned short INPORT16(unsigned idx) -{ - return inw(idx); -} - -unsigned INPORT32(unsigned idx) -{ - return inl(idx); -} - -void OUTPORT8(unsigned idx,unsigned char val) -{ - outb(idx,val); -} - -void OUTPORT16(unsigned idx,unsigned short val) -{ - outw(idx,val); -} - -void OUTPORT32(unsigned idx,unsigned val) -{ - outl(idx,val); -} - diff --git a/src/video_out/libdha/libdha.h b/src/video_out/libdha/libdha.h index bc319a39f..53a96839d 100644 --- a/src/video_out/libdha/libdha.h +++ b/src/video_out/libdha/libdha.h @@ -16,6 +16,8 @@ #ifndef LIBDHA_H #define LIBDHA_H +#include <stdint.h> + #ifdef __cplusplus extern "C" { #endif @@ -30,17 +32,19 @@ typedef struct pciinfo_s int bus,card,func; /* PCI/AGP bus:card:func */ unsigned short vendor,device; /* Card vendor+device ID */ unsigned base0,base1,base2,baserom; /* Memory and I/O base addresses */ + unsigned base3,base4,base5; /* Memory and I/O base addresses */ + unsigned char irq,ipin,gnt,lat; /* assigned IRQ parameters for this card */ // unsigned base0_limit, base1_limit, base2_limit, baserom_limit; }pciinfo_t; -/* needed for mga_vid */ extern int pci_config_read(unsigned char bus, unsigned char dev, unsigned char func, unsigned char cmd, int len, unsigned long *val); +extern int pci_config_write(unsigned char bus, unsigned char dev, unsigned char func, + unsigned char cmd, int len, unsigned long val); /* Fill array pci_list which must have size MAX_PCI_DEVICES and return 0 if sucessful */ extern int pci_scan(pciinfo_t *pci_list,unsigned *num_card); - /* Enables/disables accessing to IO space from application side. Should return 0 if o'k or errno on error. */ extern int enable_app_io( void ); @@ -89,6 +93,20 @@ extern int bm_virt_to_phys( void * virt_addr, unsigned long length, extern int bm_virt_to_bus( void * virt_addr, unsigned long length, unsigned long * barray ); +extern void * bm_alloc_pa( unsigned long length ); +extern void bm_free_pa( void * virt_addr, unsigned long length ); +extern int bm_lock_mem( const void * addr, unsigned long length ); +extern int bm_unlock_mem( const void * addr, unsigned long length ); + +/* HWIRQ support */ + +extern int hwirq_install(int bus, int dev, int func, + int areg, unsigned long aoff, uint32_t adata); +extern int hwirq_wait(unsigned irqnum); +extern int hwirq_uninstall(int bus, int dev, int func); + +/* CPU flushing support */ +extern void cpu_flush(void *va,unsigned long length); #ifdef __cplusplus } #endif diff --git a/src/video_out/libdha/mmi.c b/src/video_out/libdha/mmi.c index 68d3429f2..5fb1531be 100644 --- a/src/video_out/libdha/mmi.c +++ b/src/video_out/libdha/mmi.c @@ -1,6 +1,7 @@ /* Memory manager interface */ #include <stdio.h> #include <sys/ioctl.h> +#include <sys/mman.h> /* mlock */ #include <errno.h> #include <unistd.h> #include <fcntl.h> @@ -9,7 +10,7 @@ static int libdha_fd=-1; -#define ALLOWED_VER 2 +#define ALLOWED_VER 0x10 int bm_open( void ) { int retv; @@ -55,3 +56,50 @@ int bm_virt_to_bus( void * virt_addr, unsigned long length, unsigned long * barr if(libdha_fd > 0) return ioctl(libdha_fd,DHAHELPER_VIRT_TO_BUS,&vmi); return ENXIO; } + +void * bm_alloc_pa( unsigned long length ) +{ + dhahelper_mem_t vmi; + vmi.length = length; + if(libdha_fd > 0) + { + if(ioctl(libdha_fd,DHAHELPER_ALLOC_PA,&vmi) == 0) + return vmi.addr; + } + return 0; +} + +void bm_free_pa( void * virt_addr, unsigned long length ) +{ + dhahelper_mem_t vmi; + vmi.addr = virt_addr; + vmi.length = length; + if(libdha_fd > 0) + { + ioctl(libdha_fd,DHAHELPER_FREE_PA,&vmi); + } +} + +int bm_lock_mem( const void *addr, unsigned long length ) +{ + dhahelper_mem_t vmi; + vmi.addr = (void *) addr; + vmi.length = length; + if(libdha_fd > 0) + { + return ioctl(libdha_fd,DHAHELPER_LOCK_MEM,&vmi); + } + return mlock(addr,length); +} + +int bm_unlock_mem( const void * addr, unsigned long length ) +{ + dhahelper_mem_t vmi; + vmi.addr = (void *) addr; + vmi.length = length; + if(libdha_fd > 0) + { + return ioctl(libdha_fd,DHAHELPER_UNLOCK_MEM,&vmi); + } + return munlock(addr,length); +} diff --git a/src/video_out/libdha/mtrr.c b/src/video_out/libdha/mtrr.c index 977ce8047..765562dd6 100644 --- a/src/video_out/libdha/mtrr.c +++ b/src/video_out/libdha/mtrr.c @@ -11,7 +11,6 @@ #include <string.h> #include <errno.h> #include "libdha.h" -#include "AsmMacros.h" #if defined (__i386__) && defined (__NetBSD__) #include <sys/param.h> diff --git a/src/video_out/libdha/oth/pci.db b/src/video_out/libdha/oth/pci.db index bf892c5fb..7bdac80c5 100644 --- a/src/video_out/libdha/oth/pci.db +++ b/src/video_out/libdha/oth/pci.db @@ -2,20 +2,21 @@ v 0000 Gammagraphx, Inc. 0 v 001a Ascend Communications, Inc. 0 v 0033 Paradyne corp. 0 v 003d Lockheed Martin-Marietta Corp 0 +v 0059 Tiger Jet Network Inc. (Wrong ID) 0 Real TJN ID is e159, but they got it wrong several times --mj v 0070 Hauppauge computer works Inc. 0 v 0100 Ncipher Corp Ltd 0 v 0675 Dynalink 0 d 06751700 IS64PH ISDN Adapter 0 d 06751702 IS64PH ISDN Adapter 0 -v 0925 VIA Technologies, Inc. 1 Wrong ID used in subsystem ID of VIA USB controllers. +v 0925 VIA Technologies, Inc. (Wrong ID) 0 Wrong ID used in subsystem ID of VIA USB controllers. +v 09c1 Arris 0 +d 09c10704 CM 200E Cable Modem 0 v 0a89 BREA Technologies Inc 0 v 0e11 Compaq Computer Corporation 0 d 0e110001 PCI to EISA Bridge 0 d 0e110002 PCI to ISA Bridge 0 d 0e110049 NC7132 Gigabit Upgrade Module 0 -d 0e110049 1 NIC does not have this ven/dev id - it is a subven/devid d 0e11004a NC6136 Gigabit Server Adapter 0 -d 0e11004a 1 NIC does not have this ven/dev id - it is a subven/devid d 0e110508 Netelligent 4/16 Token Ring 0 d 0e111000 Triflex/Pentium Bridge, Model 1000 0 d 0e112000 Triflex/Pentium Bridge, Model 2000 0 @@ -31,7 +32,7 @@ d 0e11a0f3 Triflex PCI to ISA Bridge 0 d 0e11a0f7 PCI Hotplug Controller 0 s 0e11a0f78086002a PCI Hotplug Controller A 0 s 0e11a0f78086002b PCI Hotplug Controller B 0 -d 0e11a0f8 ZFMicro Chipset OHCI USB 0 +d 0e11a0f8 ZFMicro Chipset USB 0 d 0e11a0fc Fibre Channel Host Controller 0 d 0e11ae10 Smart-2/P RAID Controller 0 s 0e11ae100e114030 Smart-2/P Array Controller 0 @@ -54,48 +55,31 @@ d 0e11ae6d NorthStar CPU to PCI Bridge 0 d 0e11b011 Integrated Netelligent 10/100 0 d 0e11b012 Netelligent 10 T/2 0 d 0e11b01e NC3120 Fast Ethernet NIC 0 -d 0e11b01e 1 NIC does not have this ven/dev id - it is a subven/devid d 0e11b01f NC3122 Fast Ethernet NIC 0 -d 0e11b01f 1 NIC does not have this ven/dev id - it is a subven/devid d 0e11b02f NC1120 Ethernet NIC 0 d 0e11b030 Netelligent WS 5100 0 d 0e11b04a 10/100 TX PCI Intel WOL UTP Controller 0 -d 0e11b04a 1 NIC does not have this ven/dev id - it is a subven/devid d 0e11b060 Smart Array 5300 Controller 0 d 0e11b0c6 NC3161 Fast Ethernet NIC 0 -d 0e11b0c6 1 NIC does not have this ven/dev id - it is a subven/devid d 0e11b0c7 NC3160 Fast Ethernet NIC 0 -d 0e11b0c7 1 NIC does not have this ven/dev id - it is a subven/devid d 0e11b0d7 NC3121 Fast Ethernet NIC 0 -d 0e11b0d7 1 NIC does not have this ven/dev id - it is a subven/devid d 0e11b0dd NC3131 Fast Ethernet NIC 0 -d 0e11b0dd 1 NIC does not have this ven/dev id - it is a subven/devid d 0e11b0de NC3132 Fast Ethernet Module 0 -d 0e11b0de 1 NIC does not have this ven/dev id - it is a subven/devid d 0e11b0df NC6132 Gigabit Module 0 -d 0e11b0df 1 NIC does not have this ven/dev id - it is a subven/devid d 0e11b0e0 NC6133 Gigabit Module 0 -d 0e11b0e0 1 NIC does not have this ven/dev id - it is a subven/devid d 0e11b0e1 NC3133 Fast Ethernet Module 0 -d 0e11b0e1 1 NIC does not have this ven/dev id - it is a subven/devid d 0e11b123 NC6134 Gigabit NIC 0 -d 0e11b123 1 NIC does not have this ven/dev id - it is a subven/devid d 0e11b134 NC3163 Fast Ethernet NIC 0 -d 0e11b134 1 NIC does not have this ven/dev id - it is a subven/devid d 0e11b13c NC3162 Fast Ethernet NIC 0 -d 0e11b13c 1 NIC does not have this ven/dev id - it is a subven/devid d 0e11b144 NC3123 Fast Ethernet NIC 0 -d 0e11b144 1 NIC does not have this ven/dev id - it is a subven/devid d 0e11b163 NC3134 Fast Ethernet NIC 0 -d 0e11b163 1 NIC does not have this ven/dev id - it is a subven/devid -d 0e11b164 NC3135 Fast Ethernet Upgrade Module 0 -d 0e11b164 1 NIC does not have this ven/dev id - it is a subven/devid +d 0e11b164 NC3165 Fast Ethernet Upgrade Module 0 d 0e11b178 Smart Array 5i/532 0 d 0e11b1a4 NC7131 Gigabit Server Adapter 0 -d 0e11b1a4 1 NIC does not have this ven/dev id - it is a subven/devid d 0e11f130 NetFlex-3/P ThunderLAN 1.0 0 d 0e11f150 NetFlex-3/P ThunderLAN 2.3 0 -v 1000 LSI Logic / Symbios Logic (formerly NCR) 0 +v 0e55 HaSoTec GmbH 0 +v 1000 LSI Logic / Symbios Logic 0 Formerly NCR d 10000001 53c810 0 s 1000000110001000 8100S 0 d 10000002 53c820 0 @@ -106,15 +90,22 @@ d 10000006 53c860 0 d 1000000a 53c1510 0 d 1000000b 53c896 0 d 1000000c 53c895 0 +s 1000000c1de13907 DC-390U2W 0 d 1000000d 53c885 0 d 1000000f 53c875 0 s 1000000f0e117004 Embedded Ultra Wide SCSI Controller 0 s 1000000f10928760 FirePort 40 Dual SCSI Controller 0 s 1000000f1de13904 DC390F Ultra Wide SCSI Controller 0 +d 10000010 53c895 0 +s 100000100e114040 Integrated Array Controller 0 +s 100000100e114048 Integrated Array Controller 0 d 10000012 53c895a 0 +d 10000013 53c875a 0 d 10000020 53c1010 Ultra3 SCSI Adapter 0 +s 100000201de11020 DC-390U3W 0 d 10000021 53c1010 66MHz Ultra3 SCSI Adapter 0 d 10000030 53c1030 0 +s 1000003010281010 LSI U320 SCSI Controller 0 d 10000040 53c1035 0 d 1000008f 53c875J 0 s 1000008f10928000 FirePort 40 SCSI Controller 0 @@ -124,12 +115,20 @@ d 10000622 FC929 0 d 10000623 FC929 LAN 0 d 10000624 FC919 0 d 10000625 FC919 LAN 0 +d 10000626 FC929X 0 +d 10000627 FC929X LAN 0 +d 10000628 FC919X 0 +d 10000629 FC919X LAN 0 d 10000701 83C885 NT50 DigitalScape Fast Ethernet 0 d 10000702 Yellowfin G-NIC gigabit ethernet 0 s 1000070213180000 PEI100X 0 d 10000901 61C102 0 d 10001000 63C815 0 -v 1001 Initio 0 +d 10001960 PowerEdge Expandable RAID Controller 4 0 +s 1000196010280518 PowerEdge Expandable RAID Controller 4/DC 0 +s 1000196010280520 PowerEdge Expandable RAID Controller 4/SC 0 +s 1000196010280531 PowerEdge Expandable RAID Controller 4/QC 0 +v 1001 Kolter Electronic 0 d 10010010 PCI 1616 Measurement card with 32 digital I/O lines 0 d 10010011 OPTO-PCI Opto-Isolated digital I/O board 0 d 10010012 PCI-AD/DA Analogue I/O board 0 @@ -141,8 +140,11 @@ d 10010017 PROTO-3 PCI Prototyping board 0 d 10019100 INI-9100/9100W SCSI Host 0 v 1002 ATI Technologies Inc 0 d 10024158 68800AX [Mach32] 0 -d 10024242 Radeon 8500 DV 0 +d 10024242 Radeon R200 BB [Radeon All in Wonder 8500DV] 0 s 10024242100202aa Radeon 8500 AIW DV Edition 0 +d 10024336 Radeon Mobility U1 0 +d 10024337 Radeon IGP 340M 1 Compaq Evo N1020v +d 10024337 Radeon IGP 340 1 Compaq Evo N1020v d 10024354 215CT [Mach64 CT] 0 d 10024358 210888CX [Mach64 CX] 0 d 10024554 210888ET [Mach64 ET] 0 @@ -192,6 +194,8 @@ d 10024751 3D Rage Pro 215GQ 0 d 10024752 Rage XL 0 s 1002475210020008 Rage XL 0 s 1002475210024752 Rage XL 0 +s 1002475210028008 Rage XL 1 +s 10024752102800d1 PowerEdge 2550 0 d 10024753 Rage XC 0 s 1002475310024753 Rage XC 0 d 10024754 3D Rage I/II 215GT [Mach64 GT] 0 @@ -209,6 +213,18 @@ d 10024759 3D Rage IIC 0 d 1002475a 3D Rage IIC AGP 0 s 1002475a10020087 Rage 3D IIC 0 s 1002475a1002475a Rage IIC AGP 0 +d 10024964 Radeon R250 Id [Radeon 9000] 0 +d 10024965 Radeon R250 Ie [Radeon 9000] 0 +d 10024966 Radeon R250 If [Radeon 9000] 0 +s 1002496610f10002 R250 If [Tachyon G9000 PRO] 0 +s 10024966148c2039 R250 If [Radeon 9000 Pro "Evil Commando"] 0 +s 1002496615099a00 R250 If [Radeon 9000 "AT009"] 0 +s 10024966174b7176 R250 If [Sapphire Radeon 9000 Pro] 0 +s 10024966174b7192 R250 If [Radeon 9000 "Atlantis"] 0 +s 1002496617af2005 R250 If [Excalibur Radeon 9000 Pro] 0 +s 1002496617af2006 R250 If [Excalibur Radeon 9000] 0 +d 10024967 Radeon R250 Ig [Radeon 9000] 0 +d 1002496e Radeon R250 [Radeon 9000] (Secondary) 0 d 10024c42 3D Rage LT Pro AGP-133 0 s 10024c420e11b0e8 Rage 3D LT Pro 0 s 10024c420e11b10e 3D Rage LT Pro (Compaq Armada 1750) 0 @@ -227,7 +243,9 @@ s 10024c4910020040 Rage LT Pro 0 s 10024c4910020044 Rage LT Pro 0 s 10024c4910024c49 Rage LT Pro 0 d 10024c4d Rage Mobility P/M AGP 2x 0 +s 10024c4d0e11b111 Armada M700 1 s 10024c4d10020084 Xpert 98 AGP 2X (Mobility) 0 +s 10024c4d10140154 ThinkPad A20m 0 d 10024c4e Rage Mobility L AGP 2x 0 d 10024c50 3D Rage LT Pro 0 s 10024c5010024c50 Rage LT Pro 0 @@ -235,11 +253,27 @@ d 10024c51 3D Rage LT Pro 0 d 10024c52 Rage Mobility P/M 0 d 10024c53 Rage Mobility L 0 d 10024c54 264LT [Mach64 LT] 0 -d 10024c57 Radeon Mobility M6 LW 0 +d 10024c57 Radeon Mobility M7 LW [Radeon Mobility 7500] 0 +s 10024c5710140517 ThinkPad T30 0 +s 10024c57102800e6 Radeon Mobility M7 LW (Dell Inspiron 8100) 0 +s 10024c57144dc006 Radeon Mobility M7 LW in vpr Matrix 170B4 0 +d 10024c58 Radeon Mobility M7 LX [Radeon Mobility FireGL 7800] 0 d 10024c59 Radeon Mobility M6 LY 0 +s 10024c5910140235 ThinkPad A30p (2653-64G) 0 +s 10024c5910140239 ThinkPad X22/X23/X24 0 +s 10024c59104d80e7 VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP 0 d 10024c5a Radeon Mobility M6 LZ 0 +d 10024c64 Radeon R250 Ld [Radeon Mobility 9000] 0 +d 10024c65 Radeon R250 Le [Radeon Mobility 9000] 0 +d 10024c66 Radeon R250 Lf [Radeon Mobility 9000] 0 +d 10024c67 Radeon R250 Lg [Radeon Mobility 9000] 0 d 10024d46 Rage Mobility M4 AGP 0 d 10024d4c Rage Mobility M4 AGP 0 +d 10024e44 Radeon R300 ND [Radeon 9700] 0 +d 10024e45 Radeon R300 NE [Radeon 9700] 0 +d 10024e46 Radeon R300 NF [Radeon 9700] 0 +d 10024e47 Radeon R300 NG [Radeon 9700] 0 +d 10024e64 Radeon R300 [Radeon 9700] (Secondary) 0 d 10025041 Rage 128 PA/PRO 0 d 10025042 Rage 128 PB/PRO AGP 2x 0 d 10025043 Rage 128 PC/PRO AGP 4x 0 @@ -266,7 +300,7 @@ d 1002504c Rage 128 PL/PRO AGP 4x TMDS 0 d 1002504d Rage 128 PM/PRO 0 d 1002504e Rage 128 PN/PRO AGP 2x 0 d 1002504f Rage 128 PO/PRO AGP 4x 0 -d 10025050 Rage 128 PP/PRO TMDS 0 +d 10025050 Rage 128 PP/PRO TMDS [Xpert 128] 0 s 1002505010020008 Xpert 128 0 d 10025051 Rage 128 PQ/PRO AGP 2x TMDS 0 d 10025052 Rage 128 PR/PRO AGP 4x TMDS 0 @@ -276,7 +310,7 @@ d 10025055 Rage 128 PU/PRO AGP 4x 0 d 10025056 Rage 128 PV/PRO TMDS 0 d 10025057 Rage 128 PW/PRO AGP 2x TMDS 0 d 10025058 Rage 128 PX/PRO AGP 4x TMDS 0 -d 10025144 Radeon QD 0 +d 10025144 Radeon R100 QD [Radeon 64 DDR] 0 s 1002514410020008 Radeon 7000/Radeon VE 0 s 1002514410020009 Radeon 7000/Radeon 0 s 100251441002000a Radeon 7000/Radeon 0 @@ -290,20 +324,49 @@ s 1002514410020139 Radeon 7000/Radeon 0 s 100251441002028a Radeon 7000/Radeon 0 s 10025144100202aa Radeon AIW 0 s 100251441002053a Radeon 7000/Radeon 0 -d 10025145 Radeon QE 0 -d 10025146 Radeon QF 0 -d 10025147 Radeon QG 0 -d 1002514c Radeon QL 0 +d 10025145 Radeon R100 QE 0 +d 10025146 Radeon R100 QF 0 +d 10025147 Radeon R100 QG 0 +d 10025148 Radeon R200 QH [Radeon 8500] 0 +s 100251481002010a FireGL 8800 64Mb 0 +s 1002514810020152 FireGL 8800 128Mb 0 +s 1002514810020162 FireGL 8700 32Mb 0 +s 1002514810020172 FireGL 8700 64Mb 0 +d 10025149 Radeon R200 QI 0 +d 1002514a Radeon R200 QJ 0 +d 1002514b Radeon R200 QK 0 +d 1002514c Radeon R200 QL [Radeon 8500 LE] 0 +s 1002514c1002003a Radeon R200 QL [Radeon 8500 LE] 0 s 1002514c1002013a Radeon 8500 0 -d 10025157 Radeon QW 0 +s 1002514c148c2026 R200 QL [Radeon 8500 Evil Master II Multi Display Edition] 0 +s 1002514c174b7149 Radeon R200 QL [Sapphire Radeon 8500 LE] 0 +d 10025157 Radeon RV200 QW [Radeon 7500] 0 s 100251571002013a Radeon 7500 0 +s 1002515714584000 RV200 QW [RADEON 7500 PRO MAYA AR] 0 +s 10025157148c2024 RV200 QW [Radeon 7500LE Dual Display] 0 +s 10025157148c2025 RV200 QW [Radeon 7500 Evil Master Multi Display Edition] 0 +s 10025157148c2036 RV200 QW [Radeon 7500 PCI Dual Display] 0 +s 10025157174b7147 RV200 QW [Sapphire Radeon 7500LE] 0 +s 10025157174b7161 Radeon RV200 QW [Radeon 7500 LE] 0 +s 1002515717af0202 RV200 QW [Excalibur Radeon 7500LE] 0 +d 10025158 Radeon RV200 QX [Radeon 7500] 0 d 10025159 Radeon VE QY 0 s 100251591002000a Radeon 7000/Radeon VE 0 +s 100251591002000b Radeon 7000 0 s 1002515910020038 Radeon 7000/Radeon VE 0 s 100251591002003a Radeon 7000/Radeon VE 0 s 10025159100200ba Radeon 7000/Radeon VE 0 s 100251591002013a Radeon 7000/Radeon VE 0 +s 1002515914584002 RV100 QY [RADEON 7000 PRO MAYA AV Series] 0 +s 10025159148c2003 RV100 QY [Radeon 7000 Multi-Display Edition] 0 +s 10025159148c2023 RV100 QY [Radeon 7000 Evil Master Multi-Display] 0 +s 10025159174b7112 RV100 QY [Sapphire Radeon VE 7000] 0 +s 1002515917870202 RV100 QY [Excalibur Radeon 7000] 0 d 1002515a Radeon VE QZ 0 +d 10025168 Radeon R200 Qh 0 +d 10025169 Radeon R200 Qi 0 +d 1002516a Radeon R200 Qj 0 +d 1002516b Radeon R200 Qk 0 d 10025245 Rage 128 RE/SG 0 s 1002524510020008 Xpert 128 0 s 1002524510020028 Rage 128 AIW 0 @@ -324,7 +387,7 @@ s 1002524c10020088 Xpert 99 0 d 10025345 Rage 128 SE/4x 0 d 10025346 Rage 128 SF/4x AGP 2x 0 d 10025347 Rage 128 SG/4x AGP 4x 0 -d 10025348 Rage 128 4x 0 +d 10025348 Rage 128 SH 0 d 1002534b Rage 128 SK/4x 0 d 1002534c Rage 128 SL/4x AGP 2x 0 d 1002534d Rage 128 SM/4x AGP 4x 0 @@ -333,7 +396,7 @@ s 1002534d10020018 Xpert 2000 0 d 1002534e Rage 128 4x 0 d 10025354 Mach 64 VT 0 s 1002535410025654 Mach 64 reference 0 -d 10025446 Rage 128 Pro TF 0 +d 10025446 Rage 128 Pro Ultra TF 0 s 1002544610020004 Rage Fury Pro 0 s 1002544610020008 Rage Fury Pro/Xpert 2000 Pro 0 s 1002544610020018 Rage Fury Pro/Xpert 2000 Pro 0 @@ -342,14 +405,18 @@ s 1002544610020029 Rage 128 AIW 0 s 100254461002002a Rage 128 AIW Pro AGP 0 s 100254461002002b Rage 128 AIW 0 s 1002544610020048 Xpert 2000 Pro 0 -d 1002544c Rage 128 Pro TL 0 -d 10025452 Rage 128 Pro TR 0 +d 1002544c Rage 128 Pro Ultra TL 0 +d 10025452 Rage 128 Pro Ultra TR 0 s 100254521002001c Rage 128 Pro 4XL 0 s 10025452103c1279 Rage 128 Pro 4XL 0 +d 10025453 Rage 128 Pro Ultra TS 0 +d 10025454 Rage 128 Pro Ultra TT 0 +d 10025455 Rage 128 Pro Ultra TU 0 d 10025654 264VT [Mach64 VT] 0 s 1002565410025654 Mach64VT Reference 0 d 10025655 264VT3 [Mach64 VT3] 0 d 10025656 264VT4 [Mach64 VT4] 0 +d 1002700f U1/A3 AGP Bridge [IGP 320M] 0 v 1003 ULSI Systems 0 d 10030201 US201 0 v 1004 VLSI Technology Inc 0 @@ -379,7 +446,10 @@ d 10040306 QSound ThunderBird PCI Audio Support Registers 0 s 1004030610040306 QSound ThunderBird PCI Audio Support Registers 0 s 10040306122d1208 DSP368 Audio Support Registers 0 s 1004030614835022 XWave Thunder 3D Audio Support Registers 0 +d 10040307 Thunderbird 0 +d 10040308 Thunderbird 0 d 10040702 VAS96011 [Golden Gate II] 0 +d 10040703 Tollgate 0 v 1005 Avance Logic Inc. [ALI] 0 d 10052064 ALG2032/2064 0 d 10052128 ALG2364A 0 @@ -393,15 +463,20 @@ v 1007 NetFrame Systems Inc 0 v 1008 Epson 0 v 100a Phoenix Technologies 0 v 100b National Semiconductor Corporation 0 -v 100b 1 d 100b0001 DP83810 0 d 100b0002 87415/87560 IDE 0 d 100b000e 87560 Legacy I/O 0 -d 100b000f OHCI Compliant FireWire Controller 0 +d 100b000f FireWire Controller 0 d 100b0011 NS87560 National PCI System I/O 0 d 100b0012 USB Controller 0 d 100b0020 DP83815 (MacPhyter) Ethernet Controller 0 -d 100b0022 DP83820 0 +d 100b0022 DP83820 10/100/1000 Ethernet Controller 0 +d 100b0500 SCx200 Bridge 0 +d 100b0501 SCx200 SMI 0 +d 100b0502 SCx200 IDE 0 +d 100b0503 SCx200 Audio 0 +d 100b0504 SCx200 Video 0 +d 100b0505 SCx200 XBus 0 d 100bd001 87410 IDE 0 v 100c Tseng Labs Inc 0 d 100c3202 ET4000/W32p rev A 0 @@ -424,6 +499,7 @@ d 10110004 DECchip 21030 [TGA] 0 d 10110007 NVRAM [Zephyr NVRAM] 0 d 10110008 KZPSA [KZPSA] 0 d 10110009 DECchip 21140 [FasterNet] 0 +s 1011000910250310 21140 Fast Ethernet 0 s 1011000910b82001 SMC9332BDT EtherPower 10/100 0 s 1011000910b82002 SMC9332BVT EtherPower T4 10/100 0 s 1011000910b82003 SMC9334BDT EtherPower 10/100 (1-port) 0 @@ -436,6 +512,7 @@ s 1011000911861100 DFE-500TX Fast Ethernet 0 s 1011000911861112 DFE-570TX Fast Ethernet 0 s 1011000911861140 DFE-660 Cardbus Ethernet 10/100 0 s 1011000911861142 DFE-660 Cardbus Ethernet 10/100 0 +s 1011000911f60503 Freedomline Fast Ethernet 0 s 1011000912829100 AEF-380TXD Fast Ethernet 0 s 1011000913851100 FA310TX Fast Ethernet 0 s 1011000926460001 KNE100TX Fast Ethernet 0 @@ -446,11 +523,16 @@ d 10110014 DECchip 21041 [Tulip Pass 3] 0 s 1011001411860100 DE-530+ 0 d 10110016 DGLPB [OPPO] 0 d 10110019 DECchip 21142/43 0 -s 101100191011500b DE500 Fast Ethernet 0 +s 101100191011500a DE500A Fast Ethernet 0 +s 101100191011500b DE500B Fast Ethernet 0 s 1011001910140001 10/100 EtherJet Cardbus 0 s 1011001910250315 ALN315 Fast Ethernet 0 +s 101100191033800c PC-9821-CS01 100BASE-TX Interface Card 0 +s 101100191033800d PC-9821NR-B06 100BASE-TX Interface Card 0 s 10110019108d0016 Rapidfire 2327 10/100 Ethernet 0 +s 10110019108d0017 GoCard 2250 Ethernet 10/100 Cardbus 0 s 1011001910b82005 SMC8032DT Extreme Ethernet 10/100 0 +s 1011001910b88034 SMC8034 Extreme Ethernet 10/100 0 s 1011001910ef8169 Cardbus Fast Ethernet 0 s 1011001911092a00 ANA-6911A/TX Fast Ethernet 0 s 1011001911092b00 ANA-6911A/TXC Fast Ethernet 0 @@ -463,25 +545,39 @@ s 1011001911790204 Cardbus Fast Ethernet 0 s 1011001911861100 DFE-500TX Fast Ethernet 0 s 1011001911861101 DFE-500TX Fast Ethernet 0 s 1011001911861102 DFE-500TX Fast Ethernet 0 +s 1011001912592800 AT-2800Tx Fast Ethernet 0 s 1011001912660004 Eagle Fast EtherMAX 0 s 1011001912af0019 NetFlyer Cardbus Fast Ethernet 0 s 1011001913740001 Cardbus Ethernet Card 10/100 0 +s 1011001913740002 Cardbus Ethernet Card 10/100 0 +s 1011001913740007 Cardbus Ethernet Card 10/100 0 +s 1011001913740008 Cardbus Ethernet Card 10/100 0 +s 1011001913852100 Digital DS21143 Tulip [NETGEAR FA510] 1 Info based on 'tulip-diag -eee -m -a' by Donald Becker (scyld.com) s 1011001913950001 10/100 Ethernet CardBus PC Card 0 +s 1011001913d1ab01 EtherFast 10/100 Cardbus (PCMPC200) 0 s 1011001980860001 EtherExpress PRO/100 Mobile CardBus 32 0 +d 1011001a Farallon PN9000SX 0 d 10110021 DECchip 21052 0 d 10110022 DECchip 21150 0 d 10110023 DECchip 21150 0 d 10110024 DECchip 21152 0 d 10110025 DECchip 21153 0 d 10110026 DECchip 21154 0 +d 10110034 56k Modem Cardbus 0 +s 1011003413740003 56k Modem Cardbus 0 d 10110045 DECchip 21553 0 d 10110046 DECchip 21554 0 +s 101100460e114050 Integrated Smart Array 0 +s 101100460e114051 Integrated Smart Array 0 +s 101100460e114058 Integrated Smart Array 0 s 10110046103c10c2 Hewlett-Packard NetRAID-4M 0 +s 1011004612d9000a VoIP PCI Gateway 0 s 1011004690050365 Adaptec 5400S 0 s 1011004690051364 Dell PowerEdge RAID Controller 2 0 s 1011004690051365 Dell PowerEdge RAID Controller 2 0 +s 10110046e4bf1000 CC8-1-BLUES 0 d 10111065 StrongARM DC21285 0 -s 1011106510690020 DAC960P 0 +s 1011106510690020 DAC960P / DAC1164P 0 v 1012 Micronics Computers Inc 0 v 1013 Cirrus Logic 0 d 10130038 GD 7548 0 @@ -499,7 +595,10 @@ s 101300bc101300bc CL-GD5480 0 d 101300d0 GD 5462 0 d 101300d2 GD 5462 [Laguna I] 0 d 101300d4 GD 5464 [Laguna] 0 +d 101300d5 GD 5464 BD [Laguna] 0 d 101300d6 GD 5465 [Laguna] 0 +s 101300d613ce8031 Barco Metheus 2 Megapixel, Dual Head 0 +s 101300d613cf8031 Barco Metheus 2 Megapixel, Dual Head 0 d 101300e8 GD 5436U 0 d 10131100 CL 6729 0 d 10131110 PD 6832 PCMCIA/CardBus Ctrlr 0 @@ -513,7 +612,9 @@ d 10136001 CS 4610/11 [CrystalClear SoundFusion Audio Accelerator] 0 s 1013600110141010 CS4610 SoundFusion Audio Accelerator 0 d 10136003 CS 4614/22/24 [CrystalClear SoundFusion Audio Accelerator] 0 s 1013600310134280 Crystal SoundFusion PCI Audio Accelerator 0 -s 1013600316810050 Hercules Game Theater XP 0 +s 1013600316810050 Game Theater XP 0 +s 101360031681a011 Fortissimo III 7.1 0 +d 10136004 CS 4614/22/24 [CrystalClear SoundFusion Audio Accelerator] 0 d 10136005 Crystal CS4281 PCI Audio 0 s 1013600510134281 Crystal CS4281 PCI Audio 0 s 1013600510cf10a8 Crystal CS4281 PCI Audio 0 @@ -538,7 +639,9 @@ d 1014001d 82G2675 0 d 10140020 MCA 0 d 10140022 IBM27-82351 0 d 1014002d Python 0 -d 1014002e ServeRAID-3x 0 +d 1014002e ServeRAID Controller 0 +s 1014002e1014002e ServeRAID-3x 0 +s 1014002e1014022e ServeRAID-4H 0 d 10140036 Miami 0 d 1014003a CPU to PCI Bridge 0 d 1014003e 16/4 Token ring UTP/STP controller 0 @@ -572,18 +675,26 @@ s 1014009610140099 iSeries 2748 DASD IOA 0 d 101400a5 ATM Controller (1410a500) 0 d 101400a6 ATM 155MBPS MM Controller (1410a600) 0 d 101400b7 256-bit Graphics Rasterizer [Fire GL1] 0 -s 101400b7190200b8 Fire GL1 0 d 101400be ATM 622MBPS Controller (1410be00) 0 +d 101400dc Advanced Systems Management Adapter (ASMA) 0 +d 101400fc CPC710 Dual Bridge and Memory Controller (PCI-64) 0 +d 10140105 CPC710 Dual Bridge and Memory Controller (PCI-32) 0 +d 1014010f Remote Supervisor Adapter (RSA) 0 d 10140142 Yotta Video Compositor Input 0 s 1014014210140143 Yotta Input Controller (ytin) 0 d 10140144 Yotta Video Compositor Output 0 s 1014014410140145 Yotta Output Controller (ytout) 0 d 10140156 405GP PLB to PCI Bridge 0 d 101401a7 PCI-X to PCI-X Bridge 0 -d 101401bd Netfinity ServeRAID controller 0 -d 101401be ServeRAID-4M 0 -d 101401bf ServeRAID-4L 0 -d 1014022e ServeRAID-4H 0 +d 101401bd ServeRAID Controller 0 +s 101401bd101401be ServeRAID-4M 0 +s 101401bd101401bf ServeRAID-4L 0 +s 101401bd10140208 ServeRAID-4Mx 0 +s 101401bd1014020e ServeRAID-4Lx 0 +s 101401bd1014022e ServeRAID-4H 0 +s 101401bd10140258 ServeRAID-5i 0 +s 101401bd10140259 ServeRAID-5i 0 +d 10140302 XA-32 chipset [Summit] 0 d 1014ffff MPIC-2 interrupt controller 0 v 1015 LSI Logic Corp of Canada 0 v 1016 ICL Personal Systems 0 @@ -612,7 +723,9 @@ s 101e1960101e0471 MegaRAID 471 Enterprise 1600 RAID Controller 0 s 101e1960101e0475 MegaRAID 475 Express 500 RAID Controller 0 s 101e1960101e0493 MegaRAID 493 Elite 1600 RAID Controller 0 s 101e196010280471 PowerEdge RAID Controller 3/QC 0 +s 101e196010280475 PowerEdge RAID Controller 3/SC 0 s 101e196010280493 PowerEdge RAID Controller 3/DC 0 +s 101e196010280511 PowerEdge Cost Effective RAID Controller ATA100/4Ch 0 d 101e9010 MegaRAID 428 Ultra RAID Controller 0 d 101e9030 EIDE Controller 0 d 101e9031 EIDE Controller 0 @@ -620,11 +733,18 @@ d 101e9032 EIDE & SCSI Controller 0 d 101e9033 SCSI Controller 0 d 101e9040 Multimedia card 0 d 101e9060 MegaRAID 434 Ultra GT RAID Controller 0 +d 101e9063 MegaRAC 0 +s 101e9063101e0767 Dell Remote Assistant Card 2 0 v 101f PictureTel 0 v 1020 Hitachi Computer Products 0 v 1021 OKI Electric Industry Co. Ltd. 0 v 1022 Advanced Micro Devices [AMD] 0 -d 10222000 79c970 [PCnet LANCE] 0 +d 10221100 K8 NorthBridge 0 +d 10221101 K8 NorthBridge 0 +d 10221102 K8 NorthBridge 0 +d 10221103 K8 NorthBridge 0 +d 10222000 79c970 [PCnet32 LANCE] 0 +s 1022200010142000 NetFinity 10/100 Fast Ethernet 0 s 10222000103c104c Ethernet with LAN remote power Adapter 0 s 10222000103c1064 Ethernet with LAN remote power Adapter 0 s 10222000103c1065 Ethernet with LAN remote power Adapter 0 @@ -633,21 +753,21 @@ s 10222000103c106e Ethernet with LAN remote power Adapter 0 s 10222000103c10ea Ethernet with LAN remote power Adapter 0 s 1022200011131220 EN1220 10/100 Fast Ethernet 0 s 1022200012592450 AT-2450 10/100 Fast Ethernet 0 -s 1022200012592454 AT-2450v4 10Mb Ethernet Adapter 1 +s 1022200012592454 AT-2450v4 10Mb Ethernet Adapter 0 s 1022200012592700 AT-2700TX 10/100 Fast Ethernet 0 s 1022200012592701 AT-2700FX 100Mb Ethernet 0 d 10222001 79c978 [HomePNA] 0 -s 1022200110920a78 Multimedia Home Network Adapter 1 -s 1022200116680299 ActionLink Home Network Adapter 1 +s 1022200110920a78 Multimedia Home Network Adapter 0 +s 1022200116680299 ActionLink Home Network Adapter 0 d 10222020 53c974 [PCscsi] 0 d 10222040 79c974 0 +d 10223000 ELanSC520 Microcontroller 0 d 10227006 AMD-751 [Irongate] System Controller 0 d 10227007 AMD-751 [Irongate] AGP Bridge 0 -d 1022700c AMD-762 [AMD-760MP] System Controller 0 -d 1022700d AMD-760 [AMD-760MP] AGP Bridge 0 -d 1022700d AMD-762 [AMD-760MP] AGP Bridge 1 700c & 700d are on the same chip: the north bridge for the AMD-760MP chipset -d 1022700e AMD-760 [Irongate] System Controller 0 -d 1022700f AMD-760 [Irongate] AGP Bridge 0 +d 1022700c AMD-760 MP [IGD4-2P] System Controller 0 +d 1022700d AMD-760 MP [IGD4-2P] AGP Bridge 0 +d 1022700e AMD-760 [IGD4-1P] System Controller 0 +d 1022700f AMD-760 [IGD4-1P] AGP Bridge 0 d 10227400 AMD-755 [Cobra] ISA 0 d 10227401 AMD-755 [Cobra] IDE 0 d 10227403 AMD-755 [Cobra] ACPI 0 @@ -656,25 +776,33 @@ d 10227408 AMD-756 [Viper] ISA 0 d 10227409 AMD-756 [Viper] IDE 0 d 1022740b AMD-756 [Viper] ACPI 0 d 1022740c AMD-756 [Viper] USB 0 -d 10227410 AMD-765 [Viper] ISA 0 -d 10227410 AMD-766 [ViperPlus] ISA 1 -d 10227410 AMD-766 [ViperPlus] ISA 1 The AMD765 chip never went into mass production, the 766 chip taking its place instead. Both were codenamed ViperPlus. -d 10227411 AMD-765 [Viper] IDE 0 -d 10227411 AMD-766 [ViperPlus] IDE 1 -d 10227413 AMD-765 [Viper] ACPI 0 -d 10227413 AMD-766 [ViperPlus] ACPI 1 -d 10227414 AMD-765 [Viper] USB 0 -d 10227414 AMD-766 [ViperPlus] USB 1 -d 10227440 AMD-768 [??] ISA 0 -d 10227440 AMD-768 [Opus] ISA 1 -d 10227441 AMD-768 [??] IDE 0 -d 10227441 AMD-768 [Opus] IDE 1 -d 10227443 AMD-768 [??] ACPI 0 -d 10227443 AMD-768 [Opus] ACPI 1 -d 10227448 AMD-768 [??] PCI 0 -d 10227448 AMD-768 [Opus] PCI 1 -d 10227449 AMD-768 [??] USB 0 -d 10227449 AMD-768 [Opus] USB 1 +d 10227410 AMD-766 [ViperPlus] ISA 0 +d 10227411 AMD-766 [ViperPlus] IDE 0 +d 10227413 AMD-766 [ViperPlus] ACPI 0 +d 10227414 AMD-766 [ViperPlus] USB 0 +d 10227440 AMD-768 [Opus] ISA 0 +s 1022744010438044 A7M-D Mainboard 0 +d 10227441 AMD-768 [Opus] IDE 0 +d 10227443 AMD-768 [Opus] ACPI 0 +s 1022744310438044 A7M-D Mainboard 0 +d 10227445 AMD-768 [Opus] Audio 0 +d 10227446 AMD-768 [Opus] MC97 Modem (Smart Link HAMR5600 compatible) 0 +d 10227448 AMD-768 [Opus] PCI 0 +d 10227449 AMD-768 [Opus] USB 0 +d 10227450 AMD-8131 PCI-X Bridge 0 +d 10227451 AMD-8131 PCI-X APIC 0 +d 10227454 AMD-8151 System Controller 0 +d 10227455 AMD-8151 AGP Bridge 0 +d 10227460 AMD-8111 PCI 0 +d 10227461 AMD-8111 USB 0 +d 10227462 AMD-8111 Ethernet 0 +d 10227464 AMD-8111 USB 0 +d 10227468 AMD-8111 LPC 0 +d 10227469 AMD-8111 IDE 0 +d 1022746a AMD-8111 SMBus 2.0 0 +d 1022746b AMD-8111 ACPI 0 +d 1022746d AMD-8111 AC97 Audio 0 +d 1022746e AMD-8111 MC97 Modem 0 v 1023 Trident Microsystems 0 d 10230194 82C194 0 d 10232000 4DWave DX 0 @@ -687,6 +815,8 @@ d 10238500 CyberBlade/i1 0 d 10238520 CyberBlade i1 0 s 102385200e11b16e CyberBlade i1 AGP 0 s 1023852010238520 CyberBlade i1 AGP 0 +d 10238620 CyberBlade/i1 0 +s 1023862010140502 ThinkPad T30 0 d 10238820 CyberBlade XPAi1 0 d 10239320 TGUI 9320 0 d 10239350 GUI Accelerator 0 @@ -705,8 +835,9 @@ d 10239460 TGUI 9460 0 d 10239470 TGUI 9470 0 d 10239520 Cyber 9520 0 d 10239525 Cyber 9525 0 +s 1023952510cf1094 Lifebook C6155 0 d 10239540 Cyber 9540 0 -d 10239660 TGUI 9660/968x/968x 0 +d 10239660 TGUI 9660/938x/968x 0 d 10239680 TGUI 9680 0 d 10239682 TGUI 9682 0 d 10239683 TGUI 9683 0 @@ -751,7 +882,7 @@ d 10251561 M1561 Northbridge [Aladdin 7] 0 d 10251621 M1621 Northbridge [Aladdin-Pro II] 0 d 10251631 M1631 Northbridge+3D Graphics [Aladdin TNT2] 0 d 10251641 M1641 Northbridge [Aladdin-Pro IV] 0 -d 10251647 ALI M1647 PCI North Bridge 1 MaGiK1 chipset north bridge (as used on e.g. Asus A7A266 board) +d 10251647 M1647 [MaGiK1] PCI North Bridge 0 d 10253141 M3141 0 d 10253143 M3143 0 d 10253145 M3145 0 @@ -761,35 +892,48 @@ d 10253151 M3151 0 d 10253307 M3307 MPEG-I Video Controller 0 d 10253309 M3309 MPEG-II Video w/ Software Audio Decoder 0 d 10253321 M3321 MPEG-II Audio/Video Decoder 0 -d 10255212 ALI M4803 0 +d 10255212 M4803 0 d 10255215 ALI PCI EIDE Controller 0 d 10255217 M5217H 0 d 10255219 M5219 0 d 10255225 M5225 0 d 10255229 M5229 0 d 10255235 M5235 0 -d 10255237 ALI M5237 PCI USB Host Controller 0 +d 10255237 M5237 PCI USB Host Controller 0 d 10255240 EIDE Controller 0 d 10255241 PCMCIA Bridge 0 d 10255242 General Purpose Controller 0 d 10255243 PCI to PCI Bridge Controller 0 d 10255244 Floppy Disk Controller 0 -d 10255247 ALI M1541 PCI to PCI Bridge 0 -d 10255251 M5251 P1394 OHCI Controller 0 -d 10255427 ALI PCI to AGP Bridge 0 -d 10255451 ALI M5451 PCI AC-Link Controller Audio Device 0 -d 10255453 ALI M5453 PCI AC-Link Controller Modem Device 0 -d 10257101 ALI M7101 PCI PMU Power Management Controller 0 -s 1025710110b97101 ALI M7101 PCI PMU Power Management Controller 0 +d 10255247 M1541 PCI to PCI Bridge 0 +d 10255251 M5251 P1394 Controller 0 +d 10255427 PCI to AGP Bridge 0 +d 10255451 M5451 PCI AC-Link Controller Audio Device 0 +d 10255453 M5453 PCI AC-Link Controller Modem Device 0 +d 10257101 M7101 PCI PMU Power Management Controller 0 +s 1025710110b97101 M7101 PCI PMU Power Management Controller 0 v 1028 Dell Computer Corporation 0 d 10280001 PowerEdge Expandable RAID Controller 2/Si 0 -d 10280002 PowerEdge Expandable RAID Controller 3/Di 0 +s 1028000110280001 PowerEdge Expandable RAID Controller 2/Si 0 +d 10280002 PowerEdge Expandable RAID Controller 3 0 +s 1028000210280002 PowerEdge Expandable RAID Controller 3/Di 0 +s 10280002102800d1 PowerEdge Expandable RAID Controller 3/Di 0 +s 10280002102800d9 PowerEdge Expandable RAID Controller 3/Di 0 d 10280003 PowerEdge Expandable RAID Controller 3/Si 0 +s 1028000310280003 PowerEdge Expandable RAID Controller 3/Si 0 d 10280004 PowerEdge Expandable RAID Controller 3/Si 0 +s 10280004102800d0 PowerEdge Expandable RAID Controller 3/Si 0 d 10280005 PowerEdge Expandable RAID Controller 3/Di 0 d 10280006 PowerEdge Expandable RAID Controller 3/Di 0 +d 10280007 Remote Assistant Card 3 0 d 10280008 PowerEdge Expandable RAID Controller 3/Di 0 -d 1028000a PowerEdge Expandable RAID Controller 3/Di 0 +d 1028000a PowerEdge Expandable RAID Controller 3 0 +s 1028000a10280106 PowerEdge Expandable RAID Controller 3/Di 0 +s 1028000a1028011b PowerEdge Expandable RAID Controller 3/Di 0 +s 1028000a10280121 PowerEdge Expandable RAID Controller 3/Di 0 +d 1028000c Embedded Systems Management Device 4 0 +d 1028000e PowerEdge Expandable RAID Controller 0 +d 1028000f PowerEdge Expandable RAID Controller 4/Di 0 v 1029 Siemens Nixdorf IS 0 v 102a LSI Logic 0 d 102a0000 HYDRA 0 @@ -799,6 +943,7 @@ d 102b0010 MGA-I [Impression?] 0 DJ: I've a suspicion that 0010 is a duplicate o d 102b0518 MGA-II [Athena] 0 d 102b0519 MGA 2064W [Millennium] 0 d 102b051a MGA 1064SG [Mystique] 0 +s 102b051a102b0100 Mystique 1 s 102b051a102b1100 MGA-1084SG Mystique 0 s 102b051a102b1200 MGA-1084SG Mystique 0 s 102b051a1100102b MGA-1084SG Mystique 0 @@ -893,11 +1038,12 @@ s 102b0525102b5f51 4Sight II 0 s 102b0525102b5f52 4Sight II 0 s 102b0525102b9010 Millennium G400 Dual Head 0 s 102b052514580400 GA-G400 0 -s 102b052517050001 Digital First Millennium G450 32MB SGRAM 0 -s 102b052517050002 Digital First Millennium G450 16MB SGRAM 0 -s 102b052517050003 Digital First Millennium G450 32MB 0 -s 102b052517050004 Digital First Millennium G450 16MB 0 -s 102b0525b16f0e11 MGA-G400 AGP 0 +s 102b052517050001 Millennium G450 32MB SGRAM 0 +s 102b052517050002 Millennium G450 16MB SGRAM 0 +s 102b052517050003 Millennium G450 32MB 0 +s 102b052517050004 Millennium G450 16MB 0 +d 102b0527 MGA Parhelia AGP 0 +s 102b0527102b0840 Parhelia 128Mb 0 d 102b0d10 MGA Ultima/Impression 0 d 102b1000 MGA G100 [Productiva] 0 s 102b1000102bff01 Productiva G100 0 @@ -920,6 +1066,7 @@ d 102b6573 Shark 10/100 Multiport SwitchNIC 0 v 102c Chips and Technologies 0 d 102c00b8 F64310 0 d 102c00c0 F69000 HiQVideo 0 +s 102c00c0102c00c0 F69000 HiQVideo 0 d 102c00d0 F65545 0 d 102c00d8 F65545 0 d 102c00dc F65548 0 @@ -930,12 +1077,14 @@ s 102c00e50e11b049 Armada 1700 Laptop Display Controller 0 d 102c00f0 F68554 0 d 102c00f4 F68554 HiQVision 0 d 102c00f5 F68555 0 +d 102c0c30 F69030 0 v 102d Wyse Technology Inc. 0 d 102d50dc 3328 Audio 0 v 102e Olivetti Advanced Technology 0 v 102f Toshiba America 0 d 102f0009 r4x00 0 d 102f0020 ATM Meteor 155 0 +s 102f0020102f00f8 ATM Meteor 155 0 v 1030 TMC Research 0 v 1031 Miro Computer Products AG 0 d 10315601 DC20 ASIC 0 @@ -949,16 +1098,22 @@ d 10330002 PCI to VL98 Bridge 0 d 10330003 ATM Controller 0 d 10330004 R4000 PCI Bridge 0 d 10330005 PCI to 486-like bus Bridge 0 -d 10330006 GUI Accelerator 0 +d 10330006 PC-9800 Graphic Accelerator 0 d 10330007 PCI to UX-Bus Bridge 0 -d 10330008 GUI Accelerator 0 -d 10330009 GUI Accelerator for W98 0 +d 10330008 PC-9800 Graphic Accelerator 0 +d 10330009 PCI to PC9800 Core-Graph Bridge 0 +d 10330016 PCI to VL Bridge 0 d 1033001a [Nile II] 0 d 10330021 Vrc4373 [Nile I] 0 d 10330029 PowerVR PCX1 0 d 1033002a PowerVR 3D 0 +d 1033002c Star Alpha 2 0 +d 1033002d PCI to C-bus Bridge 0 d 10330035 USB 0 +s 1033003511790001 USB 0 s 1033003512ee7000 Root Hub 0 +s 1033003517990001 Root Hub 0 +d 1033003b PCI to C-bus Bridge 0 d 1033003e NAPCCARD Cardbus Controller 0 d 10330046 PowerVR PCX2 [midas] 0 d 1033005a Vrc5074 [Nile 4] 0 @@ -975,11 +1130,12 @@ s 1033006710100120 PowerVR Neon 250 AGP 32Mb 0 d 10330074 56k Voice Modem 0 s 1033007410338014 RCV56ACF 56k Voice Modem 0 d 1033009b Vrc5476 0 -d 103300cd OHCI IEEE 1394 [OrangeLink] Host Controller 0 +d 103300a6 VRC5477 AC97 0 +d 103300cd IEEE 1394 [OrangeLink] Host Controller 0 s 103300cd12ee8011 Root hub 0 -d 103300e0 USB Enhanced Host Controller 0 -d 103300e0 USB 2.0 1 Originally submitted Nov 2000 ... current entry name is doesn't match 0035 +d 103300e0 USB 2.0 0 s 103300e012ee7001 Root hub 0 +s 103300e017990002 Root Hub 0 v 1034 Framatome Connectors USA Inc. 0 v 1035 Comp. & Comm. Research Lab 0 v 1036 Future Domain Corp. 0 @@ -993,10 +1149,12 @@ d 10390006 85C501/2/3 0 d 10390008 85C503/5513 0 d 10390009 ACPI 0 d 10390018 SiS85C503/5513 (LPC Bridge) 0 -d 10390200 5597/5598 VGA 0 +d 10390200 5597/5598/6326 VGA 0 s 1039020010390000 SiS5597 SVGA (Shared RAM) 0 d 10390204 82C204 0 d 10390205 SG86C205 0 +d 10390300 300/200 0 +s 10390300107d2720 Leadtek WinFast VR300 0 d 10390406 85C501/2 0 d 10390496 85C496 0 d 10390530 530 Host 0 @@ -1005,16 +1163,28 @@ d 10390597 5513C 0 d 10390601 85C601 0 d 10390620 620 Host 0 d 10390630 630 Host 0 +d 10390633 633 Host 0 +d 10390635 635 Host 0 +d 10390645 SiS645 Host & Memory & AGP Controller 0 +d 10390646 SiS645DX Host & Memory & AGP Controller 0 +d 10390650 650 Host 0 +d 10390651 SiS651 Host 0 d 10390730 730 Host 0 +d 10390733 733 Host 0 d 10390735 735 Host 0 +d 10390740 740 Host 0 +d 10390745 745 Host 0 d 10390900 SiS900 10/100 Ethernet 0 s 1039090010390900 SiS900 10/100 Ethernet Adapter 0 +d 10390961 SiS961 [MuTIOL Media IO] 0 +d 10390962 SiS962 [MuTIOL Media IO] 0 d 10393602 83C602 0 d 10395107 5107 0 d 10395300 SiS540 PCI Display Adapter 0 d 10395401 486 PCI Chipset 0 d 10395511 5511/5512 0 d 10395513 5513 [IDE] 0 +s 1039551310190970 P6STP-FL motherboard 0 s 1039551310395513 SiS5513 EIDE Controller (A,B step) 0 d 10395517 5517 0 d 10395571 5571 0 @@ -1028,9 +1198,11 @@ d 10396204 Video decoder & MPEG interface 0 d 10396205 VGA Controller 0 d 10396236 6236 3D-AGP 0 d 10396300 SiS630 GUI Accelerator+3D 0 -d 10396306 6306 3D-AGP 0 +s 1039630010190970 P6STP-FL motherboard 0 +d 10396306 SiS530 3D PCI/AGP 0 s 1039630610396306 SiS530,620 GUI Accelerator+3D 0 -d 10396326 86C326 0 +d 10396325 SiS740 IGUI Accelerator 1 +d 10396326 86C326 5598/6326 0 s 1039632610396326 SiS6326 GUI Accelerator 0 s 1039632610920a50 SpeedStar A50 0 s 1039632610920a70 SpeedStar A70 0 @@ -1038,9 +1210,12 @@ s 1039632610924910 SpeedStar A70 0 s 1039632610924920 SpeedStar A70 0 s 1039632615696326 SiS6326 GUI Accelerator 0 d 10397001 7001 0 -d 10397007 OHCI Compliant FireWire Controller 0 +s 1039700110397000 Onboard USB Controller 0 +d 10397002 SiS7002 USB 2.0 0 +s 1039700215097002 Onboard USB Controller 0 +d 10397007 FireWire Controller 0 d 10397012 SiS7012 PCI Audio Accelerator 0 -d 10397013 56k Winmodem (Smart Link HAMR5600 compatible) 0 +d 10397013 Intel 537 [56k Winmodem] 0 d 10397016 SiS7016 10/100 Ethernet Adapter 0 s 1039701610397016 SiS7016 10/100 Ethernet Adapter 0 d 10397018 SiS PCI Audio Accelerator 0 @@ -1070,25 +1245,36 @@ v 103a Seiko Epson Corporation 0 v 103b Tatung Co. of America 0 v 103c Hewlett-Packard Company 0 d 103c1005 A4977A Visualize EG 0 +d 103c1006 Visualize FX6 0 +d 103c1008 Visualize FX4 0 +d 103c100a Visualize FX2 0 d 103c1028 Tach TL Fibre Channel Host Adapter 0 d 103c1029 Tach XL2 Fibre Channel Host Adapter 0 s 103c1029107e000f Interphase 5560 Fibre Channel Adapter 0 -s 103c102990049210 Adaptec 1Gb/2Gb Family Fibre Channel Controller 1 -s 103c102990049211 Adaptec 1Gb/2Gb Family Fibre Channel Controller 1 +s 103c102990049210 1Gb/2Gb Family Fibre Channel Controller 0 +s 103c102990049211 1Gb/2Gb Family Fibre Channel Controller 0 d 103c102a Tach TS Fibre Channel Host Adapter 0 s 103c102a107e000e Interphase 5540/5541 Fibre Channel Adapter 0 -s 103c102a90049110 Adaptec 1Gb/2Gb Family Fibre Channel Controller 1 -s 103c102a90049111 Adaptec 1Gb/2Gb Family Fibre Channel Controller 1 +s 103c102a90049110 1Gb/2Gb Family Fibre Channel Controller 0 +s 103c102a90049111 1Gb/2Gb Family Fibre Channel Controller 0 d 103c1030 J2585A DeskDirect 10/100VG NIC 0 -d 103c1031 J2585B 0 -d 103c1031 J2585B HP 10/100VG PCI LAN Adapter 1 +d 103c1031 J2585B HP 10/100VG PCI LAN Adapter 0 s 103c1031103c1040 J2973A DeskDirect 10BaseT NIC 0 s 103c1031103c1041 J2585B DeskDirect 10/100VG NIC 0 s 103c1031103c1042 J2970A DeskDirect 10BaseT/2 NIC 0 d 103c1040 J2973A DeskDirect 10BaseT NIC 0 d 103c1041 J2585B DeskDirect 10/100 NIC 0 d 103c1042 J2970A DeskDirect 10BaseT/2 NIC 0 +d 103c1048 Diva Serial [GSP] Multiport UART 0 +s 103c1048103c1049 Tosca Console 0 +s 103c1048103c104a Tosca Secondary 0 +s 103c1048103c104b Maestro SP2 0 +s 103c1048103c1223 Halfdome Console 0 +s 103c1048103c1226 Keystone SP2 0 +s 103c1048103c1227 Powerbar SP2 0 +s 103c1048103c1282 Everest SP2 0 d 103c1064 79C970 PCnet Ethernet Controller 0 +d 103c108b Visualize FXe 0 d 103c10c1 NetServer Smart IRQ Router 0 d 103c10ed TopTools Remote Control 0 d 103c1200 82557B 10/100 NIC 0 @@ -1096,10 +1282,12 @@ d 103c1219 NetServer PCI Hot-Plug Controller 0 d 103c121a NetServer SMIC Controller 0 d 103c121b NetServer Legacy COM Port Decoder 0 d 103c121c NetServer PCI COM Port Decoder 0 -d 103c2910 E2910A 0 -d 103c2910 E2910A PCIBus Exerciser 1 -d 103c2925 E2925A 0 -d 103c2925 E2925A 32 Bit, 33 MHzPCI Exerciser & Analyzer 1 +d 103c1229 zx1 System Bus Adapter 0 +d 103c122a zx1 I/O Controller 0 +d 103c122e zx1 Local Bus Adapter 0 +d 103c1290 Auxiliary Diva Serial Port 0 +d 103c2910 E2910A PCIBus Exerciser 0 +d 103c2925 E2925A 32 Bit, 33 MHzPCI Exerciser & Analyzer 0 v 103e Solliday Engineering 0 v 103f Synopsys/Logic Modeling Group 0 v 1040 Accelgraphics Inc. 0 @@ -1112,48 +1300,48 @@ d 10423010 Samurai_1 0 d 10423020 Samurai_IDE 0 v 1043 Asustek Computer, Inc. 0 d 10430675 ISDNLink P-IN100-ST-D 0 -d 10434016 V7700 AGP Video Card Subsystem 1 nVidia 10de:0150 Subsystem 1043:4016 TV In/Out 3D Glasses -d 10438053 A7A266 Motherboard IDE 1 ALi 10b9:5229 Subsystem 1043:8053 A7A266 Motherboard IDE Interface +d 10434021 Asus v7100 Combo Deluxe 1 NVidia GeForce2 MX + TV tuner v 1044 Distributed Processing Technology 0 d 10441012 Domino RAID Engine 0 d 1044a400 SmartCache/Raid I-IV Controller 0 d 1044a500 PCI Bridge 0 d 1044a501 SmartRAID V Controller 0 -s 1044a5011044c001 PM1554U2 Ultra2 Single Channel 1 -s 1044a5011044c002 PM1654U2 Ultra2 Single Channel 1 -s 1044a5011044c003 PM1564U3 Ultra3 Single Channel 1 -s 1044a5011044c004 PM1564U3 Ultra3 Dual Channel 1 -s 1044a5011044c005 PM1554U2 Ultra2 Single Channel (NON ACPI) 1 -s 1044a5011044c00a PM2554U2 Ultra2 Single Channel 1 -s 1044a5011044c00b PM2654U2 Ultra2 Single Channel 1 -s 1044a5011044c00c PM2664U3 Ultra3 Single Channel 1 -s 1044a5011044c00d PM2664U3 Ultra3 Dual Channel 1 -s 1044a5011044c00e PM2554U2 Ultra2 Single Channel (NON ACPI) 1 -s 1044a5011044c00f PM2654U2 Ultra2 Single Channel (NON ACPI) 1 -s 1044a5011044c014 PM3754U2 Ultra2 Single Channel (NON ACPI) 1 -s 1044a5011044c015 PM3755U2B Ultra2 Single Channel (NON ACPI) 1 -s 1044a5011044c016 PM3755F Fibre Channel (NON ACPI) 1 -s 1044a5011044c01e PM3757U2 Ultra2 Single Channel 1 -s 1044a5011044c01f PM3757U2 Ultra2 Dual Channel 1 -s 1044a5011044c020 PM3767U3 Ultra3 Dual Channel 1 -s 1044a5011044c021 PM3767U3 Ultra3 Quad Channel 1 -s 1044a5011044c028 PM2865U3 Ultra3 Single Channel 1 -s 1044a5011044c029 PM2865U3 Ultra3 Dual Channel 1 -s 1044a5011044c02a PM2865F Fibre Channel 1 -s 1044a5011044c03c 2000S Ultra3 Single Channel 1 -s 1044a5011044c03d 2000S Ultra3 Dual Channel 1 -s 1044a5011044c03e 2000F Fibre Channel 1 -s 1044a5011044c046 3000S Ultra3 Single Channel 1 -s 1044a5011044c047 3000S Ultra3 Dual Channel 1 -s 1044a5011044c048 3000F Fibre Channel 1 -s 1044a5011044c050 5000S Ultra3 Single Channel 1 -s 1044a5011044c051 5000S Ultra3 Dual Channel 1 -s 1044a5011044c052 5000F Fibre Channel 1 -s 1044a5011044c05a 2400A UDMA Four Channel 1 -s 1044a5011044c05b 2400A UDMA Four Channel DAC 1 -s 1044a5011044c064 3010S Ultra3 Dual Channel 1 -s 1044a5011044c065 3010S Ultra3 Four Channel 1 -s 1044a5011044c066 3010S Fibre Channel 1 +s 1044a5011044c001 PM1554U2 Ultra2 Single Channel 0 +s 1044a5011044c002 PM1654U2 Ultra2 Single Channel 0 +s 1044a5011044c003 PM1564U3 Ultra3 Single Channel 0 +s 1044a5011044c004 PM1564U3 Ultra3 Dual Channel 0 +s 1044a5011044c005 PM1554U2 Ultra2 Single Channel (NON ACPI) 0 +s 1044a5011044c00a PM2554U2 Ultra2 Single Channel 0 +s 1044a5011044c00b PM2654U2 Ultra2 Single Channel 0 +s 1044a5011044c00c PM2664U3 Ultra3 Single Channel 0 +s 1044a5011044c00d PM2664U3 Ultra3 Dual Channel 0 +s 1044a5011044c00e PM2554U2 Ultra2 Single Channel (NON ACPI) 0 +s 1044a5011044c00f PM2654U2 Ultra2 Single Channel (NON ACPI) 0 +s 1044a5011044c014 PM3754U2 Ultra2 Single Channel (NON ACPI) 0 +s 1044a5011044c015 PM3755U2B Ultra2 Single Channel (NON ACPI) 0 +s 1044a5011044c016 PM3755F Fibre Channel (NON ACPI) 0 +s 1044a5011044c01e PM3757U2 Ultra2 Single Channel 0 +s 1044a5011044c01f PM3757U2 Ultra2 Dual Channel 0 +s 1044a5011044c020 PM3767U3 Ultra3 Dual Channel 0 +s 1044a5011044c021 PM3767U3 Ultra3 Quad Channel 0 +s 1044a5011044c028 PM2865U3 Ultra3 Single Channel 0 +s 1044a5011044c029 PM2865U3 Ultra3 Dual Channel 0 +s 1044a5011044c02a PM2865F Fibre Channel 0 +s 1044a5011044c03c 2000S Ultra3 Single Channel 0 +s 1044a5011044c03d 2000S Ultra3 Dual Channel 0 +s 1044a5011044c03e 2000F Fibre Channel 0 +s 1044a5011044c046 3000S Ultra3 Single Channel 0 +s 1044a5011044c047 3000S Ultra3 Dual Channel 0 +s 1044a5011044c048 3000F Fibre Channel 0 +s 1044a5011044c050 5000S Ultra3 Single Channel 0 +s 1044a5011044c051 5000S Ultra3 Dual Channel 0 +s 1044a5011044c052 5000F Fibre Channel 0 +s 1044a5011044c05a 2400A UDMA Four Channel 0 +s 1044a5011044c05b 2400A UDMA Four Channel DAC 0 +s 1044a5011044c064 3010S Ultra3 Dual Channel 0 +s 1044a5011044c065 3010S Ultra3 Four Channel 0 +s 1044a5011044c066 3010S Fibre Channel 0 +d 1044a511 SmartRAID V Controller 0 v 1045 OPTi Inc. 0 d 1045a0f8 82C750 [Vendetta] USB Controller 0 d 1045c101 92C264 0 @@ -1164,8 +1352,8 @@ d 1045c558 82C558 [Viper-M ISA+IDE] 0 d 1045c567 82C750 [Vendetta], device 0 0 d 1045c568 82C750 [Vendetta], device 1 0 d 1045c569 82C579 [Viper XPress+ Chipset] 0 -d 1045c621 82C621 0 -d 1045c700 82C700 0 +d 1045c621 82C621 [Viper-M/N+] 0 +d 1045c700 82C700 [FireStar] 0 d 1045c701 82C701 [FireStar Plus] 0 d 1045c814 82C814 [Firebridge 1] 0 d 1045c822 82C822 0 @@ -1176,16 +1364,21 @@ d 1045c861 82C861 0 d 1045c895 82C895 0 d 1045c935 EV1935 ECTIVA MachOne PCI Audio 0 d 1045d568 82C825 [Firebridge 2] 0 +d 1045d721 IDE [FireStar] 0 v 1046 IPC Corporation, Ltd. 0 v 1047 Genoa Systems Corp 0 v 1048 Elsa AG 0 +d 10480d22 Quadro4 900XGL [ELSA GLoria4 900XGL] 0 d 10481000 QuickStep 1000 0 d 10483000 QuickStep 3000 0 v 1049 Fountain Technologies, Inc. 0 v 104a SGS Thomson Microelectronics 0 d 104a0008 STG 2000X 0 d 104a0009 STG 1764X 0 +d 104a0010 STG4000 [3D Prophet Kyro Series] 0 +d 104a0981 DEC-Tulip compatible 10/100 Ethernet 0 d 104a1746 STG 1764X 0 +d 104a2774 DEC-Tulip compatible 10/100 Ethernet 0 d 104a3520 MPEG-II decoder card 0 v 104b BusLogic 0 d 104b0140 BT-946C (old) [multimaster 01] 0 @@ -1197,13 +1390,13 @@ d 104c0508 TMS380C2X Compressor Interface 0 d 104c1000 Eagle i/f AS 0 d 104c3d04 TVP4010 [Permedia] 0 d 104c3d07 TVP4020 [Permedia 2] 0 -s 104c3d0710114d10 Comet 1 -s 104c3d071040000f AccelStar II 1 -s 104c3d0710400011 AccelStar II 1 -s 104c3d0710480a31 WINNER 2000 1 -s 104c3d0710480a32 GLoria Synergy 1 -s 104c3d0710480a35 GLoria Synergy 1 -s 104c3d07107d2633 WinFast 3D L2300 1 +s 104c3d0710114d10 Comet 0 +s 104c3d071040000f AccelStar II 0 +s 104c3d0710400011 AccelStar II 0 +s 104c3d0710480a31 WINNER 2000 0 +s 104c3d0710480a32 GLoria Synergy 0 +s 104c3d0710480a35 GLoria Synergy 0 +s 104c3d07107d2633 WinFast 3D L2300 0 s 104c3d0710920127 FIRE GL 1000 PRO 0 s 104c3d0710920136 FIRE GL 1000 PRO 0 s 104c3d0710920141 FIRE GL 1000 PRO 0 @@ -1216,25 +1409,33 @@ s 104c3d0710920155 FIRE GL 1000 PRO 0 s 104c3d0710920156 FIRE GL 1000 PRO 0 s 104c3d0710920157 FIRE GL 1000 PRO 0 s 104c3d0710973d01 Jeronimo Pro 0 -s 104c3d071102100f Graphics Blaster Extreme 1 +s 104c3d071102100f Graphics Blaster Extreme 0 s 104c3d073d3d0100 Reference Permedia 2 3D 0 d 104c8000 PCILynx/PCILynx2 IEEE 1394 Link Layer Controller 0 s 104c8000e4bf1010 CF1-1-SNARE 0 s 104c8000e4bf1020 CF1-2-SNARE 0 -d 104c8009 OHCI Compliant FireWire Controller 0 -s 104c8009104d8032 8032 OHCI i.LINK(IEEE 1394) Controller 1 -d 104c8017 PCI4410 OHCI FireWire Controller 0 -d 104c8019 TSB12LV23 OHCI Compliant IEEE-1394 Controller 0 +d 104c8009 FireWire Controller 0 +s 104c8009104d8032 8032 OHCI i.LINK (IEEE 1394) Controller 0 +d 104c8017 PCI4410 FireWire Controller 0 +d 104c8019 TSB12LV23 IEEE-1394 Controller 0 s 104c801911bd000a Studio DV500-1394 0 s 104c801911bd000e Studio DV 0 s 104c8019e4bf1010 CF2-1-CYMBAL 0 -d 104c8020 TSB12LV26 OHCI Compliant IEEE-1394 Controller (Link) 1 -d 104c8021 TSB43AA22 OHCI Compliant IEEE-1394 Controller (PHY/Link Integrated) 1 -d 104c8022 TSB43AB22 OHCI Compliant IEEE-1394 Controller (PHY/Link) 1394a-2000 1 -d 104c8024 TSB43AB23 OHCI Compliant IEEE-1394 Controller (PHY/Link) 1394a-2000 1 -d 104c8026 TSB43AB21 OHCI Compliant IEEE-1394 Controller (PHY/Link) 1394a-2000 1 +d 104c8020 TSB12LV26 IEEE-1394 Controller (Link) 0 +d 104c8021 TSB43AA22 IEEE-1394 Controller (PHY/Link Integrated) 0 +s 104c8021104d80df Vaio PCG-FX403 0 +s 104c8021104d80e7 VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP 0 +d 104c8022 TSB43AB22 IEEE-1394a-2000 Controller (PHY/Link) 0 +d 104c8023 TSB43AB22/A IEEE-1394a-2000 Controller (PHY/Link) 0 +d 104c8024 TSB43AB23 IEEE-1394a-2000 Controller (PHY/Link) 0 +d 104c8026 TSB43AB21 IEEE-1394a-2000 Controller (PHY/Link) 0 +d 104c8027 PCI4451 IEEE-1394 Controller 0 +s 104c8027102800e6 PCI4451 IEEE-1394 Controller (Dell Inspiron 8100) 0 +d 104c8400 USR2210 22Mbps Wireless PC Card 0 d 104ca001 TDC1570 0 d 104ca100 TDC1561 0 +d 104ca102 TNETA1575 HyperSAR Plus w/PCI Host i/f & UTOPIA i/f 0 +d 104ca106 TMS320C6205 0 d 104cac10 PCI1050 0 d 104cac11 PCI1053 0 d 104cac12 PCI1130 0 @@ -1246,19 +1447,31 @@ d 104cac18 PCI1260 0 d 104cac19 PCI1221 0 d 104cac1a PCI1210 0 d 104cac1b PCI1450 0 +s 104cac1b0e11b113 Armada M700 1 d 104cac1c PCI1225 0 d 104cac1d PCI1251A 0 d 104cac1e PCI1211 0 d 104cac1f PCI1251B 0 d 104cac20 TI 2030 0 +d 104cac21 PCI2031 0 +d 104cac22 PCI2032 PCI Docking Bridge 0 +d 104cac23 PCI2250 PCI-to-PCI Bridge 0 +d 104cac28 PCI2050 PCI-to-PCI Bridge 0 d 104cac30 PCI1260 PC card Cardbus Controller 0 d 104cac40 PCI4450 PC card Cardbus Controller 0 d 104cac41 PCI4410 PC card Cardbus Controller 0 d 104cac42 PCI4451 PC card Cardbus Controller 0 +s 104cac42102800e6 PCI4451 PC card CardBus Controller (Dell Inspiron 8100) 0 d 104cac50 PCI1410 PC card Cardbus Controller 0 d 104cac51 PCI1420 0 +s 104cac511014023b ThinkPad T23 (2647-4MG) 0 +s 104cac5110cf1095 Lifebook C6155 0 +s 104cac51e4bf1000 CP2-2-HIPHOP 0 d 104cac52 PCI1451 PC card Cardbus Controller 0 d 104cac53 PCI1421 PC card Cardbus Controller 0 +d 104cac55 PCI1250 PC card Cardbus Controller 0 +s 104cac5510140512 ThinkPad T30 0 +d 104cac60 PCI2040 PCI to DSP Bridge Controller 0 d 104cfe00 FireWire Host Controller 0 d 104cfe03 12C01A FireWire Host Controller 0 v 104d Sony Corporation 0 @@ -1283,24 +1496,29 @@ s 1050084010500001 W89C840 Ethernet Adapter 0 s 1050084010500840 W89C840 Ethernet Adapter 0 d 10500940 W89C940 0 d 10505a5a W89C940F 0 +d 10506692 W6692 0 d 10509970 W9970CF 0 v 1051 Anigma, Inc. 0 v 1052 ?Young Micro Systems 0 v 1053 Young Micro Systems 0 v 1054 Hitachi, Ltd 0 -v 1055 EFAR Microsystems 0 -d 10559130 EIDE Controller 0 -d 10559460 PCI to ISA Bridge 0 -d 10559462 USB Universal Host Controller [OHCI] 0 -d 10559463 Power Management Controller [Bridge] 0 +v 1055 Efar Microsystems 0 +d 10559130 SLC90E66 [Victory66] IDE 0 +d 10559460 SLC90E66 [Victory66] ISA 0 +d 10559462 SLC90E66 [Victory66] USB 0 +d 10559463 SLC90E66 [Victory66] ACPI 0 v 1056 ICL 0 v 1057 Motorola 0 Motorola made a mistake and used 1507 instead of 1057 in some chips. Please look at the 1507 entry as well when updating this. d 10570001 MPC105 [Eagle] 0 d 10570002 MPC106 [Grackle] 0 +d 10570003 MPC8240 [Kahlua] 0 +d 10570004 MPC107 0 +d 10570006 MPC8245 [Unity] 0 d 10570100 MC145575 [HFC-PCI] 0 d 10570431 KTI829c 100VG 0 d 10571801 Audio I/O Controller (MIDI) 0 s 10571801ecc00030 Layla 0 +d 105718c0 MPC8265A/MPC8266 0 d 10574801 Raven 0 d 10574802 Falcon 0 d 10574803 Hawk 0 @@ -1324,6 +1542,7 @@ s 1057560014c80300 SM56 PCI Speakerphone Modem 0 s 1057560014c80302 SM56 PCI Fax Modem 0 s 1057560016680300 SM56 PCI Speakerphone Modem 0 s 1057560016680302 SM56 PCI Fax Modem 0 +d 10576400 MPC190 Security Processor (S1 family, encryption) 0 v 1058 Electronics & Telecommunications RSH 0 v 1059 Teknor Industrial Computers Inc 0 v 105a Promise Technology, Inc. 0 @@ -1331,10 +1550,13 @@ d 105a0d30 20265 0 s 105a0d30105a4d33 Ultra100 0 d 105a0d38 20263 0 s 105a0d38105a4d39 Fasttrak66 0 +d 105a1275 20275 0 +d 105a3376 PDC20376 0 d 105a4d30 20267 0 s 105a4d30105a4d33 Ultra100 0 s 105a4d30105a4d39 Fasttrak100 0 d 105a4d33 20246 0 +s 105a4d33105a4d33 20246 IDE Controller 0 d 105a4d38 20262 0 s 105a4d38105a4d30 Ultra Device on SuperTrak 0 s 105a4d38105a4d33 Ultra66 0 @@ -1342,10 +1564,14 @@ s 105a4d38105a4d39 Fasttrak66 0 d 105a4d68 20268 0 s 105a4d68105a4d68 Ultra100TX2 0 d 105a4d69 20269 0 -d 105a5275 PDC20276 IDE 1 Found on SuperTrak SX6000 RAID controller. -s 105a5275105a0275 SuperTrak SX6000 IDE 1 From SuperTrak SX6000 +d 105a5275 PDC20276 IDE 0 +s 105a5275105a0275 SuperTrak SX6000 IDE 0 d 105a5300 DC5300 0 d 105a6268 20268R 0 +d 105a6269 PDC20271 0 +s 105a6269105a6269 FastTrak TX2/TX2000 0 +d 105a6621 PDC20621 [SX4000] 4 Channel IDE RAID Controller 0 +d 105a7275 PDC20277 0 v 105b Foxconn International, Inc. 0 v 105c Wipro Infotech Limited 0 v 105d Number 9 Computer Company 0 @@ -1363,7 +1589,24 @@ s 105d2339105d0008 Imagine 128 series 2e 4Mb DRAM 0 s 105d2339105d0009 Imagine 128 series 2e 4Mb DRAM 0 s 105d2339105d000a Imagine 128 series 2 8Mb VRAM 0 s 105d2339105d000b Imagine 128 series 2 8Mb H-VRAM 0 +s 105d233911a4000a Barco Metheus 5 Megapixel 0 +s 105d233913cc0000 Barco Metheus 5 Megapixel 0 +s 105d233913cc0004 Barco Metheus 5 Megapixel 0 +s 105d233913cc0005 Barco Metheus 5 Megapixel 0 +s 105d233913cc0006 Barco Metheus 5 Megapixel 0 +s 105d233913cc0008 Barco Metheus 5 Megapixel 0 +s 105d233913cc0009 Barco Metheus 5 Megapixel 0 +s 105d233913cc000a Barco Metheus 5 Megapixel 0 +s 105d233913cc000c Barco Metheus 5 Megapixel 0 d 105d493d Imagine 128 T2R [Ticket to Ride] 0 +s 105d493d11a4000a Barco Metheus 5 Megapixel, Dual Head 0 +s 105d493d11a4000b Barco Metheus 5 Megapixel, Dual Head 0 +s 105d493d13cc0002 Barco Metheus 4 Megapixel, Dual Head 0 +s 105d493d13cc0003 Barco Metheus 5 Megapixel, Dual Head 0 +s 105d493d13cc0007 Barco Metheus 5 Megapixel, Dual Head 0 +s 105d493d13cc0008 Barco Metheus 5 Megapixel, Dual Head 0 +s 105d493d13cc0009 Barco Metheus 5 Megapixel, Dual Head 0 +s 105d493d13cc000a Barco Metheus 5 Megapixel, Dual Head 0 d 105d5348 Revolution 4 0 v 105e Vtech Computers Ltd 0 v 105f Infotronic America Inc 0 @@ -1399,10 +1642,12 @@ v 1064 Alcatel 0 v 1065 Texas Microsystems 0 v 1066 PicoPower Technology 0 d 10660000 PT80C826 0 -d 10660001 PT86C52x [Vesuvius] 0 -d 10660002 PT80C524 [Nile] 0 +d 10660001 PT86C521 [Vesuvius v1] Host Bridge 0 +d 10660002 PT86C523 [Vesuvius v3] PCI-ISA Bridge Master 0 +d 10660003 PT86C524 [Nile] PCI-to-PCI Bridge 0 +d 10660004 PT86C525 [Nile-II] PCI-to-PCI Bridge 0 d 10660005 National PC87550 System Controller 0 -d 10668002 PT80C524 [Nile] 0 +d 10668002 PT86C523 [Vesuvius v3] PCI-ISA Bridge Slave 0 v 1067 Mitsubishi Electric 0 d 10671002 VG500 [VolumePro Volume Rendering Accelerator] 0 v 1068 Diversified Technology 0 @@ -1410,7 +1655,9 @@ v 1069 Mylex Corporation 0 d 10690001 DAC960P 0 d 10690002 DAC960PD 0 d 10690010 DAC960PX 0 -d 1069ba55 eXtremeRAID support Device 0 +d 10690050 AcceleRAID 352/170/160 support Device 0 +d 1069ba55 eXtremeRAID 1100 support Device 0 +d 1069ba56 eXtremeRAID 2000/3000 support Device 0 v 106a Aten Research Inc 0 v 106b Apple Computer Inc. 0 d 106b0001 Bandit PowerPC host bridge 0 @@ -1438,6 +1685,11 @@ d 106b002d UniNorth 1.5 AGP 0 d 106b002e UniNorth 1.5 PCI 0 d 106b002f UniNorth 1.5 Internal PCI 0 d 106b0030 UniNorth/Pangea FireWire 0 +d 106b0031 UniNorth 2 FireWire 0 +d 106b0032 UniNorth 2 GMAC (Sun GEM) 0 +d 106b0033 UniNorth 2 ATA/100 0 +d 106b0034 UniNorth 2 AGP 0 +d 106b1645 Tigon3 Gigabit Ethernet NIC (BCM5701) 0 v 106c Hyundai Electronics America 0 d 106c8801 Dual Pentium ISA/PCI Motherboard 0 d 106c8802 PowerPC ISA/PCI Motherboard 0 @@ -1492,7 +1744,7 @@ d 10771240 ISP1240 SCSI Host Adapter 0 d 10771280 ISP1280 0 d 10772020 ISP2020A Fast!SCSI Basic Adapter 0 d 10772100 QLA2100 64-bit Fibre Channel Adapter 0 -s 1077210010770001 QLA2100 64 bit Fibre Channel Adapter 1 +s 1077210010770001 QLA2100 64-bit Fibre Channel Adapter 0 d 10772200 QLA2200 0 d 10772300 QLA2300 64-bit FC-AL Adapter 0 d 10772312 QLA2312 Fibre Channel Adapter 0 @@ -1549,9 +1801,10 @@ v 1086 J. Bond Computer Systems 0 v 1087 Cache Computer 0 v 1088 Microcomputer Systems (M) Son 0 v 1089 Data General Corporation 0 -v 108a Bit3 Computer Corp. 0 +v 108a SBS Technologies 0 Formerly Bit3 Computer Corp. d 108a0001 VME Bridge Model 617 0 d 108a0010 VME Bridge Model 618 0 +d 108a0040 dataBLIZZARD 0 d 108a3000 VME Bridge Model 2706 0 v 108c Oakleigh Systems Inc. 0 v 108d Olicom 0 @@ -1640,6 +1893,7 @@ d 1093b071 IMAQ-PCI-1422 0 d 1093b081 IMAQ-PXI-1422 0 d 1093b091 IMAQ-PXI-1411 0 d 1093c801 PCI-GPIB 0 +d 1093c831 PCI-GPIB bridge 0 v 1094 First International Computers [FIC] 0 v 1095 CMD Technology Inc 0 d 10950640 PCI0640 0 @@ -1653,8 +1907,10 @@ s 109506490e11007e Integrated Ultra ATA-100 IDE RAID Controller 0 s 10950649101e0649 AMI MegaRAID IDE 100 Controller 0 d 10950650 PBC0650A 0 d 10950670 USB0670 0 +s 1095067010950670 USB0670 0 d 10950673 USB0673 0 d 10950680 PCI0680 0 +d 10953112 Silicon Image SiI 3112 SATARaid Controller 1 v 1096 Alacron 0 v 1097 Appian Technology 0 v 1098 Quantum Designs (H.K.) Ltd 0 @@ -1666,17 +1922,24 @@ v 109b Gemlight Computer Ltd. 0 v 109c Megachips Corporation 0 v 109d Zida Technologies Ltd. 0 v 109e Brooktree Corporation 0 -d 109e0350 Bt848 TV with DMA push 0 +d 109e0350 Bt848 Video Capture 0 d 109e0351 Bt849A Video capture 0 +d 109e0369 Bt878 Video Capture 0 +s 109e036910020001 TV-Wonder 0 +s 109e036910020003 TV-Wonder/VE 0 d 109e036c Bt879(??) Video Capture 0 s 109e036c13e90070 Win/TV (Video Section) 0 -d 109e036e Bt878 0 +d 109e036e Bt878 Video Capture 0 s 109e036e007013eb WinTV/GO 0 +s 109e036e007013eb WinTV Series 1 +s 109e036e0070ff01 Viewcast Osprey 200 0 +s 109e036e11bd001c PCTV Sat (DBC receiver) 0 s 109e036e127a0001 Bt878 Mediastream Controller NTSC 0 s 109e036e127a0002 Bt878 Mediastream Controller PAL BG 0 s 109e036e127a0003 Bt878a Mediastream Controller PAL BG 0 s 109e036e127a0048 Bt878/832 Mediastream Controller 0 s 109e036e144f3000 MagicTView CPH060 - Video 0 +s 109e036e14610004 AVerTV WDM Video Capture 0 s 109e036e14f10001 Bt878 Mediastream Controller NTSC 0 s 109e036e14f10002 Bt878 Mediastream Controller PAL BG 0 s 109e036e14f10003 Bt878a Mediastream Controller PAL BG 0 @@ -1684,7 +1947,8 @@ s 109e036e14f10048 Bt878/832 Mediastream Controller 0 s 109e036e18511850 FlyVideo'98 - Video 0 s 109e036e18511851 FlyVideo II 0 s 109e036e18521852 FlyVideo'98 - Video (with FM Tuner) 0 -d 109e036f Bt879 0 +s 109e036ebd111200 PCTV pro (TV + FM stereo receiver) 0 +d 109e036f Bt879 Video Capture 0 s 109e036f127a0044 Bt879 Video Capture NTSC 0 s 109e036f127a0122 Bt879 Video Capture PAL I 0 s 109e036f127a0144 Bt879 Video Capture NTSC 0 @@ -1718,19 +1982,26 @@ d 109e0370 Bt880 Video Capture 0 s 109e037018511850 FlyVideo'98 0 s 109e037018511851 FlyVideo'98 EZ - video 0 s 109e037018521852 FlyVideo'98 (with FM Tuner) 0 -d 109e0878 Bt878 0 +d 109e0878 Bt878 Audio Capture 0 s 109e0878007013eb WinTV/GO 0 +s 109e0878007013eb WinTV Series 1 +s 109e08780070ff01 Viewcast Osprey 200 0 +s 109e087810020001 TV-Wonder 0 +s 109e087810020003 TV-Wonder/VE 0 +s 109e087811bd001c PCTV Sat (DBC receiver) 0 s 109e0878127a0001 Bt878 Video Capture (Audio Section) 0 s 109e0878127a0002 Bt878 Video Capture (Audio Section) 0 s 109e0878127a0003 Bt878 Video Capture (Audio Section) 0 s 109e0878127a0048 Bt878 Video Capture (Audio Section) 0 s 109e087813e90070 Win/TV (Audio Section) 0 s 109e0878144f3000 MagicTView CPH060 - Audio 0 +s 109e087814610004 AVerTV WDM Audio Capture 0 s 109e087814f10001 Bt878 Video Capture (Audio Section) 0 s 109e087814f10002 Bt878 Video Capture (Audio Section) 0 s 109e087814f10003 Bt878 Video Capture (Audio Section) 0 s 109e087814f10048 Bt878 Video Capture (Audio Section) 0 -d 109e0879 Bt879 Video Capture (Audio Section) 0 +s 109e0878bd111200 PCTV pro (TV + FM stereo receiver, audio section) 0 +d 109e0879 Bt879 Audio Capture 0 s 109e0879127a0044 Bt879 Video Capture (Audio Section) 0 s 109e0879127a0122 Bt879 Video Capture (Audio Section) 0 s 109e0879127a0144 Bt879 Video Capture (Audio Section) 0 @@ -1757,7 +2028,7 @@ s 109e087914f11322 Bt879 Video Capture (Audio Section) 0 s 109e087914f11522 Bt879 Video Capture (Audio Section) 0 s 109e087914f11622 Bt879 Video Capture (Audio Section) 0 s 109e087914f11722 Bt879 Video Capture (Audio Section) 0 -d 109e0880 Bt880 Video Capture (Audio Section) 0 +d 109e0880 Bt880 Audio Capture 0 d 109e2115 BtV 2115 Mediastream controller 0 d 109e2125 BtV 2125 Mediastream controller 0 d 109e2164 BtV 2164 0 @@ -1771,7 +2042,8 @@ v 10a1 Juko Electronics Ind. Co. Ltd 0 v 10a2 Quantum Corporation 0 v 10a3 Everex Systems Inc 0 v 10a4 Globe Manufacturing Sales 0 -v 10a5 Racal Interlan 0 +v 10a5 Smart Link Ltd. 0 +d 10a55449 SmartPCI561 modem 0 v 10a6 Informtech Industrial Ltd. 0 v 10a7 Benchmarq Microelectronics 0 v 10a8 Sierra Semiconductor 0 @@ -1831,20 +2103,26 @@ d 10b51078 VScom 210 2 port serial and 1 port parallel adaptor 0 d 10b51103 VScom 200 2 port serial adaptor 0 d 10b51146 VScom 010 1 port parallel adaptor 0 d 10b51147 VScom 020 2 port parallel adaptor 0 +d 10b52724 Thales PCSM Security Card 0 +d 10b59030 PCI <-> IOBus Bridge Hot Swap 0 +s 10b5903015ed1002 MCCS 8-port Serial Hot Swap 0 +s 10b5903015ed1003 MCCS 16-port Serial Hot Swap 0 d 10b59036 9036 0 d 10b59050 PCI <-> IOBus Bridge 0 +s 10b5905010b52036 SatPak GPS 0 s 10b5905010b52273 SH-ARC SoHard ARCnet card 0 -s 10b5905015220001 RockForce 4 Port V.90 Data/Fax/Voice Modem 1 -s 10b5905015220001 1 -s 10b5905015220001 RockForce 4 Port V.90 Data/Fax/Voice Modem 1 support@mainpine.com -s 10b5905015220002 RockForce 2 Port V.90 Data/Fax/Voice Modem 1 -s 10b5905015220010 RockForce2000 4 Port V.90 Data/Fax/Voice Modem 1 -s 10b5905015220020 RockForce2000 2 Port V.90 Data/Fax/Voice Modem 1 +s 10b5905010b59050 MP9050 0 +s 10b5905015220001 RockForce 4 Port V.90 Data/Fax/Voice Modem 0 +s 10b5905015220002 RockForce 2 Port V.90 Data/Fax/Voice Modem 0 +s 10b5905015220003 RockForce 6 Port V.90 Data/Fax/Voice Modem 0 +s 10b5905015220004 RockForce 8 Port V.90 Data/Fax/Voice Modem 0 +s 10b5905015220010 RockForce2000 4 Port V.90 Data/Fax/Voice Modem 0 +s 10b5905015220020 RockForce2000 2 Port V.90 Data/Fax/Voice Modem 0 s 10b5905015ed1000 Macrolink MCCS 8-port Serial 0 s 10b5905015ed1001 Macrolink MCCS 16-port Serial 0 s 10b5905015ed1002 Macrolink MCCS 8-port Serial Hot Swap 0 s 10b5905015ed1003 Macrolink MCCS 16-port Serial Hot Swap 0 -s 10b59050d531c002 PCIntelliCAN 2xSJA1000 CAN bus 1 +s 10b59050d531c002 PCIntelliCAN 2xSJA1000 CAN bus 0 s 10b59050d84d4006 EX-4006 1P 0 s 10b59050d84d4008 EX-4008 1P EPP/ECP 0 s 10b59050d84d4014 EX-4014 2P 0 @@ -1862,14 +2140,15 @@ s 10b59050d84d4058 EX-4055 4S(16C650) RS-232 0 s 10b59050d84d4065 EX-4065 8S(16C550) RS-232 0 s 10b59050d84d4068 EX-4068 8S(16C650) RS-232 0 s 10b59050d84d4078 EX-4078 2S(16C552) RS-232+1P 0 +d 10b59054 PCI <-> IOBus Bridge 0 +s 10b5905410b52455 Wessex Techology PHIL-PCI 0 d 10b59060 9060 0 d 10b5906d 9060SD 0 s 10b5906d125c0640 Aries 16000P 0 d 10b5906e 9060ES 0 d 10b59080 9080 0 s 10b5908010b59080 9080 [real subsystem ID not set] 0 -d 10b5a001 GTEK Jetport II 2 port serial adaptor 0 -d 10b5c001 GTEK Cyclone 16/32 port serial adaptor 0 +s 10b59080129d0002 Aculab PCI Prosidy card 0 v 10b6 Madge Networks 0 d 10b60001 Smart 16/4 PCI Ringnode 0 d 10b60002 Smart 16/4 PCI Ringnode Mk2 0 @@ -1889,17 +2168,17 @@ s 10b6000910b60009 Smart 100/16/4 PCI-HS Ringnode 0 d 10b6000a Smart 100/16/4 PCI Ringnode 0 s 10b6000a10b6000a Smart 100/16/4 PCI Ringnode 0 d 10b6000b 16/4 CardBus Adapter Mk2 0 -s 10b6000b10b60008 16/4 CardBus Adapter Mk2 1 +s 10b6000b10b60008 16/4 CardBus Adapter Mk2 0 s 10b6000b10b6000b 16/4 Cardbus Adapter Mk2 0 -d 10b6000c RapidFire 3140V2 16/4 TR Adapter 1 -s 10b6000c10b6000c RapidFire 3140V2 16/4 TR Adapter 1 -d 10b61000 Collage 25 ATM Adapter 0 -d 10b61000 Collage 25/155 ATM Client Adapter 1 +d 10b6000c RapidFire 3140V2 16/4 TR Adapter 0 +s 10b6000c10b6000c RapidFire 3140V2 16/4 TR Adapter 0 +d 10b61000 Collage 25/155 ATM Client Adapter 0 d 10b61001 Collage 155 ATM Server Adapter 0 v 10b7 3Com Corporation 0 d 10b70001 3c985 1000BaseSX (SX/TX) 0 +d 10b71006 MINI PCI type 3B Data Fax Modem 0 d 10b71007 Mini PCI 56k Winmodem 0 -s 10b7100710b7615c Mini PCI 56K Modem 1 +s 10b7100710b7615c Mini PCI 56K Modem 0 d 10b73390 3c339 TokenLink Velocity 0 d 10b73590 3c359 TokenLink Velocity XL 0 s 10b7359010b73590 TokenLink Velocity XL Adapter (3C359/359B) 0 @@ -1923,13 +2202,13 @@ d 10b76055 3c556 Hurricane CardBus 0 d 10b76056 3c556B Hurricane CardBus 0 s 10b7605610b76556 10/100 Mini PCI Ethernet Adapter 0 d 10b76560 3CCFE656 Cyclone CardBus 0 -s 10b7656010b7656a 3CCFEM656 10/100 LAN 56K Modem CardBus 0 -d 10b76561 3CCFEM656 10/100 LAN 56K Modem CardBus 0 -s 10b7656110b7656b 3CCFEM656 10/100 LAN 56K Modem CardBus 0 +s 10b7656010b7656a 3CCFEM656 10/100 LAN+56K Modem CardBus 0 +d 10b76561 3CCFEM656 10/100 LAN+56K Modem CardBus 0 +s 10b7656110b7656b 3CCFEM656 10/100 LAN+56K Modem CardBus 0 d 10b76562 3CCFEM656 [id 6562] Cyclone CardBus 0 -s 10b7656210b7656b 3CCFEM656B 10/100 LAN 56K Modem CardBus 0 -d 10b76563 3CCFEM656B 10/100 LAN 56K Modem CardBus 0 -s 10b7656310b7656b 3CCFEM656 10/100 LAN 56K Modem CardBus 0 +s 10b7656210b7656b 3CCFEM656B 10/100 LAN+56K Modem CardBus 0 +d 10b76563 3CCFEM656B 10/100 LAN+56K Modem CardBus 0 +s 10b7656310b7656b 3CCFEM656 10/100 LAN+56K Modem CardBus 0 d 10b76564 3CCFEM656 [id 6564] Cyclone CardBus 0 d 10b77646 3cSOHO100-TX Hurricane 0 d 10b77940 3c803 FDDILink UTP Controller 0 @@ -1971,27 +2250,37 @@ s 10b7905510b79055 3C905B Fast Etherlink XL 10/100 0 d 10b79056 3c905B-T4 [Fast EtherLink XL 10/100] 0 d 10b79058 3c905B-Combo [Deluxe Etherlink XL 10/100] 0 d 10b7905a 3c905B-FX [Fast Etherlink XL FX 10/100] 0 -d 10b79200 3c905C-TX [Fast Etherlink] 0 -d 10b79200 3c905C-TX/TX-M [Tornado] 1 +d 10b79200 3c905C-TX/TX-M [Tornado] 0 +s 10b7920010280095 Integrated 3C905C-TX Fast Etherlink for PC Management NIC 0 s 10b7920010b71000 3C905C-TX Fast Etherlink for PC Management NIC 0 -s 10b7920010b71000 EtherLink 10/100 NIC for Complete PC Management 1 s 10b7920010b77000 10/100 Mini PCI Ethernet Adapter 0 +d 10b79201 3C920B-EMB Integrated Fast Ethernet Controller 1 +d 10b79300 3CSOHO100B-TX [910-A01] 0 d 10b79800 3c980-TX [Fast Etherlink XL Server Adapter] 0 s 10b7980010b79800 3c980-TX Fast Etherlink XL Server Adapter 0 d 10b79805 3c980-TX 10/100baseTX NIC [Python-T] 0 s 10b7980510b71201 3c982-TXM 10/100baseTX Dual Port A [Hydra] 0 s 10b7980510b71202 3c982-TXM 10/100baseTX Dual Port B [Hydra] 0 s 10b7980510b79805 3c980 10/100baseTX NIC [Python-T] 0 -d 10b79902 3CR990-TX-95 56-bit Typhoon Client 0 -d 10b79903 3CR990-TX-97 168-bit Typhoon Client 0 -d 10b79908 3CR990SVR95 56-bit Typhoon Server 0 -d 10b79909 3CR990SVR97 Typhoon Server 0 +s 10b7980510f12462 Thunder K7 S2462 1 +d 10b79900 3C990-TX [Typhoon] 0 +d 10b79902 3CR990-TX-95 [Typhoon 56-bit] 0 +d 10b79903 3CR990-TX-97 [Typhoon 168-bit] 0 +d 10b79904 3C990B-TX-M/3C990BSVR [Typhoon2] 0 +s 10b7990410b71000 3CR990B-TX-M [Typhoon2] 0 +s 10b7990410b72000 3CR990BSVR [Typhoon2 Server] 0 +d 10b79905 3CR990-FX-95/97/95 [Typhon Fiber] 0 +s 10b7990510b71101 3CR990-FX-95 [Typhoon Fiber 56-bit] 0 +s 10b7990510b71102 3CR990-FX-97 [Typhoon Fiber 168-bit] 0 +s 10b7990510b72101 3CR990-FX-95 Server [Typhoon Fiber 56-bit] 0 +s 10b7990510b72102 3CR990-FX-97 Server [Typhoon Fiber 168-bit] 0 +d 10b79908 3CR990SVR95 [Typhoon Server 56-bit] 0 +d 10b79909 3CR990SVR97 [Typhoon Server 168-bit] 0 +d 10b7990b 3C990SVR [Typhoon Server] 0 v 10b8 Standard Microsystems Corp [SMC] 0 d 10b80005 83C170QF 0 -s 10b800051055e000 LANEPIC 0 -s 10b800051055e000 LANEPIC 10/100 [EVB171Q-PCI] 1 -s 10b800051055e002 LANEPIC 0 -s 10b800051055e002 LANEPIC 10/100 [EVB171G-PCI] 1 +s 10b800051055e000 LANEPIC 10/100 [EVB171Q-PCI] 0 +s 10b800051055e002 LANEPIC 10/100 [EVB171G-PCI] 0 s 10b8000510b8a011 EtherPower II 10/100 0 s 10b8000510b8a014 EtherPower II 10/100 0 s 10b8000510b8a015 EtherPower II 10/100 0 @@ -2009,7 +2298,7 @@ d 10b81000 FDC 37c665 0 d 10b81001 FDC 37C922 0 d 10b8a011 83C170QF 0 d 10b8b106 SMC34C90 0 -v 10b9 Acer Laboratories Inc. [ALi] 0 +v 10b9 ALi Corporation 0 d 10b90111 C-Media CMI8738/C3DX Audio Device (OEM) 0 s 10b9011110b90111 C-Media CMI8738/C3DX Audio Device (OEM) 0 d 10b91435 M1435 0 @@ -2031,10 +2320,18 @@ s 10b9153310b91533 ALI M1533 Aladdin IV ISA Bridge 0 d 10b91541 M1541 0 s 10b9154110b91541 ALI M1541 Aladdin V/V+ AGP System Controller 0 d 10b91543 M1543 0 +d 10b91563 M1563 HyperTransport South Bridge 0 d 10b91621 M1621 0 d 10b91631 ALI M1631 PCI North Bridge Aladdin Pro III 0 +d 10b91632 M1632M Northbridge+Trident 0 d 10b91641 ALI M1641 PCI North Bridge Aladdin Pro IV 0 -d 10b91647 ALI M1647 PCI North Bridge ALiMAGIK_1 1 Used on ASUS A7A266 Motherboards +d 10b91644 M1644/M1644T Northbridge+Trident 0 +d 10b91646 M1646 Northbridge+Trident 0 +d 10b91647 M1647 Northbridge [MAGiK 1 / MobileMAGiK 1] 0 +d 10b91651 M1651/M1651T Northbridge [Aladdin-Pro 5/5M,Aladdin-Pro 5T/5TM] 0 +d 10b91671 M1671 Super P4 Northbridge [AGP4X,PCI and SDR/DDR] 0 +d 10b91681 M1681 P4 Northbridge [AGP8X,HyperTransport and SDR/DDR] 0 +d 10b91687 M1687 K8 Northbridge [AGP8X and HyperTransport] 0 d 10b93141 M3141 0 d 10b93143 M3143 0 d 10b93145 M3145 0 @@ -2049,12 +2346,24 @@ d 10b95217 M5217H 0 d 10b95219 M5219 0 d 10b95225 M5225 0 d 10b95229 M5229 IDE 0 +s 10b9522910438053 A7A266 Motherboard IDE 0 d 10b95235 M5225 0 -d 10b95237 M5237 USB 0 -d 10b95243 M5243 0 -d 10b95247 M5247 0 -d 10b95247 M5247 PCI Bridge 1 -d 10b95451 M5451 PCI South Bridge Audio 0 +d 10b95237 USB 1.1 Controller 0 +d 10b95239 USB 2.0 Controller 0 +d 10b95243 M1541 PCI to AGP Controller 0 +d 10b95247 PCI to AGP Controller 0 +d 10b95249 M5249 HTT to PCI Bridge 0 +d 10b95251 M5251 P1394 OHCI 1.0 Controller 0 +d 10b95253 M5253 P1394 OHCI 1.1 Controller 0 +d 10b95261 M5261 Ethernet Controller 0 +d 10b95451 M5451 PCI AC-Link Controller Audio Device 0 +s 10b9545110140506 ThinkPad R30 0 +d 10b95453 M5453 PCI AC-Link Controller Modem Device 0 +d 10b95455 M5455 PCI AC-Link Controller Audio Device 0 +d 10b95457 Intel 537 [M5457 AC-Link Modem] 0 +d 10b95459 SmartPCI561 56K Modem 0 +d 10b95471 M5471 Memory Stick Controller 0 +d 10b95473 M5473 SD-MMC Controller 0 d 10b97101 M7101 PMU 0 s 10b9710110b97101 ALI M7101 Power Management Controller 0 v 10ba Mitsubishi Electric Corp. 0 @@ -2075,7 +2384,7 @@ v 10c5 Xerox Corporation 0 v 10c6 Rambus Inc. 0 v 10c7 Media Vision 0 v 10c8 Neomagic Corporation 0 -d 10c80001 NM2070 [MagicGraph NM2070] 0 +d 10c80001 NM2070 [MagicGraph 128] 0 d 10c80002 NM2090 [MagicGraph 128V] 0 d 10c80003 NM2093 [MagicGraph 128ZV] 0 d 10c80004 NM2160 [MagicGraph 128XD] 0 @@ -2097,13 +2406,14 @@ s 10c8000410f78309 MagicGraph 128XD 0 s 10c8000410f7830b MagicGraph 128XD 0 s 10c8000410f7830d MagicGraph 128XD 0 s 10c8000410f78312 MagicGraph 128XD 0 -d 10c80005 [MagicMedia 256AV] 0 +d 10c80005 NM2200 [MagicGraph 256AV] 0 +s 10c80005101400dd ThinkPad 570 0 d 10c80006 NM2360 [MagicMedia 256ZX] 0 d 10c80016 NM2380 [MagicMedia 256XL+] 0 s 10c8001610c80016 MagicMedia 256XL+ 0 -d 10c80025 [MagicMedia 256AV+] 0 -d 10c80083 [MagicGraph 128ZV Plus] 0 -d 10c88005 [MagicMedia 256AV Audio] 0 +d 10c80025 NM2230 [MagicGraph 256AV+] 0 +d 10c80083 NM2093 [MagicGraph 128ZV+] 0 +d 10c88005 NM2200 [MagicMedia 256AV Audio] 0 s 10c880050e11b0d1 MagicMedia 256AV Audio Device on Discovery 0 s 10c880050e11b126 MagicMedia 256AV Audio Device on Durango 0 s 10c88005101400dd MagicMedia 256AV Audio Device on BlackTip Thinkpad 0 @@ -2116,7 +2426,7 @@ s 10c8800510c88005 MagicMedia 256AV Audio Device on FireAnt 0 s 10c88005110a8005 MagicMedia 256AV Audio Device 0 s 10c8800514c00004 MagicMedia 256AV Audio Device 0 d 10c88006 NM2360 [MagicMedia 256ZX Audio] 0 -d 10c88016 NM2360 [MagicMedia 256ZX Audio] 1 +d 10c88016 NM2380 [MagicMedia 256XL+ Audio] 0 v 10c9 Dataexpert Corporation 0 v 10ca Fujitsu Microelectr., Inc. 0 v 10cb Omron Corporation 0 @@ -2143,8 +2453,7 @@ v 10d8 Advanced Peripherals Labs 0 v 10d9 Macronix, Inc. [MXIC] 0 d 10d90512 MX98713 0 d 10d90531 MX987x5 0 -d 10d90531 MX987x5 (ACPI) 1 -s 10d9053111861200 D-Link DFE-540TX ProFAST 10/100 Adapter 1 +s 10d9053111861200 DFE-540TX ProFAST 10/100 Adapter 0 d 10d98625 MX86250 0 d 10d98888 MX86200 0 v 10da Compaq IPG-Austin 0 @@ -2159,12 +2468,13 @@ d 10dc0022 HIPPI source 0 d 10dc10dc ATT2C15-3 FPGA 0 v 10dd Evans & Sutherland 0 v 10de nVidia Corporation 0 -d 10de0008 EDGE 3D [NV1] 0 -d 10de0009 EDGE 3D [NV1] 0 -d 10de0010 Mutara V08 [NV2] 0 -d 10de0020 Riva TnT [NV04] 0 +d 10de0008 NV1 [EDGE 3D] 0 +d 10de0009 NV1 [EDGE 3D] 0 +d 10de0010 NV2 [Mutara V08] 0 +d 10de0020 NV4 [Riva TnT] 0 s 10de002010430200 V3400 TNT 0 s 10de002010480c18 Erazor II SGRAM 0 +s 10de002010480c1b Erazor II 0 s 10de002010920550 Viper V550 0 s 10de002010920552 Viper V550 0 s 10de002010924804 Viper V550 0 @@ -2177,10 +2487,13 @@ s 10de002010924822 Viper V550 0 s 10de002010924904 Viper V550 0 s 10de002010924914 Viper V550 0 s 10de002010928225 Viper V550 0 +s 10de002010b4273d Velocity 4400 0 +s 10de002010b4273e Velocity 4400 0 +s 10de002010b42740 Velocity 4400 0 s 10de002010de0020 Riva TNT 0 s 10de002011021015 Graphics Blaster CT6710 0 s 10de002011021016 Graphics Blaster RIVA TNT 0 -d 10de0028 Riva TnT2 [NV5] 0 +d 10de0028 NV5 [Riva TnT2] 0 s 10de002810430200 AGP-V3800 SGRAM 0 s 10de002810430201 AGP-V3800 SDRAM 0 s 10de002810430205 PCI-V3800 0 @@ -2188,13 +2501,15 @@ s 10de002810434000 AGP-V3800PRO 0 s 10de002810924804 Viper V770 0 s 10de002810924a00 Viper V770 0 s 10de002810924a02 Viper V770 Ultra 0 +s 10de002810925a00 RIVA TNT2/TNT2 Pro 0 s 10de002810926a02 Viper V770 Ultra 0 s 10de002810927a02 Viper V770 Ultra 0 s 10de002810de0005 RIVA TNT2 Pro 0 +s 10de002810de000f Compaq NVIDIA TNT2 Pro 0 s 10de002811021020 3D Blaster RIVA TNT2 0 s 10de002811021026 3D Blaster RIVA TNT2 Digital 0 s 10de002814af5810 Maxi Gamer Xentor 0 -d 10de0029 Riva TnT2 Ultra [NV5] 0 +d 10de0029 NV5 [Riva TnT2 Ultra] 0 s 10de002910430200 AGP-V3800 Deluxe 0 s 10de002910430201 AGP-V3800 Ultra SDRAM 0 s 10de002910430205 PCI-V3800 Ultra 0 @@ -2202,66 +2517,132 @@ s 10de002911021021 3D Blaster RIVA TNT2 Ultra 0 s 10de002911021029 3D Blaster RIVA TNT2 Ultra 0 s 10de00291102102f 3D Blaster RIVA TNT2 Ultra 0 s 10de002914af5820 Maxi Gamer Xentor 32 0 -d 10de002a Riva TnT2 [NV5] 0 -d 10de002b Riva TnT2 [NV5] 0 -d 10de002c Vanta [NV6] 0 +d 10de002a NV5 [Riva TnT2] 0 +d 10de002b NV5 [Riva TnT2] 0 +d 10de002c NV6 [Vanta] 0 s 10de002c10430200 AGP-V3800 Combat SDRAM 0 s 10de002c10430201 AGP-V3800 Combat 0 s 10de002c10926820 Viper V730 0 s 10de002c11021031 CT6938 VANTA 8MB 0 s 10de002c11021034 CT6894 VANTA 16MB 0 s 10de002c14af5008 Maxi Gamer Phoenix 2 0 -d 10de002d Vanta [NV6] 0 +d 10de002d RIVA TNT2 Model 64 0 s 10de002d10430200 AGP-V3800M 0 s 10de002d10430201 AGP-V3800M 0 +s 10de002d10480c3a Erazor III LT 0 +s 10de002d10de001e M64 AGP4x 1 s 10de002d11021023 CT6892 RIVA TNT2 Value 0 s 10de002d11021024 CT6932 RIVA TNT2 Value 32Mb 0 -s 10de002d1102102c CT6931 RIVA TNT2 Value (Jumper) 0 +s 10de002d1102102c CT6931 RIVA TNT2 Value [Jumper] 0 s 10de002d14628808 MSI-8808 0 -d 10de002e Vanta [NV6] 0 -d 10de002f Vanta [NV6] 0 -d 10de00a0 Riva TNT2 0 +s 10de002d15541041 PixelView RIVA TNT2 M64 32MB 0 +d 10de002e NV6 [Vanta] 0 +d 10de002f NV6 [Vanta] 0 +d 10de0060 nForce2 ISA Bridge 1 +d 10de0065 nForce2 IDE 1 +d 10de0066 nForce2 Ethernet Controller 1 +d 10de0067 nForce2 USB Controller [OHCI] 1 +d 10de0067 nForce2 USB Controller 1 +d 10de0068 nForce2 USB Controller 1 +d 10de0068 nForce2 USB Controller [ECHI] 1 +d 10de006a nForce MultiMedia audio [Via VT82C686B] 0 +d 10de006b nForce MultiMedia audio [Via VT82C686B] 0 +d 10de006e nForce2 FireWire (IEEE 1394) Controller [OHCI] 1 +d 10de00a0 NV5 [Riva TNT2] 0 s 10de00a014af5810 Maxi Gamer Xentor 0 -d 10de0100 GeForce 256 0 +d 10de0100 NV10 [GeForce 256 SDR] 0 s 10de010010430200 AGP-V6600 SGRAM 0 s 10de010010430201 AGP-V6600 SDRAM 0 s 10de010010434008 AGP-V6600 SGRAM 0 s 10de010010434009 AGP-V6600 SDRAM 0 s 10de01001102102d CT6941 GeForce 256 0 -s 10de010014af5022 3D Prophet SE 1 -d 10de0101 GeForce 256 DDR 0 +s 10de010014af5022 3D Prophet SE 0 +d 10de0101 NV10 [GeForce 256 DDR] 0 s 10de010110430202 AGP-V6800 DDR 0 s 10de01011043400a AGP-V6800 DDR SGRAM 0 s 10de01011043400b AGP-V6800 DDR SDRAM 0 s 10de01011102102e CT6971 GeForce 256 DDR 0 s 10de010114af5021 3D Prophet DDR-DVI 0 -d 10de0103 Quadro (GeForce 256 GL) 0 -d 10de0110 NV11 (GeForce2 MX) 0 -s 10de011010434015 AGP-7100 Pro with TV output 0 -s 10de011010434031 V7100 Pro with TV output 1 -d 10de0111 NV11 (GeForce2 MX DDR) 0 -d 10de0112 GeForce2 Go 0 -d 10de0113 NV11 (GeForce2 MXR) 0 -d 10de0150 NV15 (GeForce2 Pro) 0 +d 10de0103 NV10 [Quadro] 0 +d 10de0110 NV11 [GeForce2 MX] 0 +s 10de011010434015 AGP-V7100 Pro 0 +s 10de011010434031 V7100 Pro with TV output 0 +s 10de011014628817 MSI GeForce2 MX400 Pro32S [MS-8817] 1 http://www.msi.com.tw/program/products/vga/vga/pro_vga_detail.php?UID=173&MODEL=MS-8817 +s 10de011014af7102 3D Prophet II MX 0 +s 10de011014af7103 3D Prophet II MX Dual-Display 0 +d 10de0111 NV11 [GeForce2 MX DDR] 0 +d 10de0112 NV11 [GeForce2 Go] 0 +d 10de0113 NV11 [GeForce2 MXR] 0 +d 10de0150 NV15 [GeForce2 GTS] 0 +s 10de015010434016 V7700 AGP Video Card 0 s 10de0150107d2840 WinFast GeForce2 GTS with TV output 0 s 10de015014628831 Creative GeForce2 Pro 0 -d 10de0151 NV15 DDR (GeForce2 GTS) 0 -d 10de0152 NV15 Bladerunner (GeForce2 Ultra) 0 -d 10de0153 NV15 GL (Quadro2 Pro) 0 -d 10de0200 NV20 (GeForce3) 0 +d 10de0151 NV15 [GeForce2 Ti] 0 +s 10de01511043405f V7700Ti 0 +d 10de0152 NV15 [GeForce2 Ultra, Bladerunner] 0 +s 10de015210480c56 GLADIAC Ultra 0 +d 10de0153 NV15 [Quadro2 Pro] 0 +d 10de0170 NV17 [GeForce4 MX460] 0 +d 10de0171 NV17 [GeForce4 MX440] 0 +s 10de017114628661 G4MX440-VTP 0 +s 10de017114628730 MX440SES-T (MS-8873) 1 +d 10de0172 NV17 [GeForce4 MX420] 0 +d 10de0173 NV1x 0 +d 10de0174 NV17 [GeForce4 440 Go] 0 +d 10de0175 NV17 [GeForce4 420 Go] 0 +d 10de0176 NV17 [GeForce4 420 Go 32M] 0 +d 10de0178 Quadro4 500XGL 0 +d 10de0179 NV17 [GeForce4 440 Go 64M] 0 +d 10de017a Quadro4 200/400NVS 0 +d 10de017b Quadro4 550XGL 0 +d 10de017c Quadro4 550 GoGL 0 +d 10de0181 NV18 [GeForce4 MX440 AGP 8x] 0 +d 10de01a0 NV15 [GeForce2 - nForce GPU] 0 +d 10de01a4 nForce CPU bridge 0 +d 10de01ab nForce 420 Memory Controller (DDR) 0 +d 10de01ac nForce 220/420 Memory Controller 0 +d 10de01ad nForce 220/420 Memory Controller 0 +d 10de01b1 nForce Audio 0 +d 10de01b2 nForce ISA Bridge 0 +d 10de01b4 nForce PCI System Management 0 +d 10de01b7 nForce AGP to PCI Bridge 0 +d 10de01b8 nForce PCI-to-PCI bridge 0 +d 10de01bc nForce IDE 0 +d 10de01c1 Intel 537 [nForce MC97 Modem] 0 +d 10de01c2 nForce USB Controller 0 +d 10de01c3 nForce Ethernet Controller 0 +d 10de01e8 nForce2 AGP AGP Host to PCI Bridge 1 +d 10de0200 NV20 [GeForce3] 0 s 10de02001043402f AGP-V8200 DDR 0 -d 10de0203 Quadro DCC 0 +d 10de0201 NV20 [GeForce3 Ti200] 0 +d 10de0202 NV20 [GeForce3 Ti500] 0 +s 10de02021043405b V8200 T5 0 +s 10de02021545002f Xtasy 6964 0 +d 10de0203 NV20 [Quadro DCC] 0 +d 10de0250 NV25 [GeForce4 Ti4600] 0 +d 10de0251 NV25 [GeForce4 Ti4400] 0 +d 10de0253 NV25 [GeForce4 Ti4200] 0 +s 10de0253107d2896 WinFast A250 LE TD (Dual VGA/TV-out/DVI) 0 +s 10de0253147b8f09 Siluro (Dual VGA/TV-out/DVI) 0 +d 10de0258 Quadro4 900XGL 0 +d 10de0259 Quadro4 750XGL 0 +d 10de025b Quadro4 700XGL 0 v 10df Emulex Corporation 0 -d 10df10df Light Pulse Fibre Channel Adapter 0 d 10df1ae5 LP6000 Fibre Channel Host Adapter 0 +d 10dff085 LP850 Fibre Channel Adapter 0 +d 10dff095 LP952 Fibre Channel Adapter 0 +d 10dff098 LP982 Fibre Channel Adapter 0 d 10dff700 LP7000 Fibre Channel Host Adapter 0 +d 10dff800 LP8000 Fibre Channel Host Adapter 0 +d 10dff900 LP9000 Fibre Channel Host Adapter 0 +d 10dff980 LP9802 Fibre Channel Adapter 0 v 10e0 Integrated Micro Solutions Inc. 0 d 10e05026 IMS5026/27/28 0 d 10e05027 IMS5027 0 d 10e05028 IMS5028 0 d 10e08849 IMS8849 0 d 10e08853 IMS8853 0 -d 10e09128 IMS9129 [Twin turbo 128] 0 +d 10e09128 IMS9128 [Twin turbo 128] 0 v 10e1 Tekram Technology Co.,Ltd. 0 d 10e10391 TRM-S1040 0 s 10e1039110e10391 DC-315U SCSI-3 Host Adapter 0 @@ -2271,6 +2652,7 @@ v 10e2 Aptix Corporation 0 v 10e3 Tundra Semiconductor Corp. 0 d 10e30000 CA91C042 [Universe] 0 d 10e30860 CA91C860 [QSpan] 0 +d 10e30862 CA91C862A [QSpan-II] 1 updated PCI 2.2 version of the QSpan v 10e4 Tandem Computers 0 v 10e5 Micro Industries Corporation 0 v 10e6 Gainbery Computer Products Inc. 0 @@ -2290,6 +2672,7 @@ d 10e880d9 PCI-9118 0 d 10e880da PCI-9812 0 d 10e8811a PCI-IEEE1355-DS-DE Interface 0 d 10e88170 S5933 [Matchmaker] (Chipset Development Tool) 0 +d 10e882db AJA HDNTV HD SDI Framestore 0 v 10e9 Alps Electric Co., Ltd. 0 v 10ea Intergraphics Systems 0 d 10ea1680 IGA-1680 0 @@ -2303,12 +2686,9 @@ v 10eb Artists Graphics 0 d 10eb0101 3GA 0 d 10eb8111 Twist3 Frame Grabber 0 v 10ec Realtek Semiconductor Co., Ltd. 0 -v 10ec 1 -d 10ec1274 1 -d 10ec4724 1 d 10ec8029 RTL-8029(AS) 0 -s 10ec802910b82011 EZ-Card 0 -s 10ec802910ec8029 RT8029(AS) 0 +s 10ec802910b82011 EZ-Card (SMC1208) 0 +s 10ec802910ec8029 RTL-8029(AS) 0 s 10ec802911131208 EN1208 0 s 10ec802911860300 DE-528 0 s 10ec802912592400 AT-2400 0 @@ -2316,15 +2696,17 @@ d 10ec8129 RTL-8129 0 s 10ec812910ec8129 RT8129 Fast Ethernet Adapter 0 d 10ec8138 RT8139 (B/C) Cardbus Fast Ethernet Adapter 0 s 10ec813810ec8138 RT8139 (B/C) Fast Ethernet Adapter 0 -d 10ec8139 RTL-8139 0 -d 10ec8139 RTL-8139/8139C 1 +d 10ec8139 RTL-8139/8139C/8139C+ 0 s 10ec813910258920 ALN-325 0 s 10ec813910258921 ALN-325 0 s 10ec813910bd0320 EP-320X-R 0 s 10ec813910ec8139 RT8139 0 s 10ec813911861300 DFE-538TX 0 s 10ec813911861320 SN5200 0 +s 10ec813911868139 DRN-32TX 0 +s 10ec813911f68139 FN22-3(A) LinxPRO Ethernet Adapter 0 s 10ec813912592500 AT-2500TX 0 +s 10ec813912592503 AT-2500TX/ACPI 0 s 10ec81391429d010 ND010 0 s 10ec813914329130 EN-9130TX 0 s 10ec813914368139 RT8139 0 @@ -2337,13 +2719,17 @@ s 10ec813926460001 EtheRx 0 s 10ec81398e2e7000 KF-230TX 0 s 10ec81398e2e7100 KF-230TX/2 0 s 10ec8139a0a00007 ALN-325C 0 +d 10ec8169 RTL-8169 0 +d 10ec8197 SmartLAN56 56K Modem 0 v 10ed Ascii Corporation 0 d 10ed7310 V7310 0 -v 10ee Xilinx, Inc. 0 +v 10ee Xilinx Corporation 0 d 10ee3fc0 RME Digi96 0 d 10ee3fc1 RME Digi96/8 0 d 10ee3fc2 RME Digi96/8 Pro 0 d 10ee3fc3 RME Digi96/8 Pad 0 +d 10ee3fc4 RME Digi9652 (Hammerfall) 0 +d 10ee3fc5 RME Hammerfall DSP 0 v 10ef Racore Computer Products, Inc. 0 d 10ef8154 M815x Token Ring Adapter 0 v 10f0 Peritek Corporation 0 @@ -2360,8 +2746,10 @@ v 10f9 PC Direct 0 v 10fa Truevision 0 d 10fa000c TARGA 1000 0 v 10fb Thesys Gesellschaft für Mikroelektronik mbH 0 +d 10fb186f TH 6255 0 v 10fc I-O Data Device, Inc. 0 -d 10fc0003 Cardbus IDE Controller 1 What's in the cardbus end of a Sony ACR-A01 card, comes with newer Vaio CD-RW drives +d 10fc0003 Cardbus IDE Controller 0 What's in the cardbus end of a Sony ACR-A01 card, comes with newer Vaio CD-RW drives +d 10fc0005 Cardbus SCSI CBSC II 0 v 10fd Soyo Computer, Inc 0 v 10fe Fast Multimedia AG 0 v 10ff NCube 0 @@ -2384,34 +2772,53 @@ s 1102000211028024 CT4760 SBLive! 0 s 1102000211028025 SBLive! Mainboard Implementation 0 s 1102000211028026 CT4830 SBLive! Value 0 s 1102000211028027 CT4832 SBLive! Value 0 +s 1102000211028028 CT4760 SBLive! OEM version 0 s 1102000211028031 CT4831 SBLive! Value 0 s 1102000211028040 CT4760 SBLive! 0 s 1102000211028051 CT4850 SBLive! Value 0 +s 1102000211028061 SBLive! Player 5.1 0 d 11020004 SB Audigy 0 +s 1102000411020051 SB0090 Audigy Player 0 +s 1102000411020053 SB0090 Audigy Player/OEM 0 +d 11020006 [SB Live! Value] EMU10k1X 0 d 11024001 SB Audigy FireWire Port 0 -d 11027002 SB Live! 0 -d 11027002 SB Live! MIDI/Game Port 1 +s 1102400111020010 SB Audigy FireWire Port 0 +d 11027002 SB Live! MIDI/Game Port 0 s 1102700211020020 Gameport Joystick 0 d 11027003 SB Audigy MIDI/Game port 0 +s 1102700311020040 SB Audigy MIDI/Game Port 0 +d 11027004 [SB Live! Value] Input device controller 0 +d 11028064 SB0100 SBLive! 5.1 OEM 1 none d 11028938 ES1371 0 v 1103 Triones Technologies, Inc. 0 d 11030003 HPT343 0 -d 11030004 HPT366 / HPT370 0 +d 11030004 HPT366/368/370/370A/372 0 Revisions: 01=HPT366, 03=HPT370, 04=HPT370A, 05=HPT372 +s 1103000411030001 HPT370A 0 s 1103000411030005 HPT370 UDMA100 0 -d 11030005 HPT370 1 Not HPT370A, It's HPT370. I don't know what ID HPT370A has. +d 11030005 HPT372A 0 +d 11030006 HPT302 0 +d 11030007 HPT371 0 +d 11030008 HPT374 0 v 1104 RasterOps Corp. 0 v 1105 Sigma Designs, Inc. 0 +d 11051105 REALmagic Xcard MPEG 1/2/3/4 DVD Decoder 0 d 11058300 REALmagic Hollywood Plus DVD Decoder 0 d 11058400 EM840x REALmagic DVD/MPEG-2 Audio/Video Decoder 0 v 1106 VIA Technologies, Inc. 0 +d 11060102 Embedded VIA Ethernet Controller 0 +d 11060130 VT6305 1394.A Controller 0 d 11060305 VT8363/8365 [KT133/KM133] 0 -s 1106030510438042 ATV133/A7V133-C 1 -s 11060305147ba401 KT7/KT7-RAID/KT7A/KT7A-RAID 1 +s 1106030510438033 A7V Mainboard 0 +s 1106030510438042 A7V133/A7V133-C Mainboard 0 +s 11060305147ba401 KT7/KT7-RAID/KT7A/KT7A-RAID Mainboard 0 d 11060391 VT8371 [KX133] 0 d 11060501 VT8501 [Apollo MVP4] 0 d 11060505 VT82C505 0 d 11060561 VT82C561 0 -d 11060571 Bus Master IDE 0 +d 11060571 VT82C586/B/686A/B PIPC Bus Master IDE 0 +s 1106057110438052 VT8233A Bus Master ATA100/66/33 IDE 0 +s 1106057111060571 VT8235 Bus Master ATA133/100/66/33 IDE 0 +s 1106057114585002 GA-7VAX Mainboard 0 d 11060576 VT82C576 3V [Apollo Master] 0 d 11060585 VT82C585VP [Apollo VP1/VPX] 0 d 11060586 VT82C586/A/B PCI-to-ISA [Apollo VP] 0 @@ -2426,7 +2833,9 @@ d 11060601 VT8601 [Apollo ProMedia] 0 d 11060605 VT8605 [ProSavage PM133] 0 d 11060680 VT82C680 [Apollo P6] 0 d 11060686 VT82C686 [Apollo Super South] 0 -s 1106068610438042 ATV133/A7V133-C 1 +s 1106068610438033 A7V Mainboard 0 +s 1106068610438040 A7M266 Mainboard 0 +s 1106068610438042 A7V133/A7V133-C Mainboard 0 s 1106068611060000 VT82C686/A PCI to ISA Bridge 0 s 1106068611060686 VT82C686/A PCI to ISA Bridge 0 d 11060691 VT82C693A/694x [Apollo PRO133x] 0 @@ -2438,43 +2847,62 @@ d 11061000 VT82C570MV 0 d 11061106 VT82C570MV 0 d 11061571 VT82C416MV 0 d 11061595 VT82C595/97 [Apollo VP2/97] 0 -d 11063038 UHCI USB 0 -s 1106303809251234 MVP3 USB Controller 1 -s 1106303809251234 UHCI USB Controller 1 Not just MVP3, also found on via82c68a southbridge. (GigaByte board) -s 1106303812340925 MVP3 USB Controller 0 -s 1106303812340925 1 I don't think this ever existed. But I may be wrong. +d 11063038 USB 0 +s 1106303809251234 USB Controller 0 d 11063040 VT82C586B ACPI 0 -d 11063043 VT86C100A [Rhine 10/100] 0 -d 11063043 VT3043 [Rhine] 1 +d 11063043 VT86C100A [Rhine] 0 s 1106304310bd0000 VT86C100A Fast Ethernet Adapter 0 s 1106304311060100 VT86C100A Fast Ethernet Adapter 0 -s 1106304311861400 DFE-530TX 0 -s 1106304311861400 DFE-530TX rev A 1 -d 11063044 OHCI Compliant IEEE 1394 Host Controller 0 +s 1106304311861400 DFE-530TX rev A 0 +d 11063044 IEEE 1394 Host Controller 0 d 11063050 VT82C596 Power Management 0 d 11063051 VT82C596 Power Management 0 d 11063057 VT82C686 [Apollo Super ACPI] 0 -s 1106305710438042 ATV133/A7V133-C 1 -d 11063058 AC97 Audio Controller 0 -d 11063058 VT82C686 AC97 Audio Controller 1 To distinguish from other AC97 Audio Controllers -s 1106305814587600 Onboard Audio 1 Found on a GigaByte board. +s 1106305710438033 A7V Mainboard 0 +s 1106305710438040 A7M266 Mainboard 0 +s 1106305710438042 A7V133/A7V133-C Mainboard 0 +d 11063058 VT82C686 AC97 Audio Controller 0 +s 110630580e11b194 Soundmax integrated digital audio 0 +s 1106305811064511 Onboard Audio on EP7KXA 0 +s 1106305814587600 Onboard Audio 0 s 1106305814623091 MS-6309 Onboard Audio 0 -d 11063059 AC97 Audio Controller 0 -d 11063059 VT8233 AC97 Audio Controller 1 To distinguish from the 3058 entry for device that is incompatible, ALSA has separate driver specific to this chip -d 11063065 VT6102 [Rhine-II] 1 -d 11063065 Ethernet Controller 0 -s 1106306511861401 DFE-530TX rev B 1 -d 11063068 AC97 Modem Controller 0 +s 1106305815dd7609 Onboard Audio 0 +d 11063059 VT8233 AC97 Audio Controller 0 +s 110630591458a002 GA-7VAX Onboard Audio (Realtek ALC650) 0 +d 11063065 VT6102 [Rhine-II] 0 +s 1106306511060102 VT6102 [Rhine II] Embeded Ethernet Controller on VT8235 0 +s 1106306511861400 DFE-530TX rev A 0 +s 1106306511861401 DFE-530TX rev B 0 +d 11063068 Intel 537 [AC97 Modem] 0 d 11063074 VT8233 PCI to ISA Bridge 0 +s 1106307410438052 VT8233A 0 d 11063091 VT8633 [Apollo Pro266] 0 -d 11063099 VT8367 [KT266] 0 +d 11063099 VT8366/A/7 [Apollo KT266/A/333] 0 +s 1106309910438064 A7V266-E Mainboard 0 +s 110630991043807f A7V333 Mainboard 0 +d 11063101 VT8653 Host Bridge 0 +d 11063102 VT8662 Host Bridge 0 +d 11063103 VT8615 Host Bridge 0 +d 11063104 USB 2.0 0 +s 1106310414585004 GA-7VAX Mainboard 0 +d 11063106 VT6105 [Rhine-III] 0 d 11063109 VT8233C PCI to ISA Bridge 0 -d 11063128 VT8233 PCI to PCI Bridge 1 I have recently upgraded my machine to a new motherboard using a P4 chip and the Via 8133 chipset. All PCI resouces were identif +d 11063112 VT8361 [KLE133] Host Bridge 0 +d 11063116 VT8375 [KM266] Host Bridge 0 +d 11063128 VT8753 [P4X266 AGP] 0 +d 11063133 VT3133 Host Bridge 0 +d 11063147 VT8233A ISA Bridge 0 +d 11063148 P4M266 Host Bridge 0 +d 11063156 P/KN266 Host Bridge 0 +d 11063168 VT8374 P4X400 Host Controller/AGP Bridge 0 +d 11063177 VT8235 ISA Bridge 0 +s 1106317714585001 GA-7VAX Mainboard 0 +d 11063189 VT8377 [KT400 AGP] Host Bridge 0 +s 1106318914585000 GA-7VAX Mainboard 0 d 11065030 VT82C596 ACPI [Apollo PRO] 0 d 11066100 VT85C100A [Rhine II] 0 -d 11066100 VT86C100A [Rhine-II] 1 d 11068231 VT8231 [PCI-to-ISA Bridge] 0 -d 11068235 VT8235 Power Management 0 +d 11068235 VT8235 ACPI 0 d 11068305 VT8363/8365 [KT133/KM133 AGP] 0 d 11068391 VT8371 [KX133 AGP] 0 d 11068501 VT8501 [Apollo MVP4 AGP] 0 @@ -2482,11 +2910,16 @@ d 11068596 VT82C596 [Apollo PRO AGP] 0 d 11068597 VT82C597 [Apollo VP3 AGP] 0 d 11068598 VT82C598/694x [Apollo MVP3/Pro133x AGP] 0 d 11068601 VT8601 [Apollo ProMedia AGP] 0 -d 11068601 VIA 8601 Chipset 1 Need a video driver for Linux. d 11068605 VT8605 [PM133 AGP] 0 d 11068691 VT82C691 [Apollo Pro] 0 +d 11068693 VT82C693 [Apollo Pro Plus] PCI Bridge 0 d 1106b091 VT8633 [Apollo Pro266 AGP] 0 -d 1106b099 VT8367 [KT266 AGP] 0 +d 1106b099 VT8366/A/7 [Apollo KT266/A/333 AGP] 0 +d 1106b101 VT8653 AGP Bridge 0 +d 1106b102 VT8362 AGP Bridge 0 +d 1106b103 VT8615 AGP Bridge 0 +d 1106b112 VT8361 [KLE133] AGP Bridge 0 +d 1106b168 VT8235 PCI Bridge 0 v 1107 Stratus Computers 0 d 11070576 VIA VT82C570MV [Apollo] (Wrong vendor ID!) 0 v 1108 Proteon, Inc. 0 @@ -2505,7 +2938,6 @@ d 110a0002 Pirahna 2-port 0 d 110a0005 Tulip controller, power management, switch extender 0 d 110a2102 DSCC4 WAN adapter 0 d 110a4942 FPGA I-Bus Tracer for MBD 0 -d 110a6020 D1180 U2W-SCSI controller (SYM 53C895A chipset) 1 d 110a6120 SZB6120 0 v 110b Chromatic Research Inc. 0 d 110b0001 Mpact Media Processor 0 @@ -2518,7 +2950,7 @@ v 1110 Powerhouse Systems 0 d 11106037 Firepower Powerized SMP I/O ASIC 0 d 11106073 Firepower Powerized SMP I/O ASIC 0 v 1111 Santa Cruz Operation 0 -v 1112 RNS - Div. of Meret Communications Inc 0 DJ: Some people say that 0x1112 is Rockwell International +v 1112 Osicom Technologies Inc 0 Also claimed to be RNS or Rockwell International, current PCISIG records list Osicom d 11122200 FDDI Adapter 0 d 11122300 Fast Ethernet Adapter 0 d 11122340 4 Port Fast Ethernet Adapter 0 @@ -2528,10 +2960,12 @@ d 11131211 SMC2-1211TX 0 s 11131211103c1207 EN-1207D Fast Ethernet Adapter 0 s 1113121111131211 EN-1207D Fast Ethernet Adapter 0 d 11131216 EN-1216 Ethernet Adapter 0 +s 11131216111a1020 SpeedStream 1020 PCI 10/100 Ethernet Adaptor [EN-1207F-TX ?] 0 d 11131217 EN-1217 Ethernet Adapter 0 d 11135105 10Mbps Network card 0 d 11139211 EN-1207D Fast Ethernet Adapter 0 s 1113921111139211 EN-1207D Fast Ethernet Adapter 0 +d 11139511 Fast Ethernet Adapter 0 v 1114 Atmel Corporation 0 v 1115 3D Labs 0 v 1116 Data Translation 0 @@ -2652,9 +3086,10 @@ v 1127 FORE Systems Inc 0 d 11270200 ForeRunner PCA-200 ATM 0 d 11270210 PCA-200PC 0 d 11270250 ATM 0 -d 11270300 PCA-200E 0 +d 11270300 ForeRunner PCA-200EPC ATM 0 d 11270310 ATM 0 d 11270400 ForeRunnerHE ATM Adapter 0 +s 1127040011270400 ForeRunnerHE ATM 0 v 1129 Firmworks 0 v 112a Hermes Electronics Company, Ltd. 0 v 112b Linotype - Hell AG 0 @@ -2666,6 +3101,11 @@ d 112f0000 MVC IC-PCI 0 d 112f0001 MVC IM-PCI Video frame grabber/processor 0 v 1130 Computervision 0 v 1131 Philips Semiconductors 0 +d 11313400 SmartPCI56(UCB1500) 56K Modem 0 +d 11317130 SAA7130 Video Broadcast Decoder 0 +d 11317133 SAA7133 1 PCI audio and video broadcast decoder +d 11317134 SAA7134 0 PCI audio and video broadcast decoder (http://www.semiconductors.philips.com/pip/saa7134hl) +d 11317135 SAA7135 1 PCI audio and video broadcast decoder d 11317145 SAA7145 0 d 11317146 SAA7146 0 s 11317146114b2003 DVRaptor Video Edit/Capture Card 0 @@ -2694,12 +3134,14 @@ d 1133e004 DIVA 20_U 0 s 1133e0041133e004 DIVA 2.0 U 0 d 1133e005 DIVA LOW 0 s 1133e0051133e005 DIVA 2.01 S/T 0 +d 1133e00b DIVA 2.02 0 d 1133e010 DIVA Server BRI-2M 0 s 1133e0101133e010 DIVA Server BRI-2M 0 d 1133e012 DIVA Server BRI-8M 0 s 1133e0121133e012 DIVA Server BRI-8M 0 d 1133e014 DIVA Server PRI-30M 0 s 1133e0141133e014 DIVA Server PRI-30M 0 +d 1133e018 DIVA Server BRI-2M/-2F 0 v 1134 Mercury Computer Systems 0 d 11340001 Raceway Bridge 0 v 1135 Fuji Xerox Co Ltd 0 @@ -2741,6 +3183,12 @@ v 1143 NetPower, Inc 0 v 1144 Cincinnati Milacron 0 d 11440001 Noservo controller 0 v 1145 Workbit Corporation 0 +d 11458007 NinjaSCSI-32 Workbit 0 +d 1145f007 NinjaSCSI-32 KME 0 +d 1145f010 NinjaSCSI-32 Workbit 0 +d 1145f012 NinjaSCSI-32 Logitec 0 +d 1145f013 NinjaSCSI-32 Logitec 0 +d 1145f015 NinjaSCSI-32 Melco 0 v 1146 Force Computers 0 v 1147 Interface Corp 0 v 1148 Syskonnect (Schneider & Koch) 0 @@ -2770,9 +3218,20 @@ s 1148430011489843 SK-9843 (1000Base-SX single link) 0 s 1148430011489844 SK-9844 (1000Base-SX dual link) 0 s 1148430011489861 SK-9861 (1000Base-SX VF45 single link) 0 s 1148430011489862 SK-9862 (1000Base-SX VF45 dual link) 0 +d 11484320 SK-98xx Gigabit Ethernet Server Adapter 1 SK-98xx V2 Gigabit Ethernet Server Adapter +s 1148432011485021 SK-9821 V2.0 Gigabit Ethernet 10/100/1000Base-T Adapter 1 SK-9821 V2.0 Gigabit Ethernet 10/100/1000Base-T Adapter +s 1148432011485041 SK-9841 V2.0 Gigabit Ethernet 1000Base-LX Adapter 1 +s 1148432011485043 SK-9843 V2.0 Gigabit Ethernet 1000Base-SX Adapter 1 +s 1148432011485051 SK-9851 V2.0 Gigabit Ethernet 1000Base-SX Adapter 1 +s 1148432011485061 SK-9861 V2.0 Gigabit Ethernet 1000Base-SX Adapter 1 +s 1148432011485071 SK-9871 V2.0 Gigabit Ethernet 1000Base-ZX Adapter 1 +s 1148432011489521 SK-9521 10/100/1000Base-T Adapter 1 SK-9521 10/100/1000Base-T Adapter +d 11484400 Gigabit Ethernet 0 v 1149 Win System Corporation 0 v 114a VMIC 0 -d 114a5579 VMIPCI-5579 1 Reflective Memory Card +d 114a5579 VMIPCI-5579 (Reflective Memory Card) 0 +d 114a5587 VMIPCI-5587 (Reflective Memory Card) 0 +d 114a6504 VMIC PCI 7755 FPGA 0 d 114a7587 VMIVME-7587 0 v 114b Canopus Co., Ltd 0 v 114c Annabooks 0 @@ -2810,14 +3269,12 @@ d 114f0026 AccelePort 4r 920 0 d 114f0027 AccelePort Xr 920 0 d 114f0034 AccelePort 2r 920 0 d 114f0035 DataFire DSP T1/E1/PRI cPCI 0 -d 114f0040 AccelePort Xp 1 -d 114f0042 AccelePort 2p PCI 1 This (0042) is a subdevice of 0040, and is a 2 port model of the Xp family. -d 114f0070 Datafire Micro V IOM2 (Europe) 1 -d 114f0071 Datafire Micro V (Europe) 1 -d 114f0072 Datfire Micro V IOM2 (North America) 1 -d 114f0072 Datafire Micro V IOM2 (North America) 1 -d 114f0072 1 -d 114f0073 Datafire Micro V (North America) 1 +d 114f0040 AccelePort Xp 0 +d 114f0042 AccelePort 2p PCI 0 +d 114f0070 Datafire Micro V IOM2 (Europe) 0 +d 114f0071 Datafire Micro V (Europe) 0 +d 114f0072 Datafire Micro V IOM2 (North America) 0 +d 114f0073 Datafire Micro V (North America) 0 d 114f6001 Avanstar 0 v 1150 Thinking Machines Corp 0 v 1151 JAE Electronics Inc. 0 @@ -2840,13 +3297,11 @@ v 115d Xircom 0 d 115d0003 Cardbus Ethernet 10/100 0 s 115d000310140181 10/100 EtherJet Cardbus Adapter 0 s 115d000310141181 10/100 EtherJet Cardbus Adapter 0 -s 115d000310148181 10/100 EtherJet Cardbus Adapter 1 -s 115d000310149181 10/100 EtherJet Cardbus Adapter 1 +s 115d000310148181 10/100 EtherJet Cardbus Adapter 0 +s 115d000310149181 10/100 EtherJet Cardbus Adapter 0 s 115d0003115d0181 Cardbus Ethernet 10/100 0 -s 115d0003115d0181 Cardbus Ethernet II 10/100 1 s 115d0003115d1181 Cardbus Ethernet 10/100 0 -s 115d0003115d1181 Cardbus Ethernet 10/100 56k Modem 1 -s 115d000311790181 10 100 CardBus Ethernet 1 +s 115d000311790181 Cardbus Ethernet 10/100 0 s 115d000380868181 EtherExpress PRO/100 Mobile CardBus 32 Adapter 0 s 115d000380869181 EtherExpress PRO/100 Mobile CardBus 32 Adapter 0 d 115d0005 Cardbus Ethernet 10/100 0 @@ -2862,15 +3317,15 @@ s 115d0007115d1182 Cardbus Ethernet 10/100 0 d 115d000b Cardbus Ethernet 10/100 0 s 115d000b10140183 10/100 EtherJet Cardbus Adapter 0 s 115d000b115d0183 Cardbus Ethernet 10/100 0 -d 115d000c Mini-PCI V.90 56k Modem 1 Linmodem +d 115d000c Mini-PCI V.90 56k Modem 0 d 115d000f Cardbus Ethernet 10/100 0 s 115d000f10140183 10/100 EtherJet Cardbus Adapter 0 s 115d000f115d0183 Cardbus Ethernet 10/100 0 d 115d0101 Cardbus 56k modem 0 s 115d0101115d1081 Cardbus 56k Modem 0 d 115d0103 Cardbus Ethernet + 56k Modem 0 -s 115d010310149181 CardBus 56k Modem 1 -s 115d010311151181 Cardbus Ethernet 100 56k Modem 1 +s 115d010310149181 Cardbus 56k Modem 0 +s 115d010311151181 Cardbus Ethernet 100 + 56k Modem 0 s 115d0103115d1181 CBEM56G-100 Ethernet + 56k Modem 0 s 115d010380869181 PRO/100 LAN + Modem56 CardBus 0 v 115e Peer Protocols Inc 0 @@ -2886,16 +3341,28 @@ v 1164 Advanced Peripherals Technologies 0 v 1165 Imagraph Corporation 0 d 11650001 Motion TPEG Recorder/Player with audio 0 v 1166 ServerWorks 0 +d 11660005 CNB20-LE Host Bridge 0 d 11660007 CNB20-LE Host Bridge 0 d 11660008 CNB20HE Host Bridge 0 d 11660009 CNB20LE Host Bridge 0 d 11660010 CIOB30 0 d 11660011 CMIC-HE 0 +d 11660012 CMIC-LE 0 +d 11660013 CNB20-HE Host Bridge 0 +d 11660014 CNB20-HE Host Bridge 0 +d 11660015 CMIC-GC Host Bridge 0 +d 11660016 CMIC-GC Host Bridge 0 +d 11660017 GCNB-LE Host Bridge 0 d 11660200 OSB4 South Bridge 0 d 11660201 CSB5 South Bridge 0 +d 11660203 CSB6 South Bridge 0 d 11660211 OSB4 IDE Controller 0 d 11660212 CSB5 IDE Controller 0 +d 11660213 CSB6 RAID/IDE Controller 0 d 11660220 OSB4/CSB5 OHCI USB Controller 0 +d 11660221 CSB6 OHCI USB Controller 0 +d 11660225 GCLE Host Bridge 0 +d 11660227 GCLE-2 Host Bridge 0 v 1167 Mutoh Industries Inc 0 v 1168 Thine Electronics Inc 0 v 1169 Centre for Development of Advanced Computing 0 @@ -2920,6 +3387,7 @@ v 1177 Silicon Engineering 0 v 1178 Alfa, Inc. 0 d 1178afa1 Fast Ethernet Adapter 0 v 1179 Toshiba America Info Systems 0 +d 11790103 EX-IDE Type-B 0 d 11790404 DVD Decoder card 0 d 11790406 Tecra Video Capture device 0 d 11790407 DVD Decoder card (Version 2) 0 @@ -2930,6 +3398,8 @@ d 1179060f ToPIC97 0 d 11790617 ToPIC95 PCI to Cardbus Bridge with ZV Support 0 d 11790618 CPU to PCI and PCI to ISA bridge 0 d 11790701 FIR Port 0 Claimed to be Lucent DSP1645 [Mars], but that's apparently incorrect. Does anyone know the correct ID? +d 11790804 TC6371AF SmartMedia Controller 0 +d 11790805 SD TypA Controller 0 d 11790d01 FIR Port Type-DO 0 s 11790d0111790001 FIR Port Type-DO 0 v 117a A-Trend Technology 0 @@ -2942,18 +3412,34 @@ v 1180 Ricoh Co Ltd 0 d 11800465 RL5c465 0 d 11800466 RL5c466 0 d 11800475 RL5c475 0 +s 11800475144dc006 vpr Matrix 170B4 CardBus bridge 0 d 11800476 RL5c476 II 0 +s 1180047610140185 ThinkPad A/T/X Series 0 +s 11800476104d80df Vaio PCG-FX403 0 +s 11800476104d80e7 VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP 0 d 11800477 RL5c477 0 d 11800478 RL5c478 0 +s 1180047810140184 ThinkPad A30p (2653-64G) 0 +d 11800522 R5C522 IEEE 1394 Controller 0 +s 11800522101401cf ThinkPad A30p (2653-64G) 0 +d 11800551 R5C551 IEEE 1394 Controller 0 +s 11800551144dc006 vpr Matrix 170B4 0 +d 11800552 R5C552 IEEE 1394 Controller 0 +s 1180055210140511 ThinkPad A/T/X Series 0 v 1181 Telmatics International 0 v 1183 Fujikura Ltd 0 v 1184 Forks Inc 0 v 1185 Dataworld International Ltd 0 v 1186 D-Link System Inc 0 d 11860100 DC21041 0 -d 11861002 Sundance Ethernet 0 +d 11861002 DL10050 Sundance Ethernet 0 +s 1186100211861002 DFE-550TX 0 +s 1186100211861012 DFE-580TX 0 d 11861300 RTL8139 Ethernet 0 +s 1186130011861300 DFE-538TX 10/100 Ethernet Adapter 0 +s 1186130011861301 DFE-530TX+ 10/100 Ethernet Adapter 0 d 11861340 DFE-690TXD CardBus PC Card 0 +d 11861561 DRP-32TXD Cardbus PC Card 0 d 11864000 DL2K Ethernet 0 v 1187 Advanced Technology Laboratories, Inc. 0 v 1188 Shima Seiki Manufacturing Ltd. 0 @@ -3031,7 +3517,9 @@ v 11a9 InnoSys Inc. 0 d 11a94240 AMCC S933Q Intelligent Serial Card 0 v 11aa Actel 0 v 11ab Galileo Technology Ltd. 0 -d 11ab0146 GT-64010 0 +d 11ab0146 GT-64010/64010A System Controller 0 +d 11ab4611 GT-64115 System Controller 0 +d 11ab4620 GT-64120/64120A/64121A System Controller 0 d 11ab4801 GT-48001 0 d 11abf003 GT-64010 Primary Image Piranha Image Generator 0 v 11ac Canon Information Systems Research Aust. 0 @@ -3043,6 +3531,7 @@ s 11ad000211adf003 LNE100TX 0 s 11ad000211adffff LNE100TX 0 s 11ad00021385f004 FA310TX 0 d 11adc115 LNE100TX [Linksys EtherFast 10/100] 0 +s 11adc11511adc001 LNE100TX [ver 2.0] 0 v 11ae Aztech System Ltd 0 v 11af Avid Technology Inc. 0 v 11b0 V3 Semiconductor Inc. 0 @@ -3071,9 +3560,8 @@ v 11bf Astrodesign, Inc. 0 v 11c0 Hewlett Packard 0 v 11c1 Lucent Microelectronics 0 d 11c10440 56k WinModem 0 -s 11c1044000010440 LT WinModem 56k Data+Fax+Voice+Dsvd 0 s 11c1044010338015 LT WinModem 56k Data+Fax+Voice+Dsvd 0 -s 11c1044010338047 LT WinModem 56k Data Fax Voice Dsvd 0 +s 11c1044010338047 LT WinModem 56k Data+Fax+Voice+Dsvd 0 s 11c104401033804f LT WinModem 56k Data+Fax+Voice+Dsvd 0 s 11c1044010cf102c LB LT Modem V.90 56k 0 s 11c1044010cf104a BIBLO LT Modem 56k 0 @@ -3085,14 +3573,14 @@ s 11c10440122d4102 MDP7800SP-U Modem 0 s 11c1044013e00040 LT WinModem 56k Data+Fax+Voice+Dsvd 0 s 11c1044013e00440 LT WinModem 56k Data+Fax+Voice+Dsvd 0 s 11c1044013e00441 LT WinModem 56k Data+Fax+Voice+Dsvd 0 -s 11c1044013e00450 56k Voice Modem 0 +s 11c1044013e00450 LT WinModem 56k Data+Fax+Voice+Dsvd 0 s 11c1044013e0f100 LT WinModem 56k Data+Fax+Voice+Dsvd 0 s 11c1044013e0f101 LT WinModem 56k Data+Fax+Voice+Dsvd 0 s 11c10440144d2101 LT56PV Modem 0 s 11c10440149f0440 LT WinModem 56k Data+Fax+Voice+Dsvd 0 d 11c10441 56k WinModem 0 s 11c104411033804d LT WinModem 56k Data+Fax 0 -s 11c1044110338065 LT WinModem 56k Data Fax 0 +s 11c1044110338065 LT WinModem 56k Data+Fax 0 s 11c1044110920440 Supra 56i 0 s 11c1044111790001 Internal V.90 Modem 0 s 11c1044111c10440 LT WinModem 56k Data+Fax 0 @@ -3102,9 +3590,9 @@ s 11c1044113e00040 LT WinModem 56k Data+Fax 0 s 11c1044113e00100 LT WinModem 56k Data+Fax 0 s 11c1044113e00410 LT WinModem 56k Data+Fax 0 s 11c1044113e00420 TelePath Internet 56k WinModem 0 -s 11c1044113e00440 LT WinModem 56k Data Fax 0 +s 11c1044113e00440 LT WinModem 56k Data+Fax 0 s 11c1044113e00443 LT WinModem 56k Data+Fax 0 -s 11c1044113e0f102 LT WinModem 56k Data Fax 0 +s 11c1044113e0f102 LT WinModem 56k Data+Fax 0 s 11c1044114169804 CommWave 56k Modem 0 s 11c10441141d0440 LT WinModem 56k Data+Fax 0 s 11c10441144f0441 Lucent 56k V.90 DF Modem 0 @@ -3113,32 +3601,34 @@ s 11c10441144f110d Lucent Win Modem 0 s 11c1044114680441 Presario 56k V.90 DF Modem 0 s 11c1044116680440 Lucent Win Modem 0 d 11c10442 56k WinModem 0 -s 11c1044200010440 LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd 0 s 11c1044211c10440 LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd 0 s 11c1044211c10442 LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd 0 s 11c1044213e00412 LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd 0 s 11c1044213e00442 LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd 0 s 11c1044213fc2471 LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd 0 s 11c10442144d2104 LT56PT Modem 0 -s 11c10442144f1104 LT WinModem 56k Data Fax Voice VoiceView Dsvd 0 +s 11c10442144f1104 LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd 0 s 11c10442149f0440 LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd 0 s 11c1044216680440 LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd 0 d 11c10443 LT WinModem 0 d 11c10444 LT WinModem 0 d 11c10445 LT WinModem 0 +s 11c1044580862203 Intel PRO/100+ MiniPCI (Ambit U98.003.C.00 combo ?) 1 d 11c10446 LT WinModem 0 d 11c10447 LT WinModem 0 d 11c10448 WinModem 56k 0 s 11c1044810140131 Lucent Win Modem 0 -s 11c1044810338066 LT WinModem 56k Data Fax Voice Dsvd 0 +s 11c1044810338066 LT WinModem 56k Data+Fax+Voice+Dsvd 0 s 11c1044813e00030 56k Voice Modem 0 s 11c1044813e00040 LT WinModem 56k Data+Fax+Voice+Dsvd 0 +s 11c1044816682400 LT WinModem 56k (MiniPCI Ethernet+Modem) 0 Actiontech eth+modem card as used by Dell &c. d 11c10449 WinModem 56k 0 s 11c104490e11b14d 56k V.90 Modem 0 s 11c1044913e00020 LT WinModem 56k Data+Fax 0 s 11c1044913e00041 TelePath Internet 56k WinModem 0 s 11c1044914360440 Lucent Win Modem 0 s 11c10449144f0449 Lucent 56k V.90 DFi Modem 0 +s 11c1044914680410 IBM ThinkPad T23 (2647-4MG) 0 s 11c1044914680440 Lucent Win Modem 0 s 11c1044914680449 Presario 56k V.90 DFi Modem 0 d 11c1044a F-1156IV WinModem (V90, 56KFlex) 0 @@ -3152,6 +3642,7 @@ d 11c1044d LT WinModem 0 d 11c1044e LT WinModem 0 d 11c1044f V90 WildWire Modem 0 d 11c10450 LT WinModem 0 +s 11c10450144f4005 Magnia SG20 0 d 11c10451 LT WinModem 0 d 11c10452 LT WinModem 0 d 11c10453 LT WinModem 0 @@ -3162,13 +3653,16 @@ d 11c10457 LT WinModem 0 d 11c10458 LT WinModem 0 d 11c10459 LT WinModem 0 d 11c1045a LT WinModem 0 +d 11c1045c LT WinModem 0 d 11c10461 V90 WildWire Modem 0 d 11c10462 V90 WildWire Modem 0 d 11c10480 Venus Modem (V90, 56KFlex) 0 +d 11c15801 USB 0 +d 11c15802 USS-312 USB Controller 0 d 11c15811 FW323 0 s 11c15811dead0800 FireWire Host Bus Adapter 0 v 11c2 Sand Microelectronics 0 -v 11c3 NEC Corp 0 +v 11c3 NEC Corporation 0 v 11c4 Document Technologies, Inc 0 v 11c5 Shiva Corporation 0 v 11c6 Dainippon Screen Mfg. Co. Ltd 0 @@ -3197,6 +3691,7 @@ d 11d101f7 VxP524 0 v 11d2 Intercom Inc. 0 v 11d3 Trancell Systems Inc 0 v 11d4 Analog Devices 0 +d 11d41805 SM56 PCI modem 0 d 11d41889 AD1889 sound chip 0 v 11d5 Ikon Corporation 0 d 11d50115 10115 0 @@ -3221,6 +3716,7 @@ v 11e0 Cray Communications A/S 0 v 11e1 GEC Plessey Semi Inc. 0 v 11e2 Samsung Information Systems America 0 v 11e3 Quicklogic Corporation 0 +d 11e35030 PC Watchdog 0 v 11e4 Second Wave Inc 0 v 11e5 IIX Consulting 0 v 11e6 Mitsui-Zosen System Research 0 @@ -3252,6 +3748,7 @@ d 11f60112 ENet100VG4 0 d 11f60113 FreedomLine 100 0 d 11f61401 ReadyLink 2000 0 d 11f62011 RL100-ATX 10/100 0 +s 11f6201111f62011 RL100-ATX 0 d 11f62201 ReadyLink 100TX (Winbond W89C840) 0 s 11f6220111f62011 ReadyLink 100TX 0 d 11f69881 RL100TX 0 @@ -3270,11 +3767,13 @@ d 11fe0003 RocketPort 16 Intf 0 d 11fe0004 RocketPort 32 Intf 0 d 11fe0005 RocketPort Octacable 0 d 11fe0006 RocketPort 8J 0 +d 11fe0007 RocketPort 4-port 0 d 11fe0008 RocketPort 8-port 0 d 11fe0009 RocketPort 16-port 0 d 11fe000a RocketPort Plus Quadcable 0 d 11fe000b RocketPort Plus Octacable 0 d 11fe000c RocketPort 8-port Modem 0 +d 11fe8015 RocketPort 4-port UART 16954 0 v 11ff Scion Corporation 0 v 1200 CSS Corporation 0 v 1201 Vista Controls Corp 0 @@ -3291,18 +3790,21 @@ v 120b Adaptive Solutions 0 v 120c Technical Corp. 0 v 120d Compression Labs, Inc. 0 v 120e Cyclades Corporation 0 -d 120e0100 Cyclom_Y below first megabyte 0 -d 120e0101 Cyclom_Y above first megabyte 0 -d 120e0102 Cyclom_4Y below first megabyte 0 -d 120e0103 Cyclom_4Y above first megabyte 0 -d 120e0104 Cyclom_8Y below first megabyte 0 -d 120e0105 Cyclom_8Y above first megabyte 0 -d 120e0200 Cyclom_Z below first megabyte 0 -d 120e0201 Cyclom_Z above first megabyte 0 -d 120e0300 PC300 RX 2 0 -d 120e0301 PC300 RX 1 0 -d 120e0310 PC300 TE 2 0 -d 120e0311 PC300 TE 1 0 +d 120e0100 Cyclom-Y below first megabyte 0 +d 120e0101 Cyclom-Y above first megabyte 0 +d 120e0102 Cyclom-4Y below first megabyte 0 +d 120e0103 Cyclom-4Y above first megabyte 0 +d 120e0104 Cyclom-8Y below first megabyte 0 +d 120e0105 Cyclom-8Y above first megabyte 0 +d 120e0200 Cyclades-Z below first megabyte 0 +d 120e0201 Cyclades-Z above first megabyte 0 +d 120e0300 PC300/RSV or /X21 (2 ports) 0 +d 120e0301 PC300/RSV or /X21 (1 port) 0 +d 120e0310 PC300/TE (2 ports) 0 +d 120e0311 PC300/TE (1 port) 0 +d 120e0320 PC300/TE-M (2 ports) 0 +d 120e0321 PC300/TE-M (1 port) 0 +d 120e0400 PC400 0 v 120f Essential Communications 0 d 120f0001 Roadrunner serial HIPPI 0 v 1210 Hyperparallel Technologies 0 @@ -3313,12 +3815,15 @@ v 1214 Performance Technologies, Inc. 0 v 1215 Interware Co., Ltd 0 v 1216 Purup Prepress A/S 0 v 1217 O2 Micro, Inc. 0 -d 12176729 6729 0 -d 1217673a 6730 0 -d 12176832 6832 0 -d 12176836 6836 0 +d 12176729 OZ6729 0 +d 1217673a OZ6730 0 +d 12176832 OZ6832/6833 Cardbus Controller 0 +d 12176836 OZ6836/6860 Cardbus Controller 0 d 12176872 OZ6812 Cardbus Controller 0 +d 12176925 OZ6922 Cardbus Controller 0 d 12176933 OZ6933 Cardbus Controller 0 +s 1217693310251016 Travelmate 612 TX 0 +d 12176972 OZ6912 Cardbus Controller 0 v 1218 Hybricon Corp. 0 v 1219 First Virtual Corporation 0 v 121a 3Dfx Interactive, Inc. 0 @@ -3340,7 +3845,6 @@ s 121a0003121a0004 Voodoo Banshee 0 s 121a0003139c0016 Raven 0 s 121a0003139c0017 Raven 0 s 121a000314af0002 Maxi Gamer Phoenix 0 -s 121a000330303030 Skywell Magic TwinPower 0 d 121a0004 Voodoo Banshee [Velocity 100] 0 d 121a0005 Voodoo 3 0 s 121a0005121a0004 Voodoo3 AGP 0 @@ -3363,6 +3867,7 @@ s 121a0005121a0061 Voodoo3 3500 TV (PAL) 0 s 121a0005121a0062 Voodoo3 3500 TV (SECAM) 0 d 121a0009 Voodoo 4 / Voodoo 5 0 s 121a0009121a0009 Voodoo5 AGP 5500/6000 0 +d 121a0057 Voodoo 3/3000 [Avenger] 0 v 121b Advanced Telecommunications Modules 0 v 121c Nippon Texaco., Ltd 0 v 121d Lippert Automationstechnik GmbH 0 @@ -3430,7 +3935,10 @@ s 123f888810020002 Cinemaster C 3.0 DVD Decoder 0 s 123f888813280001 Cinemaster C 3.0 DVD Decoder 0 v 1240 Marathon Technologies Corp. 0 v 1241 DSC Communications 0 -v 1242 Jaycor Networks, Inc. 0 +v 1242 JNI Corporation 0 Formerly Jaycor Networks, Inc. +d 12421560 JNIC-1560 PCI-X Fibre Channel Controller 0 +s 1242156012426562 FCX2-6562 Dual Channel PCI-X Fibre Channel Adapter 0 +s 124215601242656a FCX-6562 PCI-X Fibre Channel Adapter 0 d 12424643 FCI-1063 Fibre Channel Adapter 0 v 1243 Delphax 0 v 1244 AVM Audiovisuelles MKTG & Computer System GmbH 0 @@ -3448,9 +3956,8 @@ v 1248 Central Data Corporation 0 v 1249 Samsung Electronics Co., Ltd. 0 v 124a AEG Electrocom GmbH 0 v 124b SBS/Greenspring Modular I/O 0 -d 124b0040 cPCI-200 Four Slot IndustryPack Carrier 1 The chip is PCI9080, but the vendor and device ID is by the card http://www.powerbridge.de/download/data/cpci/cpci-io/CPCI-200A_ -d 124b0040 cPCI-200 four IndustryPack carrier 1 -s 124b0040124b9080 PCI9080 Bridge 1 http://www1.plxtech.com/TEMP/34826/9080db-106.pdf +d 124b0040 PCI-40A or cPCI-200 Quad IndustryPack carrier 0 +s 124b0040124b9080 PCI9080 Bridge 0 v 124c Solitron Technologies, Inc. 0 v 124d Stallion Technologies, Inc. 0 d 124d0000 EasyConnection 8/32 0 @@ -3480,9 +3987,9 @@ v 1259 Allied Telesyn International 0 d 12592560 AT-2560 Fast Ethernet Adapter (i82557B) 0 v 125a ABB Power Systems 0 v 125b Asix Electronics Corporation 0 -d 125b125b 1 d 125b1400 ALFA GFC2204 0 v 125c Aurora Technologies, Inc. 0 +d 125c0640 Aries 16000P 0 v 125d ESS Technology 0 d 125d0000 ES336H Fax Modem (Early Model) 0 d 125d1948 Solo? 0 @@ -3492,8 +3999,8 @@ s 125d196810338051 ES1968 Maestro-2 Audiodrive 0 d 125d1969 ES1969 Solo-1 Audiodrive 0 s 125d196910140166 ES1969 SOLO-1 AudioDrive on IBM Aptiva Mainboard 0 s 125d1969125d8888 Solo-1 Audio Adapter 0 -s 125d1969525fc888 ES1969 SOLO-1 AudioDrive (+ES1938) 0 d 125d1978 ES1978 Maestro 2E 0 +s 125d19780e11b112 Armada M700 1 s 125d19781033803c ES1978 Maestro-2E Audiodrive 0 s 125d197810338058 ES1978 Maestro-2E Audiodrive 0 s 125d197810924000 Monster Sound MX400 0 @@ -3504,7 +4011,10 @@ s 125d1988125d1988 ESS Allegro-1 Audiodrive 0 d 125d1989 ESS Modem 0 s 125d1989125d1989 ESS Modem 0 d 125d1998 ES1983S Maestro-3i PCI Audio Accelerator 0 +s 125d1998102800e6 ES1983S Maestro-3i (Dell Inspiron 8100) 0 d 125d1999 ES1983S Maestro-3i PCI Modem Accelerator 0 +d 125d199a ES1983S Maestro-3i PCI Audio Accelerator 0 +d 125d199b ES1983S Maestro-3i PCI Modem Accelerator 0 d 125d2808 ES336H Fax Modem (Later Model) 0 d 125d2838 ES2838/2839 SuperLink Modem 0 d 125d2898 ES2898 Modem 0 @@ -3520,6 +4030,11 @@ s 125d289814fe0429 ES56-PI Data Fax Modem 0 v 125e Specialvideo Engineering SRL 0 v 125f Concurrent Technologies, Inc. 0 v 1260 Harris Semiconductor 0 +d 12603873 Prism 2.5 Wavelan chipset 0 +s 1260387311863501 DWL-520 Wireless PCI Adapter 0 +s 1260387316680414 HWP01170-01 802.11b PCI Wireless Adapter 0 +s 1260387317373874 WMP11 Wireless 802.11b PCI Adapter 0 +s 1260387380862513 Wireless 802.11b MiniPCI Adapter 0 d 12608130 HMP8130 NTSC/PAL Video Decoder 0 d 12608131 HMP8131 NTSC/PAL Video Decoder 0 v 1261 Matsushita-Kotobuki Electronics Industries, Ltd. 0 @@ -3556,6 +4071,7 @@ v 1273 Hughes Network Systems 0 d 12730002 DirecPC 0 v 1274 Ensoniq 0 d 12741371 ES1371 [AudioPCI-97] 0 +s 127413710e110024 AudioPCI on Motherboard Compaq Deskpro 0 s 127413710e11b1a7 ES1371, ES1373 AudioPCI 0 s 12741371103380ac ES1371, ES1373 AudioPCI 0 s 1274137110421854 Tazer 0 @@ -3609,10 +4125,9 @@ s 1274137180865352 ES1371, ES1373 AudioPCI On Motherboard SunRiver 0 s 1274137180865643 ES1371, ES1373 AudioPCI On Motherboard Vancouver 0 s 1274137180865753 ES1371, ES1373 AudioPCI On Motherboard WS440BX 0 d 12745000 ES1370 [AudioPCI] 0 -s 1274500049424c4c Creative Sound Blaster AudioPCI128 0 d 12745880 5880 AudioPCI 0 s 1274588012742000 Creative Sound Blaster AudioPCI128 0 -s 1274588012742003 Creative SoundBlaster AudioPCI 128 1 +s 1274588012742003 Creative SoundBlaster AudioPCI 128 0 s 1274588012745880 Creative Sound Blaster AudioPCI128 0 s 127458801458a000 5880 AudioPCI On Motherboard 6OXET 0 s 1274588014626880 5880 AudioPCI On Motherboard MS-6188 1.00 0 @@ -3632,69 +4147,70 @@ d 12790397 BIOS scratchpad 0 v 127a Rockwell International 0 d 127a1002 HCF 56k Data/Fax Modem 0 s 127a10021092094c SupraExpress 56i PRO [Diamond SUP2380] 0 -s 127a1002122d4002 HPG / MDP3858-U # Aztech 0 -s 127a1002122d4005 MDP3858-E # Aztech 0 -s 127a1002122d4007 MDP3858-A/-NZ # Aztech 0 -s 127a1002122d4012 MDP3858-SA # Aztech 0 -s 127a1002122d4017 MDP3858-W # Aztech 0 -s 127a1002122d4018 MDP3858-W # Aztech 0 +s 127a1002122d4002 HPG / MDP3858-U 0 +s 127a1002122d4005 MDP3858-E 0 +s 127a1002122d4007 MDP3858-A/-NZ 0 +s 127a1002122d4012 MDP3858-SA 0 +s 127a1002122d4017 MDP3858-W 0 +s 127a1002122d4018 MDP3858-W 0 +s 127a1002127a1002 Rockwell 56K D/F HCF Modem 0 d 127a1003 HCF 56k Data/Fax Modem 0 -s 127a10030e11b0bc 229-DF Zephyr # Compaq 0 -s 127a10030e11b114 229-DF Cheetah # Compaq 0 -s 127a10031033802b 229-DF # NEC 0 -s 127a100313df1003 PCI56RX Modem # E-Tech Inc 0 -s 127a100313e00117 IBM # GVC 0 -s 127a100313e00147 IBM # GVC F-1156IV /R3 Spain V.90 Modem 0 -s 127a100313e00197 IBM # GVC 0 -s 127a100313e001c7 IBM # GVC F-1156IV /R3 WW V.90 Modem 0 -s 127a100313e001f7 IBM # GVC 0 -s 127a100314361003 IBM # CIS 0 -s 127a100314361103 IBM # CIS 5614PM3G V.90 Modem 0 +s 127a10030e11b0bc 229-DF Zephyr 0 +s 127a10030e11b114 229-DF Cheetah 0 +s 127a10031033802b 229-DF 0 +s 127a100313df1003 PCI56RX Modem 0 +s 127a100313e00117 IBM 0 +s 127a100313e00147 IBM F-1156IV+/R3 Spain V.90 Modem 0 +s 127a100313e00197 IBM 0 +s 127a100313e001c7 IBM F-1156IV+/R3 WW V.90 Modem 0 +s 127a100313e001f7 IBM 0 +s 127a100314361003 IBM 0 +s 127a100314361103 IBM 5614PM3G V.90 Modem 0 s 127a100314361602 Compaq 229-DF Ducati 0 d 127a1004 HCF 56k Data/Fax/Voice Modem 0 s 127a100410481500 MicroLink 56k Modem 0 s 127a100410cf1059 Fujitsu 229-DFRT 0 d 127a1005 HCF 56k Data/Fax/Voice/Spkp (w/Handset) Modem 0 -s 127a100510338029 229-DFSV # NEC 0 -s 127a100510338054 Modem # NEC 0 +s 127a100510338029 229-DFSV 0 +s 127a100510338054 Modem 0 s 127a100510cf103c Fujitsu 0 s 127a100510cf1055 Fujitsu 229-DFSV 0 s 127a100510cf1056 Fujitsu 229-DFSV 0 -s 127a1005122d4003 MDP3858SP-U # Aztech 0 -s 127a1005122d4006 Packard Bell MDP3858V-E # Aztech 0 -s 127a1005122d4008 MDP3858SP-A/SP-NZ # Aztech 0 -s 127a1005122d4009 MDP3858SP-E # Aztech 0 -s 127a1005122d4010 MDP3858V-U # Aztech 0 -s 127a1005122d4011 MDP3858SP-SA # Aztech 0 -s 127a1005122d4013 MDP3858V-A/V-NZ # Aztech 0 -s 127a1005122d4015 MDP3858SP-W # Aztech 0 -s 127a1005122d4016 MDP3858V-W # Aztech 0 -s 127a1005122d4019 MDP3858V-SA # Aztech 0 -s 127a100513df1005 PCI56RVP Modem # E-Tech Inc 0 -s 127a100513e00187 IBM # GVC 0 -s 127a100513e001a7 IBM # GVC 0 -s 127a100513e001b7 IBM # GVC DF-1156IV /R3 Spain V.90 Modem 0 -s 127a100513e001d7 IBM # GVC DF-1156IV /R3 WW V.90 Modem 0 -s 127a100514361005 IBM # CIS 0 -s 127a100514361105 IBM # CIS 0 -s 127a100514371105 IBM # CIS 5614PS3G V.90 Modem 0 +s 127a1005122d4003 MDP3858SP-U 0 +s 127a1005122d4006 Packard Bell MDP3858V-E 0 +s 127a1005122d4008 MDP3858SP-A/SP-NZ 0 +s 127a1005122d4009 MDP3858SP-E 0 +s 127a1005122d4010 MDP3858V-U 0 +s 127a1005122d4011 MDP3858SP-SA 0 +s 127a1005122d4013 MDP3858V-A/V-NZ 0 +s 127a1005122d4015 MDP3858SP-W 0 +s 127a1005122d4016 MDP3858V-W 0 +s 127a1005122d4019 MDP3858V-SA 0 +s 127a100513df1005 PCI56RVP Modem 0 +s 127a100513e00187 IBM 0 +s 127a100513e001a7 IBM 0 +s 127a100513e001b7 IBM DF-1156IV+/R3 Spain V.90 Modem 0 +s 127a100513e001d7 IBM DF-1156IV+/R3 WW V.90 Modem 0 +s 127a100514361005 IBM 0 +s 127a100514361105 IBM 0 +s 127a100514371105 IBM 5614PS3G V.90 Modem 0 d 127a1022 HCF 56k Modem 0 s 127a102214361303 M3-5614PM3G V.90 Modem 0 d 127a1023 HCF 56k Data/Fax Modem 0 -s 127a1023122d4020 Packard Bell MDP3858-WE # Aztech 0 -s 127a1023122d4023 MDP3858-UE # Aztech 0 -s 127a102313e00247 IBM # GVC F-1156IV /R6 Spain V.90 Modem 0 -s 127a102313e00297 IBM # GVC 0 -s 127a102313e002c7 IBM # GVC F-1156IV /R6 WW V.90 Modem 0 -s 127a102314361203 IBM # CIS 0 -s 127a102314361303 IBM # CIS 0 +s 127a1023122d4020 Packard Bell MDP3858-WE 0 +s 127a1023122d4023 MDP3858-UE 0 +s 127a102313e00247 IBM F-1156IV+/R6 Spain V.90 Modem 0 +s 127a102313e00297 IBM 0 +s 127a102313e002c7 IBM F-1156IV+/R6 WW V.90 Modem 0 +s 127a102314361203 IBM 0 +s 127a102314361303 IBM 0 d 127a1024 HCF 56k Data/Fax/Voice Modem 0 d 127a1025 HCF 56k Data/Fax/Voice/Spkp (w/Handset) Modem 0 s 127a102510cf106a Fujitsu 235-DFSV 0 -s 127a1025122d4021 Packard Bell MDP3858V-WE # Aztech 0 -s 127a1025122d4022 MDP3858SP-WE # Aztech 0 -s 127a1025122d4024 MDP3858V-UE # Aztech 0 -s 127a1025122d4025 MDP3858SP-UE # Aztech 0 +s 127a1025122d4021 Packard Bell MDP3858V-WE 0 +s 127a1025122d4022 MDP3858SP-WE 0 +s 127a1025122d4024 MDP3858V-UE 0 +s 127a1025122d4025 MDP3858SP-UE 0 d 127a1026 HCF 56k PCI Speakerphone Modem 0 d 127a1032 HCF 56k Modem 0 d 127a1033 HCF 56k Modem 0 @@ -3703,31 +4219,30 @@ d 127a1035 HCF 56k PCI Speakerphone Modem 0 d 127a1036 HCF 56k Modem 0 d 127a1085 HCF 56k Volcano PCI Modem 0 d 127a2005 HCF 56k Data/Fax Modem 0 -d 127a2005 HSF Data/Fax/Voice/Speakerphone 1 The name you list is incorrect, I'm the author of the Conexant/Rockwell modem HOWTO and I've verified from several sources that -s 127a2005104d8044 229-DFSV # Sony 0 -s 127a2005104d8045 229-DFSV # Sony 0 -s 127a2005104d8055 PBE/Aztech 235W-DFSV # Sony 0 -s 127a2005104d8056 235-DFSV # Sony 0 -s 127a2005104d805a Modem # Sony 0 -s 127a2005104d805f Modem # Sony 0 -s 127a2005104d8074 Modem # Sony 0 +s 127a2005104d8044 229-DFSV 0 +s 127a2005104d8045 229-DFSV 0 +s 127a2005104d8055 PBE/Aztech 235W-DFSV 0 +s 127a2005104d8056 235-DFSV 0 +s 127a2005104d805a Modem 0 +s 127a2005104d805f Modem 0 +s 127a2005104d8074 Modem 0 d 127a2013 HSF 56k Data/Fax Modem 0 -s 127a201311790001 Modem # Toshiba 0 -s 127a20131179ff00 Modem # Toshiba 0 +s 127a201311790001 Modem 0 +s 127a20131179ff00 Modem 0 d 127a2014 HSF 56k Data/Fax/Voice Modem 0 s 127a201410cf1057 Fujitsu Citicorp III 0 -s 127a2014122d4050 MSP3880-U # Aztech 0 -s 127a2014122d4055 MSP3880-W # Aztech 0 +s 127a2014122d4050 MSP3880-U 0 +s 127a2014122d4055 MSP3880-W 0 d 127a2015 HSF 56k Data/Fax/Voice/Spkp (w/Handset) Modem 0 s 127a201510cf1063 Fujitsu 0 s 127a201510cf1064 Fujitsu 0 s 127a201514682015 Fujitsu 0 d 127a2016 HSF 56k Data/Fax/Voice/Spkp Modem 0 -s 127a2016122d4051 MSP3880V-W # Aztech 0 -s 127a2016122d4052 MSP3880SP-W # Aztech 0 -s 127a2016122d4054 MSP3880V-U # Aztech 0 -s 127a2016122d4056 MSP3880SP-U # Aztech 0 -s 127a2016122d4057 MSP3880SP-A # Aztech 0 +s 127a2016122d4051 MSP3880V-W 0 +s 127a2016122d4052 MSP3880SP-W 0 +s 127a2016122d4054 MSP3880V-U 0 +s 127a2016122d4056 MSP3880SP-U 0 +s 127a2016122d4057 MSP3880SP-A 0 d 127a4311 Riptide HSF 56k PCI Modem 0 s 127a4311127a4311 Ring Modular? Riptide HSF RT HP Dom 0 s 127a431113e00210 HP-GVC 0 @@ -3737,11 +4252,11 @@ d 127a4321 Riptide HCF 56k PCI Modem 0 s 127a432112354321 Hewlett Packard DF 0 s 127a432112354324 Hewlett Packard DF 0 s 127a432113e00210 Hewlett Packard DF 0 -s 127a4321144d2321 Riptide # Samsung 0 +s 127a4321144d2321 Riptide 0 d 127a4322 Riptide PCI Game Controller 0 s 127a432212354322 Riptide PCI Game Controller 0 d 127a8234 RapidFire 616X ATM155 Adapter 0 -s 127a8234108d0022 RapidFire 616X ATM155 Adapter 1 +s 127a8234108d0022 RapidFire 616X ATM155 Adapter 0 s 127a8234108d0027 RapidFire 616X ATM155 Adapter 0 v 127b Pixera Corporation 0 v 127c Crosspoint Solutions, Inc. 0 @@ -3815,9 +4330,9 @@ d 12ab3000 MPG-200C PCI DVD Decoder Card 0 v 12ac Measurex Corporation 0 v 12ad Multidata GmbH 0 v 12ae Alteon Networks Inc. 0 -d 12ae0001 AceNIC Gigabit Ethernet (Fibre) 0 +d 12ae0001 AceNIC Gigabit Ethernet 0 s 12ae000112ae0001 Gigabit Ethernet-SX (Universal) 0 -s 12ae000114100104 Gigabit Ethernet-SX PCI Adapter (14100401) 0 +s 12ae000114100104 Gigabit Ethernet-SX PCI Adapter 0 d 12ae0002 AceNIC Gigabit Ethernet (Copper) 0 s 12ae000212ae0002 Gigabit Ethernet-T (3C986-T) 0 v 12af TDK USA Corp 0 @@ -3849,7 +4364,7 @@ s 12b9100812b900aa USR 56k Internal Voice Modem (Model 2976) 0 s 12b9100812b900ab USR 56k Internal Voice Modem (Model 5609) 0 s 12b9100812b900ac USR 56k Internal Voice Modem (Model 3298) 0 s 12b9100812b900ad USR 56k Internal FAX Modem (Model 5610) 0 -v 12ba PMC Sierra 0 +v 12ba BittWare, Inc. 0 v 12bb Nippon Unisoft Corporation 0 v 12bc Array Microsystems 0 v 12bd Computerm Corp. 0 @@ -3866,6 +4381,8 @@ d 12c30058 PCI NE2K Ethernet 0 d 12c35598 PCI NE2K Ethernet 0 v 12c4 Connect Tech Inc 0 v 12c5 Picture Elements Incorporated 0 +d 12c5007e Imaging/Scanning Subsystem Engine 0 +d 12c5007f Imaging/Scanning Subsystem Engine 0 d 12c50081 PCIVST [Grayscale Thresholding Engine] 0 d 12c50085 Video Simulator/Sender 0 d 12c50086 THR2 Multi-scale Thresholder 0 @@ -3885,28 +4402,24 @@ v 12d2 NVidia / SGS Thomson (Joint Venture) 0 d 12d20008 NV1 0 d 12d20009 DAC64 0 d 12d20018 Riva128 0 -d 12d20018 Riva128/128ZX 1 -s 12d2001810480c10 VICTORY Erazor 1 +s 12d2001810480c10 VICTORY Erazor 0 s 12d20018107b8030 STB Velocity 128 0 s 12d2001810920350 Viper V330 0 s 12d2001810921092 Viper V330 0 s 12d2001810b41b1b STB Velocity 128 0 -s 12d2001810b41b1d STB Velocity 128 1 -s 12d2001810b41b1e STB Velocity 128, PAL TV-Out 1 -s 12d2001810b41b1e STB Velocity 128 1 -s 12d2001810b41b20 STB Velocity 128 0 -s 12d2001810b41b20 STB Velocity 128 Sapphire 1 +s 12d2001810b41b1d STB Velocity 128 0 +s 12d2001810b41b1e STB Velocity 128, PAL TV-Out 0 +s 12d2001810b41b20 STB Velocity 128 Sapphire 0 s 12d2001810b41b21 STB Velocity 128 0 s 12d2001810b41b22 STB Velocity 128 AGP, NTSC TV-Out 0 s 12d2001810b41b23 STB Velocity 128 AGP, PAL TV-Out 0 s 12d2001810b41b27 STB Velocity 128 DVD 0 -s 12d2001810b41b88 MVP Pro 128 1 +s 12d2001810b41b88 MVP Pro 128 0 s 12d2001810b4222a STB Velocity 128 AGP 0 s 12d2001810b42230 STB Velocity 128 0 -s 12d2001810b42232 STB Velocity 128 1 +s 12d2001810b42232 STB Velocity 128 0 s 12d2001810b42235 STB Velocity 128 AGP 0 -s 12d200182a1554a3 3DVision-SAGP 0 -s 12d200182a1554a3 3DVision-SAGP / 3DexPlorer 3000 1 +s 12d200182a1554a3 3DVision-SAGP / 3DexPlorer 3000 0 d 12d20019 Riva128ZX 0 d 12d20020 TNT 0 d 12d20028 TNT2 0 @@ -3914,7 +4427,7 @@ d 12d20029 UTNT2 0 d 12d2002c VTNT2 0 d 12d200a0 ITNT2 0 v 12d3 Vingmed Sound A/S 0 -v 12d4 DGM&S 0 +v 12d4 Ulticom (Formerly DGM&S) 0 v 12d5 Equator Technologies 0 v 12d6 Analogic Corp 0 v 12d7 Biotronic SRL 0 @@ -3947,6 +4460,7 @@ s 12eb000110922000 Sonic Impact A3D 0 s 12eb000110922100 Sonic Impact A3D 0 s 12eb000110922110 Sonic Impact A3D 0 s 12eb000110922200 Sonic Impact A3D 0 +s 12eb0001122d1002 AU8820 Vortex Digital Audio Processor 0 s 12eb000112eb0001 AU8820 Vortex Digital Audio Processor 0 s 12eb000150533355 Montego 0 d 12eb0002 Vortex 2 0 @@ -4055,6 +4569,8 @@ v 1317 Linksys 0 d 13170981 Fast Ethernet 10/100 0 d 13170985 Network Everywhere Fast Ethernet 10/100 model NC100 0 d 13171985 Fast Ethernet 10/100 0 +s 1317198510390300 1 +s 131719851385511a ADMtek AL985 Centaur-C [NETGEAR FA511] 1 Info based on 'tulip-dag -eee' by D. Becker (scyld.com) v 1318 Packet Engines Inc. 0 d 13180911 PCI Ethernet Adapter 0 v 1319 Fortemedia, Inc 0 @@ -4122,6 +4638,7 @@ v 132d Integrated Silicon Solution, Inc. 0 v 1330 MMC Networks 0 v 1331 Radisys Corp. 0 v 1332 Micro Memory 0 +d 13325415 MM-5415CN PCI Memory Module with Battery Backup 0 v 1334 Redcreek Communications, Inc 0 v 1335 Videomail, Inc 0 v 1337 Third Planet Publishing 0 @@ -4159,7 +4676,11 @@ v 134e CSTI 0 v 134f Algo System Co Ltd 0 v 1350 Systec Co. Ltd 0 v 1351 Sonix Inc 0 -v 1353 Dassault A.T. 0 +v 1353 Thales Idatys 0 +d 13530002 Proserver 0 +d 13530003 PCI-FUT 0 +d 13530004 PCI-S0 0 +d 13530005 PCI-FUT-S0 0 v 1354 Dwave System Inc 0 v 1355 Kratos Analytical Ltd 0 v 1356 The Logical Co 0 @@ -4167,6 +4688,19 @@ v 1359 Prisa Networks 0 v 135a Brain Boxes 0 v 135b Giganet Inc 0 v 135c Quatech Inc 0 +d 135c0010 QSC-100 0 +d 135c0020 DSC-100 0 +d 135c0030 DSC-200/300 0 +d 135c0040 QSC-200/300 0 +d 135c0050 ESC-100D 0 +d 135c0060 ESC-100M 0 +d 135c00f0 MPAC-100 Syncronous Serial Card (Zilog 85230) 0 +d 135c0170 QSCLP-100 0 +d 135c0180 DSCLP-100 0 +d 135c0190 SSCLP-100 0 +d 135c01a0 QSCLP-200/300 0 +d 135c01b0 DSCLP-200/300 0 +d 135c01c0 SSCLP-200/300 0 v 135d ABB Network Partner AB 0 v 135e Sealevel Systems Inc 0 d 135e7101 Single Port RS-232/422/485/530 0 @@ -4213,6 +4747,7 @@ v 1382 Marian - Electronic & Software 0 v 1383 Controlnet Inc 0 v 1384 Reality Simulation Systems Inc 0 v 1385 Netgear 0 +d 13854100 802.11b Wireless Adapter (MA301) 0 d 1385620a GA620 0 d 1385622a GA622 0 d 1385630a GA630 0 @@ -4238,6 +4773,8 @@ d 13932040 Intellio CP-204J 0 d 13932180 Intellio C218 Turbo PCI 0 d 13933200 Intellio C320 Turbo PCI 0 v 1394 Level One Communications 0 +d 13940001 LXT1001 Gigabit Ethernet 0 +s 1394000113940001 NetCelerator Adapter 0 v 1395 Ambicom Inc 0 v 1396 Cipher Systems Inc 0 v 1397 Cologne Chip Designs GmbH 0 @@ -4247,6 +4784,9 @@ s 13972bd0e4bf1000 CI1-1-Harp 0 v 1398 Clarion co. Ltd 0 v 1399 Rios systems Co Ltd 0 v 139a Alacritech Inc 0 +d 139a0001 Quad Port 10/100 Server Accelerator 0 +d 139a0003 Single Port 10/100 Server Accelerator 0 +d 139a0005 Single Port Gigabit Server Accelerator 0 v 139b Mediasonic Multimedia Systems Ltd 0 v 139c Quantum 3d Inc 0 v 139d EPL limited 0 @@ -4260,11 +4800,16 @@ d 13a30005 7751 Security Processor 0 d 13a30006 6500 Public Key Processor 0 d 13a30007 7811 Security Processor 0 d 13a30012 7951 Security Processor 0 +d 13a30014 78XX Security Processor 0 +d 13a30016 8065 Security Processor 0 +d 13a30017 8165 Security Processor 0 +d 13a30018 8154 Security Processor 0 v 13a4 Rascom Inc 0 v 13a5 Audio Digital Imaging Inc 0 v 13a6 Videonics Inc 0 v 13a7 Teles AG 0 v 13a8 Exar Corp. 0 +d 13a80158 XR17C158 Octal UART 0 v 13a9 Siemens Medical Systems, Ultrasound Group 0 v 13aa Broadband Networks Inc 0 v 13ab Arcom Control Systems Ltd 0 @@ -4293,6 +4838,7 @@ d 13c00010 SyncLink WAN Adapter 0 v 13c1 3ware Inc 0 d 13c11000 3ware ATA-RAID 0 d 13c11001 3ware 7000-series ATA-RAID 0 +d 13c11002 3ware ATA-RAID 0 v 13c2 Technotrend Systemtechnik GmbH 0 v 13c3 Janz Computer AG 0 v 13c4 Phase Metrics 0 @@ -4309,6 +4855,8 @@ v 13ce Cocom A/S 0 v 13cf Studio Audio & Video Ltd 0 v 13d0 Techsan Electronics Co Ltd 0 v 13d1 Abocom Systems Inc 0 +d 13d1ab02 ADMtek Centaur-C rev 17 [D-Link DFE-680TX] CardBus Fast Ethernet Adapter 0 +d 13d1ab06 RTL8139 [FE2000VX] CardBus Fast Ethernet Attached Port Adapter 0 v 13d2 Shark Multimedia Inc 0 v 13d3 IMC Networks 0 v 13d4 Graphics Microsystems Inc 0 @@ -4342,7 +4890,7 @@ v 13ed Raytheion E-Systems 0 v 13ee Hayes Microcomputer Products Inc 0 v 13ef Coppercom Inc 0 v 13f0 Sundance Technology Inc 0 -d 13f00201 Sundance Ethernet 0 +d 13f00201 ST201 Sundance Ethernet 0 v 13f1 Oce' - Technologies B.V. 0 v 13f2 Ford Microelectronics Inc 0 v 13f3 Mcdata Corporation 0 @@ -4355,9 +4903,11 @@ s 13f6010013f6ffff CMI8338/C3DX PCI Audio Device 0 d 13f60101 CM8338B 0 s 13f6010113f60101 CMI8338-031 PCI Audio Device 0 d 13f60111 CM8738 0 +s 13f6011110190970 P6STP-FL motherboard 0 +s 13f6011110438077 CMI8738 6-channel audio controller 0 +s 13f60111104380e2 CMI8738 6ch-MX 0 s 13f6011113f60111 CMI8738/C3DX PCI Audio Device 0 d 13f60211 CM8738 0 -d 13f61106 1 v 13f7 Wildfire Communications 0 v 13f8 Ad Lib Multimedia Inc 0 v 13f9 NTT Advanced Technology Corp. 0 @@ -4366,6 +4916,7 @@ v 13fb Aydin Corp 0 v 13fc Computer Peripherals International 0 v 13fd Micro Science Inc 0 v 13fe Advantech Co. Ltd 0 +d 13fe1756 PCI-1756 0 v 13ff Silicon Spice Inc 0 v 1400 Artx Inc 0 d 14001401 9432 TX 0 @@ -4376,7 +4927,6 @@ v 1404 Fundamental Software Inc 0 v 1405 Excalibur Systems Inc 0 v 1406 Oce' Printing Systems GmbH 0 v 1407 Lava Computer mfg Inc 0 -v 1407 Lava Computer mfg Inc 1 The quad card have a new number 120 121 d 14070100 Lava Dual Serial 0 d 14070101 Lava Quatro A 0 d 14070102 Lava Quatro B 0 @@ -4386,11 +4936,13 @@ d 14070202 Lava Quad B 0 d 14070500 Lava Single Serial 0 d 14070600 Lava Port 650 0 d 14078000 Lava Parallel 0 +d 14078001 Dual parallel port controller A 0 d 14078002 Lava Dual Parallel port A 0 d 14078003 Lava Dual Parallel port B 0 d 14078800 BOCA Research IOPPAR 0 v 1408 Aloka Co. Ltd 0 v 1409 Timedia Technology Co Ltd 0 +d 14097168 PCI2S550 (Dual 16550 UART) 0 v 140a DSP Research Inc 0 v 140b Ramix Inc 0 v 140c Elmic Systems Inc 0 @@ -4401,10 +4953,20 @@ v 1410 Midas lab Inc 0 v 1411 Ikos Systems Inc 0 v 1412 IC Ensemble Inc 0 d 14121712 ICE1712 [Envy24] 0 +d 14121724 ICE1724 [Envy24HT] 0 v 1413 Addonics 0 v 1414 Microsoft Corporation 0 v 1415 Oxford Semiconductor Ltd 0 d 14158403 VScom 011H-EP1 1 port parallel adaptor 0 +d 14159501 OX16PCI954 (Quad 16950 UART) function 0 0 +s 1415950115ed2000 MCCR Serial p0-3 of 8 0 +s 1415950115ed2001 MCCR Serial p0-3 of 16 0 +d 1415950a EXSYS EX-41092 Dual 16950 Serial adapter 0 +d 1415950b OXCB950 Cardbus 16950 UART 0 +d 14159511 OX16PCI954 (Quad 16950 UART) function 1 0 +s 1415951115ed2000 MCCR Serial p4-7 of 8 0 +s 1415951115ed2001 MCCR Serial p4-15 of 16 0 +d 14159521 OX16PCI952 (Dual 16950 UART) 0 v 1416 Multiwave Innovation pte Ltd 0 v 1417 Convergenet Technologies Inc 0 v 1418 Kyushu electronics systems Inc 0 @@ -4490,6 +5052,7 @@ d 145f0001 NextMove PCI 0 v 1460 DYNARC INC 0 v 1461 Avermedia Technologies Inc 0 v 1462 Micro-star International Co Ltd 0 +v 1462 Micro-Star International Co., Ltd. 1 v 1463 Fast Corporation 0 v 1464 Interactive Circuits & Systems Ltd 0 v 1465 GN NETTEST Telecom DIV. 0 @@ -4568,6 +5131,7 @@ v 14ac Novaweb Technologies Inc 0 v 14ad Time Space Radio AB 0 v 14ae CTI, Inc 0 v 14af Guillemot Corporation 0 +d 14af7102 3D Prophet II MX 0 v 14b0 BST Communication Technology Ltd 0 v 14b1 Nextcom K.K. 0 v 14b2 ENNOVATE Networks Inc 0 @@ -4581,6 +5145,11 @@ d 14b70001 Symphony 4110 0 v 14b8 Techsoft Technology Co Ltd 0 v 14b9 AIRONET Wireless Communications 0 d 14b90001 PC4800 0 +d 14b90340 PC4800 0 +d 14b90350 PC4800 0 +d 14b94500 PC4500 0 +d 14b94800 PC4800 0 +d 14b9a504 Cisco Aironet Wireless 802.11b 0 v 14ba INTERNIX Inc. 0 v 14bb SEMTECH Corporation 0 v 14bc Globespan Semiconductor Inc. 0 @@ -4643,50 +5212,114 @@ d 14dc0006 PCI260 0 d 14dc0007 PCI224 0 d 14dc0008 PCI234 0 d 14dc0009 PCI236 0 +d 14dc000a PCI272 0 +d 14dc000b PCI215 0 v 14dd Boulder Design Labs Inc 0 v 14de Applied Integration Corporation 0 v 14df ASIC Communications Corp 0 v 14e1 INVERTEX 0 v 14e2 INFOLIBRIA 0 v 14e3 AMTELCO 0 -v 14e4 BROADCOM Corporation 0 +v 14e4 Broadcom Corporation 0 d 14e41644 NetXtreme BCM5700 Gigabit Ethernet 0 -s 14e4164410b71000 3C996-T 1000BaseTX 0 -s 14e4164410b71001 3C996B-T 1000BaseTX 0 -s 14e4164410b71002 3C996C-T 1000BaseTX 0 -s 14e4164410b71003 3C997-T 1000BaseTX Dual Port 0 -s 14e4164410b71004 3C996-SX 1000BaseSX 0 -s 14e4164410b71005 3C997-SX 1000BaseSX Dual Port 0 -s 14e4164414e40002 NetXtreme 1000BaseSX 0 -s 14e4164414e40003 NetXtreme 1000BaseSX 0 -s 14e4164414e40004 NetXtreme 1000BaseTX 0 +s 14e4164410140277 Broadcom Vigil B5700 1000Base-T 0 +s 14e41644102800d1 Broadcom BCM5700 0 +s 14e4164410280106 Broadcom BCM5700 0 +s 14e4164410280109 Broadcom BCM5700 1000Base-T 0 +s 14e416441028010a Broadcom BCM5700 1000BaseTX 0 +s 14e4164410b71000 3C996-T 1000Base-T 0 +s 14e4164410b71001 3C996B-T 1000Base-T 0 +s 14e4164410b71002 3C996C-T 1000Base-T 0 +s 14e4164410b71003 3C997-T 1000Base-T Dual Port 0 +s 14e4164410b71004 3C996-SX 1000Base-SX 0 +s 14e4164410b71005 3C997-SX 1000Base-SX Dual Port 0 +s 14e4164410b71008 3C942 Gigabit LOM (31X31) 0 +s 14e4164414e40002 NetXtreme 1000Base-SX 0 +s 14e4164414e40003 NetXtreme 1000Base-SX 0 +s 14e4164414e40004 NetXtreme 1000Base-T 0 s 14e4164414e41028 NetXtreme 1000BaseTX 0 -s 14e4164414e41644 NetXtreme BCM5700 1000BaseTX 0 +s 14e4164414e41644 BCM5700 1000Base-T 0 d 14e41645 NetXtreme BCM5701 Gigabit Ethernet 0 s 14e416450e11007c NC7770 Gigabit Server Adapter (PCI-X, 10/100/1000-T) 0 s 14e416450e11007d NC6770 Gigabit Server Adapter (PCI-X, 1000-SX) 0 s 14e416450e110085 NC7780 Gigabit Server Adapter (embedded, WOL) 0 s 14e416450e110099 NC7780 Gigabit Server Adapter (embedded, WOL) 0 s 14e416450e11009a NC7770 Gigabit Server Adapter (PCI-X, 10/100/1000-T) 0 -s 14e4164510b71004 3C996-SX 1000BaseSX 0 -s 14e4164510b71006 3C996B-T 1000BaseTX 0 -s 14e4164510b71007 3C1000-T 1000BaseTX 0 -s 14e4164510b71008 3C940-BR01 1000BaseTX 0 -s 14e4164514e40001 NetXtreme BCM5701 1000BaseTX 0 -s 14e4164514e40005 NetXtreme BCM5701 1000BaseTX 0 -s 14e4164514e40006 NetXtreme BCM5701 1000BaseTX 0 -s 14e4164514e40007 NetXtreme BCM5701 1000BaseSX 0 -s 14e4164514e40008 NetXtreme BCM5701 1000BaseTX 0 -s 14e4164514e48008 NetXtreme BCM5701 1000BaseTX 0 +s 14e416450e1100c1 NC6770 Gigabit Server Adapter (PCI-X, 1000-SX) 0 +s 14e4164510280121 Broadcom BCM5701 1000Base-T 0 +s 14e4164510b71004 3C996-SX 1000Base-SX 0 +s 14e4164510b71006 3C996B-T 1000Base-T 0 +s 14e4164510b71007 3C1000-T 1000Base-T 0 +s 14e4164510b71008 3C940-BR01 1000Base-T 0 +s 14e4164514e40001 BCM5701 1000Base-T 0 +s 14e4164514e40005 BCM5701 1000Base-T 0 +s 14e4164514e40006 BCM5701 1000Base-T 0 +s 14e4164514e40007 BCM5701 1000Base-SX 0 +s 14e4164514e40008 BCM5701 1000Base-T 0 +s 14e4164514e48008 BCM5701 1000Base-T 0 +d 14e41646 NetXtreme BCM5702 Gigabit Ethernet 0 +s 14e416460e1100bb NC7760 1000BaseTX 0 +s 14e4164610280126 Broadcom BCM5702 1000BaseTX 0 +s 14e4164614e48009 BCM5702 1000BaseTX 0 d 14e41647 NetXtreme BCM5703 Gigabit Ethernet 0 -d 14e44212 BCM v.90 56k modem 1 Controllerless PCI modem +s 14e416470e110099 NC7780 1000BaseTX 0 +s 14e416470e11009a NC7770 1000BaseTX 0 +s 14e4164714e40009 BCM5703 1000BaseTX 0 +s 14e4164714e4000a BCM5703 1000BaseSX 0 +s 14e4164714e4000b BCM5703 1000BaseTX 0 +s 14e4164714e48009 BCM5703 1000BaseTX 0 +s 14e4164714e4800a BCM5703 1000BaseTX 0 +d 14e41648 NetXtreme BCM5704 Gigabit Ethernet 0 +s 14e416480e1100cf NC7772 Gigabit Server Adapter (PCI-X, 10,100,1000-T) 0 +s 14e416480e1100d0 NC7782 Gigabit Server Adapter (PCI-X, 10,100,1000-T) 0 +s 14e416480e1100d1 NC7783 Gigabit Server Adapter (PCI-X, 10,100,1000-T) 0 +s 14e4164810b72000 3C998-T Dual Port 10/100/1000 PCI-X 0 +s 14e4164810b73000 3C999-T Quad Port 10/100/1000 PCI-X 0 +s 14e4164811661648 NetXtreme CIOB-E 1000Base-T 0 +d 14e4164d NetXtreme BCM5702FE Gigabit Ethernet 0 +d 14e41653 NetXtreme BCM5705 Gigabit Ethernet 0 +d 14e4165d NetXtreme BCM5705M Gigabit Ethernet 0 +d 14e41696 NetXtreme BCM5782 Gigabit Ethernet 0 +s 14e4169614e4000d NetXtreme BCM5782 1000Base-T 0 +d 14e416a6 NetXtreme BCM5702 Gigabit Ethernet 0 +s 14e416a60e1100bb NC7760 Gigabit Server Adapter (PCI-X, 10/100/1000-T) 0 +s 14e416a610280126 BCM5702 1000Base-T 0 +s 14e416a614e4000c BCM5702 1000Base-T 0 +s 14e416a614e48009 BCM5702 1000Base-T 0 +d 14e416a7 NetXtreme BCM5703 Gigabit Ethernet 0 +s 14e416a70e1100ca NC7771 Gigabit Server Adapter (PCI-X, 10,100,1000-T) 0 +s 14e416a70e1100cb NC7781 Gigabit Server Adapter (PCI-X, 10,100,1000-T) 0 +s 14e416a714e40009 NetXtreme BCM5703 1000Base-T 0 +s 14e416a714e4000a NetXtreme BCM5703 1000Base-SX 0 +s 14e416a714e4000b NetXtreme BCM5703 1000Base-T 0 +s 14e416a714e4800a NetXtreme BCM5703 1000Base-T 0 +d 14e416a8 NetXtreme BCM5704S Gigabit Ethernet 0 +s 14e416a810b72001 3C998-SX Dual Port 1000-SX PCI-X 0 +d 14e416c6 NetXtreme BCM5702 Gigabit Ethernet 0 +s 14e416c610b71100 3C1000B-T 10/100/1000 PCI 0 +s 14e416c614e4000c BCM5702 1000Base-T 0 +s 14e416c614e48009 BCM5702 1000Base-T 0 +d 14e416c7 NetXtreme BCM5703 Gigabit Ethernet 0 +s 14e416c714e40009 NetXtreme BCM5703 1000Base-T 0 +s 14e416c714e4000a NetXtreme BCM5703 1000Base-SX 0 +d 14e44210 BCM4210 iLine10 HomePNA 2.0 0 +d 14e44211 BCM4211 iLine10 HomePNA 2.0 + V.90 56k modem 0 +d 14e44212 BCM4212 v.90 56k modem 0 +d 14e44301 BCM4301 802.11b 0 +d 14e44401 BCM4401 100Base-T 0 +d 14e44402 BCM4402 Integrated 10/100BaseT 0 +d 14e44410 BCM4413 iLine32 HomePNA 2.0 0 +d 14e44411 BCM4413 V.90 56k modem 0 +d 14e44412 BCM4413 10/100BaseT 0 d 14e45820 BCM5820 Crypto Accelerator 0 +d 14e45821 BCM5821 Crypto Accelerator 0 v 14e5 Pixelfusion Ltd 0 v 14e6 SHINING Technology Inc 0 v 14e7 3CX 0 v 14e8 RAYCER Inc 0 v 14e9 GARNETS System CO Ltd 0 -v 14ea PLANEX COMMUNICATIONS Inc 0 +v 14ea Planex Communications, Inc 0 +d 14eaab06 FNW-3603-TX CardBus Fast Ethernet 0 v 14eb SEIKO EPSON Corp 0 v 14ec ACQIRIS 0 v 14ed DATAKINETICS Ltd 0 @@ -4712,12 +5345,12 @@ s 14f11033122d4030 Dell Mercury - MDP3880-U(B) Data Fax Modem 0 s 14f11033122d4034 Dell Thor - MDP3880-W(U) Data Fax Modem 0 s 14f1103313e0020d Dell Copper 0 s 14f1103313e0020e Dell Silver 0 -s 14f1103313e00261 IBM # GVC 0 +s 14f1103313e00261 IBM 0 s 14f1103313e00290 Compaq Goldwing 0 -s 14f1103313e002a0 IBM # GVC 0 -s 14f1103313e002b0 IBM # GVC 0 +s 14f1103313e002a0 IBM 0 +s 14f1103313e002b0 IBM 0 s 14f1103313e002c0 Compaq Scooter 0 -s 14f1103313e002d0 IBM # GVC 0 +s 14f1103313e002d0 IBM 0 s 14f11033144f1500 IBM P85-DF (1) 0 s 14f11033144f1501 IBM P85-DF (2) 0 s 14f11033144f150a IBM P85-DF (3) 0 @@ -4751,8 +5384,8 @@ d 14f11434 HCF 56k Data/Fax/Voice Modem 0 d 14f11435 HCF 56k Data/Fax/Voice/Spkp (w/Handset) Modem 0 d 14f11436 HCF 56k Data/Fax Modem 0 d 14f11453 HCF 56k Data/Fax Modem 0 -s 14f1145313e00240 IBM # GVC 0 -s 14f1145313e00250 IBM # GVC 0 +s 14f1145313e00240 IBM 0 +s 14f1145313e00250 IBM 0 s 14f11453144f1502 IBM P95-DF (1) 0 s 14f11453144f1503 IBM P95-DF (2) 0 d 14f11454 HCF 56k Data/Fax/Voice Modem 0 @@ -4760,6 +5393,8 @@ d 14f11455 HCF 56k Data/Fax/Voice/Spkp (w/Handset) Modem 0 d 14f11456 HCF 56k Data/Fax/Voice/Spkp Modem 0 s 14f11456122d4035 Dell Europa - MDP3900V-W 0 s 14f11456122d4302 Dell MP3930V-W(C) MiniPCI 0 +d 14f11610 ADSL AccessRunner PCI Arbitration Device 0 +d 14f11611 AccessRunner PCI ADSL Interface Device 0 d 14f11803 HCF 56k Modem 0 s 14f118030e110023 623-LAN Grizzly 0 s 14f118030e110043 623-LAN Yogi 0 @@ -4809,9 +5444,9 @@ d 14f12364 HSF 56k Data/Fax/Voice CardBus Modem (Mob SmartDAA) 0 d 14f12365 HSF 56k Data/Fax/Voice/Spkp (w/HS) CardBus Modem (Mob SmartDAA) 0 d 14f12366 HSF 56k Data/Fax/Voice/Spkp CardBus Modem (Mob SmartDAA) 0 d 14f12443 HSF 56k Data/Fax Modem (Mob WorldW SmartDAA) 0 -s 14f12443104d8075 Modem # Sony 0 -s 14f12443104d8083 Modem # Sony 0 -s 14f12443104d8097 Modem # Sony 0 +s 14f12443104d8075 Modem 0 +s 14f12443104d8083 Modem 0 +s 14f12443104d8097 Modem 0 d 14f12444 HSF 56k Data/Fax/Voice Modem (Mob WorldW SmartDAA) 0 d 14f12445 HSF 56k Data/Fax/Voice/Spkp (w/HS) Modem (Mob WorldW SmartDAA) 0 d 14f12446 HSF 56k Data/Fax/Voice/Spkp Modem (Mob WorldW SmartDAA) 0 @@ -4822,6 +5457,8 @@ d 14f12466 HSF 56k Data/Fax/Voice/Spkp Modem (Mob SmartDAA) 0 d 14f12f00 HSF 56k HSFi Modem 0 s 14f12f0013e08d84 IBM HSFi V.90 0 s 14f12f0013e08d85 Compaq Stinger 0 +s 14f12f0014f12004 Dynalink 56PMi 0 +d 14f18234 RS8234 ATM SAR Controller [ServiceSAR Plus] 0 v 14f2 MOBILITY Electronics 0 v 14f3 BROADLOGIC 0 v 14f4 TOKYO Electronic Industry CO Ltd 0 @@ -4868,6 +5505,8 @@ v 1513 Raychem 0 v 1514 TFL LAN Inc 0 v 1515 Advent design 0 v 1516 MYSON Technology Inc 0 +d 15160803 SURECOM EP-320X-S 100/10M Ethernet PCI Adapter 0 +s 15160803132010bd SURECOM EP-320X-S 100/10M Ethernet PCI Adapter 0 v 1517 ECHOTEK Corp 0 v 1518 PEP MODULAR Computers GmbH 0 v 1519 TELEFON AKTIEBOLAGET LM Ericsson 0 @@ -4884,13 +5523,18 @@ d 151f0000 TP560 Data/Fax/Voice 56k modem 0 v 1520 CHAPLET System Inc 0 v 1521 BELL Corp 0 v 1522 MainPine Ltd 0 -d 15220100 PCI <_> IOBus Bridge 1 -s 1522010015220100 RockForceDUO 2 Port V.92/V.44 Data/Fax/Voice Modem 1 -s 1522010015220100 1 -s 1522010015220200 RockForceDUO 2 Port V.92/V.44 Data/Fax/Voice Modem 1 -s 1522010015220300 RockForceQUATRO 4 Port V.92/V.44 Data/Fax/Voice Modem 1 +d 15220100 PCI <-> IOBus Bridge 0 +s 1522010015220200 RockForceDUO 2 Port V.92/V.44 Data/Fax/Voice Modem 0 +s 1522010015220300 RockForceQUATRO 4 Port V.92/V.44 Data/Fax/Voice Modem 0 +s 1522010015220400 RockForceDUO+ 2 Port V.92/V.44 Data/Fax/Voice Modem 0 +s 1522010015220500 RockForceQUATRO+ 4 Port V.92/V.44 Data/Fax/Voice Modem 0 +s 1522010015220600 RockForce+ 2 Port V.90 Data/Fax/Voice Modem 0 v 1523 MUSIC Semiconductors 0 v 1524 ENE Technology Inc 0 +d 15241211 CB1211 Cardbus Controller 0 +d 15241225 CB1225 Cardbus Controller 0 +d 15241410 CB1410 Cardbus Controller 0 +d 15241420 CB1420 Cardbus Controller 0 v 1525 IMPACT Technologies 0 v 1526 ISS, Inc 0 v 1527 SOLECTRON 0 @@ -4921,6 +5565,8 @@ v 1540 PROVIDEO MULTIMEDIA Co Ltd 0 v 1541 MACHONE Communications 0 v 1542 VIVID Technology Inc 0 v 1543 SILICON Laboratories 0 +d 15433052 Intel 537 [Winmodem] 0 +d 15434c22 Si3036 MC'97 DAA 0 v 1544 DCM DATA Systems 0 v 1545 VISIONTEK 0 v 1546 IOI Technology Corp 0 @@ -5043,6 +5689,7 @@ v 159f Galea Network Security 0 v 15a0 Compumaster SRL 0 v 15a1 Geocast Network Systems 0 v 15a2 Catalyst Enterprises Inc 0 +d 15a20001 TA700 PCI Bus Analyzer/Exerciser 0 v 15a3 Italtel 0 v 15a4 X-Net OY 0 v 15a5 Toyota Macs Inc 0 @@ -5080,7 +5727,8 @@ v 15c3 Taiwan Mycomp Co Ltd 0 v 15c4 EVSX Inc 0 v 15c5 Procomp Informatics Ltd 0 v 15c6 Technical University of Budapest 0 -v 15c7 Tateyama Dystem Laboratory Co Ltd 0 +v 15c7 Tateyama System Laboratory Co Ltd 0 +d 15c70349 Tateyama C-PCI PLC/NC card Rev.01A 0 v 15c8 Penta Media Co Ltd 0 v 15c9 Serome Technology Inc 0 v 15ca Bitboys OY 0 @@ -5114,6 +5762,7 @@ v 15e5 Valley technologies Inc 0 v 15e6 Agere Inc 0 v 15e7 Get Engineering Corp 0 v 15e8 National Datacomm Corp 0 +d 15e80130 Wireless PCI Card 0 v 15e9 Pacific Digital Corp 0 v 15ea Tokyo Denshi Sekei K.K. 0 v 15eb Drsearch GmbH 0 @@ -5147,19 +5796,61 @@ v 1606 Europop AG 0 v 1607 Lava Semiconductor Manufacturing Inc 0 v 1608 Automated Wagering International 0 v 1609 Scimetric Instruments Inc 0 +v 1612 Telesynergy Research Inc. 0 v 1619 FarSite Communications Ltd 0 d 16190400 FarSync T2P (2 port X.21/V.35/V.24) 0 d 16190440 FarSync T4P (4 port X.21/V.35/V.24) 0 v 1629 Kongsberg Spacetec AS 0 d 16291003 Format synchronizer v3.0 0 d 16292002 Fast Universal Data Output 0 +v 1638 Standard Microsystems Corp [SMC] 0 +d 16381100 SMC2602W EZConnect / Addtron AWA-100 0 +v 163c Smart Link Ltd. 0 +d 163c5449 SmartPCI561 Modem 0 v 1657 Brocade Communications Systems, Inc. 0 -v 1668 Action Tec Electronics Inc 0 +v 165a Epix Inc 0 +d 165ac100 PIXCI(R) CL1 Camera Link Video Capture Board [custom QL5232] 0 +d 165ad200 PIXCI(R) D2X Digital Video Capture Board [custom QL5232] 0 +d 165ad300 PIXCI(R) D3X Digital Video Capture Board [custom QL5232] 0 +v 165d Hsing Tech. Enterprise Co., Ltd. 0 +v 1661 Worldspace Corp. 0 +v 1668 Actiontec Electronics Inc 0 +v 1681 Hercules 0 +v 16ab Global Sun Technology Inc 0 +d 16ab1102 PCMCIA-to-PCI Wireless Network Bridge 0 +v 16be Creatix Polymedia GmbH 0 +v 16ec U.S. Robotics 0 +d 16ec3685 Wireless Access PCI Adapter Model 022415 0 v 16f6 VideoTele.com, Inc. 0 +v 1705 Digital First, Inc. 0 +v 170b NetOctave Inc 0 v 170c YottaYotta Inc. 0 -v 1743 Peppercon AG 1 -d 17438139 ROL/F-100 Fast Ethernet Adapter with ROL 1 +v 172a Accelerated Encryption 0 +v 1737 Linksys 0 +v 173b Altima (nee Broadcom) 0 +d 173b03e8 AC1000 Gigabit Ethernet 0 +d 173b03ea AC9100 Gigabit Ethernet 0 +v 1743 Peppercon AG 0 +d 17438139 ROL/F-100 Fast Ethernet Adapter with ROL 0 +v 174b PC Partner Limited 0 +v 175e Sanera Systems, Inc. 0 +v 1787 Hightech Information System Ltd. 0 +v 1796 Research Centre Juelich 0 also used by Struck Innovative Systeme for joint developments +d 17960001 SIS1100 [Gigabit link] 0 +d 17960002 HOTlink 0 +d 17960003 Counter Timer 0 +d 17960004 CAMAC Controller 0 +d 17960005 PROFIBUS 0 +d 17960006 AMCC HOTlink 0 +v 1799 Belkin 0 +v 17af Hightech Information System Ltd. 0 v 1813 Ambient Technologies Inc 0 +d 18134000 HaM controllerless modem 0 +s 1813400016be0001 V9x HAM Data Fax Modem 0 +d 18134100 HaM plus Data Fax Modem 0 +s 1813410016be0002 V9x HAM 1394 0 +v 1851 Microtune, Inc. 0 +v 1852 Anritsu Corp. 0 v 1a08 Sierra semiconductor 0 d 1a080000 SC15064 0 v 1b13 Jaton Corp 0 @@ -5172,7 +5863,10 @@ d 1de10391 TRM-S1040 0 d 1de12020 DC-390 0 d 1de1690c 690c 0 d 1de1dc29 DC290 0 +v 2000 Smart Link Ltd. 0 v 2001 Temporal Research Ltd 0 +v 2003 Smart Link Ltd. 0 +v 2004 Smart Link Ltd. 0 v 21c3 21st Century Computer Corp. 0 v 2348 Racore 0 d 23482010 8142 100VG/AnyLAN 0 @@ -5184,11 +5878,12 @@ v 2a15 3D Vision(???) 0 v 3000 Hansol Electronics Inc. 0 v 3142 Post Impression Systems. 0 v 3388 Hint Corp 0 +d 33880021 HB1-SE33 PCI-PCI Bridge 0 d 33888011 VXPro II Chipset 0 s 3388801133888011 VXPro II Chipset CPU to PCI Bridge 0 d 33888012 VXPro II Chipset 0 s 3388801233888012 VXPro II Chipset PCI to ISA Bridge 0 -d 33888013 VXPro II Chipset 0 +d 33888013 VXPro II IDE 0 s 3388801333888013 VXPro II Chipset EIDE Controller 0 v 3411 Quantum Designs (H.K.) Inc 0 v 3513 ARCOM Control Systems Ltd 0 @@ -5203,7 +5898,7 @@ d 3d3d0006 GLINT MX 0 d 3d3d0007 3D Extreme 0 d 3d3d0008 GLINT Gamma G1 0 d 3d3d0009 Permedia II 2D+3D 0 -s 3d3d000910400011 AccelStar II 1 +s 3d3d000910400011 AccelStar II 0 s 3d3d00093d3d0100 AccelStar II 3D Accelerator 0 s 3d3d00093d3d0111 Permedia 3:16 0 s 3d3d00093d3d0114 Santa Ana 0 @@ -5214,6 +5909,8 @@ s 3d3d00093d3d0125 Oxygen VX1 0 s 3d3d00093d3d0127 Permedia3 Create! 0 d 3d3d000a GLINT R3 0 s 3d3d000a3d3d0121 Oxygen VX1 0 +d 3d3d000c GLINT R3 [Oxygen VX1] 0 +s 3d3d000c3d3d0144 Oxygen VX1-4X AGP [Permedia 4] 0 d 3d3d0100 Permedia II 2D+3D 0 d 3d3d1004 Permedia 0 d 3d3d3d04 Permedia 0 @@ -5233,7 +5930,7 @@ d 40052464 ALG-2464 0 d 40052501 ALG-2564A/25128A 0 d 40054000 ALS4000 Audio Chipset 0 s 4005400040054000 ALS4000 Audio Chipset 0 -d 40054710 ALC200/200P 1 as reported by alsa for the builtin audio of the VIA KT266A +d 40054710 ALC200/200P 0 v 4033 Addtron Technology Co, Inc. 0 d 40331360 RTL8139 Ethernet 0 v 4143 Digital Equipment Corp 0 @@ -5255,19 +5952,38 @@ d 4a145000 NV5000SC 0 s 4a1450004a145000 RT8029-Based Ethernet Adapter 0 v 4b10 Buslogic Inc. 0 v 4c48 LUNG HWA Electronics 0 +v 4c53 SBS Technologies 0 v 4ca1 Seanix Technology Inc 0 v 4d51 MediaQ Inc. 0 d 4d510200 MQ-200 0 v 4d54 Microtechnica Co Ltd 0 v 4ddc ILC Data Device Corp 0 -v 5046 GemTek Technology Corporation 1 -d 50461001 Gemtek PCI Radio 1 +d 4ddc0100 DD-42924I5-300 (ARINC 429 Data Bus) 0 +d 4ddc0801 BU-65570I1 MIL-STD-1553 Test and Simulation 0 +d 4ddc0802 BU-65570I2 MIL-STD-1553 Test and Simulation 0 +d 4ddc0811 BU-65572I1 MIL-STD-1553 Test and Simulation 0 +d 4ddc0812 BU-65572I2 MIL-STD-1553 Test and Simulation 0 +d 4ddc0881 BU-65570T1 MIL-STD-1553 Test and Simulation 0 +d 4ddc0882 BU-65570T2 MIL-STD-1553 Test and Simulation 0 +d 4ddc0891 BU-65572T1 MIL-STD-1553 Test and Simulation 0 +d 4ddc0892 BU-65572T2 MIL-STD-1553 Test and Simulation 0 +d 4ddc0901 BU-65565C1 MIL-STD-1553 Data Bus 0 +d 4ddc0902 BU-65565C2 MIL-STD-1553 Data Bus 0 +d 4ddc0903 BU-65565C3 MIL-STD-1553 Data Bus 0 +d 4ddc0904 BU-65565C4 MIL-STD-1553 Data Bus 0 +d 4ddc0b01 BU-65569I1 MIL-STD-1553 Data Bus 0 +d 4ddc0b02 BU-65569I2 MIL-STD-1553 Data Bus 0 +d 4ddc0b03 BU-65569I3 MIL-STD-1553 Data Bus 0 +d 4ddc0b04 BU-65569I4 MIL-STD-1553 Data Bus 0 +v 5046 GemTek Technology Corporation 0 +d 50461001 PCI Radio 0 v 5053 Voyetra Technologies 0 d 50532010 Daytona Audio Adapter 0 v 5136 S S Technologies 0 v 5143 Qualcomm Inc 0 v 5145 Ensoniq (Old) 0 d 51453031 Concert AudioPCI 0 +v 5168 Animation Technologies Inc. 1 http://www.lifeview.com.tw/ v 5301 Alliance Semiconductor Corp. 0 d 53010001 ProMotion aT3D 0 v 5333 S3 Inc. 0 @@ -5305,7 +6021,7 @@ d 533388f2 86c968 [Vision 968 VRAM] rev 2 0 d 533388f3 86c968 [Vision 968 VRAM] rev 3 0 d 53338900 86c755 [Trio 64V2/DX] 0 s 5333890053338900 86C775 Trio64V2/DX 0 -d 53338901 86c775/86c785 Trio 64V2/DX or /GX 0 +d 53338901 86c775/86c785 [Trio 64V2/DX or /GX] 0 s 5333890153338901 86C775 Trio64V2/DX, 86C785 Trio64V2/GX 0 d 53338902 Plato/PX 0 d 53338903 Trio 3D business multimedia 0 @@ -5334,11 +6050,11 @@ d 53338a13 86c368 [Trio 3D/2X] 0 s 53338a1353338a13 Trio3D/2X 0 d 53338a20 86c794 [Savage 3D] 0 s 53338a2053338a20 86C391 Savage3D 0 -d 53338a21 86c795 [Savage 3D/MV] 0 +d 53338a21 86c390 [Savage 3D/MV] 0 s 53338a2153338a21 86C390 Savage3D/MV 0 d 53338a22 Savage 4 0 -s 53338a2210338068 Savage 4 1 -s 53338a2210338069 Savage 4 1 +s 53338a2210338068 Savage 4 0 +s 53338a2210338069 Savage 4 0 s 53338a22105d0018 SR9 8Mb SDRAM 0 s 53338a22105d002a SR9 Pro 16Mb SDRAM 0 s 53338a22105d003a SR9 Pro 32Mb SDRAM 0 @@ -5370,13 +6086,32 @@ d 53338a25 ProSavage PM133 0 d 53338a26 ProSavage KM133 0 d 53338c00 ViRGE/M3 0 d 53338c01 ViRGE/MX 0 -s 53338c0111790001 ViRGE MX 1 +s 53338c0111790001 ViRGE/MX 0 d 53338c02 ViRGE/MX+ 0 d 53338c03 ViRGE/MX+MV 0 d 53338c10 86C270-294 Savage/MX-MV 0 d 53338c11 82C270-294 Savage/MX 0 d 53338c12 86C270-294 Savage/IX-MV 0 +s 53338c121014017f ThinkPad T20 0 d 53338c13 86C270-294 Savage/IX 0 +d 53338c22 SuperSavage MX/128 0 +d 53338c24 SuperSavage MX/64 0 +d 53338c26 SuperSavage MX/64C 0 +d 53338c2a SuperSavage IX/128 SDR 0 +d 53338c2b SuperSavage IX/128 DDR 0 +d 53338c2c SuperSavage IX/64 SDR 0 +d 53338c2d SuperSavage IX/64 DDR 0 +d 53338c2e SuperSavage IX/C SDR 0 +s 53338c2e101401fc ThinkPad T23 (2647-4MG) 0 +d 53338c2f SuperSavage IX/C DDR 0 +d 53338d01 VT8603 [ProSavage PN133] AGP4X VGA Controller (Twister) 0 Integrated in VIA ProSavage PN133 North Bridge +d 53338d01 86C380 [ProSavageDDR K4M266] 1 Update: Ignore previous submission, hit the jackpot on S3's site. The VTxxx numbers are all wrong. +d 53338d01 VT8603 [ProSavage PN133 (Twister)] 1 Update: remove overly extraneous and redundant info +d 53338d02 VT8636A [ProSavage KN133] AGP4X VGA Controller (TwisterK) 0 +d 53338d02 VT8636A [ProSavage KN133 (Twister)] 1 Update: remove overly extraneous and redundant info +d 53338d03 VT8751 [ProSavageDDR P4M266] 1 Update: 0x8d04 is actually 0x8d03 from XFree86 savage driver source +d 53338d04 VT8751 [ProSavageDDR P4M266] VGA Controller 0 +d 53338d04 [ProSavageDDR K4M266] 1 Update: 0x8d04 is the AMD "K" variant of 8d03, don't have complete info yet, will update in future d 53339102 86C410 Savage 2000 0 s 5333910210925932 Viper II Z200 0 s 5333910210925934 Viper II Z200 0 @@ -5411,6 +6146,7 @@ d 80080010 WDOG1 [PCI-Watchdog 1] 0 d 80080011 PWDOG2 [PCI-Watchdog 2] 0 v 8086 Intel Corp. 0 d 80860007 82379AB 0 +d 80860008 Extended Express System Support Controller 0 d 80860039 21145 0 d 80860122 82437FX 0 d 80860482 82375EB 0 @@ -5421,83 +6157,92 @@ d 808604a3 82434LX [Mercury/Neptune] 0 d 808604d0 82437FX [Triton FX] 0 d 80860600 RAID Controller 0 d 80860960 80960RP [i960 RP Microprocessor/Bridge] 0 -d 80860962 80960RM [i960RM Bridge] 1 From SuperTrak SX6000 +d 80860962 80960RM [i960RM Bridge] 0 d 80860964 80960RP [i960 RP Microprocessor/Bridge] 0 d 80861000 82542 Gigabit Ethernet Controller 0 -s 808610000e11b0df NC6132 Gigabit Module (1000-SX) 0 -s 808610000e11b0e0 NC6133 Gigabit Module (1000-LX) 0 -s 808610000e11b123 NC6134 Gigabit NIC (1000-SX) 0 +s 808610000e11b0df NC1632 Gigabit Ethernet Adapter (1000-SX) 0 +s 808610000e11b0e0 NC1633 Gigabit Ethernet Adapter (1000-LX) 0 +s 808610000e11b123 NC1634 Gigabit Ethernet Adapter (1000-SX) 0 s 8086100010140119 Netfinity Gigabit Ethernet SX Adapter 0 -s 8086100080861000 EtherExpress PRO/1000 Gigabit Server Adapter 0 -s 8086100080861000 PRO/1000 Gigabit Server Adapter 1 Intel never used the EtherExpress name on the PRO/1000 product line -d 80861001 82543GC Gigabit Ethernet Controller (fiber) 0 +s 8086100080861000 PRO/1000 Gigabit Server Adapter 0 +d 80861001 82543GC Gigabit Ethernet Controller (Fiber) 0 s 808610010e11004a NC6136 Gigabit Server Adapter 0 s 80861001101401ea Netfinity Gigabit Ethernet SX Adapter 0 -s 8086100180861003 PRO/1000 Gigabit Server Adapter 0 -s 8086100180861003 PRO/1000 F Server Adapter 1 -d 80861002 Pro 100 LAN Modem 56 Cardbus II 0 -d 80861002 1 -s 808610028086200e Pro 100 LAN Modem 56 Cardbus II 0 -s 8086100280862013 Pro 100 SR Mobile Combo Adapter 1 -s 8086100280862017 Pro 100 S Combo Mobile Adapter 1 -d 80861004 82543GC Gigabit Ethernet Controller (copper) 0 +s 8086100180861003 PRO/1000 F Server Adapter 0 +d 80861002 Pro 100 LAN+Modem 56 Cardbus II 0 +s 808610028086200e Pro 100 LAN+Modem 56 Cardbus II 0 +s 8086100280862013 Pro 100 SR Mobile Combo Adapter 0 +s 8086100280862017 Pro 100 S Combo Mobile Adapter 0 +d 80861004 82543GC Gigabit Ethernet Controller (Copper) 0 s 808610040e110049 NC7132 Gigabit Upgrade Module 0 s 808610040e11b1a4 NC7131 Gigabit Server Adapter 0 -s 80861004101410f2 Gigabit Ethernet Server Adapter 1 -s 8086100480861004 PRO/1000 Gigabit Server Adapter 0 -s 8086100480861004 PRO/1000 T Server Adapter 1 -s 8086100480862004 PRO/1000 T Server Adapter 1 -s 8086100480862004 PRO/1000 Gigabit Server Adapter 1 -d 80861008 82544EI Gigabit Ethernet Controller (copper) 0 -s 8086100880861107 PRO/1000 XT Server Adapter 1 -s 8086100880861107 PRO/1000 Gigabit Server Adapter 1 -s 8086100880862107 PRO/1000 XT Server Adapter 1 -s 8086100880862107 PRO/1000 Gigabit Server Adapter 1 -s 8086100880862110 PRO/1000 XT Server Adapter 1 -s 8086100880862110 PRO/1000 XT Desktop Adapter 1 -d 80861009 82544EI Gigabit Ethernet Controller (fiber) 0 -s 8086100980861109 PRO/1000 Gigabit Server Adapter 0 -s 8086100980861109 PRO/1000 XF Server Adapter 1 -s 8086100980862109 PRO/1000 XF Server Adapter 1 -d 8086100c 82544GC Gigabit Ethernet Controller 0 -s 8086100c80861109 PRO/1000 T Desktop Adapter 1 -s 8086100c80861109 1 -s 8086100c80861112 PRO/1000 Gigabit Desktop Adapter 1 -s 8086100c80861112 PRO/1000 T Desktop Adapter 1 -s 8086100c80862109 PRO/1000 T Desktop Adapter 1 -s 8086100c80862109 1 -s 8086100c80862112 PRO/1000 Gigabit Desktop Adapter 1 -s 8086100c80862112 PRO/1000 T Desktop Adapter 1 -d 8086100d 82544GC Gigabit Ethernet Controller 0 -s 8086100d8086110d 82544GC Gigabit Ethernet Controller 1 +s 80861004101410f2 Gigabit Ethernet Server Adapter 0 +s 8086100480861004 PRO/1000 T Server Adapter 0 +s 8086100480862004 PRO/1000 T Server Adapter 0 +d 80861008 82544EI Gigabit Ethernet Controller (Copper) 0 +s 8086100880861107 PRO/1000 XT Server Adapter 0 +s 8086100880862107 PRO/1000 XT Server Adapter 0 +s 8086100880862110 PRO/1000 XT Server Adapter 0 +d 80861009 82544EI Gigabit Ethernet Controller (Fiber) 0 +s 8086100980861109 PRO/1000 XF Server Adapter 0 +s 8086100980862109 PRO/1000 XF Server Adapter 0 +d 8086100c 82544GC Gigabit Ethernet Controller (Copper) 0 +s 8086100c80861112 PRO/1000 T Desktop Adapter 0 +s 8086100c80862112 PRO/1000 T Desktop Adapter 0 +d 8086100d 82544GC Gigabit Ethernet Controller (LOM) 0 +d 8086100e 82540EM Gigabit Ethernet Controller 0 +s 8086100e8086001e PRO/1000 MT Desktop Adapter 0 +s 8086100e8086002e PRO/1000 MT Desktop Adapter 0 +d 8086100f 82545EM Gigabit Ethernet Controller (Copper) 0 +s 8086100f80861001 PRO/1000 MT Server Adapter 0 +d 80861010 82546EB Gigabit Ethernet Controller (Copper) 0 +s 8086101080861011 PRO/1000 MT Dual Port Server Adapter 0 +d 80861011 82545EM Gigabit Ethernet Controller (Fiber) 0 +s 8086101180861002 PRO/1000 MF Server Adapter 0 +d 80861012 82546EB Gigabit Ethernet Controller (Fiber) 0 +s 8086101280861012 PRO/1000 MF Dual Port Server Adapter 0 +d 80861015 82540EM Gigabit Ethernet Controller (LOM) 0 d 80861029 82559 Ethernet Controller 0 d 80861030 82559 InBusiness 10/100 0 -d 80861031 82801CAM (ICH3) Chipset Ethernet Controller 0 -d 80861031 EtherExpress PRO/100 VE Network Connection 1 -s 8086103110140209 EtherExpress PRO/100 VE Network Connection 1 -s 80861031107b5350 EtherExpress PRO/100 VE Network Connection 1 -s 8086103111790001 EtherExpress PRO/100 VE Network Connection 1 -s 80861031144dc000 EtherExpress PRO/100 VE Network Connection 1 -s 80861031144dc001 EtherExpress PRO/100 VE Network Connection 1 -s 80861031144dc003 EtherExpress PRO/100 VE Network Connection 1 -d 80861032 82801CAM (ICH3) Chipset Ethernet Controller 0 -d 80861032 EtherExpress PRO/100 VE Network Connection 1 -d 80861033 82801CAM (ICH3) Chipset Ethernet Controller 0 -d 80861033 EtherExpress PRO/100 VM Network Connection 1 -d 80861034 82801CAM (ICH3) Chipset Ethernet Controller 0 -d 80861034 EtherExpress PRO/100 VM Network Connection 1 -d 80861035 82801CAM (ICH3) Chipset Ethernet Controller 0 -d 80861035 82562EH based Phoneline Network Connection 1 -d 80861036 82801CAM (ICH3) Chipset Ethernet Controller 0 -d 80861036 82562EH based Phoneline Network Connection 1 +d 80861031 82801CAM (ICH3) PRO/100 VE (LOM) Ethernet Controller 0 +s 8086103110140209 ThinkPad A/T/X Series 0 +s 80861031104d80e7 Vaio PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP 0 +s 80861031107b5350 EtherExpress PRO/100 VE 0 +s 8086103111790001 EtherExpress PRO/100 VE 0 +s 80861031144dc000 EtherExpress PRO/100 VE 0 +s 80861031144dc001 EtherExpress PRO/100 VE 0 +s 80861031144dc003 EtherExpress PRO/100 VE 0 +s 80861031144dc006 vpr Matrix 170B4 0 +d 80861032 82801CAM (ICH3) PRO/100 VE Ethernet Controller 0 +d 80861033 82801CAM (ICH3) PRO/100 VM (LOM) Ethernet Controller 0 +d 80861034 82801CAM (ICH3) PRO/100 VM Ethernet Controller 0 +d 80861035 82801CAM (ICH3)/82562EH (LOM) Ethernet Controller 0 +d 80861036 82801CAM (ICH3) 82562EH Ethernet Controller 0 d 80861037 82801CAM (ICH3) Chipset Ethernet Controller 0 -d 80861038 82801CAM (ICH3) Chipset Ethernet Controller 0 -d 80861038 EtherExpress PRO/100 VM Network Connection 1 +d 80861038 82801CAM (ICH3) PRO/100 VM (KM) Ethernet Controller 0 +d 80861039 82801BD PRO/100 VE (LOM) Ethernet Controller 0 +d 8086103a 82801BD PRO/100 VE (CNR) Ethernet Controller 0 +s 8086103a80861039 PRO/100 VE Network Connection 1 +d 8086103b 82801BD PRO/100 VM (LOM) Ethernet Controller 0 +d 8086103c 82801BD PRO/100 VM (CNR) Ethernet Controller 0 +d 8086103d 82801BD PRO/100 VE (MOB) Ethernet Controller 0 +d 8086103e 82801BD PRO/100 VM (MOB) Ethernet Controller 0 +d 80861040 536EP Data Fax Modem 0 +s 8086104016be1040 V.9X DSP Data Fax Modem 0 +d 80861059 82551QM Ethernet Controller 0 d 80861130 82815 815 Chipset Host Bridge and Memory Controller Hub 0 +s 8086113010251016 Travelmate 612 TX 0 +s 8086113010438027 TUSL2-C Mainboard 0 +s 80861130104d80df Vaio PCG-FX403 0 d 80861131 82815 815 Chipset AGP Bridge 0 d 80861132 82815 CGC [Chipset Graphics Controller] 0 +s 8086113210251016 Travelmate 612 TX 0 +s 80861132104d80df Vaio PCG-FX403 0 d 80861161 82806AA PCI64 Hub Advanced Programmable Interrupt Controller 0 -s 8086116180861161 82806AA PCI64 Hub - APIC 1 +s 8086116180861161 82806AA PCI64 Hub APIC 0 +d 80861162 Xscale 80200 Big Endian Companion Chip 0 +d 80861200 Intel IXP1200 Network Processor 0 +s 80861200172a0000 AEP SSL Accelerator 0 d 80861209 82559ER 0 d 80861221 82092AA_0 0 d 80861222 82092AA_1 0 @@ -5507,13 +6252,13 @@ d 80861226 82596 PRO/10 PCI 0 d 80861227 82865 EtherExpress PRO/100A 0 d 80861228 82556 EtherExpress PRO/100 Smart 0 d 80861229 82557/8/9 [Ethernet Pro 100] 0 the revision field differentiates between them (1-3 is 82557, 4-5 is 82558, 6-8 is 82559, 9 is 82559ER) -s 808612290e113001 82559 Fast Ethernet LOM with Alert on LAN* 1 -s 808612290e113002 82559 Fast Ethernet LOM with Alert on LAN* 1 -s 808612290e113003 82559 Fast Ethernet LOM with Alert on LAN* 1 -s 808612290e113004 82559 Fast Ethernet LOM with Alert on LAN* 1 -s 808612290e113005 82559 Fast Ethernet LOM with Alert on LAN* 1 -s 808612290e113006 82559 Fast Ethernet LOM with Alert on LAN* 1 -s 808612290e113007 82559 Fast Ethernet LOM with Alert on LAN* 1 +s 808612290e113001 82559 Fast Ethernet LOM with Alert on LAN* 0 +s 808612290e113002 82559 Fast Ethernet LOM with Alert on LAN* 0 +s 808612290e113003 82559 Fast Ethernet LOM with Alert on LAN* 0 +s 808612290e113004 82559 Fast Ethernet LOM with Alert on LAN* 0 +s 808612290e113005 82559 Fast Ethernet LOM with Alert on LAN* 0 +s 808612290e113006 82559 Fast Ethernet LOM with Alert on LAN* 0 +s 808612290e113007 82559 Fast Ethernet LOM with Alert on LAN* 0 s 808612290e11b01e NC3120 Fast Ethernet NIC 0 s 808612290e11b01f NC3122 Fast Ethernet NIC (dual port) 0 s 808612290e11b02f NC1120 Ethernet NIC 0 @@ -5529,53 +6274,48 @@ s 808612290e11b13c NC3162 Fast Ethernet NIC (embedded) 0 s 808612290e11b144 NC3123 Fast Ethernet NIC (WOL) 0 s 808612290e11b163 NC3134 Fast Ethernet NIC (dual port) 0 s 808612290e11b164 NC3135 Fast Ethernet Upgrade Module (dual port) 0 +s 808612290e11b1a4 NC7131 Gigabit Server Adapter 0 s 808612291014005c 82558B Ethernet Pro 10/100 0 -s 80861229101401bc 82559 Fast Ethernet LAN On Motherboard 1 -s 80861229101401f1 10/100 Ethernet Server Adapter 1 -s 80861229101401f2 10/100 Ethernet Server Adapter 1 -s 8086122910140207 Ethernet Pro/100 S Network Connection 1 -s 8086122910140232 10/100 Dual Port Server Adapter 1 +s 80861229101401bc 82559 Fast Ethernet LAN On Motherboard 0 +s 80861229101401f1 10/100 Ethernet Server Adapter 0 +s 80861229101401f2 10/100 Ethernet Server Adapter 0 +s 8086122910140207 Ethernet Pro/100 S 0 +s 8086122910140232 10/100 Dual Port Server Adapter 0 +s 808612291014023a ThinkPad R30 0 s 808612291014105c Netfinity 10/100 0 -s 808612291014305c 10/100 EtherJet Management Adapter 1 -s 808612291014405c 10/100 EtherJet Adapter with Alert on LAN 1 -s 808612291014505c 10/100 10/100 EtherJet Secure Management Adapter 1 -s 808612291014605c 10/100 10/100 EtherJet Secure Management Adapter 1 -s 808612291014705c 10/100 Netfinity 10/100 Ethernet Security Adapter 1 -s 808612291014805c 10/100 Netfinity 10/100 Ethernet Security Adapter 1 +s 8086122910142205 ThinkPad A22p 0 +s 808612291014305c 10/100 EtherJet Management Adapter 0 +s 808612291014405c 10/100 EtherJet Adapter with Alert on LAN 0 +s 808612291014505c 10/100 EtherJet Secure Management Adapter 0 +s 808612291014605c 10/100 EtherJet Secure Management Adapter 0 +s 808612291014705c 10/100 Netfinity 10/100 Ethernet Security Adapter 0 +s 808612291014805c 10/100 Netfinity 10/100 Ethernet Security Adapter 0 +s 808612291028009b PowerEdge 2550 0 s 8086122910338000 PC-9821X-B06 0 -s 8086122910338000 PC-9821X-B06 (82557C) 1 s 8086122910338016 PK-UG-X006 0 -s 8086122910338016 PK-UG-X006 (82558A) 1 s 808612291033801f PK-UG-X006 0 -s 808612291033801f PK-UG-X006 (82558B) 1 -s 8086122910338026 PK-UG-X006 (82558B) 1 -s 8086122910338063 82559-based Fast Ethernet Adapter 1 -s 8086122910338064 82559-based Fast Ethernet Adapter 1 -s 80861229103c10c0 Ethernet Pro 10/100TX 0 -s 80861229103c10c0 NetServer 10/100TX 1 -s 80861229103c10c3 Ethernet Pro 10/100TX 0 -s 80861229103c10c3 NetServer 10/100TX 1 -s 80861229103c10ca NetServer 10/100TX 1 -s 80861229103c10cb NetServer 10/100TX 1 -s 80861229103c10e3 NetServer 10/100TX 1 -s 80861229103c10e4 NetServer 10/100TX 1 -s 80861229103c1200 Ethernet Pro 10/100TX 0 -s 80861229103c1200 NetServer 10/100TX 1 +s 8086122910338026 PK-UG-X006 0 +s 8086122910338063 82559-based Fast Ethernet Adapter 0 +s 8086122910338064 82559-based Fast Ethernet Adapter 0 +s 80861229103c10c0 NetServer 10/100TX 0 +s 80861229103c10c3 NetServer 10/100TX 0 +s 80861229103c10ca NetServer 10/100TX 0 +s 80861229103c10cb NetServer 10/100TX 0 +s 80861229103c10e3 NetServer 10/100TX 0 +s 80861229103c10e4 NetServer 10/100TX 0 +s 80861229103c1200 NetServer 10/100TX 0 s 8086122910c31100 SmartEther100 SC1100 0 -s 8086122910c31100 SmartEther100 SC1100 (82557C) 1 -s 8086122910cf1115 8255x-based Ethernet Adapter (10/100) 1 -s 8086122910cf1143 8255x-based Ethernet Adapter (10/100) 1 -s 8086122911790001 8255x-based Ethernet Adapter (10/100) 1 +s 8086122910cf1115 8255x-based Ethernet Adapter (10/100) 0 +s 8086122910cf1143 8255x-based Ethernet Adapter (10/100) 0 +s 8086122911790001 8255x-based Ethernet Adapter (10/100) 0 s 8086122911790002 PCI FastEther LAN on Docker 0 -s 8086122911790003 8255x-based Fast Ethernet 1 +s 8086122911790003 8255x-based Fast Ethernet 0 s 8086122912592560 AT-2560 100 0 -s 8086122912592560 AT-2560 100 (82557C) 1 s 8086122912592561 AT-2560 100 FX Ethernet Adapter 0 -s 8086122912592561 AT-2560 100 FX Ethernet Adapter (82557C) 1 s 8086122912660001 NE10/100 Adapter 0 -s 8086122912660001 NE10/100 Adapter (82557C) 1 -s 80861229144d2501 SEM-2000 MiniPCI LAN Adapter 1 -s 80861229144d2502 SEM-2100IL MiniPCI LAN Adapter 1 +s 80861229144d2501 SEM-2000 MiniPCI LAN Adapter 0 +s 80861229144d2502 SEM-2100IL MiniPCI LAN Adapter 0 +s 8086122916681100 EtherExpress PRO/100B (TX) (MiniPCI Ethernet+Modem) 0 s 8086122980860001 EtherExpress PRO/100B (TX) 0 s 8086122980860002 EtherExpress PRO/100B (T4) 0 s 8086122980860003 EtherExpress PRO/10+ 0 @@ -5589,84 +6329,77 @@ s 808612298086000a EtherExpress PRO/100+ Management Adapter 0 s 808612298086000b EtherExpress PRO/100+ 0 s 808612298086000c EtherExpress PRO/100+ Management Adapter 0 s 808612298086000d EtherExpress PRO/100+ Alert On LAN II* Adapter 0 -s 808612298086000d EtherExpress PRO/100 Alert On LAN* 2 Management Adapter 1 s 808612298086000e EtherExpress PRO/100+ Management Adapter with Alert On LAN* 0 -s 808612298086000e EtherExpress PRO/100 Alert on LAN* Management Adapter 1 -s 808612298086000f EtherExpress PRO/100 Desktop Adapter 1 -s 8086122980860010 EtherExpress PRO/100 S Management Adapter 1 -s 8086122980860011 EtherExpress PRO/100 S Management Adapter 1 -s 8086122980860012 EtherExpress PRO/100 S Advanced Management Adapter (D) 1 -s 8086122980860013 EtherExpress PRO/100 S Advanced Management Adapter (E) 1 -s 8086122980860030 EtherExpress PRO/100 Management Adapter with Alert On LAN* GC 1 -s 8086122980860031 EtherExpress PRO/100 Desktop Adapter 1 -s 8086122980860040 EtherExpress PRO/100 S Desktop Adapter 1 -s 8086122980860041 EtherExpress PRO/100 S Desktop Adapter 1 -s 8086122980860042 EtherExpress PRO/100 Desktop Adapter 1 -s 8086122980860050 EtherExpress PRO/100 S Desktop Adapter 1 +s 808612298086000f EtherExpress PRO/100 Desktop Adapter 0 +s 8086122980860010 EtherExpress PRO/100 S Management Adapter 0 +s 8086122980860011 EtherExpress PRO/100 S Management Adapter 0 +s 8086122980860012 EtherExpress PRO/100 S Advanced Management Adapter (D) 0 +s 8086122980860013 EtherExpress PRO/100 S Advanced Management Adapter (E) 0 +s 8086122980860030 EtherExpress PRO/100 Management Adapter with Alert On LAN* GC 0 +s 8086122980860031 EtherExpress PRO/100 Desktop Adapter 0 +s 8086122980860040 EtherExpress PRO/100 S Desktop Adapter 0 +s 8086122980860041 EtherExpress PRO/100 S Desktop Adapter 0 +s 8086122980860042 EtherExpress PRO/100 Desktop Adapter 0 +s 8086122980860050 EtherExpress PRO/100 S Desktop Adapter 0 s 8086122980861009 EtherExpress PRO/100+ Server Adapter 0 s 808612298086100c EtherExpress PRO/100+ Server Adapter (PILA8470B) 0 -s 8086122980861012 EtherExpress PRO/100 S Server Adapter (D) 1 -s 8086122980861013 EtherExpress PRO/100 S Server Adapter (E) 1 -s 8086122980861015 EtherExpress PRO/100 S Dual Port Server Adapter 1 -s 8086122980861017 EtherExpress PRO/100 Dual Port Server Adapter 1 -s 8086122980861030 EtherExpress PRO/100 Management Adapter with Alert On LAN* G Server 1 -s 8086122980861040 EtherExpress PRO/100 S Server Adapter 1 -s 8086122980861041 EtherExpress PRO/100 S Server Adapter 1 -s 8086122980861042 EtherExpress PRO/100 Server Adapter 1 -s 8086122980861050 EtherExpress PRO/100 S Server Adapter 1 -s 8086122980861051 EtherExpress PRO/100 Server Adapter 1 -s 8086122980861052 EtherExpress PRO/100 Server Adapter 1 +s 8086122980861012 EtherExpress PRO/100 S Server Adapter (D) 0 +s 8086122980861013 EtherExpress PRO/100 S Server Adapter (E) 0 +s 8086122980861015 EtherExpress PRO/100 S Dual Port Server Adapter 0 +s 8086122980861017 EtherExpress PRO/100+ Dual Port Server Adapter 0 +s 8086122980861030 EtherExpress PRO/100+ Management Adapter with Alert On LAN* G Server 0 +s 8086122980861040 EtherExpress PRO/100 S Server Adapter 0 +s 8086122980861041 EtherExpress PRO/100 S Server Adapter 0 +s 8086122980861042 EtherExpress PRO/100 Server Adapter 0 +s 8086122980861050 EtherExpress PRO/100 S Server Adapter 0 +s 8086122980861051 EtherExpress PRO/100 Server Adapter 0 +s 8086122980861052 EtherExpress PRO/100 Server Adapter 0 s 80861229808610f0 EtherExpress PRO/100+ Dual Port Adapter 0 -s 80861229808610f0 EtherExpress PRO/100 Dual Port Server Adapter 1 -s 8086122980862009 EtherExpress PRO/100 S Mobile Adapter 1 +s 8086122980862009 EtherExpress PRO/100 S Mobile Adapter 0 s 808612298086200d EtherExpress PRO/100 Cardbus 0 -s 808612298086200d EtherExpress PRO/100 Cardbus II 1 s 808612298086200e EtherExpress PRO/100 LAN+V90 Cardbus Modem 0 -s 808612298086200e EtherExpress PRO/100 LAN Modem56 Cardbus II 1 -s 808612298086200f EtherExpress PRO/100 SR Mobile Adapter 1 -s 8086122980862010 EtherExpress PRO/100 S Mobile Combo Adapter 1 -s 8086122980862013 EtherExpress PRO/100 SR Mobile Combo Adapter 1 -s 8086122980862016 EtherExpress PRO/100 S Mobile Adapter 1 -s 8086122980862017 EtherExpress PRO/100 S Combo Mobile Adapter 1 -s 8086122980862018 EtherExpress PRO/100 SR Mobile Adapter 1 -s 8086122980862019 EtherExpress PRO/100 SR Combo Mobile Adapter 1 -s 8086122980862101 EtherExpress PRO/100 P Mobile Adapter 1 -s 8086122980862102 EtherExpress PRO/100 SP Mobile Adapter 1 -s 8086122980862103 EtherExpress PRO/100 SP Mobile Adapter 1 -s 8086122980862104 EtherExpress PRO/100 SP Mobile Adapter 1 -s 8086122980862105 EtherExpress PRO/100 SP Mobile Adapter 1 -s 8086122980862106 EtherExpress PRO/100 P Mobile Adapter 1 -s 8086122980862107 EtherExpress PRO/100 Network Connection 1 -s 8086122980862108 EtherExpress PRO/100 Network Connection 1 -s 8086122980862200 EtherExpress PRO/100 P Mobile Combo Adapter 1 -s 8086122980862201 EtherExpress PRO/100 P Mobile Combo Adapter 1 -s 8086122980862202 EtherExpress PRO/100 SP Mobile Combo Adapter 1 -s 8086122980862203 EtherExpress PRO/100 MiniPCI 1 -s 8086122980862204 EtherExpress PRO/100 MiniPCI 1 -s 8086122980862205 EtherExpress PRO/100 SP Mobile Combo Adapter 1 -s 8086122980862206 EtherExpress PRO/100 SP Mobile Combo Adapter 1 -s 8086122980862207 EtherExpress PRO/100 SP Mobile Combo Adapter 1 -s 8086122980862208 EtherExpress PRO/100 P Mobile Combo Adapter 1 -s 8086122980862402 EtherExpress PRO/100 MiniPCI 1 -s 8086122980862407 EtherExpress PRO/100 MiniPCI 1 -s 8086122980862408 EtherExpress PRO/100 MiniPCI 1 -s 8086122980862409 EtherExpress PRO/100 MiniPCI 1 -s 808612298086240f EtherExpress PRO/100 MiniPCI 1 -s 8086122980862410 EtherExpress PRO/100 MiniPCI 1 -s 8086122980862411 EtherExpress PRO/100 MiniPCI 1 -s 8086122980862412 EtherExpress PRO/100 MiniPCI 1 -s 8086122980862413 EtherExpress PRO/100 MiniPCI 1 +s 808612298086200f EtherExpress PRO/100 SR Mobile Adapter 0 +s 8086122980862010 EtherExpress PRO/100 S Mobile Combo Adapter 0 +s 8086122980862013 EtherExpress PRO/100 SR Mobile Combo Adapter 0 +s 8086122980862016 EtherExpress PRO/100 S Mobile Adapter 0 +s 8086122980862017 EtherExpress PRO/100 S Combo Mobile Adapter 0 +s 8086122980862018 EtherExpress PRO/100 SR Mobile Adapter 0 +s 8086122980862019 EtherExpress PRO/100 SR Combo Mobile Adapter 0 +s 8086122980862101 EtherExpress PRO/100 P Mobile Adapter 0 +s 8086122980862102 EtherExpress PRO/100 SP Mobile Adapter 0 +s 8086122980862103 EtherExpress PRO/100 SP Mobile Adapter 0 +s 8086122980862104 EtherExpress PRO/100 SP Mobile Adapter 0 +s 8086122980862105 EtherExpress PRO/100 SP Mobile Adapter 0 +s 8086122980862106 EtherExpress PRO/100 P Mobile Adapter 0 +s 8086122980862107 EtherExpress PRO/100 Network Connection 0 +s 8086122980862108 EtherExpress PRO/100 Network Connection 0 +s 8086122980862200 EtherExpress PRO/100 P Mobile Combo Adapter 0 +s 8086122980862201 EtherExpress PRO/100 P Mobile Combo Adapter 0 +s 8086122980862202 EtherExpress PRO/100 SP Mobile Combo Adapter 0 +s 8086122980862203 EtherExpress PRO/100+ MiniPCI 0 +s 8086122980862204 EtherExpress PRO/100+ MiniPCI 0 +s 8086122980862205 EtherExpress PRO/100 SP Mobile Combo Adapter 0 +s 8086122980862206 EtherExpress PRO/100 SP Mobile Combo Adapter 0 +s 8086122980862207 EtherExpress PRO/100 SP Mobile Combo Adapter 0 +s 8086122980862208 EtherExpress PRO/100 P Mobile Combo Adapter 0 +s 8086122980862402 EtherExpress PRO/100+ MiniPCI 0 +s 8086122980862407 EtherExpress PRO/100+ MiniPCI 0 +s 8086122980862408 EtherExpress PRO/100+ MiniPCI 0 +s 8086122980862409 EtherExpress PRO/100+ MiniPCI 0 +s 808612298086240f EtherExpress PRO/100+ MiniPCI 0 +s 8086122980862410 EtherExpress PRO/100+ MiniPCI 0 +s 8086122980862411 EtherExpress PRO/100+ MiniPCI 0 +s 8086122980862412 EtherExpress PRO/100+ MiniPCI 0 +s 8086122980862413 EtherExpress PRO/100+ MiniPCI 0 s 8086122980863000 82559 Fast Ethernet LAN on Motherboard 0 s 8086122980863001 82559 Fast Ethernet LOM with Basic Alert on LAN* 0 -s 8086122980863001 82559 Fast Ethernet LOM with Alert on LAN* 1 s 8086122980863002 82559 Fast Ethernet LOM with Alert on LAN II* 0 -s 8086122980863002 82559 Fast Ethernet LOM with Alert on LAN* 2 1 -s 8086122980863006 EtherExpress PRO/100 S Network Connection 1 -s 8086122980863007 EtherExpress PRO/100 S Network Connection 1 -s 8086122980863008 EtherExpress PRO/100 Network Connection 1 -s 8086122980863010 EtherExpress PRO/100 S Network Connection 1 -s 8086122980863011 EtherExpress PRO/100 S Network Connection 1 -s 8086122980863012 EtherExpress PRO/100 Network Connection 1 +s 8086122980863006 EtherExpress PRO/100 S Network Connection 0 +s 8086122980863007 EtherExpress PRO/100 S Network Connection 0 +s 8086122980863008 EtherExpress PRO/100 Network Connection 0 +s 8086122980863010 EtherExpress PRO/100 S Network Connection 0 +s 8086122980863011 EtherExpress PRO/100 S Network Connection 0 +s 8086122980863012 EtherExpress PRO/100 Network Connection 0 d 8086122d 430FX - 82437FX TSC [Triton I] 0 d 8086122e 82371FB PIIX ISA [Triton I] 0 d 80861230 82371FB PIIX IDE [Triton I] 0 @@ -5684,6 +6417,12 @@ d 8086124b 82380FB 0 d 80861250 430HX - 82439HX TXC [Triton II] 0 d 80861360 82806AA PCI64 Hub PCI Bridge 0 d 80861361 82806AA PCI64 Hub Controller (HRes) 0 +s 8086136180861361 82806AA PCI64 Hub Controller (HRes) 0 +s 8086136180868000 82806AA PCI64 Hub Controller (HRes) 0 +d 80861460 82870P2 P64H2 Hub PCI Bridge 0 +d 80861461 82870P2 P64H2 I/OxAPIC 0 +s 8086146115d93480 P4DP6 1 +d 80861462 82870P2 P64H2 Hot Plug Controller 0 d 80861960 80960RP [i960RP Microprocessor] 0 s 80861960101e0431 MegaRAID 431 RAID Controller 0 s 80861960101e0438 MegaRAID 438 Ultra2 LVD RAID Controller 0 @@ -5705,8 +6444,8 @@ s 80861960105a5168 SuperTrak66/100 0 s 8086196011111111 MegaRAID 466, PowerEdge Expandable RAID Controller 2/SC 0 s 8086196011111112 PowerEdge Expandable RAID Controller 2/SC 0 s 80861960113c03a2 MegaRAID 0 -d 80861962 80960RM [i960RM Microprocessor] 1 On SuperTrak SX6000 -s 80861962105a0000 SuperTrak I2O CPU 1 From SuperTrak SX6000 +d 80861962 80960RM [i960RM Microprocessor] 0 +s 80861962105a0000 SuperTrak SX6000 I2O CPU 0 d 80861a21 82840 840 (Carmel) Chipset Host Bridge (Hub A) 0 d 80861a23 82840 840 (Carmel) Chipset AGP Bridge 0 d 80861a24 82840 840 (Carmel) Chipset PCI Bridge (Hub B) 0 @@ -5717,6 +6456,7 @@ d 80862411 82801AA IDE 0 d 80862412 82801AA USB 0 d 80862413 82801AA SMBus 0 d 80862415 82801AA AC'97 Audio 0 +s 8086241510280095 Precision Workstation 220 Integrated Digital Audio 0 s 8086241511d40040 SoundMAX Integrated Digital Audio 0 s 8086241511d40048 SoundMAX Integrated Digital Audio 0 s 8086241511d45340 SoundMAX Integrated Digital Audio 0 @@ -5733,53 +6473,133 @@ d 80862426 82801AB AC'97 Modem 0 d 80862428 82801AB PCI Bridge 0 d 80862440 82801BA ISA Bridge (LPC) 0 d 80862442 82801BA/BAM USB (Hub #1) 0 +s 80862442101401c6 Netvista A40/A40p 1 +s 80862442104d80df Vaio PCG-FX403 0 +s 80862442147b0507 TH7II-RAID 0 d 80862443 82801BA/BAM SMBus 0 +s 80862443101401c6 Netvista A40/A40p 1 +s 8086244310251016 Travelmate 612 TX 0 +s 8086244310438027 TUSL2-C Mainboard 0 +s 80862443104d80df Vaio PCG-FX403 0 +s 80862443147b0507 TH7II-RAID 0 d 80862444 82801BA/BAM USB (Hub #2) 0 +s 8086244410251016 Travelmate 612 TX 0 +s 80862444104d80df Vaio PCG-FX403 0 +s 80862444147b0507 TH7II-RAID 0 d 80862445 82801BA/BAM AC'97 Audio 0 -d 80862446 82801BA/BAM AC'97 Modem 0 +s 80862445101401c6 Netvista A40/A40p 1 +s 8086244510251016 Travelmate 612 TX 0 +s 80862445104d80df Vaio PCG-FX403 0 +s 8086244514623370 STAC9721 AC 0 +s 80862445147b0507 TH7II-RAID 0 +d 80862446 Intel 537 [82801BA/BAM AC'97 Modem] 0 +s 8086244610251016 Travelmate 612 TX 0 +s 80862446104d80df Vaio PCG-FX403 0 d 80862448 82801BAM/CAM PCI Bridge 0 d 80862449 82801BA/BAM/CA/CAM Ethernet Controller 0 -s 808624490e110012 EtherExpress PRO/100 VM Network Connection 1 -s 808624490e110091 EtherExpress PRO/100 VE Network Connection 1 -s 80862449101401ce EtherExpress PRO/100 VE Desktop Connection 1 -s 80862449101401dc EtherExpress PRO/100 VE Desktop Connection 1 -s 80862449101401eb EtherExpress PRO/100 VE Desktop Connection 1 -s 80862449101401ec EtherExpress PRO/100 VE Desktop Connection 1 -s 8086244910140202 EtherExpress PRO/100 VE Desktop Connection 1 -s 8086244910140205 EtherExpress PRO/100 VE Desktop Connection 1 -s 8086244910140217 EtherExpress PRO/100 VE Desktop Connection 1 -s 8086244910140234 EtherExpress PRO/100 VE Desktop Connection 1 -s 808624491014023d EtherExpress PRO/100 VE Desktop Connection 1 -s 8086244910140244 EtherExpress PRO/100 VE Desktop Connection 1 -s 8086244910140245 EtherExpress PRO/100 VE Desktop Connection 1 -s 80862449109f315d EtherExpress PRO/100 VE Network Connection 1 -s 80862449109f3181 EtherExpress PRO/100 VE Network Connection 1 -s 8086244911867801 EtherExpress PRO/100 VE Adapter 1 -s 80862449144d2602 HomePNA 1M CNR 1 -s 8086244980863010 EtherExpress PRO/100 VE Desktop Adapter 1 -s 8086244980863011 EtherExpress PRO/100 VM Desktop Adapter 1 -s 8086244980863012 82562EH based Phoneline Desktop Adapter 1 -s 8086244980863013 EtherExpress PRO/100 VE Network Connection 1 -s 8086244980863014 EtherExpress PRO/100 VM Network Connection 1 -s 8086244980863015 82562EH based Phoneline Network Connection 1 -s 8086244980863016 EtherExpress PRO/100 P Mobile Combo Adapter 1 -s 8086244980863017 EtherExpress PRO/100 P Mobile Adapter 1 -s 8086244980863018 EtherExpress PRO/100 Network Connection 1 +s 808624490e110012 EtherExpress PRO/100 VM 0 +s 808624490e110091 EtherExpress PRO/100 VE 0 +s 80862449101401ce EtherExpress PRO/100 VE 0 +s 80862449101401dc EtherExpress PRO/100 VE 0 +s 80862449101401eb EtherExpress PRO/100 VE 0 +s 80862449101401ec EtherExpress PRO/100 VE 0 +s 8086244910140202 EtherExpress PRO/100 VE 0 +s 8086244910140205 EtherExpress PRO/100 VE 0 +s 8086244910140217 EtherExpress PRO/100 VE 0 +s 8086244910140234 EtherExpress PRO/100 VE 0 +s 808624491014023d EtherExpress PRO/100 VE 0 +s 8086244910140244 EtherExpress PRO/100 VE 0 +s 8086244910140245 EtherExpress PRO/100 VE 0 +s 80862449109f315d EtherExpress PRO/100 VE 0 +s 80862449109f3181 EtherExpress PRO/100 VE 0 +s 8086244911867801 EtherExpress PRO/100 VE 0 +s 80862449144d2602 HomePNA 1M CNR 0 +s 8086244980863010 EtherExpress PRO/100 VE 0 +s 8086244980863011 EtherExpress PRO/100 VM 0 +s 8086244980863012 82562EH based Phoneline 0 +s 8086244980863013 EtherExpress PRO/100 VE 0 +s 8086244980863014 EtherExpress PRO/100 VM 0 +s 8086244980863015 82562EH based Phoneline 0 +s 8086244980863016 EtherExpress PRO/100 P Mobile Combo 0 +s 8086244980863017 EtherExpress PRO/100 P Mobile 0 +s 8086244980863018 EtherExpress PRO/100 0 d 8086244a 82801BAM IDE U100 0 +s 8086244a10251016 Travelmate 612TX 0 +s 8086244a104d80df Vaio PCG-FX403 0 d 8086244b 82801BA IDE U100 0 +s 8086244b101401c6 Netvista A40/A40p 1 +s 8086244b10438027 TUSL2-C Mainboard 0 +s 8086244b147b0507 TH7II-RAID 0 d 8086244c 82801BAM ISA Bridge (LPC) 0 -d 8086244e 82801BA/CA PCI Bridge 0 +d 8086244e 82801BA/CA/DB PCI Bridge 0 +d 80862450 82801E ISA Bridge (LPC) 0 +d 80862452 82801E USB 0 +d 80862453 82801E SMBus 0 +d 80862459 82801E Ethernet Controller 0 0 +d 8086245b 82801E IDE U100 0 +d 8086245d 82801E Ethernet Controller 1 0 +d 8086245e 82801E PCI Bridge 0 d 80862480 82801CA ISA Bridge (LPC) 0 d 80862482 82801CA/CAM USB (Hub #1) 0 +s 8086248210140220 ThinkPad A/T/X Series 0 +s 80862482104d80e7 VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP 0 +s 8086248215d93480 P4DP6 1 +s 8086248280861958 vpr Matrix 170B4 0 d 80862483 82801CA/CAM SMBus 0 +s 8086248310140220 ThinkPad A/T/X Series 0 +s 80862483104d80e7 VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP 0 +s 8086248315d93480 P4DP6 1 +s 8086248380861958 vpr Matrix 170B4 0 d 80862484 82801CA/CAM USB (Hub #2) 0 +s 8086248410140220 ThinkPad A/T/X Series 0 +s 80862484104d80e7 VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP 0 +s 8086248415d93480 P4DP6 1 +s 8086248480861958 vpr Matrix 170B4 0 d 80862485 82801CA/CAM AC'97 Audio 0 +s 8086248510140222 ThinkPad T23 (2647-4MG) or A30p (2653-64G) 0 +s 8086248510140508 ThinkPad T30 0 +s 808624851014051c ThinkPad A/T/X Series 0 +s 80862485104d80e7 VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP 0 +s 80862485144dc006 vpr Matrix 170B4 0 d 80862486 82801CA/CAM AC'97 Modem 0 +s 8086248610140223 ThinkPad A/T/X Series 0 +s 8086248610140503 ThinkPad R31 2656BBG 0 +s 808624861014051a ThinkPad A/T/X Series 0 +s 80862486104d80e7 VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP 0 +s 80862486134d4c21 Dell Inspiron 2100 internal modem 0 +s 80862486144d2115 vpr Matrix 170B4 internal modem 0 +s 8086248614f15421 MD56ORD V.92 MDC Modem 0 d 80862487 82801CA/CAM USB (Hub #3) 0 +s 8086248710140220 ThinkPad A/T/X Series 0 +s 80862487104d80e7 VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP 0 +s 8086248715d93480 P4DP6 1 +s 8086248780861958 vpr Matrix 170B4 0 d 8086248a 82801CAM IDE U100 0 +s 8086248a10140220 ThinkPad A/T/X Series 0 +s 8086248a104d80e7 VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP 0 +s 8086248a80861958 vpr Matrix 170B4 0 d 8086248b 82801CA IDE U100 0 +s 8086248b15d93480 P4DP6 1 d 8086248c 82801CAM ISA Bridge (LPC) 0 +d 808624c0 82801DB ISA Bridge (LPC) 0 +s 808624c014625800 845PE Max (MS-6580) 1 +d 808624c2 82801DB USB (Hub #1) 0 +s 808624c214625800 845PE Max (MS-6580) 1 +d 808624c3 82801DB SMBus 0 +s 808624c314625800 845PE Max (MS-6580) 1 +d 808624c4 82801DB USB (Hub #2) 0 +s 808624c414625800 845PE Max (MS-6580) 1 +d 808624c5 82801DB AC'97 Audio 0 +s 808624c514625800 845PE Max (MS-6580) 1 +d 808624c6 82801DB AC'97 Modem 0 +d 808624c7 82801DB USB (Hub #3) 0 +s 808624c714625800 845PE Max (MS-6580) 1 +d 808624cb 82801DB ICH4 IDE 0 +s 808624cb14625800 845PE Max (MS-6580) 1 +d 808624cd 82801DB USB EHCI Controller 0 +s 808624cd14623981 845PE Max (MS-6580) Onboard USB EHCI Controller 1 d 80862500 82820 820 (Camino) Chipset Host Bridge (MCH) 0 +s 8086250010280095 Precision Workstation 220 Chipset 0 s 808625001043801c P3C-2000 system chipset 0 d 80862501 82820 820 (Camino) Chipset Host Bridge (MCH) 0 s 808625011043801c P3C-2000 system chipset 0 @@ -5788,14 +6608,32 @@ d 8086250f 82820 820 (Camino) Chipset AGP Bridge 0 d 80862520 82805AA MTH Memory Translator Hub 0 d 80862521 82804AA MRH-S Memory Repeater Hub for SDRAM 0 d 80862530 82850 850 (Tehama) Chipset Host Bridge (MCH) 0 -d 80862531 82850 860 (Wombat) Chipset Host Bridge (MCH) 0 -d 80862532 82850/82860 850/860 (Tehama/Wombat) Chipset AGP Bridge 0 -d 80862533 82860 860 (Wombat) Chipset PCI Bridge 0 +s 80862530147b0507 TH7II-RAID 0 +d 80862531 82860 860 (Wombat) Chipset Host Bridge (MCH) 0 +d 80862532 82850 850 (Tehama) Chipset AGP Bridge 0 +d 80862533 82860 860 (Wombat) Chipset AGP Bridge 0 d 80862534 82860 860 (Wombat) Chipset PCI Bridge 0 +d 80862540 e7500 [Plumas] DRAM Controller 0 +s 8086254015d93480 P4DP6 1 +d 80862541 e7500 [Plumas] DRAM Controller Error Reporting 0 +s 8086254115d93480 P4DP6 1 +d 80862543 e7500 [Plumas] HI_B Virtual PCI Bridge (F0) 0 +d 80862544 e7500 [Plumas] HI_B Virtual PCI Bridge (F1) 0 +d 80862545 e7500 [Plumas] HI_C Virtual PCI Bridge (F0) 0 +d 80862546 e7500 [Plumas] HI_C Virtual PCI Bridge (F1) 0 +d 80862547 e7500 [Plumas] HI_D Virtual PCI Bridge (F0) 0 +d 80862548 e7500 [Plumas] HI_D Virtual PCI Bridge (F1) 0 +d 80862560 82845G/GL [Brookdale-G] Chipset Host Bridge 0 +s 8086256014625800 845PE Max (MS-6580) 1 +d 80862561 82845G/GL [Brookdale-G] Chipset AGP Bridge 0 +d 80862562 82845G/GL [Brookdale-G] Chipset Integrated Graphics Device 0 d 80863092 Integrated RAID 0 d 80863575 82830 830 Chipset Host Bridge 0 +s 808635751014021d ThinkPad A/T/X Series 0 +s 80863575104d80e7 VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP 0 d 80863576 82830 830 Chipset AGP Bridge 0 d 80863577 82830 CGC [Chipset Graphics Controller] 0 +s 8086357710140513 ThinkPad A/T/X Series 0 d 80863578 82830 830 Chipset Host Bridge 0 d 80865200 EtherExpress PRO/100 Intelligent Server 0 d 80865201 EtherExpress PRO/100 Intelligent Server 0 @@ -5823,6 +6661,7 @@ d 80867180 440LX/EX - 82443LX/EX Host bridge 0 d 80867181 440LX/EX - 82443LX/EX AGP bridge 0 d 80867190 440BX/ZX/DX - 82443BX/ZX/DX Host bridge 0 s 808671900e110500 Armada 1750 Laptop System Chipset 0 +s 808671900e11b110 Armada M700 1 s 8086719011790001 Toshiba Tecra 8100 Laptop System Chipset 0 d 80867191 440BX/ZX/DX - 82443BX/ZX/DX AGP bridge 0 d 80867192 440BX/ZX/DX - 82443BX/ZX/DX Host bridge (AGP disabled) 0 @@ -5840,10 +6679,10 @@ d 8086719b 82440MX Power Management Controller 0 d 808671a0 440GX - 82443GX Host bridge 0 d 808671a1 440GX - 82443GX AGP bridge 0 d 808671a2 440GX - 82443GX Host bridge (AGP disabled) 0 -d 80867600 82372FB PCI to ISA Bridge 0 -d 80867601 82372FB PIIX4 IDE 0 -d 80867602 82372FB [PCI-to-USB UHCI] 0 -d 80867603 82372FB System Management Bus Controller 0 +d 80867600 82372FB PIIX5 ISA 0 +d 80867601 82372FB PIIX5 IDE 0 +d 80867602 82372FB PIIX5 USB 0 +d 80867603 82372FB PIIX5 SMBus 0 d 80867800 i740 0 s 80867800003d0008 Starfighter AGP 0 s 80867800003d000b Starfighter AGP 0 @@ -5852,21 +6691,25 @@ s 8086780010b4201a Lightspeed 740 0 s 8086780010b4202f Lightspeed 740 0 s 8086780080860000 Terminator 2x/i 0 s 8086780080860100 Intel740 Graphics Accelerator 0 -d 80868086 1 d 808684c4 450KX/GX [Orion] - 82454KX/GX PCI bridge 0 d 808684c5 450KX/GX [Orion] - 82453KX/GX Memory controller 0 d 808684ca 450NX - 82451NX Memory & I/O Controller 0 d 808684cb 450NX - 82454NX/84460GX PCI Expander Bridge 0 d 808684e0 460GX - 84460GX System Address Controller (SAC) 0 d 808684e1 460GX - 84460GX System Data Controller (SDC) 0 -d 808684e2 460GX - 84460GX AGP Bridge (GXB) 0 +d 808684e2 460GX - 84460GX AGP Bridge (GXB function 2) 0 d 808684e3 460GX - 84460GX Memory Address Controller (MAC) 0 d 808684e4 460GX - 84460GX Memory Data Controller (MDC) 0 d 808684e6 460GX - 82466GX Wide and fast PCI eXpander Bridge (WXB) 0 +d 808684ea 460GX - 84460GX AGP Bridge (GXB function 1) 0 d 80869621 Integrated RAID 0 d 80869622 Integrated RAID 0 d 80869641 Integrated RAID 0 d 808696a1 Integrated RAID 0 +d 8086b152 21152 PCI-to-PCI Bridge 0 +d 8086b154 21154 PCI-to-PCI Bridge 0 observed, and documented in Intel revision note; new mask of 1011:0026 +d 8086b555 21555 Non transparent PCI-to-PCI Bridge 0 +s 8086b555e4bf1000 CC8-1-BLUES 0 d 8086ffff 450NX/GX [Orion] - 82453KX/GX Memory controller [BUG] 0 v 8800 Trigem Computer Inc. 0 d 88002008 Video assistent component 0 @@ -5894,6 +6737,9 @@ d 90045475 AIC-755x 0 d 90045478 AIC-7850 0 d 90045575 AVA-2930 0 d 90045578 AIC-7855 0 +d 90045647 ANA-7711 TCP Offload Engine 0 +s 9004564790047710 ANA-7711F TCP Offload Engine - Optical 0 +s 9004564790047711 ANA-7711LP TCP Offload Engine - Copper 0 d 90045675 AIC-755x 0 d 90045678 AIC-7856 0 d 90045775 AIC-755x 0 @@ -6011,13 +6857,41 @@ d 90050081 AIC-7892B U160/m 0 s 90050081900562a1 19160 Ultra160 SCSI Controller 0 d 90050083 AIC-7892D U160/m 0 d 9005008f AIC-7892P U160/m 0 +s 9005008f15d99005 Onboard SCSI Host Adapter 1 d 900500c0 AHA-3960D / AIC-7899A U160/m 0 s 900500c00e11f620 Compaq 64-Bit/66MHz Dual Channel Wide Ultra3 SCSI Adapter 0 s 900500c09005f620 AHA-3960D U160/m 0 d 900500c1 AIC-7899B U160/m 0 d 900500c3 AIC-7899D U160/m 0 d 900500c5 RAID subsystem HBA 0 +s 900500c5102800c5 PowerEdge 2550 0 d 900500cf AIC-7899P U160/m 0 +s 900500cf102800d1 PowerEdge 2550 0 +s 900500cf10f12462 Thunder K7 S2462 1 +s 900500cf15d99005 Onboard SCSI Host Adapter 1 +d 90050250 ServeRAID Controller 0 +s 9005025010140279 ServeRAID-xx 0 +s 900502501014028c ServeRAID-xx 0 +d 90050285 AAC-RAID 0 +s 9005028510280287 PowerEdge Expandable RAID Controller 320/DC 0 +d 90058000 ASC-29320A U320 0 +d 9005800f AIC-7901 U320 0 +d 90058010 ASC-39320 U320 0 +d 90058011 ASC-32320D U320 0 +s 900580110e1100ac U320 0 +s 9005801190050041 ASC-39320D U320 0 +d 90058012 ASC-29320 U320 0 +d 90058013 ASC-29320B U320 0 +d 90058014 ASC-29320LP U320 0 +d 9005801e AIC-7901A U320 0 +d 9005801f AIC-7902 U320 0 +d 90058090 ASC-39320 U320 w/HostRAID 0 +d 90058091 ASC-39320D U320 w/HostRAID 0 +d 90058092 ASC-29320 U320 w/HostRAID 0 +d 90058093 ASC-29320B U320 w/HostRAID 0 +d 90058094 ASC-29320LP U320 w/HostRAID 0 +d 9005809e AIC-7901A U320 w/HostRAID 0 +d 9005809f AIC-7902 U320 w/HostRAID 0 v 907f Atronics 0 d 907f2015 IDE-2015PL 0 v 919a Gigapixel Corp 0 @@ -6027,7 +6901,7 @@ v 9699 Omni Media Technology Inc 0 d 96996565 6565 0 v 9710 NetMos Technology 0 d 97109815 VScom 021H-EP2 2 port parallel adaptor 0 -d 97109835 2xserial 1xparallel port adapter 0 +d 97109835 222N-2 I/O Card (2S+1P) 0 v a0a0 AOPEN Inc. 0 v a0f1 UNISYS Corporation 0 v a200 NEC Corporation 0 @@ -6038,6 +6912,7 @@ v a727 3Com Corporation 0 v aa42 Scitex Digital Video 0 v ac1e Digital Receiver Technology Inc 0 v b1b3 Shiva Europe Limited 0 +v bd11 Pinnacle Systems, Inc. (Wrong ID) 0 Pinnacle should be 11bd, but they got it wrong several times --mj v c001 TSI Telsys 0 v c0a9 Micron/Crucial Technology 0 v c0de Motorola 0 @@ -6045,30 +6920,64 @@ v c0fe Motion Engineering, Inc. 0 v ca50 Varian Australia Pty Ltd 0 v cafe Chrysalis-ITS 0 v cccc Catapult Communications 0 +v cddd Tyzx, Inc. 0 +d cddd0101 DeepSea 1 High Speed Stereo Vision Frame Grabber 0 +d cddd0200 DeepSea 2 High Speed Stereo Vision Frame Grabber 0 v d4d4 Dy4 Systems Inc 0 d d4d40601 PCI Mezzanine Card 0 -v d531 I+ME ACTIA GmbH 1 +v d531 I+ME ACTIA GmbH 0 v d84d Exsys 0 v dead Indigita Corporation 0 v e000 Winbond 0 d e000e000 W89C940 0 v e159 Tiger Jet Network Inc. 0 -d e1590001 Model 300 128k 0 +d e1590001 Intel 537 0 s e159000100590001 128k ISDN-S/T Adapter 0 s e159000100590003 128k ISDN-U Adapter 0 +d e1590002 Tiger100APC ISDN chipset 0 v e4bf EKF Elektronik GmbH 0 v ea01 Eagle Technology 0 +v ea60 RME 0 The main chip of all these devices is by Xilinx -> It could also be a Xilinx ID. +d ea609896 Digi32 0 +d ea609897 Digi32 Pro 0 +d ea609898 Digi32/8 0 v eabb Aashima Technology B.V. 0 -v eace Endace Measurement Systems, Ltd 1 -v ecc0 Echo Corporation 0 +v eace Endace Measurement Systems, Ltd 0 +d eace3100 DAG 3.10 OC-3/OC-12 0 +d eace3200 DAG 3.2x OC-3/OC-12 0 +d eace320e DAG 3.2E Fast Ethernet 0 +d eace340e DAG 3.4E Fast Ethernet 0 +d eace341e DAG 3.41E Fast Ethernet 0 +d eace3500 DAG 3.5 OC-3/OC-12 0 +d eace351c DAG 3.5ECM Fast Ethernet 0 +d eace4100 DAG 4.10 OC-48 0 +d eace4110 DAG 4.11 OC-48 0 +d eace4220 DAG 4.2 OC-48 0 +d eace422e DAG 4.2E Dual Gigabit Ethernet 0 +v ec80 Belkin Corporation 0 +d ec80ec00 F5D6000 0 +v ecc0 Echo Digital Audio Corporation 0 +d ecc00050 Gina24_301 0 +d ecc00051 Gina24_361 0 +d ecc00060 Layla24 0 +d ecc00070 Mona_301_80 0 +d ecc00071 Mona_301_66 0 +d ecc00072 Mona_361 0 +d ecc00080 Mia 0 v edd8 ARK Logic Inc 0 d edd8a091 1000PV [Stingray] 0 d edd8a099 2000PV [Stingray] 0 d edd8a0a1 2000MT 0 d edd8a0a9 2000MI 0 +v f1d0 AJA Video 0 +d f1d0cafe KONA SD SMPTE 259M I/O 0 All boards I have seen have this ID not efac, though all docs say efac... +d f1d0efac KONA SD SMPTE 259M I/O 0 +d f1d0facd KONA HD SMPTE 292M I/O 0 v fa57 Fast Search & Transfer ASA 0 v febd Ultraview Corp. 0 -v feda Epigram Inc 0 +v feda Broadcom Inc (nee Epigram) 0 +d fedaa0fa BCM4210 iLine10 HomePNA 2.0 0 +d fedaa10e BCM4230 iLine10 HomePNA 2.0 0 v fffe VMWare Inc 0 d fffe0710 Virtual SVGA 0 v ffff Illegal Vendor ID 0 diff --git a/src/video_out/libdha/pci.c b/src/video_out/libdha/pci.c index 350a5be42..b6281283a 100644 --- a/src/video_out/libdha/pci.c +++ b/src/video_out/libdha/pci.c @@ -58,38 +58,6 @@ #ifdef __unix__ #include <unistd.h> #endif -#include "AsmMacros.h" -/* OS depended stuff */ -#if defined (linux) -#include "sysdep/pci_linux.c" -#elif defined (__FreeBSD__) -#include "sysdep/pci_freebsd.c" -#elif defined (__386BSD__) -#include "sysdep/pci_386bsd.c" -#elif defined (__NetBSD__) -#include "sysdep/pci_netbsd.c" -#elif defined (__OpenBSD__) -#include "sysdep/pci_openbsd.c" -#elif defined (__bsdi__) -#include "sysdep/pci_bsdi.c" -#elif defined (Lynx) -#include "sysdep/pci_lynx.c" -#elif defined (MACH386) -#include "sysdep/pci_mach386.c" -#elif defined (__SVR4) -#if !defined(SVR4) -#define SVR4 -#endif -#include "sysdep/pci_svr4.c" -#elif defined (SCO) -#include "sysdep/pci_sco.c" -#elif defined (ISC) -#include "sysdep/pci_isc.c" -#elif defined (__EMX__) -#include "sysdep/pci_os2.c" -#elif defined (_WIN32) || defined(__CYGWIN__) -#include "sysdep/pci_win32.c" -#endif #if 0 #if defined(__SUNPRO_C) || defined(sun) || defined(__sun) @@ -456,6 +424,9 @@ struct pci_config_reg { #define PCI_MAP_REG_START 0x10 #define PCI_MAP_ROM_REG 0x30 #define PCI_INTERRUPT_REG 0x3C +#define PCI_INTERRUPT_PIN 0x3D /* 8 bits */ +#define PCI_MIN_GNT 0x3E /* 8 bits */ +#define PCI_MAX_LAT 0x3F /* 8 bits */ #define PCI_REG_USERCONFIG 0x40 static int pcibus=-1, pcicard=-1, pcifunc=-1 ; @@ -488,11 +459,12 @@ static int pcibus=-1, pcicard=-1, pcifunc=-1 ; #include "sysdep/pci_arm32.c" #elif defined(__powerpc__) #include "sysdep/pci_powerpc.c" -#else +#elif defined( __i386__ ) #include "sysdep/pci_x86.c" +#else +#include "sysdep/pci_generic_cpu.c" #endif - static int pcicards=0 ; static pciinfo_t *pci_lst; @@ -509,6 +481,9 @@ static void identify_card(struct pci_config_reg *pcr) pci_lst[pcicards].base0 = 0xFFFFFFFF ; pci_lst[pcicards].base1 = 0xFFFFFFFF ; pci_lst[pcicards].base2 = 0xFFFFFFFF ; + pci_lst[pcicards].base3 = 0xFFFFFFFF ; + pci_lst[pcicards].base4 = 0xFFFFFFFF ; + pci_lst[pcicards].base5 = 0xFFFFFFFF ; pci_lst[pcicards].baserom = 0x000C0000 ; if (pcr->_base0) pci_lst[pcicards].base0 = pcr->_base0 & ((pcr->_base0&0x1) ? 0xFFFFFFFC : 0xFFFFFFF0) ; @@ -516,7 +491,17 @@ static void identify_card(struct pci_config_reg *pcr) ((pcr->_base1&0x1) ? 0xFFFFFFFC : 0xFFFFFFF0) ; if (pcr->_base2) pci_lst[pcicards].base2 = pcr->_base2 & ((pcr->_base2&0x1) ? 0xFFFFFFFC : 0xFFFFFFF0) ; + if (pcr->_base3) pci_lst[pcicards].base3 = pcr->_base3 & + ((pcr->_base0&0x1) ? 0xFFFFFFFC : 0xFFFFFFF0) ; + if (pcr->_base4) pci_lst[pcicards].base4 = pcr->_base4 & + ((pcr->_base1&0x1) ? 0xFFFFFFFC : 0xFFFFFFF0) ; + if (pcr->_base5) pci_lst[pcicards].base5 = pcr->_base5 & + ((pcr->_base2&0x1) ? 0xFFFFFFFC : 0xFFFFFFF0) ; if (pcr->_baserom) pci_lst[pcicards].baserom = pcr->_baserom ; + pci_lst[pcicards].irq = pcr->_int_line; + pci_lst[pcicards].ipin= pcr->_int_pin; + pci_lst[pcicards].gnt = pcr->_min_gnt; + pci_lst[pcicards].lat = pcr->_max_lat; pcicards++; } @@ -531,8 +516,9 @@ int pci_scan(pciinfo_t *pci_list,unsigned *num_pci) int ret = -1; pci_lst = pci_list; + pcicards = 0; - ret = enable_os_io(); + ret = enable_app_io(); if (ret != 0) return(ret); @@ -589,8 +575,19 @@ int pci_scan(pciinfo_t *pci_list,unsigned *num_pci) pcr._cardnum,func,PCI_MAP_REG_START+0x14); pcr._baserom = pci_config_read_long(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum,func,PCI_MAP_ROM_REG); +#if 0 + pcr._int_pin = pci_config_read_byte(pcr._pcibuses[pcr._pcibusidx], + pcr._cardnum,func,PCI_INTERRUPT_PIN); + pcr._int_line = pci_config_read_byte(pcr._pcibuses[pcr._pcibusidx], + pcr._cardnum,func,PCI_INTERRUPT_REG); + pcr._min_gnt = pci_config_read_byte(pcr._pcibuses[pcr._pcibusidx], + pcr._cardnum,func,PCI_MIN_GNT); + pcr._max_lat = pci_config_read_byte(pcr._pcibuses[pcr._pcibusidx], + pcr._cardnum,func,PCI_MAX_LAT); +#else pcr._max_min_ipin_iline = pci_config_read_long(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum,func,PCI_INTERRUPT_REG); +#endif pcr._user_config = pci_config_read_long(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum,func,PCI_REG_USERCONFIG); /* check for pci-pci bridges */ @@ -633,8 +630,8 @@ int pci_scan(pciinfo_t *pci_list,unsigned *num_pci) /* Now try pci config 2 probe (deprecated) */ if ((pcr._configtype == 2) || do_mode2_scan) { - outb(PCI_MODE2_ENABLE_REG, 0xF1); - outb(PCI_MODE2_FORWARD_REG, 0x00); /* bus 0 for now */ + OUTPORT8(PCI_MODE2_ENABLE_REG, 0xF1); + OUTPORT8(PCI_MODE2_FORWARD_REG, 0x00); /* bus 0 for now */ /*printf("\nPCI probing configuration type 2\n");*/ @@ -645,9 +642,9 @@ int pci_scan(pciinfo_t *pci_list,unsigned *num_pci) do { for (pcr._ioaddr = 0xC000; pcr._ioaddr < 0xD000; pcr._ioaddr += 0x0100){ - outb(PCI_MODE2_FORWARD_REG, pcr._pcibuses[pcr._pcibusidx]); /* bus 0 for now */ - pcr._device_vendor = inl(pcr._ioaddr); - outb(PCI_MODE2_FORWARD_REG, 0x00); /* bus 0 for now */ + OUTPORT8(PCI_MODE2_FORWARD_REG, pcr._pcibuses[pcr._pcibusidx]); /* bus 0 for now */ + pcr._device_vendor = INPORT32(pcr._ioaddr); + OUTPORT8(PCI_MODE2_FORWARD_REG, 0x00); /* bus 0 for now */ if ((pcr._vendor == 0xFFFF) || (pcr._device == 0xFFFF)) continue; @@ -660,20 +657,20 @@ int pci_scan(pciinfo_t *pci_list,unsigned *num_pci) pcibus = pcr._pcibuses[pcr._pcibusidx] ; pcicard = pcr._ioaddr ; pcifunc = 0 ; - outb(PCI_MODE2_FORWARD_REG, pcr._pcibuses[pcr._pcibusidx]); /* bus 0 for now */ - pcr._status_command = inl(pcr._ioaddr + 0x04); - pcr._class_revision = inl(pcr._ioaddr + 0x08); - pcr._bist_header_latency_cache = inl(pcr._ioaddr + 0x0C); - pcr._base0 = inl(pcr._ioaddr + 0x10); - pcr._base1 = inl(pcr._ioaddr + 0x14); - pcr._base2 = inl(pcr._ioaddr + 0x18); - pcr._base3 = inl(pcr._ioaddr + 0x1C); - pcr._base4 = inl(pcr._ioaddr + 0x20); - pcr._base5 = inl(pcr._ioaddr + 0x24); - pcr._baserom = inl(pcr._ioaddr + 0x30); - pcr._max_min_ipin_iline = inl(pcr._ioaddr + 0x3C); - pcr._user_config = inl(pcr._ioaddr + 0x40); - outb(PCI_MODE2_FORWARD_REG, 0x00); /* bus 0 for now */ + OUTPORT8(PCI_MODE2_FORWARD_REG, pcr._pcibuses[pcr._pcibusidx]); /* bus 0 for now */ + pcr._status_command = INPORT32(pcr._ioaddr + 0x04); + pcr._class_revision = INPORT32(pcr._ioaddr + 0x08); + pcr._bist_header_latency_cache = INPORT32(pcr._ioaddr + 0x0C); + pcr._base0 = INPORT32(pcr._ioaddr + 0x10); + pcr._base1 = INPORT32(pcr._ioaddr + 0x14); + pcr._base2 = INPORT32(pcr._ioaddr + 0x18); + pcr._base3 = INPORT32(pcr._ioaddr + 0x1C); + pcr._base4 = INPORT32(pcr._ioaddr + 0x20); + pcr._base5 = INPORT32(pcr._ioaddr + 0x24); + pcr._baserom = INPORT32(pcr._ioaddr + 0x30); + pcr._max_min_ipin_iline = INPORT8(pcr._ioaddr + 0x3C); + pcr._user_config = INPORT32(pcr._ioaddr + 0x40); + OUTPORT8(PCI_MODE2_FORWARD_REG, 0x00); /* bus 0 for now */ /* check for pci-pci bridges (currently we only know Digital) */ if ((pcr._vendor == 0x1011) && (pcr._device == 0x0001)) @@ -687,12 +684,12 @@ int pci_scan(pciinfo_t *pci_list,unsigned *num_pci) } } while (++pcr._pcibusidx < pcr._pcinumbus); - outb(PCI_MODE2_ENABLE_REG, 0x00); + OUTPORT8(PCI_MODE2_ENABLE_REG, 0x00); } #endif /* __alpha__ */ - disable_os_io(); + disable_app_io(); *num_pci = pcicards; return 0 ; @@ -712,28 +709,52 @@ int pci_config_read(unsigned char bus, unsigned char dev, unsigned char func, { int ret; - if (len != 4) - { - printf("pci_config_read: reading non-dword not supported!\n"); - return(ENOTSUP); - } - - ret = enable_os_io(); + ret = enable_app_io(); if (ret != 0) return(ret); - ret = pci_config_read_long(bus, dev, func, cmd); - disable_os_io(); + switch(len) + { + case 4: + ret = pci_config_read_long(bus, dev, func, cmd); + break; + case 2: + ret = pci_config_read_word(bus, dev, func, cmd); + break; + case 1: + ret = pci_config_read_byte(bus, dev, func, cmd); + break; + default: + printf("libdha_pci: wrong length to read: %u\n",len); + } + disable_app_io(); *val = ret; return(0); } -int enable_app_io( void ) +int pci_config_write(unsigned char bus, unsigned char dev, unsigned char func, + unsigned char cmd, int len, unsigned long val) { - return enable_os_io(); -} + int ret; + + ret = enable_app_io(); + if (ret != 0) + return ret; + switch(len) + { + case 4: + pci_config_write_long(bus, dev, func, cmd, val); + break; + case 2: + pci_config_write_word(bus, dev, func, cmd, val); + break; + case 1: + pci_config_write_byte(bus, dev, func, cmd, val); + break; + default: + printf("libdha_pci: wrong length to read: %u\n",len); + } + disable_app_io(); -int disable_app_io( void ) -{ - return disable_os_io(); + return 0; } diff --git a/src/video_out/libdha/sysdep/AsmMacros_alpha.h b/src/video_out/libdha/sysdep/AsmMacros_alpha.h index 482b59000..59da53891 100644 --- a/src/video_out/libdha/sysdep/AsmMacros_alpha.h +++ b/src/video_out/libdha/sysdep/AsmMacros_alpha.h @@ -17,7 +17,7 @@ extern u_int8_t inb(u_int32_t port); extern u_int16_t inw(u_int32_t port); extern u_int32_t inl(u_int32_t port); #else -#error This stuff is not ported on your system +#include "sysdep/AsmMacros_generic.h" #endif #define intr_disable() diff --git a/src/video_out/libdha/sysdep/AsmMacros_ia64.h b/src/video_out/libdha/sysdep/AsmMacros_ia64.h index e59732fda..7d6123f33 100644 --- a/src/video_out/libdha/sysdep/AsmMacros_ia64.h +++ b/src/video_out/libdha/sysdep/AsmMacros_ia64.h @@ -10,7 +10,7 @@ #if defined(linux) #include <sys/io.h> #else -#error This stuff is not ported on your system +#include "sysdep/AsmMacros_generic.h" #endif #endif diff --git a/src/video_out/libdha/sysdep/AsmMacros_powerpc.h b/src/video_out/libdha/sysdep/AsmMacros_powerpc.h index b17daddbd..cf678c9b8 100644 --- a/src/video_out/libdha/sysdep/AsmMacros_powerpc.h +++ b/src/video_out/libdha/sysdep/AsmMacros_powerpc.h @@ -7,7 +7,7 @@ #ifndef __ASM_MACROS_POWERPC_H #define __ASM_MACROS_POWERPC_H -#if defined(Lynx) +#if defined(Lynx) || defined(__OpenBSD__) extern unsigned char *ioBase; @@ -18,7 +18,7 @@ static __inline__ volatile void eieio() static __inline__ void outb(short port, unsigned char value) { - *(uchar *)(ioBase + port) = value; eieio(); + *(unsigned char *)(ioBase + port) = value; eieio(); } static __inline__ void outw(short port, unsigned short value) @@ -56,7 +56,7 @@ static __inline__ unsigned long inl(short port) #define intr_enable() #else -#error This stuff is not ported on your system +#include "sysdep/AsmMacros_generic.h" #endif #endif diff --git a/src/video_out/libdha/sysdep/AsmMacros_x86.h b/src/video_out/libdha/sysdep/AsmMacros_x86.h index c10f24f2d..97dcaae16 100644 --- a/src/video_out/libdha/sysdep/AsmMacros_x86.h +++ b/src/video_out/libdha/sysdep/AsmMacros_x86.h @@ -8,75 +8,25 @@ #define __ASM_MACROS_X86_H #if defined (WINNT) -#error This stuff is not ported on your system +#include "sysdep/AsmMacros_generic.h" #else #include "config.h" -#ifdef CONFIG_DHAHELPER -#include <sys/ioctl.h> -#include "../kernelhelper/dhahelper.h" - -extern int dhahelper_fd; -extern int dhahelper_initialized; -#endif - static __inline__ void outb(short port,char val) { -#ifdef CONFIG_DHAHELPER - if (dhahelper_initialized == 1) - { - dhahelper_port_t _port; - - _port.operation = PORT_OP_WRITE; - _port.addr = port; - _port.size = 1; - _port.value = val; - if (ioctl(dhahelper_fd, DHAHELPER_PORT, &_port) == 0) - return; - } - else -#endif __asm__ __volatile__("outb %0,%1" : :"a" (val), "d" (port)); return; } static __inline__ void outw(short port,short val) { -#ifdef CONFIG_DHAHELPER - if (dhahelper_initialized == 1) - { - dhahelper_port_t _port; - - _port.operation = PORT_OP_WRITE; - _port.addr = port; - _port.size = 2; - _port.value = val; - if (ioctl(dhahelper_fd, DHAHELPER_PORT, &_port) == 0) - return; - } - else -#endif __asm__ __volatile__("outw %0,%1" : :"a" (val), "d" (port)); return; } static __inline__ void outl(short port,unsigned int val) { -#ifdef CONFIG_DHAHELPER - if (dhahelper_initialized == 1) - { - dhahelper_port_t _port; - - _port.operation = PORT_OP_WRITE; - _port.addr = port; - _port.size = 4; - _port.value = val; - if (ioctl(dhahelper_fd, DHAHELPER_PORT, &_port) == 0) - return; - } - else -#endif __asm__ __volatile__("outl %0,%1" : :"a" (val), "d" (port)); return; } @@ -84,19 +34,6 @@ static __inline__ void outl(short port,unsigned int val) static __inline__ unsigned int inb(short port) { unsigned char ret; -#ifdef CONFIG_DHAHELPER - if (dhahelper_initialized == 1) - { - dhahelper_port_t _port; - - _port.operation = PORT_OP_READ; - _port.addr = port; - _port.size = 1; - if (ioctl(dhahelper_fd, DHAHELPER_PORT, &_port) == 0) - return _port.value; - } - else -#endif __asm__ __volatile__("inb %1,%0" : "=a" (ret) : "d" (port)); @@ -106,19 +43,6 @@ static __inline__ unsigned int inb(short port) static __inline__ unsigned int inw(short port) { unsigned short ret; -#ifdef CONFIG_DHAHELPER - if (dhahelper_initialized == 1) - { - dhahelper_port_t _port; - - _port.operation = PORT_OP_READ; - _port.addr = port; - _port.size = 2; - if (ioctl(dhahelper_fd, DHAHELPER_PORT, &_port) == 0) - return _port.value; - } - else -#endif __asm__ __volatile__("inw %1,%0" : "=a" (ret) : "d" (port)); @@ -128,19 +52,6 @@ static __inline__ unsigned int inw(short port) static __inline__ unsigned int inl(short port) { unsigned int ret; -#ifdef CONFIG_DHAHELPER - if (dhahelper_initialized == 1) - { - dhahelper_port_t _port; - - _port.operation = PORT_OP_READ; - _port.addr = port; - _port.size = 4; - if (ioctl(dhahelper_fd, DHAHELPER_PORT, &_port) == 0) - return _port.value; - } - else -#endif __asm__ __volatile__("inl %1,%0" : "=a" (ret) : "d" (port)); @@ -158,5 +69,4 @@ static __inline__ void intr_enable() } #endif - #endif diff --git a/src/video_out/libdha/sysdep/pci_alpha.c b/src/video_out/libdha/sysdep/pci_alpha.c index e968b3e12..74c3eb687 100644 --- a/src/video_out/libdha/sysdep/pci_alpha.c +++ b/src/video_out/libdha/sysdep/pci_alpha.c @@ -27,3 +27,54 @@ static long pci_config_read_long( return retval; } +static long pci_config_read_word( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd) +{ + unsigned long retval; + pciconfig_read(bus, dev<<3, cmd, 2, &retval); + return retval; +} + +static long pci_config_read_byte( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd) +{ + unsigned long retval; + pciconfig_read(bus, dev<<3, cmd, 1, &retval); + return retval; +} + +static void pci_config_write_long( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd, + long val) +{ + pciconfig_write(bus, dev<<3, cmd, 4, val); +} + +static void pci_config_write_word( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd, + long val) +{ + pciconfig_write(bus, dev<<3, cmd, 2, val); +} + +static void pci_config_write_byte( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd, + long val) +{ + pciconfig_write(bus, dev<<3, cmd, 1, val); +} diff --git a/src/video_out/libdha/sysdep/pci_arm32.c b/src/video_out/libdha/sysdep/pci_arm32.c index a631887da..6920b615e 100644 --- a/src/video_out/libdha/sysdep/pci_arm32.c +++ b/src/video_out/libdha/sysdep/pci_arm32.c @@ -11,24 +11,24 @@ static int pci_config_type( void ) int retval; retval = 0; - outb(PCI_MODE2_ENABLE_REG, 0x00); - outb(PCI_MODE2_FORWARD_REG, 0x00); - tmp1 = inb(PCI_MODE2_ENABLE_REG); - tmp2 = inb(PCI_MODE2_FORWARD_REG); + OUTPORT8(PCI_MODE2_ENABLE_REG, 0x00); + OUTPORT8(PCI_MODE2_FORWARD_REG, 0x00); + tmp1 = INPORT8(PCI_MODE2_ENABLE_REG); + tmp2 = INPORT8(PCI_MODE2_FORWARD_REG); if ((tmp1 == 0x00) && (tmp2 == 0x00)) { retval = 2; /*printf("PCI says configuration type 2\n");*/ } else { - tmplong1 = inl(PCI_MODE1_ADDRESS_REG); - outl(PCI_MODE1_ADDRESS_REG, PCI_EN); - tmplong2 = inl(PCI_MODE1_ADDRESS_REG); - outl(PCI_MODE1_ADDRESS_REG, tmplong1); + tmplong1 = INPORT32(PCI_MODE1_ADDRESS_REG); + OUTPORT32(PCI_MODE1_ADDRESS_REG, PCI_EN); + tmplong2 = INPORT32(PCI_MODE1_ADDRESS_REG); + OUTPORT32(PCI_MODE1_ADDRESS_REG, tmplong1); if (tmplong2 == PCI_EN) { retval = 1; /*printf("PCI says configuration type 1\n");*/ } else { /*printf("No PCI !\n");*/ - disable_os_io(); + disable_app_io(); /*exit(1);*/ retval = 0xFFFF; } @@ -43,8 +43,8 @@ static int pci_get_vendor( { unsigned long config_cmd; config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); - outl(PCI_MODE1_ADDRESS_REG, config_cmd); - return inl(PCI_MODE1_DATA_REG); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd); + return INPORT32(PCI_MODE1_DATA_REG); } static long pci_config_read_long( @@ -55,6 +55,69 @@ static long pci_config_read_long( { unsigned long config_cmd; config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); - outl(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); - return inl(PCI_MODE1_DATA_REG); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); + return INPORT32(PCI_MODE1_DATA_REG); +} + +static long pci_config_read_word( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd) +{ + unsigned long config_cmd; + config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); + return INPORT16(PCI_MODE1_DATA_REG); +} + +static long pci_config_read_byte( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd) +{ + unsigned long config_cmd; + config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); + return INPORT8(PCI_MODE1_DATA_REG); +} + +static void pci_config_write_long( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd, + long val) +{ + unsigned long config_cmd; + config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); + OUTPORT32(PCI_MODE1_DATA_REG,val); +} + +static void pci_config_write_word( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd, + unsigned val) +{ + unsigned long config_cmd; + config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); + OUTPORT16(PCI_MODE1_DATA_REG,val); +} + +static void pci_config_write_byte( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd, + long val) +{ + unsigned long config_cmd; + config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); + OUTPORT8(PCI_MODE1_DATA_REG,val); } diff --git a/src/video_out/libdha/sysdep/pci_ia64.c b/src/video_out/libdha/sysdep/pci_ia64.c index a631887da..ef2074ab2 100644 --- a/src/video_out/libdha/sysdep/pci_ia64.c +++ b/src/video_out/libdha/sysdep/pci_ia64.c @@ -11,24 +11,24 @@ static int pci_config_type( void ) int retval; retval = 0; - outb(PCI_MODE2_ENABLE_REG, 0x00); - outb(PCI_MODE2_FORWARD_REG, 0x00); - tmp1 = inb(PCI_MODE2_ENABLE_REG); - tmp2 = inb(PCI_MODE2_FORWARD_REG); + OUTPORT8(PCI_MODE2_ENABLE_REG, 0x00); + OUTPORT8(PCI_MODE2_FORWARD_REG, 0x00); + tmp1 = INPORT8(PCI_MODE2_ENABLE_REG); + tmp2 = INPORT8(PCI_MODE2_FORWARD_REG); if ((tmp1 == 0x00) && (tmp2 == 0x00)) { retval = 2; /*printf("PCI says configuration type 2\n");*/ } else { - tmplong1 = inl(PCI_MODE1_ADDRESS_REG); - outl(PCI_MODE1_ADDRESS_REG, PCI_EN); - tmplong2 = inl(PCI_MODE1_ADDRESS_REG); - outl(PCI_MODE1_ADDRESS_REG, tmplong1); + tmplong1 = INPORT32(PCI_MODE1_ADDRESS_REG); + OUTPORT32(PCI_MODE1_ADDRESS_REG, PCI_EN); + tmplong2 = INPORT32(PCI_MODE1_ADDRESS_REG); + OUTPORT32(PCI_MODE1_ADDRESS_REG, tmplong1); if (tmplong2 == PCI_EN) { retval = 1; /*printf("PCI says configuration type 1\n");*/ } else { /*printf("No PCI !\n");*/ - disable_os_io(); + disable_app_io(); /*exit(1);*/ retval = 0xFFFF; } @@ -43,8 +43,8 @@ static int pci_get_vendor( { unsigned long config_cmd; config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); - outl(PCI_MODE1_ADDRESS_REG, config_cmd); - return inl(PCI_MODE1_DATA_REG); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd); + return INPORT32(PCI_MODE1_DATA_REG); } static long pci_config_read_long( @@ -55,6 +55,69 @@ static long pci_config_read_long( { unsigned long config_cmd; config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); - outl(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); - return inl(PCI_MODE1_DATA_REG); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); + return INPORT32(PCI_MODE1_DATA_REG); +} + +static long pci_config_read_word( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd) +{ + unsigned long config_cmd; + config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); + return INPORT16(PCI_MODE1_DATA_REG); +} + +static long pci_config_read_byte( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd) +{ + unsigned long config_cmd; + config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); + return INPORT8(PCI_MODE1_DATA_REG); +} + +static void pci_config_write_long( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd, + long val) +{ + unsigned long config_cmd; + config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); + OUTPORT32(PCI_MODE1_DATA_REG,val); +} + +static void pci_config_write_word( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd, + long val) +{ + unsigned long config_cmd; + config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); + OUTPORT16(PCI_MODE1_DATA_REG,val); +} + +static void pci_config_write_byte( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd, + long val) +{ + unsigned long config_cmd; + config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); + OUTPORT8(PCI_MODE1_DATA_REG,val); } diff --git a/src/video_out/libdha/sysdep/pci_linux.c b/src/video_out/libdha/sysdep/pci_linux.c index 9382ebf2d..6c0d6b42a 100644 --- a/src/video_out/libdha/sysdep/pci_linux.c +++ b/src/video_out/libdha/sysdep/pci_linux.c @@ -7,8 +7,10 @@ #ifdef __i386__ #include <sys/perm.h> #else +#ifndef __sparc__ #include <sys/io.h> #endif +#endif #include "config.h" diff --git a/src/video_out/libdha/sysdep/pci_openbsd.c b/src/video_out/libdha/sysdep/pci_openbsd.c index 13504db81..89c85eab6 100644 --- a/src/video_out/libdha/sysdep/pci_openbsd.c +++ b/src/video_out/libdha/sysdep/pci_openbsd.c @@ -4,6 +4,8 @@ Modified for readability by Nick Kurshev */ +#ifdef __i386__ + #include <errno.h> #include <sys/types.h> #include <machine/sysarch.h> @@ -22,3 +24,4 @@ static __inline__ int disable_os_io(void) /* Nothing to do */ return(0); } +#endif diff --git a/src/video_out/libdha/sysdep/pci_powerpc.c b/src/video_out/libdha/sysdep/pci_powerpc.c index 9239521ec..b2914d551 100644 --- a/src/video_out/libdha/sysdep/pci_powerpc.c +++ b/src/video_out/libdha/sysdep/pci_powerpc.c @@ -6,6 +6,43 @@ static int pci_config_type( void ) { return 1; } +#ifdef linux +#include <fcntl.h> +#include <sys/io.h> +#include <linux/pci.h> +#include "../../bswap.h" +#endif + +#ifdef linux +static int pci_get_vendor( + unsigned char bus, + unsigned char dev, + int func) +{ + int retval; + char path[100]; + int fd; + short vendor, device; + sprintf(path,"/proc/bus/pci/%02d/%02x.0", bus, dev); + fd = open(path,O_RDONLY|O_SYNC); + if (fd == -1) { + retval=0xFFFF; + } + else if (pread(fd, &vendor, 2, PCI_VENDOR_ID) == 2 && + pread(fd, &device, 2, PCI_DEVICE_ID) == 2) { + vendor = bswap_16(vendor); + device = bswap_16(device); + retval = vendor + (device<<16); /*no worries about byte order, + all ppc are bigendian*/ + } else { + retval = 0xFFFF; + } + if (fd > 0) { + close(fd); + } + return retval; +} +#else static int pci_get_vendor( unsigned char bus, unsigned char dev, @@ -15,7 +52,145 @@ static int pci_get_vendor( pciconfig_read(bus, dev<<3, PCI_ID_REG, 4, &retval); return retval; } +#endif +#ifdef linux +static long pci_config_read_long( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd) +{ + long retval; + char path[100]; + int fd; + sprintf(path,"/proc/bus/pci/%02d/%02x.0", bus, dev); + fd = open(path,O_RDONLY|O_SYNC); + if (fd == -1) { + retval=0; + } + else if (pread(fd, &retval, 4, cmd) == 4) { + retval = bswap_32(retval); + } else { + retval = 0; + } + if (fd > 0) { + close(fd); + } + return retval; +} +static long pci_config_read_word( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd) +{ + long retval; + char path[100]; + int fd; + sprintf(path,"/proc/bus/pci/%02d/%02x.0", bus, dev); + fd = open(path,O_RDONLY|O_SYNC); + if (fd == -1) { + retval=0; + } + else if (pread(fd, &retval, 2, cmd) == 2) { + retval = bswap_16(retval); + } else { + retval = 0; + } + if (fd > 0) { + close(fd); + } + return retval; +} + +static long pci_config_read_byte( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd) +{ + long retval; + char path[100]; + int fd; + sprintf(path,"/proc/bus/pci/%02d/%02x.0", bus, dev); + fd = open(path,O_RDONLY|O_SYNC); + if (fd == -1) { + retval=0; + } + else if (pread(fd, &retval, 1, cmd) != 1) { + retval = 0; + } + if (fd > 0) { + close(fd); + } + return retval; +} + +static void pci_config_write_long( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd, + long val) +{ + char path[100]; + int fd; + val = bswap_32(val); + sprintf(path,"/proc/bus/pci/%02d/%02x.0", bus, dev); + fd = open(path,O_RDONLY|O_SYNC); + if (fd == -1) { + retval=0; + } + else pwrite(fd, &val, 4, cmd); + if (fd > 0) { + close(fd); + } +} + +static void pci_config_write_word( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd, + long val) +{ + char path[100]; + int fd; + val = bswap_16(val); + sprintf(path,"/proc/bus/pci/%02d/%02x.0", bus, dev); + fd = open(path,O_RDONLY|O_SYNC); + if (fd == -1) { + retval=0; + } + else pwrite(fd, &val, 2, cmd); + if (fd > 0) { + close(fd); + } + return retval; +} + +static void pci_config_write_byte( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd, + long val) +{ + char path[100]; + int fd; + sprintf(path,"/proc/bus/pci/%02d/%02x.0", bus, dev); + fd = open(path,O_RDONLY|O_SYNC); + if (fd == -1) { + retval=0; + } + else pwrite(fd, &retval, 1, cmd); + if (fd > 0) { + close(fd); + } + return retval; +} +#else static long pci_config_read_long( unsigned char bus, unsigned char dev, @@ -26,3 +201,62 @@ static long pci_config_read_long( pciconfig_read(bus, dev<<3, cmd, 4, &retval); return retval; } + +static long pci_config_read_word( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd) +{ + long retval; + pciconfig_read(bus, dev<<3, cmd, 2, &retval); + return retval; +} + +static long pci_config_read_byte( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd) +{ + long retval; + pciconfig_read(bus, dev<<3, cmd, 1, &retval); + return retval; +} + +static void pci_config_write_long( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd, + long val) +{ + long retval; + pciconfig_write(bus, dev<<3, cmd, 4, val); + return retval; +} + +static void pci_config_write_word( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd, + long val) +{ + long retval; + pciconfig_write(bus, dev<<3, cmd, 2, val); + return retval; +} + +static void pci_config_write_byte( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd, + long val) +{ + long retval; + pciconfig_write(bus, dev<<3, cmd, 1, val); + return retval; +} +#endif diff --git a/src/video_out/libdha/sysdep/pci_sparc.c b/src/video_out/libdha/sysdep/pci_sparc.c index a631887da..ef2074ab2 100644 --- a/src/video_out/libdha/sysdep/pci_sparc.c +++ b/src/video_out/libdha/sysdep/pci_sparc.c @@ -11,24 +11,24 @@ static int pci_config_type( void ) int retval; retval = 0; - outb(PCI_MODE2_ENABLE_REG, 0x00); - outb(PCI_MODE2_FORWARD_REG, 0x00); - tmp1 = inb(PCI_MODE2_ENABLE_REG); - tmp2 = inb(PCI_MODE2_FORWARD_REG); + OUTPORT8(PCI_MODE2_ENABLE_REG, 0x00); + OUTPORT8(PCI_MODE2_FORWARD_REG, 0x00); + tmp1 = INPORT8(PCI_MODE2_ENABLE_REG); + tmp2 = INPORT8(PCI_MODE2_FORWARD_REG); if ((tmp1 == 0x00) && (tmp2 == 0x00)) { retval = 2; /*printf("PCI says configuration type 2\n");*/ } else { - tmplong1 = inl(PCI_MODE1_ADDRESS_REG); - outl(PCI_MODE1_ADDRESS_REG, PCI_EN); - tmplong2 = inl(PCI_MODE1_ADDRESS_REG); - outl(PCI_MODE1_ADDRESS_REG, tmplong1); + tmplong1 = INPORT32(PCI_MODE1_ADDRESS_REG); + OUTPORT32(PCI_MODE1_ADDRESS_REG, PCI_EN); + tmplong2 = INPORT32(PCI_MODE1_ADDRESS_REG); + OUTPORT32(PCI_MODE1_ADDRESS_REG, tmplong1); if (tmplong2 == PCI_EN) { retval = 1; /*printf("PCI says configuration type 1\n");*/ } else { /*printf("No PCI !\n");*/ - disable_os_io(); + disable_app_io(); /*exit(1);*/ retval = 0xFFFF; } @@ -43,8 +43,8 @@ static int pci_get_vendor( { unsigned long config_cmd; config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); - outl(PCI_MODE1_ADDRESS_REG, config_cmd); - return inl(PCI_MODE1_DATA_REG); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd); + return INPORT32(PCI_MODE1_DATA_REG); } static long pci_config_read_long( @@ -55,6 +55,69 @@ static long pci_config_read_long( { unsigned long config_cmd; config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); - outl(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); - return inl(PCI_MODE1_DATA_REG); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); + return INPORT32(PCI_MODE1_DATA_REG); +} + +static long pci_config_read_word( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd) +{ + unsigned long config_cmd; + config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); + return INPORT16(PCI_MODE1_DATA_REG); +} + +static long pci_config_read_byte( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd) +{ + unsigned long config_cmd; + config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); + return INPORT8(PCI_MODE1_DATA_REG); +} + +static void pci_config_write_long( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd, + long val) +{ + unsigned long config_cmd; + config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); + OUTPORT32(PCI_MODE1_DATA_REG,val); +} + +static void pci_config_write_word( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd, + long val) +{ + unsigned long config_cmd; + config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); + OUTPORT16(PCI_MODE1_DATA_REG,val); +} + +static void pci_config_write_byte( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd, + long val) +{ + unsigned long config_cmd; + config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); + OUTPORT8(PCI_MODE1_DATA_REG,val); } diff --git a/src/video_out/libdha/sysdep/pci_x86.c b/src/video_out/libdha/sysdep/pci_x86.c index a631887da..ef2074ab2 100644 --- a/src/video_out/libdha/sysdep/pci_x86.c +++ b/src/video_out/libdha/sysdep/pci_x86.c @@ -11,24 +11,24 @@ static int pci_config_type( void ) int retval; retval = 0; - outb(PCI_MODE2_ENABLE_REG, 0x00); - outb(PCI_MODE2_FORWARD_REG, 0x00); - tmp1 = inb(PCI_MODE2_ENABLE_REG); - tmp2 = inb(PCI_MODE2_FORWARD_REG); + OUTPORT8(PCI_MODE2_ENABLE_REG, 0x00); + OUTPORT8(PCI_MODE2_FORWARD_REG, 0x00); + tmp1 = INPORT8(PCI_MODE2_ENABLE_REG); + tmp2 = INPORT8(PCI_MODE2_FORWARD_REG); if ((tmp1 == 0x00) && (tmp2 == 0x00)) { retval = 2; /*printf("PCI says configuration type 2\n");*/ } else { - tmplong1 = inl(PCI_MODE1_ADDRESS_REG); - outl(PCI_MODE1_ADDRESS_REG, PCI_EN); - tmplong2 = inl(PCI_MODE1_ADDRESS_REG); - outl(PCI_MODE1_ADDRESS_REG, tmplong1); + tmplong1 = INPORT32(PCI_MODE1_ADDRESS_REG); + OUTPORT32(PCI_MODE1_ADDRESS_REG, PCI_EN); + tmplong2 = INPORT32(PCI_MODE1_ADDRESS_REG); + OUTPORT32(PCI_MODE1_ADDRESS_REG, tmplong1); if (tmplong2 == PCI_EN) { retval = 1; /*printf("PCI says configuration type 1\n");*/ } else { /*printf("No PCI !\n");*/ - disable_os_io(); + disable_app_io(); /*exit(1);*/ retval = 0xFFFF; } @@ -43,8 +43,8 @@ static int pci_get_vendor( { unsigned long config_cmd; config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); - outl(PCI_MODE1_ADDRESS_REG, config_cmd); - return inl(PCI_MODE1_DATA_REG); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd); + return INPORT32(PCI_MODE1_DATA_REG); } static long pci_config_read_long( @@ -55,6 +55,69 @@ static long pci_config_read_long( { unsigned long config_cmd; config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); - outl(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); - return inl(PCI_MODE1_DATA_REG); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); + return INPORT32(PCI_MODE1_DATA_REG); +} + +static long pci_config_read_word( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd) +{ + unsigned long config_cmd; + config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); + return INPORT16(PCI_MODE1_DATA_REG); +} + +static long pci_config_read_byte( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd) +{ + unsigned long config_cmd; + config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); + return INPORT8(PCI_MODE1_DATA_REG); +} + +static void pci_config_write_long( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd, + long val) +{ + unsigned long config_cmd; + config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); + OUTPORT32(PCI_MODE1_DATA_REG,val); +} + +static void pci_config_write_word( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd, + long val) +{ + unsigned long config_cmd; + config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); + OUTPORT16(PCI_MODE1_DATA_REG,val); +} + +static void pci_config_write_byte( + unsigned char bus, + unsigned char dev, + int func, + unsigned cmd, + long val) +{ + unsigned long config_cmd; + config_cmd = PCI_EN | (bus<<16) | (dev<<11) | (func<<8); + OUTPORT32(PCI_MODE1_ADDRESS_REG, config_cmd | cmd); + OUTPORT8(PCI_MODE1_DATA_REG,val); } diff --git a/src/video_out/libdha/test.c b/src/video_out/libdha/test.c index 41aa466d1..6026927ba 100644 --- a/src/video_out/libdha/test.c +++ b/src/video_out/libdha/test.c @@ -1,4 +1,5 @@ #include "libdha.h" +#include "pci_names.h" #include <stdio.h> #include <string.h> #include <stdlib.h> @@ -16,12 +17,27 @@ int main( void ) } else { - printf(" Bus:card:func vend:dev base0 :base1 :base2 :baserom\n"); + printf(" Bus:card:func vend:dev base0 :base1 :base2 :baserom :irq:pin:gnt:lat\n"); for(i=0;i<num_pci;i++) - printf("%04X:%04X:%04X %04X:%04X %08X:%08X:%08X:%08X\n" + printf("%04X:%04X:%04X %04X:%04X %08X:%08X:%08X:%08X:%02X :%02X :%02X :%02X\n" ,lst[i].bus,lst[i].card,lst[i].func ,lst[i].vendor,lst[i].device - ,lst[i].base0,lst[i].base1,lst[i].base2,lst[i].baserom); + ,lst[i].base0,lst[i].base1,lst[i].base2,lst[i].baserom + ,lst[i].irq,lst[i].ipin,lst[i].gnt,lst[i].lat); + printf("Additional info:\n"); + printf("================\n"); + printf("base3 :base4 :base5 :name (vendor)\n"); + for(i=0;i<num_pci;i++) + { + const char *vname,*dname; + dname = pci_device_name(lst[i].vendor,lst[i].device); + dname = dname ? dname : "Unknown chip"; + vname = pci_vendor_name(lst[i].vendor); + vname = vname ? vname : "Unknown chip"; + printf("%08X:%08X:%08X:%s (%s)\n" + ,lst[i].base3,lst[i].base4,lst[i].base5 + ,dname,vname); + } } return EXIT_SUCCESS; } diff --git a/src/video_out/video_out_vidix.c b/src/video_out/video_out_vidix.c index 56ff2f787..9a98630b1 100644 --- a/src/video_out/video_out_vidix.c +++ b/src/video_out/video_out_vidix.c @@ -17,7 +17,7 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA * - * $Id: video_out_vidix.c,v 1.17 2002/12/21 12:56:51 miguelfreitas Exp $ + * $Id: video_out_vidix.c,v 1.18 2003/01/13 23:36:01 miguelfreitas Exp $ * * video_out_vidix.c * @@ -43,6 +43,7 @@ #include "xine.h" #include "vidixlib.h" +#include "fourcc.h" #include "video_out.h" #include "xine_internal.h" @@ -53,10 +54,22 @@ #undef LOG -#define NUM_FRAMES 1 +#define NUM_FRAMES 3 typedef struct vidix_driver_s vidix_driver_t; + +typedef struct vidix_property_s { + int value; + int min; + int max; + + cfg_entry_t *entry; + + vidix_driver_t *this; +} vidix_property_t; + + typedef struct vidix_frame_s { vo_frame_t vo_frame; int width, height, ratio_code, format; @@ -74,26 +87,33 @@ struct vidix_driver_s { uint8_t *vidix_mem; vidix_capability_t vidix_cap; vidix_playback_t vidix_play; - vidix_fourcc_t vidix_fourcc; + vidix_grkey_t vidix_grkey; + vidix_video_eq_t vidix_eq; vidix_yuv_t dstrides; int vidix_started; int next_frame; + int use_colourkey; + uint32_t colourkey; + int use_doublebuffer; + int yuv_format; pthread_mutex_t mutex; + vidix_property_t props[VO_NUM_PROPERTIES]; uint32_t capabilities; /* X11 / Xv related stuff */ Display *display; int screen; Drawable drawable; + GC gc; + int depth; vo_scale_t sc; int delivered_format; - int zoom_x, zoom_y; }; typedef struct { @@ -287,6 +307,65 @@ static void write_frame_sfb(vidix_driver_t* this, vidix_frame_t* frame) } +static void vidix_clean_output_area(vidix_driver_t *this) { + + XLockDisplay(this->display); + + XSetForeground(this->display, this->gc, BlackPixel(this->display, this->screen)); + XFillRectangle(this->display, this->drawable, this->gc, this->sc.border[0].x, this->sc.border[0].y, this->sc.border[0].w, this->sc.border[0].h); + XFillRectangle(this->display, this->drawable, this->gc, this->sc.border[1].x, this->sc.border[1].y, this->sc.border[1].w, this->sc.border[1].h); + XFillRectangle(this->display, this->drawable, this->gc, this->sc.border[2].x, this->sc.border[2].y, this->sc.border[2].w, this->sc.border[2].h); + XFillRectangle(this->display, this->drawable, this->gc, this->sc.border[3].x, this->sc.border[3].y, this->sc.border[3].w, this->sc.border[3].h); + + if(this->use_colourkey) { + XSetForeground(this->display, this->gc, this->colourkey); + XFillRectangle(this->display, this->drawable, this->gc, this->sc.output_xoffset, this->sc.output_yoffset, this->sc.output_width, this->sc.output_height); + } + + XFlush(this->display); + + XUnlockDisplay(this->display); +} + + +static void vidix_update_colourkey(vidix_driver_t *this) { + + if(this->use_colourkey) { + this->vidix_grkey.ckey.op = CKEY_TRUE; + + switch(this->depth) { + + case 15: + this->colourkey = ((this->vidix_grkey.ckey.red & 0xF8) << 7) | + ((this->vidix_grkey.ckey.green & 0xF8) << 2) | + ((this->vidix_grkey.ckey.blue & 0xF8) >> 3); + break; + + case 16: + this->colourkey = ((this->vidix_grkey.ckey.red & 0xF8) << 8) | + ((this->vidix_grkey.ckey.green & 0xFC) << 3) | + ((this->vidix_grkey.ckey.blue & 0xF8) >> 3); + break; + + case 24: + case 32: + this->colourkey = ((this->vidix_grkey.ckey.red & 0xFF) << 16) | + ((this->vidix_grkey.ckey.green & 0xFF) << 8) | + ((this->vidix_grkey.ckey.blue & 0xFF)); + break; + + default: + break; + } + + vidix_clean_output_area(this); + } else + this->vidix_grkey.ckey.op = CKEY_FALSE; + + vdlSetGrKeys(this->vidix_handler, &this->vidix_grkey); +} + + static uint32_t vidix_get_capabilities (vo_driver_t *this_gen) { vidix_driver_t *this = (vidix_driver_t *) this_gen; @@ -378,7 +457,7 @@ static void vidix_compute_output_size (vidix_driver_t *this) { this->vidix_play.dest.y = this->sc.gui_win_y+this->sc.output_yoffset; this->vidix_play.dest.w = this->sc.output_width; this->vidix_play.dest.h = this->sc.output_height; - this->vidix_play.num_frames=NUM_FRAMES; + this->vidix_play.num_frames= this->use_doublebuffer ? NUM_FRAMES : 1; this->vidix_play.src.pitch.y = this->vidix_play.src.pitch.u = this->vidix_play.src.pitch.v = 0; if((err=vdlConfigPlayback(this->vidix_handler,&this->vidix_play))!=0) @@ -499,6 +578,7 @@ static int vidix_redraw_needed (vo_driver_t *this_gen) { if( vo_scale_redraw_needed( &this->sc ) ) { vidix_compute_output_size (this); + vidix_clean_output_area(this); ret = 1; } @@ -548,16 +628,12 @@ static int vidix_get_property (vo_driver_t *this_gen, int property) { vidix_driver_t *this = (vidix_driver_t *) this_gen; - if ( property == VO_PROP_ASPECT_RATIO) - return this->sc.user_ratio ; - - if ( property == VO_PROP_ZOOM_X ) - return this->zoom_x; - - if ( property == VO_PROP_ZOOM_Y ) - return this->zoom_y; +#ifdef LOG + printf ("video_out_vidix: property #%d = %d\n", property, + this->props[property].value); +#endif - return 0; + return this->props[property].value; } @@ -565,11 +641,14 @@ static int vidix_set_property (vo_driver_t *this_gen, int property, int value) { vidix_driver_t *this = (vidix_driver_t *) this_gen; + int err; + + if ((value >= this->props[property].min) && + (value <= this->props[property].max)) + { + this->props[property].value = value; if ( property == VO_PROP_ASPECT_RATIO) { - if (value>=NUM_ASPECT_RATIOS) - value = ASPECT_AUTO; - this->sc.user_ratio = value; printf("video_out_vidix: aspect ratio changed to %s\n", vo_scale_aspect_ratio_name(value)); @@ -578,37 +657,93 @@ static int vidix_set_property (vo_driver_t *this_gen, } if ( property == VO_PROP_ZOOM_X ) { - if ((value >= VO_ZOOM_MIN) && (value <= VO_ZOOM_MAX)) { - this->zoom_x = value; this->sc.zoom_factor_x = (double)value / (double)VO_ZOOM_STEP; vidix_compute_ideal_size (this); this->sc.force_redraw = 1; - } } if ( property == VO_PROP_ZOOM_Y ) { - if ((value >= VO_ZOOM_MIN) && (value <= VO_ZOOM_MAX)) { - this->zoom_y = value; this->sc.zoom_factor_y = (double)value / (double)VO_ZOOM_STEP; vidix_compute_ideal_size (this); this->sc.force_redraw = 1; - } } + if ( property == VO_PROP_HUE ) { + this->vidix_eq.cap = VEQ_CAP_HUE; + this->vidix_eq.hue = value; + + if((err = vdlPlaybackSetEq(this->vidix_handler, &this->vidix_eq)) != 0) + printf("video_out_vidix:\n"); + } + + if ( property == VO_PROP_SATURATION ) { + this->vidix_eq.cap = VEQ_CAP_SATURATION; + this->vidix_eq.saturation = value; + + if((err = vdlPlaybackSetEq(this->vidix_handler, &this->vidix_eq)) != 0) + printf("video_out_vidix:\n"); + } + + if ( property == VO_PROP_BRIGHTNESS ) { + this->vidix_eq.cap = VEQ_CAP_BRIGHTNESS; + this->vidix_eq.brightness = value; + + if((err = vdlPlaybackSetEq(this->vidix_handler, &this->vidix_eq)) != 0) + printf("video_out_vidix:\n"); + } + + if ( property == VO_PROP_CONTRAST ) { + this->vidix_eq.cap = VEQ_CAP_CONTRAST; + this->vidix_eq.contrast = value; + + if((err = vdlPlaybackSetEq(this->vidix_handler, &this->vidix_eq)) != 0) + printf("video_out_vidix:\n"); + } + } + return value; } + +static void vidix_config_callback(vo_driver_t *this_gen, xine_cfg_entry_t *entry) { + + vidix_driver_t *this = (vidix_driver_t *) this_gen; + + if(strcmp(entry->key, "video.vidix_use_double_buffer") == 0) { + this->use_doublebuffer = entry->num_value; + this->sc.force_redraw = 1; + return; + } + + if(strcmp(entry->key, "video.vidix_use_colour_key") == 0) { + this->use_colourkey = entry->num_value; + } + + if(strcmp(entry->key, "video.vidix_colour_key_red") == 0) { + this->vidix_grkey.ckey.red = entry->num_value; + } + + if(strcmp(entry->key, "video.vidix_colour_key_green") == 0) { + this->vidix_grkey.ckey.green = entry->num_value; + } + + if(strcmp(entry->key, "video.vidix_colour_key_blue") == 0) { + this->vidix_grkey.ckey.blue = entry->num_value; + } + + vidix_update_colourkey(this); +} + + static void vidix_get_property_min_max (vo_driver_t *this_gen, int property, int *min, int *max) { -/* vidix_driver_t *this = (vidix_driver_t *) this_gen; */ + vidix_driver_t *this = (vidix_driver_t *) this_gen; - if ( property == VO_PROP_ZOOM_X || property == VO_PROP_ZOOM_Y ) { - *min = VO_ZOOM_MIN; - *max = VO_ZOOM_MAX; - } + *min = this->props[property].min; + *max = this->props[property].max; } static int vidix_gui_data_exchange (vo_driver_t *this_gen, @@ -627,12 +762,17 @@ static int vidix_gui_data_exchange (vo_driver_t *this_gen, #endif this->drawable = (Drawable) data; + XLockDisplay(this->display); + XFreeGC(this->display, this->gc); + this->gc = XCreateGC(this->display, this->drawable, 0, NULL); + XUnlockDisplay(this->display); break; case XINE_GUI_SEND_EXPOSE_EVENT: #ifdef LOG printf ("video_out_vidix: GUI_DATA_EX_EXPOSE_EVENT\n"); #endif + vidix_clean_output_area(this); break; case XINE_GUI_SEND_TRANSLATE_GUI_TO_VIDEO: @@ -675,6 +815,7 @@ static vo_driver_t *open_plugin (video_driver_class_t *class_gen, const void *vi vidix_driver_t *this; x11_visual_t *visual = (x11_visual_t *) visual_gen; XWindowAttributes window_attributes; + vidix_fourcc_t vidix_fourcc; int err; this = malloc (sizeof (vidix_driver_t)); @@ -693,20 +834,123 @@ static vo_driver_t *open_plugin (video_driver_class_t *class_gen, const void *vi this->display = visual->display; this->screen = visual->screen; this->drawable = visual->d; + this->gc = XCreateGC(this->display, this->drawable, 0, NULL); vo_scale_init( &this->sc, 1, /*this->vidix_cap.flags & FLAG_UPSCALER,*/ 0, config ); this->sc.frame_output_cb = visual->frame_output_cb; this->sc.user_data = visual->user_data; - this->zoom_x = this->zoom_y = 100; this->config = config; - this->capabilities = VO_CAP_YUY2 | VO_CAP_YV12; + this->capabilities = 0; XGetWindowAttributes(this->display, this->drawable, &window_attributes); this->sc.gui_width = window_attributes.width; this->sc.gui_height = window_attributes.height; - + this->depth = window_attributes.depth; + + /* Detect if YUY2 is supported */ + memset(&vidix_fourcc, 0, sizeof(vidix_fourcc_t)); + vidix_fourcc.fourcc = IMGFMT_YUY2; + vidix_fourcc.depth = this->depth; + + if((err = vdlQueryFourcc(this->vidix_handler, &vidix_fourcc)) == 0) { + this->capabilities |= VO_CAP_YUY2; + printf("video_out_vidix: adaptor supports the yuy2 format\n"); + } + + /* Detect if YV12 is supported */ + vidix_fourcc.fourcc = IMGFMT_YV12; + + if((err = vdlQueryFourcc(this->vidix_handler, &vidix_fourcc)) == 0) { + this->capabilities |= VO_CAP_YV12; + printf("video_out_vidix: adaptor supports the yuy2 format\n"); + } + + /* Find what equalizer flags are supported */ + if(this->vidix_cap.flags & FLAG_EQUALIZER) { + if((err = vdlPlaybackGetEq(this->vidix_handler, &this->vidix_eq)) != 0) { + printf("video_out_vidix: Couldn't get equalizer capabilities: %s\n", strerror(err)); + } else { + if(this->vidix_eq.cap & VEQ_CAP_BRIGHTNESS) { + this->capabilities |= VO_CAP_BRIGHTNESS; + + this->props[VO_PROP_BRIGHTNESS].value = 0; + this->props[VO_PROP_BRIGHTNESS].min = -1000; + this->props[VO_PROP_BRIGHTNESS].max = 1000; + } + + if(this->vidix_eq.cap & VEQ_CAP_CONTRAST) { + this->capabilities |= VO_CAP_CONTRAST; + + this->props[VO_PROP_CONTRAST].value = 0; + this->props[VO_PROP_CONTRAST].min = -1000; + this->props[VO_PROP_CONTRAST].max = 1000; + } + + if(this->vidix_eq.cap & VEQ_CAP_SATURATION) { + this->capabilities |= VO_CAP_SATURATION; + + this->props[VO_PROP_SATURATION].value = 0; + this->props[VO_PROP_SATURATION].min = -1000; + this->props[VO_PROP_SATURATION].max = 1000; + } + + if(this->vidix_eq.cap & VEQ_CAP_HUE) { + this->capabilities |= VO_CAP_HUE; + + this->props[VO_PROP_HUE].value = 0; + this->props[VO_PROP_HUE].min = -1000; + this->props[VO_PROP_HUE].max = 1000; + } + } + } + + /* We'll assume all drivers support colour keying (which they do + at the moment) */ + this->capabilities |= VO_CAP_COLORKEY; + + /* Someone might want to disable colour keying (?) */ + this->use_colourkey = config->register_bool(config, + "video.vidix_use_colour_key", 1, "enable use of overlay colour key", + NULL, 10, (void*) vidix_config_callback, this); + + /* Colour key components */ + this->vidix_grkey.ckey.red = config->register_range(config, + "video.vidix_colour_key_red", 255, 0, 255, + "video overlay colour key red component", NULL, 10, + (void*) vidix_config_callback, this); + + this->vidix_grkey.ckey.green = config->register_range(config, + "video.vidix_colour_key_green", 0, 0, 255, + "video overlay colour key green component", NULL, 10, + (void*) vidix_config_callback, this); + + this->vidix_grkey.ckey.blue = config->register_range(config, + "video.vidix_colour_key_blue", 255, 0, 255, + "video overlay colour key blue component", NULL, 10, + (void*) vidix_config_callback, this); + + vidix_update_colourkey(this); + + /* Configuration for double buffering */ + this->use_doublebuffer = config->register_bool(config, + "video.vidix_use_double_buffer", 1, "double buffer to sync video to retrace", NULL, 10, + (void*) vidix_config_callback, this); + + /* Set up remaining props */ + this->props[VO_PROP_ASPECT_RATIO].value = ASPECT_AUTO; + this->props[VO_PROP_ASPECT_RATIO].min = 0; + this->props[VO_PROP_ASPECT_RATIO].max = NUM_ASPECT_RATIOS; + + this->props[VO_PROP_ZOOM_X].value = 100; + this->props[VO_PROP_ZOOM_X].min = VO_ZOOM_MIN; + this->props[VO_PROP_ZOOM_X].max = VO_ZOOM_MAX; + + this->props[VO_PROP_ZOOM_Y].value = 100; + this->props[VO_PROP_ZOOM_Y].min = VO_ZOOM_MIN; + this->props[VO_PROP_ZOOM_Y].max = VO_ZOOM_MAX; + this->vo_driver.get_capabilities = vidix_get_capabilities; this->vo_driver.alloc_frame = vidix_alloc_frame; this->vo_driver.update_frame_format = vidix_update_frame_format; diff --git a/src/video_out/vidix/drivers/Makefile.am b/src/video_out/vidix/drivers/Makefile.am index a68628646..9b76a591e 100644 --- a/src/video_out/vidix/drivers/Makefile.am +++ b/src/video_out/vidix/drivers/Makefile.am @@ -5,11 +5,10 @@ libdir = $(XINE_PLUGINDIR)/vidix if HAVE_VIDIX vidix_drivers = \ - genfb_vid.la \ mach64_vid.la \ mga_crtc2_vid.la \ mga_vid.la \ - nvidia_vid.la \ + pm2_vid.la \ pm3_vid.la \ radeon_vid.la \ rage128_vid.la @@ -37,6 +36,10 @@ rage128_vid_la_SOURCES = rage128_vid.c rage128_vid_la_LIBADD = $(top_builddir)/src/video_out/libdha/libdha.la rage128_vid_la_LDFLAGS = -avoid-version -module +pm2_vid_la_SOURCES = pm2_vid.c +pm2_vid_la_LIBADD = $(top_builddir)/src/video_out/libdha/libdha.la +pm2_vid_la_LDFLAGS = -avoid-version -module + pm3_vid_la_SOURCES = pm3_vid.c pm3_vid_la_LIBADD = $(top_builddir)/src/video_out/libdha/libdha.la pm3_vid_la_LDFLAGS = -avoid-version -module @@ -45,20 +48,12 @@ mach64_vid.lo: source='$*.c' object='$@' libtool=yes \ depfile='$(DEPDIR)/$*.Plo' tmpdepfile='$(DEPDIR)/$*.TPlo' \ $(CCDEPMODE) $(depcomp) \ - $(LTCOMPILE) -DRAGE128 -c -o $@ `test -f $*.c || echo '$(srcdir)/'`$*.c + $(LTCOMPILE) -c -o $@ `test -f $*.c || echo '$(srcdir)/'`$*.c mach64_vid_la_SOURCES = mach64_vid.c mach64_vid_la_LIBADD = $(top_builddir)/src/video_out/libdha/libdha.la mach64_vid_la_LDFLAGS = -avoid-version -module -nvidia_vid_la_SOURCES = nvidia_vid.c -nvidia_vid_la_LIBADD = $(top_builddir)/src/video_out/libdha/libdha.la -lm -nvidia_vid_la_LDFLAGS = -avoid-version -module - -genfb_vid_la_SOURCES = genfb_vid.c -genfb_vid_la_LIBADD = $(top_builddir)/src/video_out/libdha/libdha.la -lm -genfb_vid_la_LDFLAGS = -avoid-version -module - mga_vid_la_SOURCES = mga_vid.c mga_vid_la_LIBADD = $(top_builddir)/src/video_out/libdha/libdha.la -lm mga_vid_la_LDFLAGS = -avoid-version -module @@ -79,7 +74,7 @@ mga_crtc2_vid_la_SOURCES = mga_crtc2_vid.c mga_crtc2_vid_la_LIBADD = $(top_builddir)/src/video_out/libdha/libdha.la -lm mga_crtc2_vid_la_LDFLAGS = -avoid-version -module -noinst_HEADERS = mach64.h nvidia.h pm3_regs.h radeon.h +noinst_HEADERS = mach64.h nvidia.h glint_regs.h pm3_regs.h radeon.h AM_CPPFLAGS = -I$(top_srcdir)/src/video_out/vidix \ -I$(top_srcdir)/src/video_out/libdha diff --git a/src/video_out/vidix/drivers/genfb_vid.c b/src/video_out/vidix/drivers/genfb_vid.c index 82633eda3..83623a26a 100644 --- a/src/video_out/vidix/drivers/genfb_vid.c +++ b/src/video_out/vidix/drivers/genfb_vid.c @@ -6,13 +6,14 @@ #include <inttypes.h> #include <fcntl.h> -#include "vidix.h" -#include "fourcc.h" -#include "libdha.h" -#include "pci_ids.h" -#include "pci_names.h" +#include "../vidix.h" +#include "../fourcc.h" +#include "../../libdha/libdha.h" +#include "../../libdha/pci_ids.h" +#include "../../libdha/pci_names.h" #define DEMO_DRIVER 1 +#define VIDIX_STATIC genfb_ #define GENFB_MSG "[genfb-demo-driver] " @@ -44,12 +45,12 @@ static vidix_capability_t genfb_cap = { 0, 0, 0, 0 } }; -unsigned int vixGetVersion(void) +unsigned int VIDIX_NAME(vixGetVersion)(void) { return(VIDIX_VERSION); } -int vixProbe(int verbose,int force) +int VIDIX_NAME(vixProbe)(int verbose,int force) { #if 0 int err = 0; @@ -96,7 +97,7 @@ int vixProbe(int verbose,int force) #endif } -int vixInit(void) +int VIDIX_NAME(vixInit)(const char *args) { printf(GENFB_MSG"init\n"); @@ -109,19 +110,19 @@ int vixInit(void) return(0); } -void vixDestroy(void) +void VIDIX_NAME(vixDestroy)(void) { printf(GENFB_MSG"destory\n"); return; } -int vixGetCapability(vidix_capability_t *to) +int VIDIX_NAME(vixGetCapability)(vidix_capability_t *to) { memcpy(to, &genfb_cap, sizeof(vidix_capability_t)); return(0); } -int vixQueryFourcc(vidix_fourcc_t *to) +int VIDIX_NAME(vixQueryFourcc)(vidix_fourcc_t *to) { printf(GENFB_MSG"query fourcc (%x)\n", to->fourcc); @@ -135,7 +136,7 @@ int vixQueryFourcc(vidix_fourcc_t *to) return(0); } -int vixConfigPlayback(vidix_playback_t *info) +int VIDIX_NAME(vixConfigPlayback)(vidix_playback_t *info) { printf(GENFB_MSG"config playback\n"); @@ -155,19 +156,19 @@ int vixConfigPlayback(vidix_playback_t *info) return(0); } -int vixPlaybackOn(void) +int VIDIX_NAME(vixPlaybackOn)(void) { printf(GENFB_MSG"playback on\n"); return(0); } -int vixPlaybackOff(void) +int VIDIX_NAME(vixPlaybackOff)(void) { printf(GENFB_MSG"playback off\n"); return(0); } -int vixPlaybackFrameSelect(unsigned int frame) +int VIDIX_NAME(vixPlaybackFrameSelect)(unsigned int frame) { printf(GENFB_MSG"frameselect: %d\n", frame); return(0); diff --git a/src/video_out/vidix/drivers/mach64_vid.c b/src/video_out/vidix/drivers/mach64_vid.c index 8c4f00868..746af5865 100644 --- a/src/video_out/vidix/drivers/mach64_vid.c +++ b/src/video_out/vidix/drivers/mach64_vid.c @@ -5,10 +5,6 @@ Licence: GPL WARNING: THIS DRIVER IS IN BETTA STAGE */ -#ifdef HAVE_CONFIG_H -#include "config.h" -#endif - #include <errno.h> #include <stdio.h> #include <stdlib.h> @@ -16,6 +12,7 @@ #include <math.h> #include <inttypes.h> #include <fcntl.h> +#include <limits.h> #include <sys/mman.h> /* for m(un)lock */ #ifdef HAVE_MALLOC_H #include <malloc.h> @@ -24,17 +21,20 @@ #endif #endif - #include "vidix.h" #include "fourcc.h" #include "libdha.h" #include "pci_ids.h" #include "pci_names.h" +#include "bswap.h" #include "mach64.h" #define UNUSED(x) ((void)(x)) /**< Removes warning about unused arguments */ +#define MACH64_MSG "mach64_vid:" + +#define VIDIX_STATIC mach64_ #ifdef MACH64_ENABLE_BM @@ -174,8 +174,11 @@ static video_registers_t vregs[] = #define INREG8(addr) GETREG(uint8_t,(uint32_t)mach64_mmio_base,((addr)^0x100)<<2) #define OUTREG8(addr,val) SETREG(uint8_t,(uint32_t)mach64_mmio_base,((addr)^0x100)<<2,val) -#define INREG(addr) GETREG(uint32_t,(uint32_t)mach64_mmio_base,((addr)^0x100)<<2) -#define OUTREG(addr,val) SETREG(uint32_t,(uint32_t)mach64_mmio_base,((addr)^0x100)<<2,val) +static inline uint32_t INREG (uint32_t addr) { + uint32_t tmp = GETREG(uint32_t,(uint32_t)mach64_mmio_base,((addr)^0x100)<<2); + return le2me_32(tmp); +} +#define OUTREG(addr,val) SETREG(uint32_t,(uint32_t)mach64_mmio_base,((addr)^0x100)<<2,le2me_32(val)) #define OUTREGP(addr,val,mask) \ do { \ @@ -227,6 +230,7 @@ static void mach64_engine_reset( void ) { /* Kill off bus mastering with extreme predjudice... */ OUTREG(BUS_CNTL, INREG(BUS_CNTL) | BUS_MASTER_DIS); + OUTREG(CRTC_INT_CNTL,INREG(CRTC_INT_CNTL)&~(CRTC_BUSMASTER_EOL_INT|CRTC_BUSMASTER_EOL_INT_EN)); /* Reset engine -- This is accomplished by setting bit 8 of the GEN_TEST_CNTL register high, then low (per the documentation, it's on high to low transition that the GUI engine gets reset...) */ @@ -329,7 +333,7 @@ static int mach64_get_vert_stretch(void) int yres= mach64_get_yres(); if(!supports_lcd_v_stretch){ - if(__verbose>0) printf("[mach64] vertical stretching not supported\n"); + if(__verbose>0) printf(MACH64_MSG" vertical stretching not supported\n"); return 1<<16; } @@ -352,7 +356,7 @@ static int mach64_get_vert_stretch(void) OUTREG(LCD_INDEX, lcd_index); - if(__verbose>0) printf("[mach64] vertical stretching factor= %d\n", ret); + if(__verbose>0) printf(MACH64_MSG" vertical stretching factor= %d\n", ret); return ret; } @@ -375,80 +379,89 @@ static void mach64_vid_make_default() static void mach64_vid_dump_regs( void ) { size_t i; - printf("[mach64] *** Begin of DRIVER variables dump ***\n"); - printf("[mach64] mach64_mmio_base=%p\n",mach64_mmio_base); - printf("[mach64] mach64_mem_base=%p\n",mach64_mem_base); - printf("[mach64] mach64_overlay_off=%08X\n",mach64_overlay_offset); - printf("[mach64] mach64_ram_size=%08X\n",mach64_ram_size); - printf("[mach64] video mode: %ux%u@%u\n",mach64_get_xres(),mach64_get_yres(),mach64_vid_get_dbpp()); - printf("[mach64] *** Begin of OV0 registers dump ***\n"); + printf(MACH64_MSG" *** Begin of DRIVER variables dump ***\n"); + printf(MACH64_MSG" mach64_mmio_base=%p\n",mach64_mmio_base); + printf(MACH64_MSG" mach64_mem_base=%p\n",mach64_mem_base); + printf(MACH64_MSG" mach64_overlay_off=%08X\n",mach64_overlay_offset); + printf(MACH64_MSG" mach64_ram_size=%08X\n",mach64_ram_size); + printf(MACH64_MSG" video mode: %ux%u@%u\n",mach64_get_xres(),mach64_get_yres(),mach64_vid_get_dbpp()); + printf(MACH64_MSG" *** Begin of OV0 registers dump ***\n"); for(i=0;i<sizeof(vregs)/sizeof(video_registers_t);i++) { mach64_wait_for_idle(); - printf("[mach64] %s = %08X\n",vregs[i].sname,INREG(vregs[i].name)); + mach64_fifo_wait(2); + printf(MACH64_MSG" %s = %08X\n",vregs[i].sname,INREG(vregs[i].name)); } - printf("[mach64] *** End of OV0 registers dump ***\n"); + printf(MACH64_MSG" *** End of OV0 registers dump ***\n"); } -unsigned int vixGetVersion(void) +unsigned int VIDIX_NAME(vixGetVersion)(void) { return(VIDIX_VERSION); } -static unsigned short ati_card_ids[] = +typedef struct ati_chip_id_s +{ + unsigned short id; + unsigned short is_agp; +}ati_chip_id_t; + +static ati_chip_id_t ati_card_ids[] = { - DEVICE_ATI_215CT_MACH64_CT, - DEVICE_ATI_210888CX_MACH64_CX, - DEVICE_ATI_210888ET_MACH64_ET, - DEVICE_ATI_MACH64_VT, - DEVICE_ATI_210888GX_MACH64_GX, - DEVICE_ATI_264LT_MACH64_LT, - DEVICE_ATI_264VT_MACH64_VT, - DEVICE_ATI_264VT3_MACH64_VT3, - DEVICE_ATI_264VT4_MACH64_VT4, + { DEVICE_ATI_215CT_MACH64_CT, 0 }, + { DEVICE_ATI_210888CX_MACH64_CX, 0 }, + { DEVICE_ATI_210888ET_MACH64_ET, 0 }, + { DEVICE_ATI_MACH64_VT, 0 }, + { DEVICE_ATI_210888GX_MACH64_GX, 0 }, + { DEVICE_ATI_264LT_MACH64_LT, 0 }, + { DEVICE_ATI_264VT_MACH64_VT, 0 }, + { DEVICE_ATI_264VT3_MACH64_VT3, 0 }, + { DEVICE_ATI_264VT4_MACH64_VT4, 0 }, /**/ - DEVICE_ATI_3D_RAGE_PRO, - DEVICE_ATI_3D_RAGE_PRO2, - DEVICE_ATI_3D_RAGE_PRO3, - DEVICE_ATI_3D_RAGE_PRO4, - DEVICE_ATI_RAGE_XC, - DEVICE_ATI_RAGE_XL_AGP, - DEVICE_ATI_RAGE_XC_AGP, - DEVICE_ATI_RAGE_XL, - DEVICE_ATI_3D_RAGE_PRO5, - DEVICE_ATI_3D_RAGE_PRO6, - DEVICE_ATI_RAGE_XL2, - DEVICE_ATI_RAGE_XC2, - DEVICE_ATI_3D_RAGE_I_II, - DEVICE_ATI_3D_RAGE_II, - DEVICE_ATI_3D_RAGE_IIC, - DEVICE_ATI_3D_RAGE_IIC2, - DEVICE_ATI_3D_RAGE_IIC3, - DEVICE_ATI_3D_RAGE_IIC4, - DEVICE_ATI_3D_RAGE_LT, - DEVICE_ATI_3D_RAGE_LT2, - DEVICE_ATI_3D_RAGE_LT_G, - DEVICE_ATI_3D_RAGE_LT3, - DEVICE_ATI_RAGE_MOBILITY_P_M, - DEVICE_ATI_RAGE_MOBILITY_L, - DEVICE_ATI_3D_RAGE_LT4, - DEVICE_ATI_3D_RAGE_LT5, - DEVICE_ATI_RAGE_MOBILITY_P_M2, - DEVICE_ATI_RAGE_MOBILITY_L2 + { DEVICE_ATI_3D_RAGE_PRO, 1 }, + { DEVICE_ATI_3D_RAGE_PRO2, 1 }, + { DEVICE_ATI_3D_RAGE_PRO3, 0 }, + { DEVICE_ATI_3D_RAGE_PRO4, 0 }, + { DEVICE_ATI_RAGE_XC, 0 }, + { DEVICE_ATI_RAGE_XL_AGP, 1 }, + { DEVICE_ATI_RAGE_XC_AGP, 1 }, + { DEVICE_ATI_RAGE_XL, 0 }, + { DEVICE_ATI_3D_RAGE_PRO5, 0 }, + { DEVICE_ATI_3D_RAGE_PRO6, 0 }, + { DEVICE_ATI_RAGE_XL2, 0 }, + { DEVICE_ATI_RAGE_XC2, 0 }, + { DEVICE_ATI_3D_RAGE_I_II, 0 }, + { DEVICE_ATI_3D_RAGE_II, 0 }, + { DEVICE_ATI_3D_RAGE_IIC, 1 }, + { DEVICE_ATI_3D_RAGE_IIC2, 0 }, + { DEVICE_ATI_3D_RAGE_IIC3, 0 }, + { DEVICE_ATI_3D_RAGE_IIC4, 1 }, + { DEVICE_ATI_3D_RAGE_LT, 1 }, + { DEVICE_ATI_3D_RAGE_LT2, 1 }, + { DEVICE_ATI_3D_RAGE_LT_G, 0 }, + { DEVICE_ATI_3D_RAGE_LT3, 0 }, + { DEVICE_ATI_RAGE_MOBILITY_P_M, 1 }, + { DEVICE_ATI_RAGE_MOBILITY_L, 1 }, + { DEVICE_ATI_3D_RAGE_LT4, 0 }, + { DEVICE_ATI_3D_RAGE_LT5, 0 }, + { DEVICE_ATI_RAGE_MOBILITY_P_M2, 0 }, + { DEVICE_ATI_RAGE_MOBILITY_L2, 0 } }; +static int is_agp; + static int find_chip(unsigned chip_id) { unsigned i; - for(i = 0;i < sizeof(ati_card_ids)/sizeof(unsigned short);i++) + for(i = 0;i < sizeof(ati_card_ids)/sizeof(ati_chip_id_t);i++) { - if(chip_id == ati_card_ids[i]) return i; + if(chip_id == ati_card_ids[i].id) return i; } return -1; } -int vixProbe(int verbose,int force) +int VIDIX_NAME(vixProbe)(int verbose,int force) { pciinfo_t lst[MAX_PCI_DEVICES]; unsigned i,num_pci; @@ -457,7 +470,7 @@ int vixProbe(int verbose,int force) err = pci_scan(lst,&num_pci); if(err) { - printf("[mach64] Error occured during pci scan: %s\n",strerror(err)); + printf(MACH64_MSG" Error occured during pci scan: %s\n",strerror(err)); return err; } else @@ -473,13 +486,14 @@ int vixProbe(int verbose,int force) if(idx == -1 && force == PROBE_NORMAL) continue; dname = pci_device_name(VENDOR_ATI,lst[i].device); dname = dname ? dname : "Unknown chip"; - printf("[mach64] Found chip: %s\n",dname); + printf(MACH64_MSG" Found chip: %s\n",dname); if(force > PROBE_NORMAL) { - printf("[mach64] Driver was forced. Was found %sknown chip\n",idx == -1 ? "un" : ""); + printf(MACH64_MSG" Driver was forced. Was found %sknown chip\n",idx == -1 ? "un" : ""); if(idx == -1) - printf("[mach64] Assuming it as Mach64\n"); + printf(MACH64_MSG" Assuming it as Mach64\n"); } + if(idx != -1) is_agp = ati_card_ids[idx].is_agp; mach64_cap.device_id = lst[i].device; err = 0; memcpy(&pci_info,&lst[i],sizeof(pciinfo_t)); @@ -488,7 +502,7 @@ int vixProbe(int verbose,int force) } } } - if(err && verbose) printf("[mach64] Can't find chip\n"); + if(err && verbose) printf(MACH64_MSG" Can't find chip\n"); return err; } @@ -502,17 +516,75 @@ static void reset_regs( void ) } } -int vixInit(void) +typedef struct saved_regs_s +{ + uint32_t overlay_video_key_clr; + uint32_t overlay_video_key_msk; + uint32_t overlay_graphics_key_clr; + uint32_t overlay_graphics_key_msk; + uint32_t overlay_key_cntl; +}saved_regs_t; +static saved_regs_t savreg; + +static void save_regs( void ) +{ + mach64_fifo_wait(6); + savreg.overlay_video_key_clr = INREG(OVERLAY_VIDEO_KEY_CLR); + savreg.overlay_video_key_msk = INREG(OVERLAY_VIDEO_KEY_MSK); + savreg.overlay_graphics_key_clr = INREG(OVERLAY_GRAPHICS_KEY_CLR); + savreg.overlay_graphics_key_msk = INREG(OVERLAY_GRAPHICS_KEY_MSK); + savreg.overlay_key_cntl = INREG(OVERLAY_KEY_CNTL); +} + +static void restore_regs( void ) +{ + mach64_fifo_wait(6); + OUTREG(OVERLAY_VIDEO_KEY_CLR,savreg.overlay_video_key_clr); + OUTREG(OVERLAY_VIDEO_KEY_MSK,savreg.overlay_video_key_msk); + OUTREG(OVERLAY_GRAPHICS_KEY_CLR,savreg.overlay_graphics_key_clr); + OUTREG(OVERLAY_GRAPHICS_KEY_MSK,savreg.overlay_graphics_key_msk); + OUTREG(OVERLAY_KEY_CNTL,savreg.overlay_key_cntl); +} + +static int forced_irq=UINT_MAX; +static int can_use_irq=0; +static int irq_installed=0; +static void init_irq(void) +{ + irq_installed=1; + if(forced_irq != UINT_MAX) pci_info.irq=forced_irq; + if(hwirq_install(pci_info.bus,pci_info.card,pci_info.func, + 2,CRTC_INT_CNTL,CRTC_BUSMASTER_EOL_INT) == 0) + { + can_use_irq=1; + if(__verbose) printf(MACH64_MSG" Will use %u irq line\n",pci_info.irq); + } + else + if(__verbose) printf(MACH64_MSG" Can't initialize irq handling: %s\n" + MACH64_MSG"irq_param: line=%u pin=%u gnt=%u lat=%u\n" + ,strerror(errno) + ,pci_info.irq,pci_info.ipin,pci_info.gnt,pci_info.lat); +} + +int VIDIX_NAME(vixInit)(const char *args) { int err; +#ifdef MACH64_ENABLE_BM unsigned i; +#endif if(!probed) { - printf("[mach64] Driver was not probed but is being initializing\n"); + printf(MACH64_MSG" Driver was not probed but is being initializing\n"); return EINTR; } - if(__verbose>0) printf("[mach64] version %s\n", VERSION); - + if(__verbose>0) printf(MACH64_MSG" version %d args='%s'\n", VIDIX_VERSION,args); + if(args) + if(strncmp(args,"irq=",4) == 0) + { + forced_irq=atoi(&args[4]); + if(__verbose>0) printf(MACH64_MSG" forcing IRQ to %u\n",forced_irq); + } + if((mach64_mmio_base = map_phys_mem(pci_info.base2,0x4000))==(void *)-1) return ENOMEM; mach64_wait_for_idle(); mach64_ram_size = INREG(MEM_CNTL) & CTL_MEM_SIZEB; @@ -522,10 +594,11 @@ int vixInit(void) mach64_ram_size *= 0x400; /* KB -> bytes */ if((mach64_mem_base = map_phys_mem(pci_info.base0,mach64_ram_size))==(void *)-1) return ENOMEM; memset(&besr,0,sizeof(bes_registers_t)); - printf("[mach64] Video memory = %uMb\n",mach64_ram_size/0x100000); + printf(MACH64_MSG" Video memory = %uMb\n",mach64_ram_size/0x100000); err = mtrr_set_type(pci_info.base0,mach64_ram_size,MTRR_TYPE_WRCOMB); - if(!err) printf("[mach64] Set write-combining type of video memory\n"); + if(!err) printf(MACH64_MSG" Set write-combining type of video memory\n"); + save_regs(); /* check if planar formats are supported */ supports_planar=0; mach64_wait_for_idle(); @@ -541,7 +614,7 @@ int vixInit(void) if(INREG(SCALER_BUF0_OFFSET_U)) supports_planar=1; } - printf("[mach64] Planar YUV formats are %s supported\n",supports_planar?"":"not"); + printf(MACH64_MSG" Planar YUV formats are %s supported\n",supports_planar?"":"not"); supports_colour_adj=0; OUTREG(SCALER_COLOUR_CNTL,-1); if(INREG(SCALER_COLOUR_CNTL)) supports_colour_adj=1; @@ -549,12 +622,12 @@ int vixInit(void) OUTREG(IDCT_CONTROL,-1); if(INREG(IDCT_CONTROL)) supports_idct=1; OUTREG(IDCT_CONTROL,0); - printf("[mach64] IDCT is %s supported\n",supports_idct?"":"not"); + printf(MACH64_MSG" IDCT is %s supported\n",supports_idct?"":"not"); supports_subpic=0; OUTREG(SUBPIC_CNTL,-1); if(INREG(SUBPIC_CNTL)) supports_subpic=1; OUTREG(SUBPIC_CNTL,0); - printf("[mach64] subpictures are %s supported\n",supports_subpic?"":"not"); + printf(MACH64_MSG" subpictures are %s supported\n",supports_subpic?"":"not"); if( mach64_cap.device_id==DEVICE_ATI_RAGE_MOBILITY_P_M || mach64_cap.device_id==DEVICE_ATI_RAGE_MOBILITY_P_M2 || mach64_cap.device_id==DEVICE_ATI_RAGE_MOBILITY_L @@ -567,13 +640,15 @@ int vixInit(void) mach64_vid_make_default(); if(__verbose > VERBOSE_LEVEL) mach64_vid_dump_regs(); #ifdef MACH64_ENABLE_BM + if(!(INREG(BUS_CNTL) & BUS_MASTER_DIS)) + OUTREG(BUS_CNTL,INREG(BUS_CNTL)|BUS_MSTR_RESET); if(bm_open() == 0) { mach64_cap.flags |= FLAG_DMA | FLAG_EQ_DMA; if((dma_phys_addrs = malloc(mach64_ram_size*sizeof(unsigned long)/4096)) == 0) { out_mem: - printf("[mach64] Can't allocate temopary buffer for DMA\n"); + printf(MACH64_MSG" Can't allocate temporary buffer for DMA\n"); mach64_cap.flags &= ~FLAG_DMA & ~FLAG_EQ_DMA; return 0; } @@ -585,20 +660,36 @@ int vixInit(void) for(i=0;i<64;i++) if((mach64_dma_desc_base[i] = memalign(4096,mach64_ram_size*sizeof(bm_list_descriptor)/4096)) == 0) goto out_mem; +#if 0 + if(!is_agp) + { + long tst; + if(pci_config_read(pci_info.bus,pci_info.card,pci_info.func,4,4,&pci_command) == 0) + pci_config_write(pci_info.bus,pci_info.card,pci_info.func,4,4,pci_command|0x14); + pci_config_read(pci_info.bus,pci_info.card,pci_info.func,4,4,&tst); + } +#endif } else - if(__verbose) printf("[mach64] Can't initialize busmastering: %s\n",strerror(errno)); + if(__verbose) printf(MACH64_MSG" Can't initialize busmastering: %s\n",strerror(errno)); #endif return 0; } -void vixDestroy(void) +void VIDIX_NAME(vixDestroy)(void) { +#ifdef MACH64_ENABLE_BM unsigned i; +#endif + restore_regs(); +#ifdef MACH64_ENABLE_BM + mach64_engine_reset(); +#endif unmap_phys_mem(mach64_mem_base,mach64_ram_size); unmap_phys_mem(mach64_mmio_base,0x4000); #ifdef MACH64_ENABLE_BM bm_close(); + if(can_use_irq && irq_installed) hwirq_uninstall(pci_info.bus,pci_info.card,pci_info.func); if(dma_phys_addrs) free(dma_phys_addrs); for(i=0;i<64;i++) { @@ -607,7 +698,7 @@ void vixDestroy(void) #endif } -int vixGetCapability(vidix_capability_t *to) +int VIDIX_NAME(vixGetCapability)(vidix_capability_t *to) { memcpy(to, &mach64_cap, sizeof(vidix_capability_t)); return 0; @@ -745,9 +836,8 @@ static void mach64_vid_display_video( void ) As for me - I would prefer to limit movie's width with 360 but it provides only half of picture but with perfect quality. (NK) */ - mach64_fifo_wait(4); + mach64_fifo_wait(10); OUTREG(OVERLAY_SCALE_CNTL, sc); - mach64_wait_for_idle(); switch(besr.fourcc) @@ -849,7 +939,7 @@ for(i=0; i<32; i++){ } } #endif - if(__verbose>0) printf("[mach64] ecp: %d\n", ecp); + if(__verbose>0) printf(MACH64_MSG" ecp: %d\n", ecp); v_inc = src_h * mach64_get_vert_stretch(); if(mach64_is_interlace()) v_inc<<=1; @@ -931,7 +1021,6 @@ for(i=0; i<32; i++){ if(mach64_is_interlace()) y_pos/=2; besr.y_x_end = y_pos | ((config->dest.x + dest_w) << 16); besr.height_width = ((src_w - left)<<16) | (src_h - top); - return 0; } @@ -955,7 +1044,7 @@ static int is_supported_fourcc(uint32_t fourcc) } } -int vixQueryFourcc(vidix_fourcc_t *to) +int VIDIX_NAME(vixQueryFourcc)(vidix_fourcc_t *to) { if(is_supported_fourcc(to->fourcc)) { @@ -971,14 +1060,14 @@ int vixQueryFourcc(vidix_fourcc_t *to) return ENOSYS; } -int vixConfigPlayback(vidix_playback_t *info) +int VIDIX_NAME(vixConfigPlayback)(vidix_playback_t *info) { unsigned rgb_size,nfr; uint32_t mach64_video_size; if(!is_supported_fourcc(info->fourcc)) return ENOSYS; if(info->src.h > 720 || info->src.w > 720) { - printf("[mach64] Can't apply width or height > 720\n"); + printf(MACH64_MSG" Can't apply width or height > 720\n"); return EINVAL; } if(info->num_frames>VID_PLAY_MAXFRAMES) info->num_frames=VID_PLAY_MAXFRAMES; @@ -1011,7 +1100,7 @@ int vixConfigPlayback(vidix_playback_t *info) return 0; } -int vixPlaybackOn(void) +int VIDIX_NAME(vixPlaybackOn)(void) { int err; unsigned dw,dh; @@ -1023,19 +1112,19 @@ int vixPlaybackOn(void) err = INREG(SCALER_BUF_PITCH) == besr.vid_buf_pitch ? 0 : EINTR; if(err) { - printf("[mach64] *** Internal fatal error ***: Detected pitch corruption\n" - "[mach64] Try decrease number of buffers\n"); + printf(MACH64_MSG" *** Internal fatal error ***: Detected pitch corruption\n" + MACH64_MSG" Try decrease number of buffers\n"); } return err; } -int vixPlaybackOff(void) +int VIDIX_NAME(vixPlaybackOff)(void) { mach64_vid_stop_video(); return 0; } -int vixPlaybackFrameSelect(unsigned int frame) +int VIDIX_NAME(vixPlaybackFrameSelect)(unsigned int frame) { uint32_t off[6]; int i; @@ -1050,7 +1139,7 @@ int vixPlaybackFrameSelect(unsigned int frame) off[i] = mach64_buffer_base[frame][i]; off[i+3]= mach64_buffer_base[last_frame][i]; } - if(__verbose > VERBOSE_LEVEL) printf("mach64_vid: flip_page = %u\n",frame); + if(__verbose > VERBOSE_LEVEL) printf(MACH64_MSG" flip_page = %u\n",frame); #if 0 // delay routine so the individual frames can be ssen better { @@ -1080,14 +1169,14 @@ vidix_video_eq_t equal = , 0, 0, 0, 0, 0, 0, 0, 0 }; -int vixPlaybackGetEq( vidix_video_eq_t * eq) +int VIDIX_NAME(vixPlaybackGetEq)( vidix_video_eq_t * eq) { memcpy(eq,&equal,sizeof(vidix_video_eq_t)); if(!supports_colour_adj) eq->cap = VEQ_CAP_BRIGHTNESS; return 0; } -int vixPlaybackSetEq( const vidix_video_eq_t * eq) +int VIDIX_NAME(vixPlaybackSetEq)( const vidix_video_eq_t * eq) { int br,sat; if(eq->cap & VEQ_CAP_BRIGHTNESS) equal.brightness = eq->brightness; @@ -1126,13 +1215,13 @@ int vixPlaybackSetEq( const vidix_video_eq_t * eq) return 0; } -int vixGetGrKeys(vidix_grkey_t *grkey) +int VIDIX_NAME(vixGetGrKeys)(vidix_grkey_t *grkey) { memcpy(grkey, &mach64_grkey, sizeof(vidix_grkey_t)); return(0); } -int vixSetGrKeys(const vidix_grkey_t *grkey) +int VIDIX_NAME(vixSetGrKeys)(const vidix_grkey_t *grkey) { memcpy(&mach64_grkey, grkey, sizeof(vidix_grkey_t)); @@ -1213,6 +1302,9 @@ static int mach64_setup_frame( vidix_dma_t * dmai ) dmai->internal[dmai->idx] = mach64_dma_desc_base[dmai->idx]; dest_ptr = dmai->dest_offset; count = dmai->size; +#if 0 +printf("MACH64_DMA_REQUEST va=%X size=%X\n",dmai->src,dmai->size); +#endif for(i=0;i<n;i++) { list[i].framebuf_offset = mach64_overlay_offset + dest_ptr; /* offset within of video memory */ @@ -1220,42 +1312,70 @@ static int mach64_setup_frame( vidix_dma_t * dmai ) list[i].command = (count > 4096 ? 4096 : (count | DMA_GUI_COMMAND__EOL)); list[i].reserved = 0; #if 0 -printf("MACH64_DMA_TABLE[%i] %X %X %X %X\n",i,list[i].framebuf_offset,list[i].sys_addr,list[i].command,list[i].reserved); +printf("MACH64_DMA_TABLE[%i] fboff=%X pa=%X cmd=%X rsrvd=%X\n",i,list[i].framebuf_offset,list[i].sys_addr,list[i].command,list[i].reserved); #endif dest_ptr += 4096; count -= 4096; } + cpu_flush(list,4096); } return 0; } -static int mach64_transfer_frame( unsigned long ba_dma_desc ) +static int mach64_transfer_frame( unsigned long ba_dma_desc,int sync_mode ) { + uint32_t crtc_int; mach64_wait_for_idle(); - OUTREG(BUS_CNTL,(INREG(BUS_CNTL)|BUS_MSTR_RESET)); - OUTREG(CRTC_INT_CNTL,INREG(CRTC_INT_CNTL)|CRTC_BUSMASTER_EOL_INT|CRTC_BUSMASTER_EOL_INT_EN); - OUTREG(BUS_CNTL,(INREG(BUS_CNTL)|BUS_EXT_REG_EN|BUS_READ_BURST|BUS_PCI_READ_RETRY_EN) &(~BUS_MASTER_DIS)); + mach64_fifo_wait(10); + OUTREG(BUS_CNTL,(INREG(BUS_CNTL)|BUS_EXT_REG_EN)&(~BUS_MASTER_DIS)); + crtc_int = INREG(CRTC_INT_CNTL); + if(sync_mode && can_use_irq) OUTREG(CRTC_INT_CNTL,crtc_int|CRTC_BUSMASTER_EOL_INT|CRTC_BUSMASTER_EOL_INT_EN); + else OUTREG(CRTC_INT_CNTL,crtc_int|CRTC_BUSMASTER_EOL_INT); OUTREG(BM_SYSTEM_TABLE,ba_dma_desc|SYSTEM_TRIGGER_SYSTEM_TO_VIDEO); if(__verbose > VERBOSE_LEVEL) mach64_vid_dump_regs(); +#if 0 + mach64_fifo_wait(4); + mach64_fifo_wait(16); + printf("MACH64_DMA_DBG: bm_fb_off=%08X bm_sysmem_addr=%08X bm_cmd=%08X bm_status=%08X bm_agp_base=%08X bm_agp_cntl=%08X\n", + INREG(BM_FRAME_BUF_OFFSET), + INREG(BM_SYSTEM_MEM_ADDR), + INREG(BM_COMMAND), + INREG(BM_STATUS), + INREG(AGP_BASE), + INREG(AGP_CNTL)); +#endif return 0; } +int VIDIX_NAME(vixQueryDMAStatus)( void ) +{ + int bm_off; + unsigned crtc_int_cntl; + crtc_int_cntl = INREG(CRTC_INT_CNTL); + bm_off = crtc_int_cntl & CRTC_BUSMASTER_EOL_INT; +// if(bm_off) OUTREG(CRTC_INT_CNTL,crtc_int_cntl | CRTC_BUSMASTER_EOL_INT); + return bm_off?0:1; +} -int vixPlaybackCopyFrame( vidix_dma_t * dmai ) +int VIDIX_NAME(vixPlaybackCopyFrame)( vidix_dma_t * dmai ) { - int retval; + int retval,sync_mode; if(!(dmai->flags & BM_DMA_FIXED_BUFFS)) if(bm_lock_mem(dmai->src,dmai->size) != 0) return errno; + sync_mode = (dmai->flags & BM_DMA_SYNC) == BM_DMA_SYNC; + if(sync_mode) + { + if(!irq_installed) init_irq(); + /* burn CPU instead of PCI bus here */ + while(vixQueryDMAStatus()!=0){ + if(can_use_irq) hwirq_wait(pci_info.irq); + else usleep(0); /* ugly but may help */ + } + } + mach64_engine_reset(); retval = mach64_setup_frame(dmai); VIRT_TO_CARD(mach64_dma_desc_base[dmai->idx],1,&bus_addr_dma_desc); - if(retval == 0) retval = mach64_transfer_frame(bus_addr_dma_desc); + if(retval == 0) retval = mach64_transfer_frame(bus_addr_dma_desc,sync_mode); if(!(dmai->flags & BM_DMA_FIXED_BUFFS)) bm_unlock_mem(dmai->src,dmai->size); return retval; } - -int vixQueryDMAStatus( void ) -{ - int bm_off; - bm_off = INREG(CRTC_INT_CNTL) & CRTC_BUSMASTER_EOL_INT; - return bm_off?0:1; -} #endif diff --git a/src/video_out/vidix/drivers/mga_vid.c b/src/video_out/vidix/drivers/mga_vid.c index 39b2176b2..2e2f5c4b7 100644 --- a/src/video_out/vidix/drivers/mga_vid.c +++ b/src/video_out/vidix/drivers/mga_vid.c @@ -1,18 +1,21 @@ /* - Matrox MGA driver - - ported to VIDIX by Alex Beregszaszi - - YUY2 support (see config.format) added by A'rpi/ESP-team - double buffering added by A'rpi/ESP-team - - Brightness/contrast support by Nick Kurshev/Dariush Pietrzak (eyck) and me - - TODO: - * fix memory size detection (current reading pci userconfig isn't - working as requested - returns the max avail. ram on arch?) - * translate all non-english comments to english -*/ + * Matrox MGA driver + * + * ported to VIDIX by Alex Beregszaszi + * + * YUY2 support (see config.format) added by A'rpi/ESP-team + * double buffering added by A'rpi/ESP-team + * + * Brightness/contrast support by Nick Kurshev/Dariush Pietrzak (eyck) and me + * + * Fixed Brightness/Contrast + * Rewrite or read/write kabi@users.sf.net + * + * TODO: + * * fix memory size detection (current reading pci userconfig isn't + * working as requested - returns the max avail. ram on arch?) + * * translate all non-english comments to english + */ /* * Original copyright: @@ -20,14 +23,14 @@ * mga_vid.c * * Copyright (C) 1999 Aaron Holtzman - * - * Module skeleton based on gutted agpgart module by Jeff Hartmann + * + * Module skeleton based on gutted agpgart module by Jeff Hartmann * <slicer@ionet.net> * * Matrox MGA G200/G400 YUV Video Interface module Version 0.1.0 - * + * * BES == Back End Scaler - * + * * This software has been released under the terms of the GNU Public * license. See http://www.gnu.org/copyleft/gpl.html for details. */ @@ -64,14 +67,22 @@ #define ENOTSUP EOPNOTSUPP #endif +#ifdef CRTC2 +#define VIDIX_STATIC mga_crtc2_ +#define MGA_MSG "mga_crtc2_vid:" +#else +#define VIDIX_STATIC mga_ +#define MGA_MSG "mga_vid:" +#endif + /* from radeon_vid */ #define GETREG(TYPE,PTR,OFFZ) (*((volatile TYPE*)((PTR)+(OFFZ)))) #define SETREG(TYPE,PTR,OFFZ,VAL) (*((volatile TYPE*)((PTR)+(OFFZ))))=VAL -#define readb(addr) GETREG(uint8_t,(uint32_t)(addr),0) -#define writeb(val,addr) SETREG(uint8_t,(uint32_t)(addr),0,val) -#define readl(addr) GETREG(uint32_t,(uint32_t)(addr),0) -#define writel(val,addr) SETREG(uint32_t,(uint32_t)(addr),0,val) +#define readb(addr) GETREG(uint8_t,(uint32_t)(mga_mmio_base + addr),0) +#define writeb(addr, val) SETREG(uint8_t,(uint32_t)(mga_mmio_base + addr),0,val) +#define readl(addr) GETREG(uint32_t,(uint32_t)(mga_mmio_base + addr),0) +#define writel(addr, val) SETREG(uint32_t,(uint32_t)(mga_mmio_base + addr),0,val) static int mga_verbose = 0; @@ -87,7 +98,7 @@ static int vid_overlay_on = 0; /* mapped physical addresses */ static uint8_t *mga_mmio_base = 0; -static uint32_t mga_mem_base = 0; +static uint8_t* mga_mem_base = 0; static int mga_src_base = 0; /* YUV buffer position in video memory */ @@ -119,74 +130,74 @@ static vidix_capability_t mga_cap = -1, FLAG_UPSCALER | FLAG_DOWNSCALER | FLAG_EQUALIZER, VENDOR_MATROX, - -1, /* will be set in vixProbe */ + -1, /* will be set in VIDIX_NAME(vixProbe) */ { 0, 0, 0, 0} }; /* MATROX BES registers */ typedef struct bes_registers_s { - //BES Control - uint32_t besctl; - //BES Global control - uint32_t besglobctl; - //Luma control (brightness and contrast) - uint32_t beslumactl; - //Line pitch - uint32_t bespitch; - - //Buffer A-1 Chroma 3 plane org - uint32_t besa1c3org; - //Buffer A-1 Chroma org - uint32_t besa1corg; - //Buffer A-1 Luma org - uint32_t besa1org; - - //Buffer A-2 Chroma 3 plane org - uint32_t besa2c3org; - //Buffer A-2 Chroma org - uint32_t besa2corg; - //Buffer A-2 Luma org - uint32_t besa2org; - - //Buffer B-1 Chroma 3 plane org - uint32_t besb1c3org; - //Buffer B-1 Chroma org - uint32_t besb1corg; - //Buffer B-1 Luma org - uint32_t besb1org; - - //Buffer B-2 Chroma 3 plane org - uint32_t besb2c3org; - //Buffer B-2 Chroma org - uint32_t besb2corg; - //Buffer B-2 Luma org - uint32_t besb2org; - - //BES Horizontal coord - uint32_t beshcoord; - //BES Horizontal inverse scaling [5.14] - uint32_t beshiscal; - //BES Horizontal source start [10.14] (for scaling) - uint32_t beshsrcst; - //BES Horizontal source ending [10.14] (for scaling) - uint32_t beshsrcend; - //BES Horizontal source last - uint32_t beshsrclst; - - - //BES Vertical coord - uint32_t besvcoord; - //BES Vertical inverse scaling [5.14] - uint32_t besviscal; - //BES Field 1 vertical source last position - uint32_t besv1srclst; - //BES Field 1 weight start - uint32_t besv1wght; - //BES Field 2 vertical source last position - uint32_t besv2srclst; - //BES Field 2 weight start - uint32_t besv2wght; + //BES Control + uint32_t besctl; + //BES Global control + uint32_t besglobctl; + //Luma control (brightness and contrast) + uint32_t beslumactl; + //Line pitch + uint32_t bespitch; + + //Buffer A-1 Chroma 3 plane org + uint32_t besa1c3org; + //Buffer A-1 Chroma org + uint32_t besa1corg; + //Buffer A-1 Luma org + uint32_t besa1org; + + //Buffer A-2 Chroma 3 plane org + uint32_t besa2c3org; + //Buffer A-2 Chroma org + uint32_t besa2corg; + //Buffer A-2 Luma org + uint32_t besa2org; + + //Buffer B-1 Chroma 3 plane org + uint32_t besb1c3org; + //Buffer B-1 Chroma org + uint32_t besb1corg; + //Buffer B-1 Luma org + uint32_t besb1org; + + //Buffer B-2 Chroma 3 plane org + uint32_t besb2c3org; + //Buffer B-2 Chroma org + uint32_t besb2corg; + //Buffer B-2 Luma org + uint32_t besb2org; + + //BES Horizontal coord + uint32_t beshcoord; + //BES Horizontal inverse scaling [5.14] + uint32_t beshiscal; + //BES Horizontal source start [10.14] (for scaling) + uint32_t beshsrcst; + //BES Horizontal source ending [10.14] (for scaling) + uint32_t beshsrcend; + //BES Horizontal source last + uint32_t beshsrclst; + + + //BES Vertical coord + uint32_t besvcoord; + //BES Vertical inverse scaling [5.14] + uint32_t besviscal; + //BES Field 1 vertical source last position + uint32_t besv1srclst; + //BES Field 1 weight start + uint32_t besv1wght; + //BES Field 2 vertical source last position + uint32_t besv2srclst; + //BES Field 2 weight start + uint32_t besv2wght; } bes_registers_t; static bes_registers_t regs; @@ -194,27 +205,28 @@ static bes_registers_t regs; #ifdef CRTC2 typedef struct crtc2_registers_s { - uint32_t c2ctl; - uint32_t c2datactl; - uint32_t c2misc; - uint32_t c2hparam; - uint32_t c2hsync; - uint32_t c2offset; - uint32_t c2pl2startadd0; - uint32_t c2pl2startadd1; - uint32_t c2pl3startadd0; - uint32_t c2pl3startadd1; - uint32_t c2preload; - uint32_t c2spicstartadd0; - uint32_t c2spicstartadd1; - uint32_t c2startadd0; - uint32_t c2startadd1; - uint32_t c2subpiclut; - uint32_t c2vcount; - uint32_t c2vparam; - uint32_t c2vsync; + uint32_t c2ctl; + uint32_t c2datactl; + uint32_t c2misc; + uint32_t c2hparam; + uint32_t c2hsync; + uint32_t c2offset; + uint32_t c2pl2startadd0; + uint32_t c2pl2startadd1; + uint32_t c2pl3startadd0; + uint32_t c2pl3startadd1; + uint32_t c2preload; + uint32_t c2spicstartadd0; + uint32_t c2spicstartadd1; + uint32_t c2startadd0; + uint32_t c2startadd1; + uint32_t c2subpiclut; + uint32_t c2vcount; + uint32_t c2vparam; + uint32_t c2vsync; } crtc2_registers_t; static crtc2_registers_t cregs; +static crtc2_registers_t cregs_save; #endif //All register offsets are converted to word aligned offsets (32 bit) @@ -245,7 +257,7 @@ static crtc2_registers_t cregs; #ifdef CRTC2 /*CRTC2 registers*/ #define XMISCCTRL 0x1e -#define C2CTL 0x3c10 +#define C2CTL 0x3c10 #define C2DATACTL 0x3c4c #define C2MISC 0x3c44 #define C2HPARAM 0x3c14 @@ -276,7 +288,7 @@ static crtc2_registers_t cregs; #define BESA1CORG 0x3d10 #define BESA1ORG 0x3d00 -#define BESA2C3ORG 0x3d64 +#define BESA2C3ORG 0x3d64 #define BESA2CORG 0x3d14 #define BESA2ORG 0x3d04 @@ -306,43 +318,45 @@ static crtc2_registers_t cregs; #define IEN 0x1e1c #define ICLEAR 0x1e18 #define STATUS 0x1e14 +#define CRTCEXTX 0x1fde +#define CRTCEXTD 0x1fdf #ifdef CRTC2 static void crtc2_frame_sel(int frame) { -switch(frame) { -case 0: + switch(frame) { + case 0: cregs.c2pl2startadd0=regs.besa1corg; cregs.c2pl3startadd0=regs.besa1c3org; cregs.c2startadd0=regs.besa1org; break; -case 1: + case 1: cregs.c2pl2startadd0=regs.besa2corg; cregs.c2pl3startadd0=regs.besa2c3org; cregs.c2startadd0=regs.besa2org; break; -case 2: + case 2: cregs.c2pl2startadd0=regs.besb1corg; cregs.c2pl3startadd0=regs.besb1c3org; cregs.c2startadd0=regs.besb1org; break; -case 3: + case 3: cregs.c2pl2startadd0=regs.besb2corg; cregs.c2pl3startadd0=regs.besb2c3org; cregs.c2startadd0=regs.besb2org; break; -} - writel(cregs.c2startadd0, mga_mmio_base + C2STARTADD0); - writel(cregs.c2pl2startadd0, mga_mmio_base + C2PL2STARTADD0); - writel(cregs.c2pl3startadd0, mga_mmio_base + C2PL3STARTADD0); + } + writel(C2STARTADD0, cregs.c2startadd0); + writel(C2PL2STARTADD0, cregs.c2pl2startadd0); + writel(C2PL3STARTADD0, cregs.c2pl3startadd0); } #endif -int vixPlaybackFrameSelect(unsigned int frame) +int VIDIX_NAME(vixPlaybackFrameSelect)(unsigned int frame) { mga_next_frame = frame; - if (mga_verbose>1) printf("[mga] frameselect: %d\n", mga_next_frame); + if (mga_verbose>1) printf(MGA_MSG" frameselect: %d\n", mga_next_frame); #if MGA_ALLOW_IRQ if (mga_irq == -1) #endif @@ -350,11 +364,10 @@ int vixPlaybackFrameSelect(unsigned int frame) //we don't need the vcount protection as we're only hitting //one register (and it doesn't seem to be double buffered) regs.besctl = (regs.besctl & ~0x07000000) + (mga_next_frame << 25); - writel( regs.besctl, mga_mmio_base + BESCTL ); + writel(BESCTL, regs.besctl); -// writel( regs.besglobctl + ((readl(mga_mmio_base + VCOUNT)+2)<<16), - writel( regs.besglobctl + (MGA_VSYNC_POS<<16), - mga_mmio_base + BESGLOBCTL); + // writel( regs.besglobctl + ((readl(VCOUNT)+2)<<16), + writel(BESGLOBCTL, regs.besglobctl + (MGA_VSYNC_POS<<16)); #ifdef CRTC2 crtc2_frame_sel(mga_next_frame); #endif @@ -366,328 +379,335 @@ int vixPlaybackFrameSelect(unsigned int frame) static void mga_vid_write_regs(int restore) { - //Make sure internal registers don't get updated until we're done - writel( (readl(mga_mmio_base + VCOUNT)-1)<<16, - mga_mmio_base + BESGLOBCTL); - - // color or coordinate keying - - if(restore && colkey_saved){ - // restore it - colkey_saved=0; - - printf("[mga] Restoring colorkey (ON: %d %02X:%02X:%02X)\n", - colkey_on,colkey_color[0],colkey_color[1],colkey_color[2]); - - // Set color key registers: - writeb( XKEYOPMODE, mga_mmio_base + PALWTADD); - writeb( colkey_on, mga_mmio_base + X_DATAREG); - - writeb( XCOLKEY0RED, mga_mmio_base + PALWTADD); - writeb( colkey_color[0], mga_mmio_base + X_DATAREG); - writeb( XCOLKEY0GREEN, mga_mmio_base + PALWTADD); - writeb( colkey_color[1], mga_mmio_base + X_DATAREG); - writeb( XCOLKEY0BLUE, mga_mmio_base + PALWTADD); - writeb( colkey_color[2], mga_mmio_base + X_DATAREG); - writeb( X_COLKEY, mga_mmio_base + PALWTADD); - writeb( colkey_color[3], mga_mmio_base + X_DATAREG); - - writeb( XCOLMSK0RED, mga_mmio_base + PALWTADD); - writeb( colkey_mask[0], mga_mmio_base + X_DATAREG); - writeb( XCOLMSK0GREEN, mga_mmio_base + PALWTADD); - writeb( colkey_mask[1], mga_mmio_base + X_DATAREG); - writeb( XCOLMSK0BLUE, mga_mmio_base + PALWTADD); - writeb( colkey_mask[2], mga_mmio_base + X_DATAREG); - writeb( XCOLMSK, mga_mmio_base + PALWTADD); - writeb( colkey_mask[3], mga_mmio_base + X_DATAREG); - - } else if(!colkey_saved){ - // save it - colkey_saved=1; - // Get color key registers: - writeb( XKEYOPMODE, mga_mmio_base + PALWTADD); - colkey_on=(unsigned char)readb(mga_mmio_base + X_DATAREG) & 1; - - writeb( XCOLKEY0RED, mga_mmio_base + PALWTADD); - colkey_color[0]=(unsigned char)readb(mga_mmio_base + X_DATAREG); - writeb( XCOLKEY0GREEN, mga_mmio_base + PALWTADD); - colkey_color[1]=(unsigned char)readb(mga_mmio_base + X_DATAREG); - writeb( XCOLKEY0BLUE, mga_mmio_base + PALWTADD); - colkey_color[2]=(unsigned char)readb(mga_mmio_base + X_DATAREG); - writeb( X_COLKEY, mga_mmio_base + PALWTADD); - colkey_color[3]=(unsigned char)readb(mga_mmio_base + X_DATAREG); - - writeb( XCOLMSK0RED, mga_mmio_base + PALWTADD); - colkey_mask[0]=(unsigned char)readb(mga_mmio_base + X_DATAREG); - writeb( XCOLMSK0GREEN, mga_mmio_base + PALWTADD); - colkey_mask[1]=(unsigned char)readb(mga_mmio_base + X_DATAREG); - writeb( XCOLMSK0BLUE, mga_mmio_base + PALWTADD); - colkey_mask[2]=(unsigned char)readb(mga_mmio_base + X_DATAREG); - writeb( XCOLMSK, mga_mmio_base + PALWTADD); - colkey_mask[3]=(unsigned char)readb(mga_mmio_base + X_DATAREG); - - printf("[mga] Saved colorkey (ON: %d %02X:%02X:%02X)\n", - colkey_on,colkey_color[0],colkey_color[1],colkey_color[2]); + //Make sure internal registers don't get updated until we're done + writel(BESGLOBCTL, (readl(VCOUNT)-1)<<16); - } - -if(!restore){ - writeb( XKEYOPMODE, mga_mmio_base + PALWTADD); - writeb( mga_grkey.ckey.op == CKEY_TRUE, mga_mmio_base + X_DATAREG); + // color or coordinate keying + + if (restore && colkey_saved) + { + // restore it + colkey_saved = 0; + + // Set color key registers: + writeb(PALWTADD, XKEYOPMODE); + writeb(X_DATAREG, colkey_on); + + writeb(PALWTADD, XCOLKEY0RED); + writeb(X_DATAREG, colkey_color[0]); + writeb(PALWTADD, XCOLKEY0GREEN); + writeb(X_DATAREG, colkey_color[1]); + writeb(PALWTADD, XCOLKEY0BLUE); + writeb(X_DATAREG, colkey_color[2]); + writeb(PALWTADD, X_COLKEY); + writeb(X_DATAREG, colkey_color[3]); + + writeb(PALWTADD, XCOLMSK0RED); + writeb(X_DATAREG, colkey_mask[0]); + writeb(PALWTADD, XCOLMSK0GREEN); + writeb(X_DATAREG, colkey_mask[1]); + writeb(PALWTADD, XCOLMSK0BLUE); + writeb(X_DATAREG, colkey_mask[2]); + writeb(PALWTADD, XCOLMSK); + writeb(X_DATAREG, colkey_mask[3]); + + printf(MGA_MSG" Restored colorkey (ON: %d %02X:%02X:%02X)\n", + colkey_on,colkey_color[0],colkey_color[1],colkey_color[2]); + + } else if (!colkey_saved) { + // save it + colkey_saved=1; + // Get color key registers: + writeb(PALWTADD, XKEYOPMODE); + colkey_on = readb(X_DATAREG) & 1; + + writeb(PALWTADD, XCOLKEY0RED); + colkey_color[0]=(unsigned char)readb(X_DATAREG); + writeb(PALWTADD, XCOLKEY0GREEN); + colkey_color[1]=(unsigned char)readb(X_DATAREG); + writeb(PALWTADD, XCOLKEY0BLUE); + colkey_color[2]=(unsigned char)readb(X_DATAREG); + writeb(PALWTADD, X_COLKEY); + colkey_color[3]=(unsigned char)readb(X_DATAREG); + + writeb(PALWTADD, XCOLMSK0RED); + colkey_mask[0]=(unsigned char)readb(X_DATAREG); + writeb(PALWTADD, XCOLMSK0GREEN); + colkey_mask[1]=(unsigned char)readb(X_DATAREG); + writeb(PALWTADD, XCOLMSK0BLUE); + colkey_mask[2]=(unsigned char)readb(X_DATAREG); + writeb(PALWTADD, XCOLMSK); + colkey_mask[3]=(unsigned char)readb(X_DATAREG); + + printf(MGA_MSG" Saved colorkey (ON: %d %02X:%02X:%02X)\n", + colkey_on,colkey_color[0],colkey_color[1],colkey_color[2]); + } + + if (!restore) + { + writeb(PALWTADD, XKEYOPMODE); + writeb(X_DATAREG, (mga_grkey.ckey.op == CKEY_TRUE)); if ( mga_grkey.ckey.op == CKEY_TRUE ) { - uint32_t r=0, g=0, b=0; - - writeb( XMULCTRL, mga_mmio_base + PALWTADD); - switch (readb (mga_mmio_base + X_DATAREG)) - { - case BPP_8: - /* Need to look up the color index, just using - color 0 for now. */ - break; - - case BPP_15: - r = mga_grkey.ckey.red >> 3; - g = mga_grkey.ckey.green >> 3; - b = mga_grkey.ckey.blue >> 3; - break; - - case BPP_16: - r = mga_grkey.ckey.red >> 3; - g = mga_grkey.ckey.green >> 2; - b = mga_grkey.ckey.blue >> 3; - break; - - case BPP_24: - case BPP_32_DIR: - case BPP_32_PAL: - r = mga_grkey.ckey.red; - g = mga_grkey.ckey.green; - b = mga_grkey.ckey.blue; - break; - } + uint32_t r=0, g=0, b=0; + + writeb(PALWTADD, XMULCTRL); + switch (readb(X_DATAREG)) + { + case BPP_8: + /* Need to look up the color index, just using + color 0 for now. */ + break; + case BPP_15: + r = mga_grkey.ckey.red >> 3; + g = mga_grkey.ckey.green >> 3; + b = mga_grkey.ckey.blue >> 3; + break; + case BPP_16: + r = mga_grkey.ckey.red >> 3; + g = mga_grkey.ckey.green >> 2; + b = mga_grkey.ckey.blue >> 3; + break; + case BPP_24: + case BPP_32_DIR: + case BPP_32_PAL: + r = mga_grkey.ckey.red; + g = mga_grkey.ckey.green; + b = mga_grkey.ckey.blue; + break; + } - // Disable color keying on alpha channel - writeb( XCOLMSK, mga_mmio_base + PALWTADD); - writeb( 0x00, mga_mmio_base + X_DATAREG); - writeb( X_COLKEY, mga_mmio_base + PALWTADD); - writeb( 0x00, mga_mmio_base + X_DATAREG); - - - // Set up color key registers - writeb( XCOLKEY0RED, mga_mmio_base + PALWTADD); - writeb( r, mga_mmio_base + X_DATAREG); - writeb( XCOLKEY0GREEN, mga_mmio_base + PALWTADD); - writeb( g, mga_mmio_base + X_DATAREG); - writeb( XCOLKEY0BLUE, mga_mmio_base + PALWTADD); - writeb( b, mga_mmio_base + X_DATAREG); - - // Set up color key mask registers - writeb( XCOLMSK0RED, mga_mmio_base + PALWTADD); - writeb( 0xff, mga_mmio_base + X_DATAREG); - writeb( XCOLMSK0GREEN, mga_mmio_base + PALWTADD); - writeb( 0xff, mga_mmio_base + X_DATAREG); - writeb( XCOLMSK0BLUE, mga_mmio_base + PALWTADD); - writeb( 0xff, mga_mmio_base + X_DATAREG); + // Disable color keying on alpha channel + writeb(PALWTADD, XCOLMSK); + writeb(X_DATAREG, 0x00); + writeb(PALWTADD, X_COLKEY); + writeb(X_DATAREG, 0x00); + + + // Set up color key registers + writeb(PALWTADD, XCOLKEY0RED); + writeb(X_DATAREG, r); + writeb(PALWTADD, XCOLKEY0GREEN); + writeb(X_DATAREG, g); + writeb(PALWTADD, XCOLKEY0BLUE); + writeb(X_DATAREG, b); + + // Set up color key mask registers + writeb(PALWTADD, XCOLMSK0RED); + writeb(X_DATAREG, 0xff); + writeb(PALWTADD, XCOLMSK0GREEN); + writeb(X_DATAREG, 0xff); + writeb(PALWTADD, XCOLMSK0BLUE); + writeb(X_DATAREG, 0xff); } + } -} + // Backend Scaler + writel(BESCTL, regs.besctl); + if (is_g400) + writel(BESLUMACTL, regs.beslumactl); + writel(BESPITCH, regs.bespitch); + + writel(BESA1ORG, regs.besa1org); + writel(BESA1CORG, regs.besa1corg); + writel(BESA2ORG, regs.besa2org); + writel(BESA2CORG, regs.besa2corg); + writel(BESB1ORG, regs.besb1org); + writel(BESB1CORG, regs.besb1corg); + writel(BESB2ORG, regs.besb2org); + writel(BESB2CORG, regs.besb2corg); + if(is_g400) + { + writel(BESA1C3ORG, regs.besa1c3org); + writel(BESA2C3ORG, regs.besa2c3org); + writel(BESB1C3ORG, regs.besb1c3org); + writel(BESB2C3ORG, regs.besb2c3org); + } - // Backend Scaler - writel( regs.besctl, mga_mmio_base + BESCTL); - if(is_g400) - writel( regs.beslumactl, mga_mmio_base + BESLUMACTL); - writel( regs.bespitch, mga_mmio_base + BESPITCH); - - writel( regs.besa1org, mga_mmio_base + BESA1ORG); - writel( regs.besa1corg, mga_mmio_base + BESA1CORG); - writel( regs.besa2org, mga_mmio_base + BESA2ORG); - writel( regs.besa2corg, mga_mmio_base + BESA2CORG); - writel( regs.besb1org, mga_mmio_base + BESB1ORG); - writel( regs.besb1corg, mga_mmio_base + BESB1CORG); - writel( regs.besb2org, mga_mmio_base + BESB2ORG); - writel( regs.besb2corg, mga_mmio_base + BESB2CORG); - if(is_g400) - { - writel( regs.besa1c3org, mga_mmio_base + BESA1C3ORG); - writel( regs.besa2c3org, mga_mmio_base + BESA2C3ORG); - writel( regs.besb1c3org, mga_mmio_base + BESB1C3ORG); - writel( regs.besb2c3org, mga_mmio_base + BESB2C3ORG); - } + writel(BESHCOORD, regs.beshcoord); + writel(BESHISCAL, regs.beshiscal); + writel(BESHSRCST, regs.beshsrcst); + writel(BESHSRCEND, regs.beshsrcend); + writel(BESHSRCLST, regs.beshsrclst); - writel( regs.beshcoord, mga_mmio_base + BESHCOORD); - writel( regs.beshiscal, mga_mmio_base + BESHISCAL); - writel( regs.beshsrcst, mga_mmio_base + BESHSRCST); - writel( regs.beshsrcend, mga_mmio_base + BESHSRCEND); - writel( regs.beshsrclst, mga_mmio_base + BESHSRCLST); - - writel( regs.besvcoord, mga_mmio_base + BESVCOORD); - writel( regs.besviscal, mga_mmio_base + BESVISCAL); - - writel( regs.besv1srclst, mga_mmio_base + BESV1SRCLST); - writel( regs.besv1wght, mga_mmio_base + BESV1WGHT); - writel( regs.besv2srclst, mga_mmio_base + BESV2SRCLST); - writel( regs.besv2wght, mga_mmio_base + BESV2WGHT); - - //update the registers somewhere between 1 and 2 frames from now. - writel( regs.besglobctl + ((readl(mga_mmio_base + VCOUNT)+2)<<16), - mga_mmio_base + BESGLOBCTL); + writel(BESVCOORD, regs.besvcoord); + writel(BESVISCAL, regs.besviscal); - if (mga_verbose > 1) - { - printf("[mga] wrote BES registers\n"); - printf("[mga] BESCTL = 0x%08x\n", - readl(mga_mmio_base + BESCTL)); - printf("[mga] BESGLOBCTL = 0x%08x\n", - readl(mga_mmio_base + BESGLOBCTL)); - printf("[mga] BESSTATUS= 0x%08x\n", - readl(mga_mmio_base + BESSTATUS)); - } + writel(BESV1SRCLST, regs.besv1srclst); + writel(BESV1WGHT, regs.besv1wght); + writel(BESV2SRCLST, regs.besv2srclst); + writel(BESV2WGHT, regs.besv2wght); + + //update the registers somewhere between 1 and 2 frames from now. + writel(BESGLOBCTL, regs.besglobctl + ((readl(VCOUNT)+2)<<16)); + + if (mga_verbose > 1) + { + printf(MGA_MSG" wrote BES registers\n"); + printf(MGA_MSG" BESCTL = 0x%08x\n", readl(BESCTL)); + printf(MGA_MSG" BESGLOBCTL = 0x%08x\n", readl(BESGLOBCTL)); + printf(MGA_MSG" BESSTATUS= 0x%08x\n", readl(BESSTATUS)); + } #ifdef CRTC2 -// printf("c2ctl:0x%08x c2datactl:0x%08x\n",readl(mga_mmio_base + C2CTL),readl(mga_mmio_base + C2DATACTL)); -// printf("c2misc:0x%08x\n",readl(mga_mmio_base + C2MISC)); -// printf("c2ctl:0x%08x c2datactl:0x%08x\n",cregs.c2ctl,cregs.c2datactl); - -// writel(cregs.c2ctl, mga_mmio_base + C2CTL); - - writel(((readl(mga_mmio_base + C2CTL) & ~0x03e00000) + (cregs.c2ctl & 0x03e00000)), mga_mmio_base + C2CTL); - writel(((readl(mga_mmio_base + C2DATACTL) & ~0x000000ff) + (cregs.c2datactl & 0x000000ff)), mga_mmio_base + C2DATACTL); - // ctrc2 - // disable CRTC2 acording to specs -// writel(cregs.c2ctl & 0xfffffff0, mga_mmio_base + C2CTL); - // je to treba ??? -// writeb((readb(mga_mmio_base + XMISCCTRL) & 0x19) | 0xa2, mga_mmio_base + XMISCCTRL); // MAFC - mfcsel & vdoutsel -// writeb((readb(mga_mmio_base + XMISCCTRL) & 0x19) | 0x92, mga_mmio_base + XMISCCTRL); -// writeb((readb(mga_mmio_base + XMISCCTRL) & ~0xe9) + 0xa2, mga_mmio_base + XMISCCTRL); -// writel(cregs.c2datactl, mga_mmio_base + C2DATACTL); -// writel(cregs.c2hparam, mga_mmio_base + C2HPARAM); -// writel(cregs.c2hsync, mga_mmio_base + C2HSYNC); -// writel(cregs.c2vparam, mga_mmio_base + C2VPARAM); -// writel(cregs.c2vsync, mga_mmio_base + C2VSYNC); - writel(cregs.c2misc, mga_mmio_base + C2MISC); - - if (mga_verbose > 1) printf("[mga] c2offset = %d\n",cregs.c2offset); - - writel(cregs.c2offset, mga_mmio_base + C2OFFSET); - writel(cregs.c2startadd0, mga_mmio_base + C2STARTADD0); -// writel(cregs.c2startadd1, mga_mmio_base + C2STARTADD1); - writel(cregs.c2pl2startadd0, mga_mmio_base + C2PL2STARTADD0); -// writel(cregs.c2pl2startadd1, mga_mmio_base + C2PL2STARTADD1); - writel(cregs.c2pl3startadd0, mga_mmio_base + C2PL3STARTADD0); -// writel(cregs.c2pl3startadd1, mga_mmio_base + C2PL3STARTADD1); - writel(cregs.c2spicstartadd0, mga_mmio_base + C2SPICSTARTADD0); -// writel(cregs.c2spicstartadd1, mga_mmio_base + C2SPICSTARTADD1); -// writel(cregs.c2subpiclut, mga_mmio_base + C2SUBPICLUT); -// writel(cregs.c2preload, mga_mmio_base + C2PRELOAD); - // finaly enable everything -// writel(cregs.c2ctl, mga_mmio_base + C2CTL); -// printf("c2ctl:0x%08x c2datactl:0x%08x\n",readl(mga_mmio_base + C2CTL),readl(mga_mmio_base + C2DATACTL)); -// printf("c2misc:0x%08x\n", readl(mga_mmio_base + C2MISC)); -#endif + if (cregs_save.c2ctl == 0) + { + //int i; + cregs_save.c2ctl = readl(C2CTL); + cregs_save.c2datactl = readl(C2DATACTL); + cregs_save.c2misc = readl(C2MISC); + + //for (i = 0; i <= 8; i++) { writeb(CRTCEXTX, i); printf("CRTCEXT%d %x\n", i, readb(CRTCEXTD)); } + //printf("c2ctl:0x%08x c2datactl:0x%08x\n", cregs_save.c2ctl, cregs_save.c2datactl); + //printf("c2misc:0x%08x\n", readl(C2MISC)); + //printf("c2ctl:0x%08x c2datactl:0x%08x\n", cregs.c2ctl, cregs.c2datactl); + } + if (restore) + { + writel(C2CTL, cregs_save.c2ctl); + writel(C2DATACTL, cregs_save.c2datactl); + writel(C2MISC, cregs_save.c2misc); + return; + } + // writel(C2CTL, cregs.c2ctl); + + writel(C2CTL, ((readl(C2CTL) & ~0x03e00000) + (cregs.c2ctl & 0x03e00000))); + writel(C2DATACTL, ((readl(C2DATACTL) & ~0x000000ff) + (cregs.c2datactl & 0x000000ff))); + // ctrc2 + // disable CRTC2 acording to specs + // writel(C2CTL, cregs.c2ctl & 0xfffffff0); + // je to treba ??? + // writeb(XMISCCTRL, (readb(XMISCCTRL) & 0x19) | 0xa2); // MAFC - mfcsel & vdoutsel + // writeb(XMISCCTRL, (readb(XMISCCTRL) & 0x19) | 0x92); + // writeb(XMISCCTRL, (readb(XMISCCTRL) & ~0xe9) + 0xa2); + writel(C2DATACTL, cregs.c2datactl); + writel(C2HPARAM, cregs.c2hparam); + writel(C2HSYNC, cregs.c2hsync); + writel(C2VPARAM, cregs.c2vparam); + writel(C2VSYNC, cregs.c2vsync); + //xx + //writel(C2MISC, cregs.c2misc); + + if (mga_verbose > 1) printf(MGA_MSG" c2offset = %d\n", cregs.c2offset); + + writel(C2OFFSET, cregs.c2offset); + writel(C2STARTADD0, cregs.c2startadd0); + // writel(C2STARTADD1, cregs.c2startadd1); + writel(C2PL2STARTADD0, cregs.c2pl2startadd0); + // writel(C2PL2STARTADD1, cregs.c2pl2startadd1); + writel(C2PL3STARTADD0, cregs.c2pl3startadd0); + // writel(C2PL3STARTADD1, cregs.c2pl3startadd1); + writel(C2SPICSTARTADD0, cregs.c2spicstartadd0); + + //xx + //writel(C2SPICSTARTADD1, cregs.c2spicstartadd1); + //writel(C2SUBPICLUT, cregs.c2subpiclut); + //writel(C2PRELOAD, cregs.c2preload); + + // finaly enable everything + writel(C2CTL, cregs.c2ctl); + // printf("c2ctl:0x%08x c2datactl:0x%08x\n",readl(C2CTL), readl(C2DATACTL)); + // printf("c2misc:0x%08x\n", readl(C2MISC)); +#endif } #ifdef MGA_ALLOW_IRQ -static void enable_irq(){ - long int cc; - - cc = readl(mga_mmio_base + IEN); -// printf("*** !!! IRQREG = %d\n", (int)(cc&0xff)); - - writeb( 0x11, mga_mmio_base + CRTCX); - - writeb(0x20, mga_mmio_base + CRTCD ); /* clear 0, enable off */ - writeb(0x00, mga_mmio_base + CRTCD ); /* enable on */ - writeb(0x10, mga_mmio_base + CRTCD ); /* clear = 1 */ - - writel( regs.besglobctl , mga_mmio_base + BESGLOBCTL); - - return; +static void enable_irq() +{ + long int cc; + + cc = readl(IEN); + // printf("*** !!! IRQREG = %d\n", (int)(cc&0xff)); + + writeb(CRTCX, 0x11); + + writeb(CRTCD, 0x20); /* clear 0, enable off */ + writeb(CRTCD, 0x00); /* enable on */ + writeb(CRTCD, 0x10); /* clear = 1 */ + + writel(BESGLOBCTL, regs.besglobctl); + + return; } static void disable_irq() { - writeb( 0x11, mga_mmio_base + CRTCX); - writeb(0x20, mga_mmio_base + CRTCD ); /* clear 0, enable off */ + writeb(CRTCX, 0x11); + writeb(CRTCD, 0x20); /* clear 0, enable off */ - return; + return; } void mga_handle_irq(int irq, void *dev_id/*, struct pt_regs *pregs*/) { -// static int frame=0; -// static int counter=0; - long int cc; -// if ( ! mga_enabled_flag ) return; - -// printf("vcount = %d\n",readl(mga_mmio_base + VCOUNT)); + // static int frame=0; + // static int counter=0; + long int cc; + // if ( ! mga_enabled_flag ) return; - //printf("mga_interrupt #%d\n", irq); + // printf("vcount = %d\n",readl(VCOUNT)); - if ( irq != -1 ) { + //printf("mga_interrupt #%d\n", irq); - cc = readl(mga_mmio_base + STATUS); - if ( ! (cc & 0x10) ) return; /* vsyncpen */ -// debug_irqcnt++; - } + if ( irq != -1 ) { -// if ( debug_irqignore ) { -// debug_irqignore = 0; - - -/* - if ( mga_conf_deinterlace ) { - if ( mga_first_field ) { - // printf("mga_interrupt first field\n"); - if ( syncfb_interrupt() ) - mga_first_field = 0; - } else { - // printf("mga_interrupt second field\n"); - mga_select_buffer( mga_current_field | 2 ); - mga_first_field = 1; - } - } else { - syncfb_interrupt(); - } -*/ + cc = readl(STATUS); + if ( ! (cc & 0x10) ) return; /* vsyncpen */ + // debug_irqcnt++; + } -// frame=(frame+1)&1; - regs.besctl = (regs.besctl & ~0x07000000) + (mga_next_frame << 25); - writel( regs.besctl, mga_mmio_base + BESCTL ); + // if ( debug_irqignore ) { + // debug_irqignore = 0; + + /* + if ( mga_conf_deinterlace ) { + if ( mga_first_field ) { + // printf("mga_interrupt first field\n"); + if ( syncfb_interrupt() ) + mga_first_field = 0; + } else { + // printf("mga_interrupt second field\n"); + mga_select_buffer( mga_current_field | 2 ); + mga_first_field = 1; + } + } else { + syncfb_interrupt(); + } + */ + + // frame=(frame+1)&1; + regs.besctl = (regs.besctl & ~0x07000000) + (mga_next_frame << 25); + writel(BESCTL, regs.besctl); #ifdef CRTC2 -// sem pridat vyber obrazku !!!! - crtc2_frame_sel(mga_next_frame); + crtc2_frame_sel(mga_next_frame); #endif - + #if 0 - ++counter; - if(!(counter&63)){ - printf("mga irq counter = %d\n",counter); - } + ++counter; + if(!(counter&63)){ + printf("mga irq counter = %d\n",counter); + } #endif -// } else { -// debug_irqignore = 1; -// } - - if ( irq != -1 ) { - writeb( 0x11, mga_mmio_base + CRTCX); - writeb( 0, mga_mmio_base + CRTCD ); - writeb( 0x10, mga_mmio_base + CRTCD ); - } - -// writel( regs.besglobctl, mga_mmio_base + BESGLOBCTL); + // } else { + // debug_irqignore = 1; + // } + if ( irq != -1 ) { + writeb(CRTCX, 0x11); + writeb(CRTCD, 0); + writeb(CRTCD, 0x10); + } - return; + //writel(BESGLOBCTL, regs.besglobctl); } #endif /* MGA_ALLOW_IRQ */ -int vixConfigPlayback(vidix_playback_t *config) +int VIDIX_NAME(vixConfigPlayback)(vidix_playback_t *config) { - int i; - int x, y, sw, sh, dw, dh; - int besleft, bestop, ifactor, ofsleft, ofstop, baseadrofs, weight, weights; + unsigned int i; + int x, y, sw, sh, dw, dh; + int besleft, bestop, ifactor, ofsleft, ofstop, baseadrofs, weight, weights; #ifdef CRTC2 #define right_margin 0 #define left_margin 18 @@ -696,31 +716,31 @@ int vixConfigPlayback(vidix_playback_t *config) #define vsync_len 4 #define upper_margin 39 - unsigned int hdispend = (config->src.w + 31) & ~31; - unsigned int hsyncstart = hdispend + (right_margin & ~7); - unsigned int hsyncend = hsyncstart + (hsync_len & ~7); - unsigned int htotal = hsyncend + (left_margin & ~7); - unsigned int vdispend = config->src.h; - unsigned int vsyncstart = vdispend + lower_margin; - unsigned int vsyncend = vsyncstart + vsync_len; - unsigned int vtotal = vsyncend + upper_margin; -#endif + unsigned int hdispend = (config->src.w + 31) & ~31; + unsigned int hsyncstart = hdispend + (right_margin & ~7); + unsigned int hsyncend = hsyncstart + (hsync_len & ~7); + unsigned int htotal = hsyncend + (left_margin & ~7); + unsigned int vdispend = config->src.h; + unsigned int vsyncstart = vdispend + lower_margin; + unsigned int vsyncend = vsyncstart + vsync_len; + unsigned int vtotal = vsyncend + upper_margin; +#endif if ((config->num_frames < 1) || (config->num_frames > MGA_DEFAULT_FRAMES)) { - printf("[mga] illegal num_frames: %d, setting to %d\n", - config->num_frames, MGA_DEFAULT_FRAMES); + printf(MGA_MSG" illegal num_frames: %d, setting to %d\n", + config->num_frames, MGA_DEFAULT_FRAMES); config->num_frames = MGA_DEFAULT_FRAMES; } for(;config->num_frames>0;config->num_frames--) { /*FIXME: this driver can use more frames but we need to apply - some tricks to avoid RGB-memory hits*/ + some tricks to avoid RGB-memory hits*/ mga_src_base = ((mga_ram_size/2)*0x100000-config->num_frames*config->frame_size); mga_src_base &= (~0xFFFF); /* 64k boundary */ if(mga_src_base>=0) break; } - if (mga_verbose > 1) printf("[mga] YUV buffer base: %p\n", mga_src_base); + if (mga_verbose > 1) printf(MGA_MSG" YUV buffer base: 0x%x\n", mga_src_base); config->dga_addr = mga_mem_base + mga_src_base; @@ -730,45 +750,45 @@ int vixConfigPlayback(vidix_playback_t *config) sh = config->src.h; dw = config->dest.w; dh = config->dest.h; - + config->dest.pitch.y=32; config->dest.pitch.u=config->dest.pitch.v=16; - if (mga_verbose) printf("[mga] Setting up a %dx%d-%dx%d video window (src %dx%d) format %X\n", - dw, dh, x, y, sw, sh, config->fourcc); + if (mga_verbose) printf(MGA_MSG" Setting up a %dx%d-%dx%d video window (src %dx%d) format %X\n", + dw, dh, x, y, sw, sh, config->fourcc); if ((sw < 4) || (sh < 4) || (dw < 4) || (dh < 4)) { - printf("[mga] Invalid src/dest dimensions\n"); - return(EINVAL); + printf(MGA_MSG" Invalid src/dest dimensions\n"); + return(EINVAL); } //FIXME check that window is valid and inside desktop -// printf("[mga] vcount = %d\n", readl(mga_mmio_base + VCOUNT)); + // printf(MGA_MSG" vcount = %d\n", readl(VCOUNT)); - sw+=sw&1; + sw += sw & 1; switch(config->fourcc) { - case IMGFMT_I420: - case IMGFMT_IYUV: - case IMGFMT_YV12: - sh+=sh&1; - config->frame_size = ((sw + 31) & ~31) * sh + (((sw + 31) & ~31) * sh) / 2; - break; - case IMGFMT_YUY2: - case IMGFMT_UYVY: - config->frame_size = ((sw + 31) & ~31) * sh * 2; - break; - default: - printf("[mga] Unsupported pixel format: %x\n", config->fourcc); - return(ENOTSUP); + case IMGFMT_I420: + case IMGFMT_IYUV: + case IMGFMT_YV12: + sh+=sh&1; + config->frame_size = ((sw + 31) & ~31) * sh + (((sw + 31) & ~31) * sh) / 2; + break; + case IMGFMT_YUY2: + case IMGFMT_UYVY: + config->frame_size = ((sw + 31) & ~31) * sh * 2; + break; + default: + printf(MGA_MSG" Unsupported pixel format: %x\n", config->fourcc); + return(ENOTSUP); } config->offsets[0] = 0; -// config->offsets[1] = config->frame_size; -// config->offsets[2] = 2*config->frame_size; -// config->offsets[3] = 3*config->frame_size; + // config->offsets[1] = config->frame_size; + // config->offsets[2] = 2*config->frame_size; + // config->offsets[3] = 3*config->frame_size; for (i = 1; i < config->num_frames+1; i++) config->offsets[i] = i*config->frame_size; @@ -785,346 +805,345 @@ int vixConfigPlayback(vidix_playback_t *config) /* for G200 set Interleaved UV planes */ if (!is_g400) config->flags = VID_PLAY_INTERLEAVED_UV | INTERLEAVING_UV; - - //Setup the BES registers for a three plane 4:2:0 video source + + //Setup the BES registers for a three plane 4:2:0 video source regs.besglobctl = 0; switch(config->fourcc) { - case IMGFMT_YV12: - case IMGFMT_I420: - case IMGFMT_IYUV: - regs.besctl = 1 // BES enabled - + (0<<6) // even start polarity - + (1<<10) // x filtering enabled - + (1<<11) // y filtering enabled - + (1<<16) // chroma upsampling - + (1<<17) // 4:2:0 mode - + (1<<18); // dither enabled + case IMGFMT_YV12: + case IMGFMT_I420: + case IMGFMT_IYUV: + regs.besctl = 1 // BES enabled + + (0<<6) // even start polarity + + (1<<10) // x filtering enabled + + (1<<11) // y filtering enabled + + (1<<16) // chroma upsampling + + (1<<17) // 4:2:0 mode + + (1<<18); // dither enabled #if 0 if(is_g400) { - //zoom disabled, zoom filter disabled, 420 3 plane format, proc amp - //disabled, rgb mode disabled - regs.besglobctl = (1<<5); + //zoom disabled, zoom filter disabled, 420 3 plane format, proc amp + //disabled, rgb mode disabled + regs.besglobctl = (1<<5); } else { - //zoom disabled, zoom filter disabled, Cb samples in 0246, Cr - //in 1357, BES register update on besvcnt - regs.besglobctl = 0; + //zoom disabled, zoom filter disabled, Cb samples in 0246, Cr + //in 1357, BES register update on besvcnt + regs.besglobctl = 0; } #endif - break; + break; - case IMGFMT_YUY2: - regs.besctl = 1 // BES enabled - + (0<<6) // even start polarity - + (1<<10) // x filtering enabled - + (1<<11) // y filtering enabled - + (1<<16) // chroma upsampling - + (0<<17) // 4:2:2 mode - + (1<<18); // dither enabled + case IMGFMT_YUY2: + regs.besctl = 1 // BES enabled + + (0<<6) // even start polarity + + (1<<10) // x filtering enabled + + (1<<11) // y filtering enabled + + (1<<16) // chroma upsampling + + (0<<17) // 4:2:2 mode + + (1<<18); // dither enabled regs.besglobctl = 0; // YUY2 format selected - break; + break; - case IMGFMT_UYVY: + case IMGFMT_UYVY: regs.besctl = 1 // BES enabled - + (0<<6) // even start polarity - + (1<<10) // x filtering enabled - + (1<<11) // y filtering enabled - + (1<<16) // chroma upsampling - + (0<<17) // 4:2:2 mode - + (1<<18); // dither enabled + + (0<<6) // even start polarity + + (1<<10) // x filtering enabled + + (1<<11) // y filtering enabled + + (1<<16) // chroma upsampling + + (0<<17) // 4:2:2 mode + + (1<<18); // dither enabled regs.besglobctl = 1<<6; // UYVY format selected - break; + break; } - //Disable contrast and brightness control - regs.besglobctl |= (1<<5) + (1<<7); - regs.beslumactl = (0x7f << 16) + (0x80<<0); - regs.beslumactl = 0x80<<0; - - //Setup destination window boundaries - besleft = x > 0 ? x : 0; - bestop = y > 0 ? y : 0; - regs.beshcoord = (besleft<<16) + (x + dw-1); - regs.besvcoord = (bestop<<16) + (y + dh-1); - - //Setup source dimensions - regs.beshsrclst = (sw - 1) << 16; - regs.bespitch = (sw + 31) & ~31 ; - - //Setup horizontal scaling - ifactor = ((sw-1)<<14)/(dw-1); - ofsleft = besleft - x; - - regs.beshiscal = ifactor<<2; - regs.beshsrcst = (ofsleft*ifactor)<<2; - regs.beshsrcend = regs.beshsrcst + (((dw - ofsleft - 1) * ifactor) << 2); - - //Setup vertical scaling - ifactor = ((sh-1)<<14)/(dh-1); - ofstop = bestop - y; - - regs.besviscal = ifactor<<2; - - baseadrofs = ((ofstop*regs.besviscal)>>16)*regs.bespitch; - //frame_size = ((sw + 31) & ~31) * sh + (((sw + 31) & ~31) * sh) / 2; - regs.besa1org = (uint32_t) mga_src_base + baseadrofs; - regs.besa2org = (uint32_t) mga_src_base + baseadrofs + 1*config->frame_size; - regs.besb1org = (uint32_t) mga_src_base + baseadrofs + 2*config->frame_size; - regs.besb2org = (uint32_t) mga_src_base + baseadrofs + 3*config->frame_size; - -if(config->fourcc==IMGFMT_YV12 - ||config->fourcc==IMGFMT_IYUV - ||config->fourcc==IMGFMT_I420 - ){ - // planar YUV frames: - if (is_g400) - baseadrofs = (((ofstop*regs.besviscal)/4)>>16)*regs.bespitch; - else - baseadrofs = (((ofstop*regs.besviscal)/2)>>16)*regs.bespitch; - - if(config->fourcc==IMGFMT_YV12){ - regs.besa1corg = (uint32_t) mga_src_base + baseadrofs + regs.bespitch * sh ; - regs.besa2corg = (uint32_t) mga_src_base + baseadrofs + 1*config->frame_size + regs.bespitch * sh; - regs.besb1corg = (uint32_t) mga_src_base + baseadrofs + 2*config->frame_size + regs.bespitch * sh; - regs.besb2corg = (uint32_t) mga_src_base + baseadrofs + 3*config->frame_size + regs.bespitch * sh; - regs.besa1c3org = regs.besa1corg + ((regs.bespitch * sh) / 4); - regs.besa2c3org = regs.besa2corg + ((regs.bespitch * sh) / 4); - regs.besb1c3org = regs.besb1corg + ((regs.bespitch * sh) / 4); - regs.besb2c3org = regs.besb2corg + ((regs.bespitch * sh) / 4); - } else { - regs.besa1c3org = (uint32_t) mga_src_base + baseadrofs + regs.bespitch * sh ; - regs.besa2c3org = (uint32_t) mga_src_base + baseadrofs + 1*config->frame_size + regs.bespitch * sh; - regs.besb1c3org = (uint32_t) mga_src_base + baseadrofs + 2*config->frame_size + regs.bespitch * sh; - regs.besb2c3org = (uint32_t) mga_src_base + baseadrofs + 3*config->frame_size + regs.bespitch * sh; - regs.besa1corg = regs.besa1c3org + ((regs.bespitch * sh) / 4); - regs.besa2corg = regs.besa2c3org + ((regs.bespitch * sh) / 4); - regs.besb1corg = regs.besb1c3org + ((regs.bespitch * sh) / 4); - regs.besb2corg = regs.besb2c3org + ((regs.bespitch * sh) / 4); + //Disable contrast and brightness control + regs.besglobctl |= (1<<5) + (1<<7); + // we want to preserver these across restarts + //regs.beslumactl = (0x0 << 16) + 0x80; + + //Setup destination window boundaries + besleft = x > 0 ? x : 0; + bestop = y > 0 ? y : 0; + regs.beshcoord = (besleft<<16) + (x + dw-1); + regs.besvcoord = (bestop<<16) + (y + dh-1); + + //Setup source dimensions + regs.beshsrclst = (sw - 1) << 16; + regs.bespitch = (sw + 31) & ~31 ; + + //Setup horizontal scaling + ifactor = ((sw-1)<<14)/(dw-1); + ofsleft = besleft - x; + + regs.beshiscal = ifactor<<2; + regs.beshsrcst = (ofsleft*ifactor)<<2; + regs.beshsrcend = regs.beshsrcst + (((dw - ofsleft - 1) * ifactor) << 2); + + //Setup vertical scaling + ifactor = ((sh-1)<<14)/(dh-1); + ofstop = bestop - y; + + regs.besviscal = ifactor<<2; + + baseadrofs = ((ofstop*regs.besviscal)>>16)*regs.bespitch; + //frame_size = ((sw + 31) & ~31) * sh + (((sw + 31) & ~31) * sh) / 2; + regs.besa1org = (uint32_t) mga_src_base + baseadrofs; + regs.besa2org = (uint32_t) mga_src_base + baseadrofs + 1*config->frame_size; + regs.besb1org = (uint32_t) mga_src_base + baseadrofs + 2*config->frame_size; + regs.besb2org = (uint32_t) mga_src_base + baseadrofs + 3*config->frame_size; + + if (config->fourcc == IMGFMT_YV12 + || config->fourcc == IMGFMT_IYUV + || config->fourcc == IMGFMT_I420) + { + // planar YUV frames: + if (is_g400) + baseadrofs = (((ofstop*regs.besviscal)/4)>>16)*regs.bespitch; + else + baseadrofs = (((ofstop*regs.besviscal)/2)>>16)*regs.bespitch; + + if (config->fourcc == IMGFMT_YV12){ + regs.besa1corg = (uint32_t) mga_src_base + baseadrofs + regs.bespitch * sh ; + regs.besa2corg = (uint32_t) mga_src_base + baseadrofs + 1*config->frame_size + regs.bespitch * sh; + regs.besb1corg = (uint32_t) mga_src_base + baseadrofs + 2*config->frame_size + regs.bespitch * sh; + regs.besb2corg = (uint32_t) mga_src_base + baseadrofs + 3*config->frame_size + regs.bespitch * sh; + regs.besa1c3org = regs.besa1corg + ((regs.bespitch * sh) / 4); + regs.besa2c3org = regs.besa2corg + ((regs.bespitch * sh) / 4); + regs.besb1c3org = regs.besb1corg + ((regs.bespitch * sh) / 4); + regs.besb2c3org = regs.besb2corg + ((regs.bespitch * sh) / 4); + } else { + regs.besa1c3org = (uint32_t) mga_src_base + baseadrofs + regs.bespitch * sh ; + regs.besa2c3org = (uint32_t) mga_src_base + baseadrofs + 1*config->frame_size + regs.bespitch * sh; + regs.besb1c3org = (uint32_t) mga_src_base + baseadrofs + 2*config->frame_size + regs.bespitch * sh; + regs.besb2c3org = (uint32_t) mga_src_base + baseadrofs + 3*config->frame_size + regs.bespitch * sh; + regs.besa1corg = regs.besa1c3org + ((regs.bespitch * sh) / 4); + regs.besa2corg = regs.besa2c3org + ((regs.bespitch * sh) / 4); + regs.besb1corg = regs.besb1c3org + ((regs.bespitch * sh) / 4); + regs.besb2corg = regs.besb2c3org + ((regs.bespitch * sh) / 4); + } } -} - weight = ofstop * (regs.besviscal >> 2); weights = weight < 0 ? 1 : 0; regs.besv2wght = regs.besv1wght = (weights << 16) + ((weight & 0x3FFF) << 2); regs.besv2srclst = regs.besv1srclst = sh - 1 - (((ofstop * regs.besviscal) >> 16) & 0x03FF); #ifdef CRTC2 - // pridat hlavni registry - tj. casovani ... + // pridat hlavni registry - tj. casovani ... -switch(config->fourcc){ - case IMGFMT_YV12: - case IMGFMT_I420: - case IMGFMT_IYUV: + switch(config->fourcc){ + case IMGFMT_YV12: + case IMGFMT_I420: + case IMGFMT_IYUV: cregs.c2ctl = 1 // CRTC2 enabled - + (1<<1) // external clock - + (0<<2) // external clock - + (1<<3) // pixel clock enable - not needed ??? - + (0<<4) // high prioryty req - + (1<<5) // high prioryty req - + (0<<6) // high prioryty req - + (1<<8) // high prioryty req max - + (0<<9) // high prioryty req max - + (0<<10) // high prioryty req max - + (0<<20) // CRTC1 to DAC - + (1<<21) // 420 mode - + (1<<22) // 420 mode - + (1<<23) // 420 mode - + (0<<24) // single chroma line for 420 mode - need to be corrected - + (0<<25) /*/ interlace mode - need to be corrected*/ - + (0<<26) // field legth polariry - + (0<<27) // field identification polariry - + (1<<28) // VIDRST detection mode - + (0<<29) // VIDRST detection mode - + (1<<30) // Horizontal counter preload - + (1<<31) // Vertical counter preload - ; + + (1<<1) // external clock + + (0<<2) // external clock + + (1<<3) // pixel clock enable - not needed ??? + + (0<<4) // high priority req + + (1<<5) // high priority req + + (0<<6) // high priority req + + (1<<8) // high priority req max + + (0<<9) // high priority req max + + (0<<10) // high priority req max + + (0<<20) // CRTC1 to DAC + + (1<<21) // 420 mode + + (1<<22) // 420 mode + + (1<<23) // 420 mode + + (0<<24) // single chroma line for 420 mode - need to be corrected + + (0<<25) /*/ interlace mode - need to be corrected*/ + + (0<<26) // field legth polariry + + (0<<27) // field identification polariry + + (1<<28) // VIDRST detection mode + + (0<<29) // VIDRST detection mode + + (1<<30) // Horizontal counter preload + + (1<<31) // Vertical counter preload + ; cregs.c2datactl = 1 // disable dither - propably not needed, we are already in YUV mode - + (1<<1) // Y filter enable - + (1<<2) // CbCr filter enable - + (0<<3) // subpicture enable (disabled) - + (0<<4) // NTSC enable (disabled - PAL) - + (0<<5) // C2 static subpicture enable (disabled) - + (0<<6) // C2 subpicture offset division (disabled) - + (0<<7) // 422 subformat selection ! -/* + (0<<8) // 15 bpp high alpha - + (0<<9) // 15 bpp high alpha - + (0<<10) // 15 bpp high alpha - + (0<<11) // 15 bpp high alpha - + (0<<12) // 15 bpp high alpha - + (0<<13) // 15 bpp high alpha - + (0<<14) // 15 bpp high alpha - + (0<<15) // 15 bpp high alpha - + (0<<16) // 15 bpp low alpha - + (0<<17) // 15 bpp low alpha - + (0<<18) // 15 bpp low alpha - + (0<<19) // 15 bpp low alpha - + (0<<20) // 15 bpp low alpha - + (0<<21) // 15 bpp low alpha - + (0<<22) // 15 bpp low alpha - + (0<<23) // 15 bpp low alpha - + (0<<24) // static subpicture key - + (0<<25) // static subpicture key - + (0<<26) // static subpicture key - + (0<<27) // static subpicture key - + (0<<28) // static subpicture key -*/ ; - break; - - case IMGFMT_YUY2: + + (1<<1) // Y filter enable + + (1<<2) // CbCr filter enable + + (0<<3) // subpicture enable (disabled) + + (0<<4) // NTSC enable (disabled - PAL) + + (0<<5) // C2 static subpicture enable (disabled) + + (0<<6) // C2 subpicture offset division (disabled) + + (0<<7) // 422 subformat selection ! + /* + (0<<8) // 15 bpp high alpha + + (0<<9) // 15 bpp high alpha + + (0<<10) // 15 bpp high alpha + + (0<<11) // 15 bpp high alpha + + (0<<12) // 15 bpp high alpha + + (0<<13) // 15 bpp high alpha + + (0<<14) // 15 bpp high alpha + + (0<<15) // 15 bpp high alpha + + (0<<16) // 15 bpp low alpha + + (0<<17) // 15 bpp low alpha + + (0<<18) // 15 bpp low alpha + + (0<<19) // 15 bpp low alpha + + (0<<20) // 15 bpp low alpha + + (0<<21) // 15 bpp low alpha + + (0<<22) // 15 bpp low alpha + + (0<<23) // 15 bpp low alpha + + (0<<24) // static subpicture key + + (0<<25) // static subpicture key + + (0<<26) // static subpicture key + + (0<<27) // static subpicture key + + (0<<28) // static subpicture key + */ ; + break; + + case IMGFMT_YUY2: cregs.c2ctl = 1 // CRTC2 enabled - + (1<<1) // external clock - + (0<<2) // external clock - + (1<<3) // pixel clock enable - not needed ??? - + (0<<4) // high prioryty req - acc to spec - + (1<<5) // high prioryty req - + (0<<6) // high prioryty req - // 7 reserved - + (1<<8) // high prioryty req max - + (0<<9) // high prioryty req max - + (0<<10) // high prioryty req max - // 11-19 reserved - + (0<<20) // CRTC1 to DAC - + (1<<21) // 422 mode - + (0<<22) // 422 mode - + (1<<23) // 422 mode - + (0<<24) // single chroma line for 420 mode - need to be corrected - + (0<<25) /*/ interlace mode - need to be corrected*/ - + (0<<26) // field legth polariry - + (0<<27) // field identification polariry - + (1<<28) // VIDRST detection mode - + (0<<29) // VIDRST detection mode - + (1<<30) // Horizontal counter preload - + (1<<31) // Vertical counter preload - ; + + (1<<1) // external clock + + (0<<2) // external clock + + (1<<3) // pixel clock enable - not needed ??? + + (0<<4) // high priority req - acc to spec + + (1<<5) // high priority req + + (0<<6) // high priority req + // 7 reserved + + (1<<8) // high priority req max + + (0<<9) // high priority req max + + (0<<10) // high priority req max + // 11-19 reserved + + (0<<20) // CRTC1 to DAC + + (1<<21) // 422 mode + + (0<<22) // 422 mode + + (1<<23) // 422 mode + + (0<<24) // single chroma line for 420 mode - need to be corrected + + (0<<25) /*/ interlace mode - need to be corrected*/ + + (0<<26) // field legth polariry + + (0<<27) // field identification polariry + + (1<<28) // VIDRST detection mode + + (0<<29) // VIDRST detection mode + + (1<<30) // Horizontal counter preload + + (1<<31) // Vertical counter preload + ; cregs.c2datactl = 1 // disable dither - propably not needed, we are already in YUV mode - + (1<<1) // Y filter enable - + (1<<2) // CbCr filter enable - + (0<<3) // subpicture enable (disabled) - + (0<<4) // NTSC enable (disabled - PAL) - + (0<<5) // C2 static subpicture enable (disabled) - + (0<<6) // C2 subpicture offset division (disabled) - + (0<<7) // 422 subformat selection ! -/* + (0<<8) // 15 bpp high alpha - + (0<<9) // 15 bpp high alpha - + (0<<10) // 15 bpp high alpha - + (0<<11) // 15 bpp high alpha - + (0<<12) // 15 bpp high alpha - + (0<<13) // 15 bpp high alpha - + (0<<14) // 15 bpp high alpha - + (0<<15) // 15 bpp high alpha - + (0<<16) // 15 bpp low alpha - + (0<<17) // 15 bpp low alpha - + (0<<18) // 15 bpp low alpha - + (0<<19) // 15 bpp low alpha - + (0<<20) // 15 bpp low alpha - + (0<<21) // 15 bpp low alpha - + (0<<22) // 15 bpp low alpha - + (0<<23) // 15 bpp low alpha - + (0<<24) // static subpicture key - + (0<<25) // static subpicture key - + (0<<26) // static subpicture key - + (0<<27) // static subpicture key - + (0<<28) // static subpicture key -*/ ; - break; - - case IMGFMT_UYVY: + + (1<<1) // Y filter enable + + (1<<2) // CbCr filter enable + + (0<<3) // subpicture enable (disabled) + + (0<<4) // NTSC enable (disabled - PAL) + + (0<<5) // C2 static subpicture enable (disabled) + + (0<<6) // C2 subpicture offset division (disabled) + + (0<<7) // 422 subformat selection ! + /* + (0<<8) // 15 bpp high alpha + + (0<<9) // 15 bpp high alpha + + (0<<10) // 15 bpp high alpha + + (0<<11) // 15 bpp high alpha + + (0<<12) // 15 bpp high alpha + + (0<<13) // 15 bpp high alpha + + (0<<14) // 15 bpp high alpha + + (0<<15) // 15 bpp high alpha + + (0<<16) // 15 bpp low alpha + + (0<<17) // 15 bpp low alpha + + (0<<18) // 15 bpp low alpha + + (0<<19) // 15 bpp low alpha + + (0<<20) // 15 bpp low alpha + + (0<<21) // 15 bpp low alpha + + (0<<22) // 15 bpp low alpha + + (0<<23) // 15 bpp low alpha + + (0<<24) // static subpicture key + + (0<<25) // static subpicture key + + (0<<26) // static subpicture key + + (0<<27) // static subpicture key + + (0<<28) // static subpicture key + */ ; + break; + + case IMGFMT_UYVY: cregs.c2ctl = 1 // CRTC2 enabled - + (1<<1) // external clock - + (0<<2) // external clock - + (1<<3) // pixel clock enable - not needed ??? - + (0<<4) // high prioryty req - + (1<<5) // high prioryty req - + (0<<6) // high prioryty req - + (1<<8) // high prioryty req max - + (0<<9) // high prioryty req max - + (0<<10) // high prioryty req max - + (0<<20) // CRTC1 to DAC - + (1<<21) // 422 mode - + (0<<22) // 422 mode - + (1<<23) // 422 mode - + (1<<24) // single chroma line for 420 mode - need to be corrected - + (1<<25) /*/ interlace mode - need to be corrected*/ - + (0<<26) // field legth polariry - + (0<<27) // field identification polariry - + (1<<28) // VIDRST detection mode - + (0<<29) // VIDRST detection mode - + (1<<30) // Horizontal counter preload - + (1<<31) // Vertical counter preload - ; + + (1<<1) // external clock + + (0<<2) // external clock + + (1<<3) // pixel clock enable - not needed ??? + + (0<<4) // high priority req + + (1<<5) // high priority req + + (0<<6) // high priority req + + (1<<8) // high priority req max + + (0<<9) // high priority req max + + (0<<10) // high priority req max + + (0<<20) // CRTC1 to DAC + + (1<<21) // 422 mode + + (0<<22) // 422 mode + + (1<<23) // 422 mode + + (1<<24) // single chroma line for 420 mode - need to be corrected + + (1<<25) /*/ interlace mode - need to be corrected*/ + + (0<<26) // field legth polariry + + (0<<27) // field identification polariry + + (1<<28) // VIDRST detection mode + + (0<<29) // VIDRST detection mode + + (1<<30) // Horizontal counter preload + + (1<<31) // Vertical counter preload + ; cregs.c2datactl = 0 // enable dither - propably not needed, we are already in YUV mode - + (1<<1) // Y filter enable - + (1<<2) // CbCr filter enable - + (0<<3) // subpicture enable (disabled) - + (0<<4) // NTSC enable (disabled - PAL) - + (0<<5) // C2 static subpicture enable (disabled) - + (0<<6) // C2 subpicture offset division (disabled) - + (1<<7) // 422 subformat selection ! -/* + (0<<8) // 15 bpp high alpha - + (0<<9) // 15 bpp high alpha - + (0<<10) // 15 bpp high alpha - + (0<<11) // 15 bpp high alpha - + (0<<12) // 15 bpp high alpha - + (0<<13) // 15 bpp high alpha - + (0<<14) // 15 bpp high alpha - + (0<<15) // 15 bpp high alpha - + (0<<16) // 15 bpp low alpha - + (0<<17) // 15 bpp low alpha - + (0<<18) // 15 bpp low alpha - + (0<<19) // 15 bpp low alpha - + (0<<20) // 15 bpp low alpha - + (0<<21) // 15 bpp low alpha - + (0<<22) // 15 bpp low alpha - + (0<<23) // 15 bpp low alpha - + (0<<24) // static subpicture key - + (0<<25) // static subpicture key - + (0<<26) // static subpicture key - + (0<<27) // static subpicture key - + (0<<28) // static subpicture key -*/ ; - break; + + (1<<1) // Y filter enable + + (1<<2) // CbCr filter enable + + (0<<3) // subpicture enable (disabled) + + (0<<4) // NTSC enable (disabled - PAL) + + (0<<5) // C2 static subpicture enable (disabled) + + (0<<6) // C2 subpicture offset division (disabled) + + (1<<7) // 422 subformat selection ! + /* + (0<<8) // 15 bpp high alpha + + (0<<9) // 15 bpp high alpha + + (0<<10) // 15 bpp high alpha + + (0<<11) // 15 bpp high alpha + + (0<<12) // 15 bpp high alpha + + (0<<13) // 15 bpp high alpha + + (0<<14) // 15 bpp high alpha + + (0<<15) // 15 bpp high alpha + + (0<<16) // 15 bpp low alpha + + (0<<17) // 15 bpp low alpha + + (0<<18) // 15 bpp low alpha + + (0<<19) // 15 bpp low alpha + + (0<<20) // 15 bpp low alpha + + (0<<21) // 15 bpp low alpha + + (0<<22) // 15 bpp low alpha + + (0<<23) // 15 bpp low alpha + + (0<<24) // static subpicture key + + (0<<25) // static subpicture key + + (0<<26) // static subpicture key + + (0<<27) // static subpicture key + + (0<<28) // static subpicture key + */ ; + break; } - cregs.c2hparam=((hdispend - 8) << 16) | (htotal - 8); - cregs.c2hsync=((hsyncend - 8) << 16) | (hsyncstart - 8); - - cregs.c2misc=0 // CRTCV2 656 togg f0 - +(0<<1) // CRTCV2 656 togg f0 - +(0<<2) // CRTCV2 656 togg f0 - +(0<<4) // CRTCV2 656 togg f1 - +(0<<5) // CRTCV2 656 togg f1 - +(0<<6) // CRTCV2 656 togg f1 - +(0<<8) // Hsync active high - +(0<<9) // Vsync active high - // 16-27 c2vlinecomp - nevim co tam dat - ; - cregs.c2offset=(regs.bespitch << 1); + cregs.c2hparam=((hdispend - 8) << 16) | (htotal - 8); + cregs.c2hsync=((hsyncend - 8) << 16) | (hsyncstart - 8); + + cregs.c2misc=0 // CRTCV2 656 togg f0 + +(0<<1) // CRTCV2 656 togg f0 + +(0<<2) // CRTCV2 656 togg f0 + +(0<<4) // CRTCV2 656 togg f1 + +(0<<5) // CRTCV2 656 togg f1 + +(0<<6) // CRTCV2 656 togg f1 + +(0<<8) // Hsync active high + +(0<<9) // Vsync active high + // 16-27 c2vlinecomp - nevim co tam dat + ; + cregs.c2offset=(regs.bespitch << 1); + + cregs.c2pl2startadd0=regs.besa1corg; + //cregs.c2pl2startadd1=regs.besa2corg; + cregs.c2pl3startadd0=regs.besa1c3org; + //cregs.c2pl3startadd1=regs.besa2c3org; + + cregs.c2preload=(vsyncstart << 16) | (hsyncstart); // from + + cregs.c2spicstartadd0=0; // not used + //cregs.c2spicstartadd1=0; // not used - cregs.c2pl2startadd0=regs.besa1corg; -// cregs.c2pl2startadd1=regs.besa2corg; - cregs.c2pl3startadd0=regs.besa1c3org; -// cregs.c2pl3startadd1=regs.besa2c3org; - - cregs.c2preload=(vsyncstart << 16) | (hsyncstart); // from - - cregs.c2spicstartadd0=0; // not used -// cregs.c2spicstartadd1=0; // not used - cregs.c2startadd0=regs.besa1org; -// cregs.c2startadd1=regs.besa2org; - + //cregs.c2startadd1=regs.besa2org; + cregs.c2subpiclut=0; //not used - + cregs.c2vparam=((vdispend - 1) << 16) | (vtotal - 1); cregs.c2vsync=((vsyncend - 1) << 16) | (vsyncstart - 1); #endif /* CRTC2 */ @@ -1133,15 +1152,15 @@ switch(config->fourcc){ return(0); } -int vixPlaybackOn(void) +int VIDIX_NAME(vixPlaybackOn)(void) { - if (mga_verbose) printf("[mga] playback on\n"); + if (mga_verbose) printf(MGA_MSG" playback on\n"); vid_src_ready = 1; if(vid_overlay_on) { regs.besctl |= 1; - mga_vid_write_regs(0); + mga_vid_write_regs(0); } #ifdef MGA_ALLOW_IRQ if (mga_irq != -1) @@ -1152,11 +1171,11 @@ int vixPlaybackOn(void) return(0); } -int vixPlaybackOff(void) +int VIDIX_NAME(vixPlaybackOff)(void) { - if (mga_verbose) printf("[mga] playback off\n"); + if (mga_verbose) printf(MGA_MSG" playback off\n"); - vid_src_ready = 0; + vid_src_ready = 0; #ifdef MGA_ALLOW_IRQ if (mga_irq != -1) disable_irq(); @@ -1168,152 +1187,155 @@ int vixPlaybackOff(void) return(0); } -int vixProbe(int verbose,int force) +int VIDIX_NAME(vixProbe)(int verbose,int force) { - pciinfo_t lst[MAX_PCI_DEVICES]; - unsigned int i, num_pci; - int err; + pciinfo_t lst[MAX_PCI_DEVICES]; + unsigned int i, num_pci; + int err; - if (verbose) printf("[mga] probe\n"); + if (verbose) printf(MGA_MSG" probe\n"); - mga_verbose = verbose; + mga_verbose = verbose; - is_g400 = -1; + is_g400 = -1; - err = pci_scan(&lst, &num_pci); - if (err) - { - printf("[mga] Error occured during pci scan: %s\n", strerror(err)); - return(err); - } + err = pci_scan(lst, &num_pci); + if (err) + { + printf(MGA_MSG" Error occured during pci scan: %s\n", strerror(err)); + return(err); + } + + if (mga_verbose) + printf(MGA_MSG" found %d pci devices\n", num_pci); - if (mga_verbose) - printf("[mga] found %d pci devices\n", num_pci); - - for (i = 0; i < num_pci; i++) + for (i = 0; i < num_pci; i++) + { + if (mga_verbose > 1) + printf(MGA_MSG" pci[%d] vendor: %d device: %d\n", + i, lst[i].vendor, lst[i].device); + if (lst[i].vendor == VENDOR_MATROX) { - if (mga_verbose > 1) - printf("[mga] pci[%d] vendor: %d device: %d\n", - i, lst[i].vendor, lst[i].device); - if (lst[i].vendor == VENDOR_MATROX) + switch(lst[i].device) { - switch(lst[i].device) - { - case DEVICE_MATROX_MGA_G550_AGP: - printf("[mga] Found MGA G550\n"); - is_g400 = 1; - goto card_found; - case DEVICE_MATROX_MGA_G400_AGP: - printf("[mga] Found MGA G400/G450\n"); - is_g400 = 1; - goto card_found; - case DEVICE_MATROX_MGA_G200_AGP: - printf("[mga] Found MGA G200 AGP\n"); - is_g400 = 0; - goto card_found; - case DEVICE_MATROX_MGA_G200: - printf("[mga] Found MGA G200 PCI\n"); - is_g400 = 0; - goto card_found; - } + case DEVICE_MATROX_MGA_G550_AGP: + printf(MGA_MSG" Found MGA G550\n"); + is_g400 = 1; + goto card_found; + case DEVICE_MATROX_MGA_G400_AGP: + printf(MGA_MSG" Found MGA G400/G450\n"); + is_g400 = 1; + goto card_found; + case DEVICE_MATROX_MGA_G200_AGP: + printf(MGA_MSG" Found MGA G200 AGP\n"); + is_g400 = 0; + goto card_found; + case DEVICE_MATROX_MGA_G200: + printf(MGA_MSG" Found MGA G200 PCI\n"); + is_g400 = 0; + goto card_found; } } + } - if (is_g400 == -1) - { - printf("[mga] No supported cards found\n"); - return(ENXIO); - } + if (is_g400 == -1) + { + printf(MGA_MSG" No supported cards found\n"); + return(ENXIO); + } card_found: - probed = 1; - memcpy(&pci_info, &lst[i], sizeof(pciinfo_t)); + probed = 1; + memcpy(&pci_info, &lst[i], sizeof(pciinfo_t)); - mga_cap.device_id = pci_info.device; /* set device id in capabilites */ + mga_cap.device_id = pci_info.device; /* set device id in capabilites */ - return(0); + return(0); } -int vixInit(void) +int VIDIX_NAME(vixInit)(const char *args) { unsigned int card_option = 0; int err; - - if (mga_verbose) printf("[mga] init\n"); + + /* reset Brightness & Constrast here */ + regs.beslumactl = (0x0 << 16) + 0x80; + + if (mga_verbose) printf(MGA_MSG" init\n"); mga_vid_in_use = 0; printf("Matrox MGA G200/G400/G450 YUV Video interface v2.01 (c) Aaron Holtzman & A'rpi\n"); -#ifdef CRCT2 +#ifdef CRTC2 printf("Driver compiled with TV-out (second-head) support\n"); #endif if (!probed) { - printf("[mga] driver was not probed but is being initializing\n"); + printf(MGA_MSG" driver was not probed but is being initializing\n"); return(EINTR); } #ifdef MGA_PCICONFIG_MEMDETECT pci_config_read(pci_info.bus, pci_info.card, pci_info.func, - 0x40, 4, &card_option); - if (mga_verbose > 1) printf("[mga] OPTION word: 0x%08X mem: 0x%02X %s\n", card_option, - (card_option>>10)&0x17, ((card_option>>14)&1)?"SGRAM":"SDRAM"); + 0x40, 4, &card_option); + if (mga_verbose > 1) printf(MGA_MSG" OPTION word: 0x%08X mem: 0x%02X %s\n", card_option, + (card_option>>10)&0x17, ((card_option>>14)&1)?"SGRAM":"SDRAM"); #endif if (mga_ram_size) { - printf("[mga] RAMSIZE forced to %d MB\n", mga_ram_size); + printf(MGA_MSG" RAMSIZE forced to %d MB\n", mga_ram_size); } else { #ifdef MGA_MEMORY_SIZE - mga_ram_size = MGA_MEMORY_SIZE; - printf("[mga] hard-coded RAMSIZE is %d MB\n", (unsigned int) mga_ram_size); + mga_ram_size = MGA_MEMORY_SIZE; + printf(MGA_MSG" hard-coded RAMSIZE is %d MB\n", (unsigned int) mga_ram_size); #else - if (is_g400) + if (is_g400) { switch((card_option>>10)&0x17) { - // SDRAM: - case 0x00: - case 0x04: mga_ram_size = 16; break; - case 0x03: mga_ram_size = 32; break; - // SGRAM: - case 0x10: - case 0x14: mga_ram_size = 32; break; - case 0x11: - case 0x12: mga_ram_size = 16; break; - default: - mga_ram_size = 16; - printf("[mga] Couldn't detect RAMSIZE, assuming 16MB!\n"); + // SDRAM: + case 0x00: + case 0x04: mga_ram_size = 16; break; + case 0x03: mga_ram_size = 32; break; + // SGRAM: + case 0x10: + case 0x14: mga_ram_size = 32; break; + case 0x11: + case 0x12: mga_ram_size = 16; break; + default: + mga_ram_size = 16; + printf(MGA_MSG" Couldn't detect RAMSIZE, assuming 16MB!\n"); } } else { switch((card_option>>10)&0x17) { -// case 0x10: -// case 0x13: mga_ram_size = 8; break; - default: mga_ram_size = 8; + // case 0x10: + // case 0x13: mga_ram_size = 8; break; + default: mga_ram_size = 8; } - } + } #if 0 -// printf("List resources -----------\n"); - for(temp=0;temp<DEVICE_COUNT_RESOURCE;temp++){ - struct resource *res=&pci_dev->resource[temp]; - if(res->flags){ - int size=(1+res->end-res->start)>>20; - printf("res %d: start: 0x%X end: 0x%X (%d MB) flags=0x%X\n",temp,res->start,res->end,size,res->flags); - if(res->flags&(IORESOURCE_MEM|IORESOURCE_PREFETCH)){ - if(size>mga_ram_size && size<=64) mga_ram_size=size; - } - } + // printf("List resources -----------\n"); + for(temp=0;temp<DEVICE_COUNT_RESOURCE;temp++){ + struct resource *res=&pci_dev->resource[temp]; + if(res->flags){ + int size=(1+res->end-res->start)>>20; + printf("res %d: start: 0x%X end: 0x%X (%d MB) flags=0x%X\n",temp,res->start,res->end,size,res->flags); + if(res->flags&(IORESOURCE_MEM|IORESOURCE_PREFETCH)){ + if(size>mga_ram_size && size<=64) mga_ram_size=size; + } } + } #endif - printf("[mga] detected RAMSIZE is %d MB\n", (unsigned int) mga_ram_size); + printf(MGA_MSG" detected RAMSIZE is %d MB\n", (unsigned int) mga_ram_size); #endif } @@ -1321,29 +1343,29 @@ int vixInit(void) { if ((mga_ram_size < 4) || (mga_ram_size > 64)) { - printf("[mga] invalid RAMSIZE: %d MB\n", mga_ram_size); + printf(MGA_MSG" invalid RAMSIZE: %d MB\n", mga_ram_size); return(EINVAL); } } - if (mga_verbose > 1) printf("[mga] hardware addresses: mmio: %p, framebuffer: %p\n", - pci_info.base1, pci_info.base0); + if (mga_verbose > 1) printf(MGA_MSG" hardware addresses: mmio: 0x%x, framebuffer: 0x%x\n", + pci_info.base1, pci_info.base0); mga_mmio_base = map_phys_mem(pci_info.base1,0x4000); mga_mem_base = map_phys_mem(pci_info.base0,mga_ram_size*1024*1024); - if (mga_verbose > 1) printf("[mga] MMIO at %p, IRQ: %d, framebuffer: %p\n", - mga_mmio_base, mga_irq, mga_mem_base); + if (mga_verbose > 1) printf(MGA_MSG" MMIO at %p, IRQ: %d, framebuffer: %p\n", + mga_mmio_base, mga_irq, mga_mem_base); err = mtrr_set_type(pci_info.base0,mga_ram_size*1024*1024,MTRR_TYPE_WRCOMB); - if(!err) printf("[mga] Set write-combining type of video memory\n"); + if(!err) printf(MGA_MSG" Set write-combining type of video memory\n"); #ifdef MGA_ALLOW_IRQ if (mga_irq != -1) { - int tmp = request_irq(mga_irq, mga_handle_irq, SA_INTERRUPT | SA_SHIRQ, "Syncfb Time Base", &mga_irq); - if (tmp) + int tmp = request_irq(mga_irq, mga_handle_irq, SA_INTERRUPT | SA_SHIRQ, "Syncfb Time Base", &mga_irq); + if (tmp) { - printf("syncfb (mga): cannot register irq %d (Err: %d)\n", mga_irq, tmp); - mga_irq=-1; + printf("syncfb (mga): cannot register irq %d (Err: %d)\n", mga_irq, tmp); + mga_irq=-1; } else { @@ -1356,133 +1378,141 @@ int vixInit(void) mga_irq=-1; } #else - printf("syncfb (mga): IRQ disabled in mga_vid.c\n"); - mga_irq=-1; + printf("syncfb (mga): IRQ disabled in mga_vid.c\n"); + mga_irq=-1; +#endif +#ifdef CRTC2 + memset(&cregs_save, 0, sizeof(cregs_save)); #endif - return(0); } -void vixDestroy(void) +void VIDIX_NAME(vixDestroy)(void) { - if (mga_verbose) printf("[mga] destroy\n"); + if (mga_verbose) printf(MGA_MSG" destroy\n"); /* FIXME turn off BES */ - vid_src_ready = 0; + vid_src_ready = 0; regs.besctl &= ~1; regs.besglobctl &= ~(1<<6); // UYVY format selected -// mga_config.colkey_on=0; //!!! + // mga_config.colkey_on=0; //!!! mga_vid_write_regs(1); mga_vid_in_use = 0; #ifdef MGA_ALLOW_IRQ if (mga_irq != -1) - free_irq(mga_irq, &mga_irq); + free_irq(mga_irq, &mga_irq); #endif if (mga_mmio_base) - unmap_phys_mem(mga_mmio_base, 0x4000); + unmap_phys_mem(mga_mmio_base, 0x4000); if (mga_mem_base) - unmap_phys_mem(mga_mem_base, mga_ram_size); + unmap_phys_mem(mga_mem_base, mga_ram_size); return; } -int vixQueryFourcc(vidix_fourcc_t *to) +int VIDIX_NAME(vixQueryFourcc)(vidix_fourcc_t *to) { int supports=0; - if (mga_verbose) printf("[mga] query fourcc (%x)\n", to->fourcc); + if (mga_verbose) printf(MGA_MSG" query fourcc (%x)\n", to->fourcc); switch(to->fourcc) { - case IMGFMT_YV12: - case IMGFMT_IYUV: - case IMGFMT_I420: - supports = is_g400 ? 1 : 0; - case IMGFMT_NV12: - supports = is_g400 ? 0 : 1; - case IMGFMT_YUY2: - case IMGFMT_UYVY: - supports = 1; - break; - default: - supports = 0; + case IMGFMT_YV12: + case IMGFMT_IYUV: + case IMGFMT_I420: + supports = is_g400 ? 1 : 0; + case IMGFMT_NV12: + supports = is_g400 ? 0 : 1; + case IMGFMT_YUY2: + case IMGFMT_UYVY: + supports = 1; + break; + default: + supports = 0; } - + if(!supports) { to->depth = to->flags = 0; return(ENOTSUP); } to->depth = VID_DEPTH_12BPP | - VID_DEPTH_15BPP | VID_DEPTH_16BPP | - VID_DEPTH_24BPP | VID_DEPTH_32BPP; + VID_DEPTH_15BPP | VID_DEPTH_16BPP | + VID_DEPTH_24BPP | VID_DEPTH_32BPP; to->flags = VID_CAP_EXPAND | VID_CAP_SHRINK | VID_CAP_COLORKEY; return(0); } -unsigned int vixGetVersion(void) +unsigned int VIDIX_NAME(vixGetVersion)(void) { return(VIDIX_VERSION); } -int vixGetCapability(vidix_capability_t *to) +int VIDIX_NAME(vixGetCapability)(vidix_capability_t *to) { memcpy(to, &mga_cap, sizeof(vidix_capability_t)); return(0); } -int vixGetGrKeys(vidix_grkey_t *grkey) +int VIDIX_NAME(vixGetGrKeys)(vidix_grkey_t *grkey) { memcpy(grkey, &mga_grkey, sizeof(vidix_grkey_t)); return(0); } -int vixSetGrKeys(const vidix_grkey_t *grkey) +int VIDIX_NAME(vixSetGrKeys)(const vidix_grkey_t *grkey) { memcpy(&mga_grkey, grkey, sizeof(vidix_grkey_t)); return(0); } -int vixPlaybackSetEq( const vidix_video_eq_t * eq) +int VIDIX_NAME(vixPlaybackSetEq)( const vidix_video_eq_t * eq) { - uint32_t luma = 0; - float factor = 256.0 / 2000; + uint32_t luma; + float factor = 255.0 / 2000; /* contrast and brightness control isn't supported on G200 - alex */ if (!is_g400) { - if (mga_verbose) printf("[mga] equalizer isn't supported with G200\n"); + if (mga_verbose) printf(MGA_MSG" equalizer isn't supported with G200\n"); return(ENOTSUP); } - + + luma = regs.beslumactl; + if (eq->cap & VEQ_CAP_BRIGHTNESS) - luma += ((int)(eq->brightness * factor) << 16); + { + luma &= 0xffff; + luma |= (((int)(eq->brightness * factor) & 0xff) << 16); + } if (eq->cap & VEQ_CAP_CONTRAST) - luma += ((int)(eq->contrast * factor) & 0xFFFF); + { + luma &= 0xffff << 16; + luma |= ((int)((eq->contrast + 1000) * factor) & 0xff); + } - regs.beslumactl = luma+0x80; + regs.beslumactl = luma; - writel(regs.beslumactl,mga_mmio_base + BESLUMACTL); + writel(BESLUMACTL, regs.beslumactl); return(0); } -int vixPlaybackGetEq( vidix_video_eq_t * eq) +int VIDIX_NAME(vixPlaybackGetEq)( vidix_video_eq_t * eq) { - uint32_t luma; - float factor = 2000.0 / 256; + float factor = 2000.0 / 255; /* contrast and brightness control isn't supported on G200 - alex */ if (!is_g400) { - if (mga_verbose) printf("[mga] equalizer isn't supported with G200\n"); + if (mga_verbose) printf(MGA_MSG" equalizer isn't supported with G200\n"); return(ENOTSUP); } - regs.beslumactl = readl(mga_mmio_base + BESLUMACTL); - luma = regs.beslumactl-0x80; - - eq->brightness = (luma >> 16) * factor; - eq->contrast = (luma & 0xFFFF) * factor; + // BESLUMACTL is WO only registr! + // this will not work: regs.beslumactl = readl(BESLUMACTL); + eq->brightness = ((signed char)((regs.beslumactl >> 16) & 0xff)) * factor; + eq->contrast = (regs.beslumactl & 0xFF) * factor - 1000; eq->cap = VEQ_CAP_BRIGHTNESS | VEQ_CAP_CONTRAST; return(0); diff --git a/src/video_out/vidix/drivers/nvidia_vid.c b/src/video_out/vidix/drivers/nvidia_vid.c index 4f40fdd33..617a1f359 100644 --- a/src/video_out/vidix/drivers/nvidia_vid.c +++ b/src/video_out/vidix/drivers/nvidia_vid.c @@ -7,12 +7,14 @@ #include "vidix.h" #include "fourcc.h" -#include "libdha.h" -#include "pci_ids.h" -#include "pci_names.h" +#include "libdha/libdha.h" +#include "libdha/pci_ids.h" +#include "libdha/pci_names.h" #include "nvidia.h" +#define VIDIX_STATIC nvidia_ + static void *ctrl_base = 0; static void *fb_base = 0; static int32_t overlay_offset = 0; @@ -56,9 +58,9 @@ static const struct nv_card_id_s nv_card_id; static const struct nv_card_id_s nv_card_ids[]= { - { DEVICE_NVIDIA_RIVA_TNT2_NV5, "nVidia TNT2 (NV5) ", 5, CARD_FLAGS_NOTSUPPORTED}, - { DEVICE_NVIDIA_VANTA_NV6, "nVidia Vanta (NV6.1)", 6, CARD_FLAGS_NOTSUPPORTED}, - { DEVICE_NVIDIA_VANTA_NV62, "nVidia Vanta (NV6.2)", 6, CARD_FLAGS_NOTSUPPORTED} + { DEVICE_NVIDIA_NV5_RIVA_TNT2, "nVidia TNT2 (NV5) ", 5, CARD_FLAGS_NOTSUPPORTED}, + { DEVICE_NVIDIA_NV6_VANTA, "nVidia Vanta (NV6.1)", 6, CARD_FLAGS_NOTSUPPORTED}, + { DEVICE_NVIDIA_RIVA_TNT2_MODEL, "nVidia Vanta (NV6.2)", 6, CARD_FLAGS_NOTSUPPORTED} }; static int find_chip(unsigned int chip_id) @@ -93,12 +95,12 @@ static vidix_capability_t nvidia_cap = { 0, 0, 0, 0 } }; -unsigned int vixGetVersion(void) +unsigned int VIDIX_NAME(vixGetVersion)(void) { return(VIDIX_VERSION); } -int vixProbe(int verbose,int force) +int VIDIX_NAME(vixProbe)(int verbose,int force) { pciinfo_t lst[MAX_PCI_DEVICES]; unsigned int i, num_pci; @@ -158,7 +160,7 @@ int vixProbe(int verbose,int force) return(err); } -int vixInit(void) +int VIDIX_NAME(vixInit)(const char *args) { int card_option; @@ -255,18 +257,18 @@ int vixInit(void) return 0; } -void vixDestroy(void) +void VIDIX_NAME(vixDestroy)(void) { printf(NVIDIA_MSG"destory\n"); } -int vixGetCapability(vidix_capability_t *to) +int VIDIX_NAME(vixGetCapability)(vidix_capability_t *to) { memcpy(to, &nvidia_cap, sizeof(vidix_capability_t)); return(0); } -int vixQueryFourcc(vidix_fourcc_t *to) +int VIDIX_NAME(vixQueryFourcc)(vidix_fourcc_t *to) { printf(NVIDIA_MSG"query fourcc (%x)\n", to->fourcc); to->flags = 0; @@ -274,7 +276,7 @@ int vixQueryFourcc(vidix_fourcc_t *to) return 0; } -int vixConfigPlayback(vidix_playback_t *info) +int VIDIX_NAME(vixConfigPlayback)(vidix_playback_t *info) { int fb_pixel_size = 32/8; int fb_line_len = 1280*4; @@ -315,13 +317,13 @@ int vixConfigPlayback(vidix_playback_t *info) return 0; } -int vixPlaybackOn(void) +int VIDIX_NAME(vixPlaybackOn)(void) { printf(NVIDIA_MSG"playback on\n"); return 0; } -int vixPlaybackOff(void) +int VIDIX_NAME(vixPlaybackOff)(void) { printf(NVIDIA_MSG"playback off\n"); return 0; diff --git a/src/video_out/vidix/drivers/pm3_regs.h b/src/video_out/vidix/drivers/pm3_regs.h index 98f9b718a..44cc92dca 100644 --- a/src/video_out/vidix/drivers/pm3_regs.h +++ b/src/video_out/vidix/drivers/pm3_regs.h @@ -1,7 +1,7 @@ /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_regs.h,v 1.9 2001/11/20 00:09:15 alanh Exp $ */ /* - * glint register file + * glint register file * * Copyright by Sven Luther * Authors: Sven Luther, <luther@dpt-info.u-strasbg.fr> @@ -9,11 +9,17 @@ * * this work is sponsored by Appian Graphics. * - */ + */ #ifndef _PM3_REG_H_ #define _PM3_REG_H_ +#define PM3FIFOSize 120 + +#define PM3Tag(r) ((r>>3)&0x7ff) + +#define PM3OutputFIFO 0x2000 + /********************************************** * GLINT Permedia3 Control Status registers * ***********************************************/ @@ -90,7 +96,35 @@ #define PM3Aperture2YStart 0x0338 #define PM3Aperture2UStart 0x0340 #define PM3Aperture2VStart 0x0348 - + +#define PM3ByDMAReadCommandBase 0x0378 +#define PM3ByDMAReadCommandCount 0x0380 +#define PM3ByDMAReadMode 0x0350 + #define PM3ByDMAReadMode_ByteSwap_NONE (0<<0) + #define PM3ByDMAReadMode_ByteSwap_BYTE (1<<0) + #define PM3ByDMAReadMode_ByteSwap_HWORD (2<<0) + #define PM3ByDMAReadMode_ByteSwap_FULL (3<<0) + #define PM3ByDMAReadMode_PatchEnable (1<<2) + #define PM3ByDMAReadMode_Format_RAW (0<<3) + #define PM3ByDMAReadMode_Format_YUYV (1<<3) + #define PM3ByDMAReadMode_Format_UYVY (2<<3) + #define PM3ByDMAReadMode_PixelSize(s) (((s>>4)&3)<<5) + #define PM3ByDMAReadMode_EffectiveStride(s) ((s&3)<<7) + #define PM3ByDMAReadMode_PatchOffsetX(x) ((x&0x3f)<<9) + #define PM3ByDMAReadMode_PatchOffsetY(y) ((y&0x3f)<<16) + #define PM3ByDMAReadMode_Buffer_FB (0<<21) + #define PM3ByDMAReadMode_Buffer_LB (1<<21) + #define PM3ByDMAReadMode_Active (1<<22) + #define PM3ByDMAReadMode_MemType_PCI (0<<23) + #define PM3ByDMAReadMode_MemType_AGP (1<<23) + #define PM3ByDMAReadMode_Burst(b) ((b&7)<<24) + #define PM3ByDMAReadMode_Align (1<<27) +#define PM3ByDMAReadStride 0x0358 +#define PM3ByDMAReadUStart 0x0368 +#define PM3ByDMAReadVStart 0x0370 +#define PM3ByDMAReadYStart 0x0360 + + /********************************************** * GLINT Permedia3 Memory Control (0x1000) * ***********************************************/ @@ -520,8 +554,12 @@ #define PM3AntialiasMode 0x8808 #define PM3AntialiasModeAnd 0xac00 #define PM3AntialiasModeOr 0xac08 +#define PM3AreaStippleMode 0x81a0 /* ... */ #define PM3BackgroundColor 0xb0c8 +#define PM3BasePageOfWorkingSet 0xb4c8 +/* ... */ +#define PM3ChromaTestMode 0x8f18 /* ... */ #define PM3ColorDDAMode 0x87e0 #define PM3ColorDDAModeAnd 0xabe0 @@ -547,11 +585,41 @@ #define PM3DeltaMode 0x9300 #define PM3DeltaModeAnd 0xaad0 #define PM3DeltaModeOr 0xaad8 + +#define PM3DepthMode 0x89a0 /* ... */ #define PM3DitherMode 0x8818 #define PM3DitherModeAnd 0xacd0 #define PM3DitherModeOr 0xacd8 /* ... */ +#define PM3DMARectangleRead 0xa9a8 + #define PM3DMARectangleRead_Width(w) (w&0xfff) + #define PM3DMARectangleRead_Height(h) ((h&0xfff)<<12) + #define PM3DMARectangleRead_PixelSize(s) ((s&0x3)<<24) + #define PM3DMARectangleRead_Pack (1<<26) + #define PM3DMARectangleRead_ByteSwap(b) ((b&0x3)<<27) + #define PM3DMARectangleRead_Alignment (1<<30) +#define PM3DMARectangleReadAddress 0xa9b0 +#define PM3DMARectangleReadLinePitch 0xa9b8 +#define PM3DMARectangleReadTarget 0xa9c0 +/* ... */ +#define PM3DownloadAddress 0xb0d0 +#define PM3DownloadData 0xb0d8 +/* ... */ +#define PM3dBdx 0x87b8 +#define PM3dBdyDom 0x87c0 +#define PM3dGdx 0x87a0 +#define PM3dGdyDom 0x87a8 +#define PM3dQdx 0x83c0 +#define PM3dQdyDom 0x83c8 +#define PM3dRdx 0x8788 +#define PM3dRdyDom 0x8790 +#define PM3dSdx 0x8390 +#define PM3dSdy 0x83d8 +#define PM3dSdyDom 0x8398 +#define PM3dTdx 0x83a8 +#define PM3dTdy 0x83e0 +#define PM3dTdyDom 0x83b0 #define PM3dXDom 0x8008 #define PM3dXSub 0x8018 #define PM3dY 0x8028 @@ -587,47 +655,47 @@ #define PM3FBDestReadEnablesAnd 0xad20 #define PM3FBDestReadEnablesOr 0xad28 #define PM3FBDestReadEnables_E(e) ((e)&0xff) - #define PM3FBDestReadEnables_E0 1<<0 - #define PM3FBDestReadEnables_E1 1<<1 - #define PM3FBDestReadEnables_E2 1<<2 - #define PM3FBDestReadEnables_E3 1<<3 - #define PM3FBDestReadEnables_E4 1<<4 - #define PM3FBDestReadEnables_E5 1<<5 - #define PM3FBDestReadEnables_E6 1<<6 - #define PM3FBDestReadEnables_E7 1<<7 + #define PM3FBDestReadEnables_E0 (1<<0) + #define PM3FBDestReadEnables_E1 (1<<1) + #define PM3FBDestReadEnables_E2 (1<<2) + #define PM3FBDestReadEnables_E3 (1<<3) + #define PM3FBDestReadEnables_E4 (1<<4) + #define PM3FBDestReadEnables_E5 (1<<5) + #define PM3FBDestReadEnables_E6 (1<<6) + #define PM3FBDestReadEnables_E7 (1<<7) #define PM3FBDestReadEnables_R(r) (((r)&0xff)<<8) - #define PM3FBDestReadEnables_R0 1<<8 - #define PM3FBDestReadEnables_R1 1<<9 - #define PM3FBDestReadEnables_R2 1<<10 - #define PM3FBDestReadEnables_R3 1<<11 - #define PM3FBDestReadEnables_R4 1<<12 - #define PM3FBDestReadEnables_R5 1<<13 - #define PM3FBDestReadEnables_R6 1<<14 - #define PM3FBDestReadEnables_R7 1<<15 + #define PM3FBDestReadEnables_R0 (1<<8) + #define PM3FBDestReadEnables_R1 (1<<9) + #define PM3FBDestReadEnables_R2 (1<<10) + #define PM3FBDestReadEnables_R3 (1<<11) + #define PM3FBDestReadEnables_R4 (1<<12) + #define PM3FBDestReadEnables_R5 (1<<13) + #define PM3FBDestReadEnables_R6 (1<<14) + #define PM3FBDestReadEnables_R7 (1<<15) #define PM3FBDestReadEnables_ReferenceAlpha(a) (((a)&0xff)<<24) #define PM3FBDestReadMode 0xaee0 #define PM3FBDestReadModeAnd 0xac90 #define PM3FBDestReadModeOr 0xac98 - #define PM3FBDestReadMode_ReadDisable 0<<0 - #define PM3FBDestReadMode_ReadEnable 1<<0 + #define PM3FBDestReadMode_ReadDisable (0<<0) + #define PM3FBDestReadMode_ReadEnable (1<<0) #define PM3FBDestReadMode_StripePitch(sp) (((sp)&0x7)<<2) #define PM3FBDestReadMode_StripeHeight(sh) (((sh)&0x7)<<7) - #define PM3FBDestReadMode_Enable0 1<<8 - #define PM3FBDestReadMode_Enable1 1<<9 - #define PM3FBDestReadMode_Enable2 1<<10 - #define PM3FBDestReadMode_Enable3 1<<11 + #define PM3FBDestReadMode_Enable0 (1<<8) + #define PM3FBDestReadMode_Enable1 (1<<9) + #define PM3FBDestReadMode_Enable2 (1<<10) + #define PM3FBDestReadMode_Enable3 (1<<11) #define PM3FBDestReadMode_Layout0(l) (((l)&0x3)<<12) #define PM3FBDestReadMode_Layout1(l) (((l)&0x3)<<14) #define PM3FBDestReadMode_Layout2(l) (((l)&0x3)<<16) #define PM3FBDestReadMode_Layout3(l) (((l)&0x3)<<18) - #define PM3FBDestReadMode_Origin0 1<<20 - #define PM3FBDestReadMode_Origin1 1<<21 - #define PM3FBDestReadMode_Origin2 1<<22 - #define PM3FBDestReadMode_Origin3 1<<23 - #define PM3FBDestReadMode_Blocking 1<<24 - #define PM3FBDestReadMode_UseReadEnabled 1<<26 - #define PM3FBDestReadMode_AlphaFiltering 1<<27 + #define PM3FBDestReadMode_Origin0 (1<<20) + #define PM3FBDestReadMode_Origin1 (1<<21) + #define PM3FBDestReadMode_Origin2 (1<<22) + #define PM3FBDestReadMode_Origin3 (1<<23) + #define PM3FBDestReadMode_Blocking (1<<24) + #define PM3FBDestReadMode_UseReadEnabled (1<<26) + #define PM3FBDestReadMode_AlphaFiltering (1<<27) #define PM3FBHardwareWriteMask 0x8ac0 #define PM3FBSoftwareWriteMask 0x8820 @@ -647,14 +715,14 @@ #define PM3FBSourceReadMode_StripePitch(sp) (((sp)&0x7)<<2) #define PM3FBSourceReadMode_StripeHeight(sh) (((sh)&0x7)<<7) #define PM3FBSourceReadMode_Layout(l) (((l)&0x3)<<8) - #define PM3FBSourceReadMode_Origin 1<<10 - #define PM3FBSourceReadMode_Blocking 1<<11 - #define PM3FBSourceReadMode_UserTexelCoord 1<<13 - #define PM3FBSourceReadMode_WrapXEnable 1<<14 - #define PM3FBSourceReadMode_WrapYEnable 1<<15 + #define PM3FBSourceReadMode_Origin (1<<10) + #define PM3FBSourceReadMode_Blocking (1<<11) + #define PM3FBSourceReadMode_UseTexelCoord (1<<13) + #define PM3FBSourceReadMode_WrapXEnable (1<<14) + #define PM3FBSourceReadMode_WrapYEnable (1<<15) #define PM3FBSourceReadMode_WrapX(w) (((w)&0xf)<<16) #define PM3FBSourceReadMode_WrapY(w) (((w)&0xf)<<20) - #define PM3FBSourceReadMode_ExternalSourceData 1<<24 + #define PM3FBSourceReadMode_ExternalSourceData (1<<24) #define PM3FBWriteBufferAddr0 0xb000 #define PM3FBWriteBufferAddr1 0xb008 #define PM3FBWriteBufferAddr2 0xb010 @@ -694,12 +762,19 @@ #define PM3FBWriteMode_Origin1 1<<25 #define PM3FBWriteMode_Origin2 1<<26 #define PM3FBWriteMode_Origin3 1<<27 + +#define PM3FogMode 0x8690 #define PM3ForegroundColor 0xb0c0 /* ... */ #define PM3GIDMode 0xb538 #define PM3GIDModeAnd 0xb5b0 #define PM3GIDModeOr 0xb5b8 /* ... */ +#define PM3HeadPhysicalPageAllocation0 0xb480 +#define PM3HeadPhysicalPageAllocation1 0xb488 +#define PM3HeadPhysicalPageAllocation2 0xb490 +#define PM3HeadPhysicalPageAllocation3 0xb498 +/* ... */ #define PM3LBDestReadBufferAddr 0xb510 #define PM3LBDestReadBufferOffset 0xb518 #define PM3LBDestReadEnables 0xb508 @@ -708,14 +783,14 @@ #define PM3LBDestReadMode 0xb500 #define PM3LBDestReadModeAnd 0xb580 #define PM3LBDestReadModeOr 0xb588 - #define PM3LBDestReadMode_Disable 0<<0 - #define PM3LBDestReadMode_Enable 1<<0 + #define PM3LBDestReadMode_Disable (0<<0) + #define PM3LBDestReadMode_Enable (1<<0) #define PM3LBDestReadMode_StripePitch(p) (((p)&0x7)<<2) #define PM3LBDestReadMode_StripeHeight(h) (((h)&0x7)<<5) - #define PM3LBDestReadMode_Layout 1<<8 - #define PM3LBDestReadMode_Origin 1<<9 - #define PM3LBDestReadMode_UserReadEnables 1<<10 - #define PM3LBDestReadMode_Packed16 1<<11 + #define PM3LBDestReadMode_Layout (1<<8) + #define PM3LBDestReadMode_Origin (1<<9) + #define PM3LBDestReadMode_UserReadEnables (1<<10) + #define PM3LBDestReadMode_Packed16 (1<<11) #define PM3LBDestReadMode_Width(w) (((w)&0xfff)<<12) #define PM3LBReadFormat 0x8888 #define PM3LBReadFormat_DepthWidth(w) (((w)&0x3)<<0) @@ -730,12 +805,12 @@ #define PM3LBSourceReadMode 0xb520 #define PM3LBSourceReadModeAnd 0xb5a0 #define PM3LBSourceReadModeOr 0xb5a8 - #define PM3LBSourceReadMode_Enable 1<<0 + #define PM3LBSourceReadMode_Enable (1<<0) #define PM3LBSourceReadMode_StripePitch(p) (((p)&0x7)<<2) #define PM3LBSourceReadMode_StripeHeight(h) (((h)&0x7)<<5) - #define PM3LBSourceReadMode_Layout 1<<8 - #define PM3LBSourceReadMode_Origin 1<<9 - #define PM3LBSourceReadMode_Packed16 1<<10 + #define PM3LBSourceReadMode_Layout (1<<8) + #define PM3LBSourceReadMode_Origin (1<<9) + #define PM3LBSourceReadMode_Packed16 (1<<10) #define PM3LBSourceReadMode_Width(w) (((w)&0xfff)<<11) #define PM3LBStencil 0x88a8 #define PM3LBWriteBufferAddr 0xb540 @@ -749,13 +824,13 @@ #define PM3LBWriteMode 0x88c0 #define PM3LBWriteModeAnd 0xac80 #define PM3LBWriteModeOr 0xac88 - #define PM3LBWriteMode_WriteDisable 0<<0 - #define PM3LBWriteMode_WriteEnable 1<<0 + #define PM3LBWriteMode_WriteDisable (0<<0) + #define PM3LBWriteMode_WriteEnable (1<<0) #define PM3LBWriteMode_StripePitch(p) (((p)&0x7)<<3) #define PM3LBWriteMode_StripeHeight(h) (((h)&0x7)<<6) - #define PM3LBWriteMode_Layout 1<<9 - #define PM3LBWriteMode_Origin 1<<10 - #define PM3LBWriteMode_Packed16 1<<11 + #define PM3LBWriteMode_Layout (1<<9) + #define PM3LBWriteMode_Origin (1<<10) + #define PM3LBWriteMode_Packed16 (1<<11) #define PM3LBWriteMode_Width(w) (((w)&0xfff)<<12) /* ... */ #define PM3LineStippleMode 0x81a8 @@ -777,6 +852,8 @@ #define PM3LogicalOpMode_UseConstantSource_Disable (0<<11) #define PM3LogicalOpMode_UseConstantSource_Enable (1<<11) +#define PM3LogicalTexturePageAddr 0xb4d0 +#define PM3LogicalTexturePageTableLength 0xb4d8 /* ... */ #define PM3LUT 0x8e80 /* ... */ @@ -789,6 +866,8 @@ #define PM3LUTModeOr 0xad78 #define PM3LUTTransfer 0x84d8 /* ... */ +#define PM3PhysicalPageAllocationTableAddr 0xb4c0 +/* ... */ #define PM3PixelSize 0x80c0 #define PM3PixelSize_GLOBAL_32BIT (0<<0) #define PM3PixelSize_GLOBAL_16BIT (1<<0) @@ -820,6 +899,8 @@ #define PM3PixelSize_GLOBAL (0<<31) #define PM3PixelSize_INDIVIDUAL (1<<31) /* ... */ +#define PM3QStart 0x83b8 + #define PM3Render 0x8038 #define PM3Render_AreaStipple_Disable (0<<0) #define PM3Render_AreaStipple_Enable (1<<0) @@ -858,7 +939,6 @@ #define PM3RasterizerModeAnd 0xaba0 #define PM3RasterizerModeOr 0xabb8 #define PM3RectangleHeight 0x94e0 -#define PM3Render 0x8038 #define PM3RepeatLine 0x9328 #define PM3ResetPickResult 0x8c20 #define PM3RLEMask 0x8c48 @@ -881,11 +961,33 @@ #define PM3StartY 0x8020 /* ... */ #define PM3SpanColorMask 0x8168 + +#define PM3StencilMode 0x8988 +/* ... */ +#define PM3TailPhysicalPageAllocation0 0xb4a0 +#define PM3TailPhysicalPageAllocation1 0xb4a8 +#define PM3TailPhysicalPageAllocation2 0xb4b0 +#define PM3TailPhysicalPageAllocation3 0xb4b8 /* ... */ #define PM3TextureApplicationMode 0x8680 #define PM3TextureApplicationModeAnd 0xac50 #define PM3TextureApplicationModeOr 0xac58 -#define PM3TextureBaseAddr 0x8500 +#define PM3TextureBaseAddr0 0x8500 +#define PM3TextureBaseAddr1 0x8508 +#define PM3TextureBaseAddr2 0x8510 +#define PM3TextureBaseAddr3 0x8518 +#define PM3TextureBaseAddr4 0x8520 +#define PM3TextureBaseAddr5 0x8528 +#define PM3TextureBaseAddr6 0x8530 +#define PM3TextureBaseAddr7 0x8538 +#define PM3TextureBaseAddr8 0x8540 +#define PM3TextureBaseAddr9 0x8548 +#define PM3TextureBaseAddr10 0x8550 +#define PM3TextureBaseAddr11 0x8558 +#define PM3TextureBaseAddr12 0x8560 +#define PM3TextureBaseAddr13 0x8568 +#define PM3TextureBaseAddr14 0x8570 +#define PM3TextureBaseAddr15 0x8578 #define PM3TextureCacheControl 0x8490 #define PM3TextureChromaLower0 0x84f0 #define PM3TextureChromaLower1 0x8608 @@ -943,22 +1045,36 @@ #define PM3TextureReadMode1 0xb408 #define PM3TextureReadMode1And 0xad40 #define PM3TextureReadMode1Or 0xad48 + +#define PM3TouchLogicalPage 0xb370 + #define PM3TouchLogicalPage_Page(p) (p&0xffff) + #define PM3TouchLogicalPage_Count(c) ((c&0x3fff)<<16) + #define PM3TouchLogicalPage_Mode(m) ((m&0x3)<<30) + +#define PM3TStart 0x83a0 + +#define PM3UpdateLogicalTextureInfo 0xb368 + #define PM3UpdateLogicalTextureInfo_Length(l) ((l)&0x1ff) + #define PM3UpdateLogicalTextureInfo_MemoryPool(m) (((m)&0x3)<<9) + #define PM3UpdateLogicalTextureInfo_VirtualHostPage (1<<11) + #define PM3UpdateLogicalTextureInfo_HostPage(p) (((p)&0xfffff)<<12) + /* ... */ #define PM3WaitForCompletion 0x80b8 #define PM3Window 0x8980 - #define PM3Window_ForceLBUpdate 1<<3 - #define PM3Window_LBUpdateSource 1<<4 + #define PM3Window_ForceLBUpdate (1<<3) + #define PM3Window_LBUpdateSource (1<<4) #define PM3Window_FrameCount(c) (((c)&0xff)<<9) - #define PM3Window_StencilFCP 1<<17 - #define PM3Window_DepthFCP 1<<18 - #define PM3Window_OverrideWriteFiltering 1<<19 + #define PM3Window_StencilFCP (1<<17) + #define PM3Window_DepthFCP (1<<18) + #define PM3Window_OverrideWriteFiltering (1<<19) #define PM3WindowAnd 0xab80 #define PM3WindowOr 0xab88 #define PM3WindowOrigin 0x81c8 #define PM3XBias 0x9480 #define PM3YBias 0x9488 #define PM3YLimits 0x80a8 -#define PM3UVMode 0x8f00 +#define PM3YUVMode 0x8f00 #define PM3ZFogBias 0x86b8 #define PM3ZStart 0xadd8 #define PM3ZStartL 0x89b8 @@ -969,21 +1085,21 @@ * GLINT Permedia3 2D setup Unit * ***********************************************/ #define PM3Config2D 0xb618 - #define PM3Config2D_OpaqueSpan 1<<0 - #define PM3Config2D_MultiRXBlit 1<<1 - #define PM3Config2D_UserScissorEnable 1<<2 - #define PM3Config2D_FBDestReadEnable 1<<3 - #define PM3Config2D_AlphaBlendEnable 1<<4 - #define PM3Config2D_DitherEnable 1<<5 - #define PM3Config2D_ForegroundROPEnable 1<<6 + #define PM3Config2D_OpaqueSpan (1<<0) + #define PM3Config2D_MultiRXBlit (1<<1) + #define PM3Config2D_UserScissorEnable (1<<2) + #define PM3Config2D_FBDestReadEnable (1<<3) + #define PM3Config2D_AlphaBlendEnable (1<<4) + #define PM3Config2D_DitherEnable (1<<5) + #define PM3Config2D_ForegroundROPEnable (1<<6) #define PM3Config2D_ForegroundROP(rop) (((rop)&0xf)<<7) - #define PM3Config2D_BackgroundROPEnable 1<<11 + #define PM3Config2D_BackgroundROPEnable (1<<11) #define PM3Config2D_BackgroundROP(rop) (((rop)&0xf)<<12) - #define PM3Config2D_UseConstantSource 1<<16 - #define PM3Config2D_FBWriteEnable 1<<17 - #define PM3Config2D_Blocking 1<<18 - #define PM3Config2D_ExternalSourceData 1<<19 - #define PM3Config2D_LUTModeEnable 1<<20 + #define PM3Config2D_UseConstantSource (1<<16) + #define PM3Config2D_FBWriteEnable (1<<17) + #define PM3Config2D_Blocking (1<<18) + #define PM3Config2D_ExternalSourceData (1<<19) + #define PM3Config2D_LUTModeEnable (1<<20) #define PM3DownloadGlyphwidth 0xb658 #define PM3DownloadGlyphwidth_GlyphWidth(gw) ((gw)&0xffff) #define PM3DownloadTarget 0xb650 @@ -1000,17 +1116,17 @@ #define PM3RectanglePosition_YOffset(y) (((y)&0xffff)<<16) #define PM3Render2D 0xb640 #define PM3Render2D_Width(w) ((w)&0x0fff) - #define PM3Render2D_Operation_Normal 0<<12 - #define PM3Render2D_Operation_SyncOnHostData 1<<12 - #define PM3Render2D_Operation_SyncOnBitMask 2<<12 - #define PM3Render2D_Operation_PatchOrderRendering 3<<12 - #define PM3Render2D_FBSourceReadEnable 1<<14 - #define PM3Render2D_SpanOperation 1<<15 + #define PM3Render2D_Operation_Normal (0<<12) + #define PM3Render2D_Operation_SyncOnHostData (1<<12) + #define PM3Render2D_Operation_SyncOnBitMask (2<<12) + #define PM3Render2D_Operation_PatchOrderRendering (3<<12) + #define PM3Render2D_FBSourceReadEnable (1<<14) + #define PM3Render2D_SpanOperation (1<<15) #define PM3Render2D_Height(h) (((h)&0x0fff)<<16) - #define PM3Render2D_XPositive 1<<28 - #define PM3Render2D_YPositive 1<<29 - #define PM3Render2D_AreaStippleEnable 1<<30 - #define PM3Render2D_TextureEnable 1<<31 + #define PM3Render2D_XPositive (1<<28) + #define PM3Render2D_YPositive (1<<29) + #define PM3Render2D_AreaStippleEnable (1<<30) + #define PM3Render2D_TextureEnable (1<<31) #define PM3Render2DGlyph 0xb648 #define PM3Render2DGlyph_Width(w) ((w)&0x7f) #define PM3Render2DGlyph_Height(h) (((h)&0x7f)<<7) @@ -1059,34 +1175,50 @@ #define PM3FillRectanglePosition_XOffset(x) ((x)&0xffff) #define PM3FillRectanglePosition_YOffset(y) (((y)&0xffff)<<16) -#if 1 - /********************************************** * GLINT Permedia3 Macros * ***********************************************/ +#ifdef __alpha__ +#define mem_barrier() asm volatile ("mb" : : : "memory") +#define write_mem_barrier() asm volatile ("wmb" : : : "memory") +#else +#define mem_barrier() +#define write_mem_barrier() +#endif + extern void *pm3_reg_base; -#define WRITE_REG(offset,val) \ - *(volatile unsigned long *)(((unsigned char *)(pm3_reg_base)) + offset) = (val) - -#define READ_REG(offset) \ - *(volatile unsigned long *)(((unsigned char *)(pm3_reg_base)) + offset) +#define WRITE_REG(offset,val) \ + do { \ + write_mem_barrier(); \ + *(volatile uint32_t *) \ + (((unsigned char *)(pm3_reg_base)) + offset) = (val); \ + } while(0) -#define UPDATE_SET_REG(offset,val) \ - { \ - unsigned long temp; \ - temp = READ_REG(offset); \ - WRITE_REG(offset,temp|(val)); \ - } +static inline uint32_t +READ_REG(uint32_t offset) +{ + mem_barrier(); + return *(volatile uint32_t *)(((unsigned char *)(pm3_reg_base)) + offset); +} + +#define UPDATE_SET_REG(offset,val) \ + { \ + unsigned long temp; \ + temp = READ_REG(offset); \ + WRITE_REG(offset,temp|(val)); \ + } -#define UPDATE_CLEAR_REG(offset,val) \ - { \ - unsigned long temp; \ - temp = READ_REG(offset); \ - WRITE_REG(offset,temp&(~(val))); \ +#define UPDATE_CLEAR_REG(offset,val) \ + { \ + unsigned long temp; \ + temp = READ_REG(offset); \ + WRITE_REG(offset,temp&(~(val))); \ } +#define WAIT_FIFO(n) while(READ_REG(PM3InFIFOSpace) < (n)) + #define RAMDAC_DELAY(x) do { \ int delay = x; \ unsigned char tmp; \ @@ -1112,10 +1244,10 @@ do{ \ SLOW_WRITE_REG(PM3RD_IndexedData, data); \ } -#define RAMDAC_GET_REG(index, temp) \ -{ \ - RAMDAC_SET_INDEX(index); \ - temp = READ_REG(PM3RD_IndexedData); \ +#define RAMDAC_GET_REG(index, temp) \ +{ \ + RAMDAC_SET_INDEX(index); \ + temp = READ_REG(PM3RD_IndexedData); \ } -#endif + #endif /* _PM3_REG_H_ */ diff --git a/src/video_out/vidix/drivers/pm3_vid.c b/src/video_out/vidix/drivers/pm3_vid.c index c5b97782c..20b35a14a 100644 --- a/src/video_out/vidix/drivers/pm3_vid.c +++ b/src/video_out/vidix/drivers/pm3_vid.c @@ -24,16 +24,20 @@ #include <string.h> #include <inttypes.h> #include <unistd.h> +#include <sys/mman.h> #include "vidix.h" #include "fourcc.h" #include "libdha.h" #include "pci_ids.h" #include "pci_names.h" -#include "config.h" #include "pm3_regs.h" +#define PM3_MSG "pm3_vid:" + +#define VIDIX_STATIC pm3_ + /* MBytes of video memory to use */ #define PM3_VIDMEM 24 @@ -45,12 +49,16 @@ #define TRACE_EXIT() #endif -pciinfo_t pci_info; +static pciinfo_t pci_info; -void *pm3_reg_base; -void *pm3_mem; +static void *pm3_reg_base; +static void *pm3_mem; -int pm3_vidmem = PM3_VIDMEM; +static int pm3_vidmem = PM3_VIDMEM; +static int pm3_blank = 0; +static int pm3_dma = 0; + +static u_int page_size; static vidix_capability_t pm3_cap = { @@ -63,14 +71,14 @@ static vidix_capability_t pm3_cap = 4, 4, -1, - FLAG_UPSCALER|FLAG_DOWNSCALER, + FLAG_UPSCALER | FLAG_DOWNSCALER, VENDOR_3DLABS, -1, { 0, 0, 0, 0 } }; -unsigned int vixGetVersion(void) +unsigned int VIDIX_NAME(vixGetVersion)(void) { return(VIDIX_VERSION); } @@ -90,7 +98,7 @@ static int find_chip(unsigned chip_id) return -1; } -int vixProbe(int verbose, int force) +int VIDIX_NAME(vixProbe)(int verbose, int force) { pciinfo_t lst[MAX_PCI_DEVICES]; unsigned i,num_pci; @@ -99,7 +107,7 @@ int vixProbe(int verbose, int force) err = pci_scan(lst,&num_pci); if(err) { - printf("[pm3] Error occured during pci scan: %s\n",strerror(err)); + printf(PM3_MSG" Error occured during pci scan: %s\n",strerror(err)); return err; } else @@ -116,7 +124,8 @@ int vixProbe(int verbose, int force) continue; dname = pci_device_name(VENDOR_3DLABS, lst[i].device); dname = dname ? dname : "Unknown chip"; - printf("[pm3] Found chip: %s\n", dname); + printf(PM3_MSG" Found chip: %s with IRQ %i\n", + dname, lst[i].irq); pm3_cap.device_id = lst[i].device; err = 0; memcpy(&pci_info, &lst[i], sizeof(pciinfo_t)); @@ -124,34 +133,62 @@ int vixProbe(int verbose, int force) } } } - if(err && verbose) printf("[pm3] Can't find chip\n"); + if(err && verbose) printf(PM3_MSG" Can't find chip\n"); return err; } #define PRINT_REG(reg) \ { \ long _foo = READ_REG(reg); \ - printf("[pm3] " #reg " (%x) = %#lx (%li)\n", reg, _foo, _foo); \ + printf(PM3_MSG" " #reg " (%x) = %#lx (%li)\n", reg, _foo, _foo); \ } -int vixInit(void) +int VIDIX_NAME(vixInit)(const char *args) { - char *vm; + char *ac = strdup(args), *s, *opt; + + opt = strtok_r(ac, ",", &s); + while(opt){ + char *a = strchr(opt, '='); + + if(a) + *a++ = 0; + if(!strcmp(opt, "mem")){ + if(a) + pm3_vidmem = strtol(a, NULL, 0); + } else if(!strcmp(opt, "blank")){ + pm3_blank = a? strtol(a, NULL, 0): 1; + } + + opt = strtok_r(NULL, ",", &s); + } + + free(ac); + pm3_reg_base = map_phys_mem(pci_info.base0, 0x20000); pm3_mem = map_phys_mem(pci_info.base1, 0x2000000); - if((vm = getenv("PM3_VIDMEM"))){ - pm3_vidmem = strtol(vm, NULL, 0); + + if(bm_open() == 0){ + printf(PM3_MSG" Using DMA.\n"); + pm3_cap.flags |= FLAG_DMA; + page_size = sysconf(_SC_PAGESIZE); + hwirq_install(pci_info.bus, pci_info.card, pci_info.func, + 0, PM3IntFlags, -1); + pm3_dma = 1; } + return 0; } -void vixDestroy(void) +void VIDIX_NAME(vixDestroy)(void) { unmap_phys_mem(pm3_reg_base, 0x20000); unmap_phys_mem(pm3_mem, 0x2000000); + hwirq_uninstall(pci_info.bus, pci_info.card, pci_info.func); + bm_close(); } -int vixGetCapability(vidix_capability_t *to) +int VIDIX_NAME(vixGetCapability)(vidix_capability_t *to) { memcpy(to, &pm3_cap, sizeof(vidix_capability_t)); return 0; @@ -168,7 +205,7 @@ static int is_supported_fourcc(uint32_t fourcc) } } -int vixQueryFourcc(vidix_fourcc_t *to) +int VIDIX_NAME(vixQueryFourcc)(vidix_fourcc_t *to) { if(is_supported_fourcc(to->fourcc)) { @@ -184,6 +221,12 @@ int vixQueryFourcc(vidix_fourcc_t *to) return ENOSYS; } +static int frames[VID_PLAY_MAXFRAMES], vid_base; +static long overlay_mode, overlay_control, video_control, int_enable; +static int src_w, drw_w; +static int src_h, drw_h; +static int drw_x, drw_y; + #define FORMAT_RGB8888 PM3VideoOverlayMode_COLORFORMAT_RGB8888 #define FORMAT_RGB4444 PM3VideoOverlayMode_COLORFORMAT_RGB4444 #define FORMAT_RGB5551 PM3VideoOverlayMode_COLORFORMAT_RGB5551 @@ -202,9 +245,8 @@ int vixQueryFourcc(vidix_fourcc_t *to) /* Notice, have to check that we dont overflow the deltas here ... */ static void -compute_scale_factor( - short* src_w, short* dst_w, - unsigned int* shrink_delta, unsigned int* zoom_delta) +compute_scale_factor(int* src_w, int* dst_w, + u_int* shrink_delta, u_int* zoom_delta) { /* NOTE: If we don't return reasonable values here then the video * unit can potential shut off and won't display an image until re-enabled. @@ -228,21 +270,13 @@ compute_scale_factor( } } -static int frames[VID_PLAY_MAXFRAMES]; - -static long overlay_mode, overlay_control; - -int vixConfigPlayback(vidix_playback_t *info) +static void +pm3_setup_overlay(vidix_playback_t *info) { int shrink, zoom; - short src_w, drw_w; - short src_h, drw_h; - long base0; - int pitch; - int format; - unsigned int i; - - TRACE_ENTER(); + int format = 0; + int filter = 0; + int sw = src_w; switch(info->fourcc){ case IMGFMT_YUY2: @@ -251,97 +285,46 @@ int vixConfigPlayback(vidix_playback_t *info) case IMGFMT_UYVY: format = FORMAT_VUY422; break; - default: - return -1; } - src_w = info->src.w; - src_h = info->src.h; + compute_scale_factor(&sw, &drw_w, &shrink, &zoom); - drw_w = info->dest.w; - drw_h = info->dest.h; - - pitch = src_w; - - info->num_frames = pm3_vidmem*1024*1024 / (pitch * src_h * 2); - if(info->num_frames > VID_PLAY_MAXFRAMES) - info->num_frames = VID_PLAY_MAXFRAMES; - - /* Use end of video memory. Assume the card has 32 MB */ - base0 = (32-pm3_vidmem)*1024*1024; - info->dga_addr = pm3_mem + base0; - - if(info->fourcc == IMGFMT_YV12){ - info->dest.pitch.y = 2; - info->dest.pitch.u = 2; - info->dest.pitch.y = 2; - info->offset.y = 0; - info->offset.v = src_w * src_h; - info->offset.u = src_w * src_h * 3/2; - } else { - info->dest.pitch.y = 2; - info->dest.pitch.u = 0; - info->dest.pitch.v = 0; - info->offset.y = 0; - info->offset.v = 0; - info->offset.u = 0; - } - info->frame_size = pitch * src_h * 2; - - for(i = 0; i < info->num_frames; i++){ - info->offsets[i] = info->frame_size * i; - frames[i] = (base0 + info->offsets[i]) >> 1; - } - - compute_scale_factor(&src_w, &drw_w, &shrink, &zoom); - -#if 0 - aperture_mode = READ_REG(PM3ByAperture1Mode); - if(info->fourcc == IMGFMT_YV12){ -/* WRITE_REG(PM3Aperture0, base0 >> 1); */ - WRITE_REG(PM3ByAperture1Mode, - PM3ByApertureMode_FORMAT_YUYV | - PM3ByApertureMode_PIXELSIZE_32BIT); - WRITE_REG(PM3Aperture1Stride, pitch); - WRITE_REG(PM3Aperture1YStart, base0 / 16); - WRITE_REG(PM3Aperture1VStart, (base0 + info->offset.v) / 16); - WRITE_REG(PM3Aperture1UStart, (base0 + info->offset.u) / 16); - } -#endif - - WRITE_REG(PM3VideoOverlayBase0, base0 >> 1); - WRITE_REG(PM3VideoOverlayStride, PM3VideoOverlayStride_STRIDE(pitch)); - WRITE_REG(PM3VideoOverlayWidth, PM3VideoOverlayWidth_WIDTH(src_w)); + WRITE_REG(PM3VideoOverlayBase0, vid_base >> 1); + WRITE_REG(PM3VideoOverlayStride, PM3VideoOverlayStride_STRIDE(src_w)); + WRITE_REG(PM3VideoOverlayWidth, PM3VideoOverlayWidth_WIDTH(sw)); WRITE_REG(PM3VideoOverlayHeight, PM3VideoOverlayHeight_HEIGHT(src_h)); WRITE_REG(PM3VideoOverlayOrigin, 0); /* Scale the source to the destinationsize */ - if (src_h == drw_h) { - WRITE_REG(PM3VideoOverlayYDelta, PM3VideoOverlayYDelta_NONE); - } else { - WRITE_REG(PM3VideoOverlayYDelta, - PM3VideoOverlayYDelta_DELTA(src_h, drw_h)); - } if (src_w == drw_w) { WRITE_REG(PM3VideoOverlayShrinkXDelta, 1<<16); WRITE_REG(PM3VideoOverlayZoomXDelta, 1<<16); } else { WRITE_REG(PM3VideoOverlayShrinkXDelta, shrink); WRITE_REG(PM3VideoOverlayZoomXDelta, zoom); + filter = PM3VideoOverlayMode_FILTER_PARTIAL; } + if (src_h == drw_h) { + WRITE_REG(PM3VideoOverlayYDelta, PM3VideoOverlayYDelta_NONE); + } else { + WRITE_REG(PM3VideoOverlayYDelta, + PM3VideoOverlayYDelta_DELTA(src_h, drw_h)); + filter = PM3VideoOverlayMode_FILTER_FULL; + } + WRITE_REG(PM3VideoOverlayIndex, 0); /* Now set the ramdac video overlay region and mode */ - RAMDAC_SET_REG(PM3RD_VideoOverlayXStartLow, (info->dest.x & 0xff)); - RAMDAC_SET_REG(PM3RD_VideoOverlayXStartHigh, (info->dest.x & 0xf00)>>8); - RAMDAC_SET_REG(PM3RD_VideoOverlayXEndLow, (info->dest.x+drw_w) & 0xff); + RAMDAC_SET_REG(PM3RD_VideoOverlayXStartLow, (drw_x & 0xff)); + RAMDAC_SET_REG(PM3RD_VideoOverlayXStartHigh, (drw_x & 0xf00)>>8); + RAMDAC_SET_REG(PM3RD_VideoOverlayXEndLow, (drw_x+drw_w) & 0xff); RAMDAC_SET_REG(PM3RD_VideoOverlayXEndHigh, - ((info->dest.x+drw_w) & 0xf00)>>8); - RAMDAC_SET_REG(PM3RD_VideoOverlayYStartLow, (info->dest.y & 0xff)); - RAMDAC_SET_REG(PM3RD_VideoOverlayYStartHigh, (info->dest.y & 0xf00)>>8); - RAMDAC_SET_REG(PM3RD_VideoOverlayYEndLow, (info->dest.y+drw_h) & 0xff); + ((drw_x+drw_w) & 0xf00)>>8); + RAMDAC_SET_REG(PM3RD_VideoOverlayYStartLow, (drw_y & 0xff)); + RAMDAC_SET_REG(PM3RD_VideoOverlayYStartHigh, (drw_y & 0xf00)>>8); + RAMDAC_SET_REG(PM3RD_VideoOverlayYEndLow, (drw_y+drw_h) & 0xff); RAMDAC_SET_REG(PM3RD_VideoOverlayYEndHigh, - ((info->dest.y+drw_h) & 0xf00)>>8); + ((drw_y+drw_h) & 0xf00)>>8); RAMDAC_SET_REG(PM3RD_VideoOverlayKeyR, 0xff); RAMDAC_SET_REG(PM3RD_VideoOverlayKeyG, 0x00); @@ -350,20 +333,71 @@ int vixConfigPlayback(vidix_playback_t *info) overlay_mode = 1 << 5 | format | - PM3VideoOverlayMode_FILTER_FULL | + filter | PM3VideoOverlayMode_BUFFERSYNC_MANUAL | PM3VideoOverlayMode_FLIP_VIDEO; overlay_control = PM3RD_VideoOverlayControl_KEY_COLOR | - PM3RD_VideoOverlayControl_MODE_OVERLAYKEY | + PM3RD_VideoOverlayControl_MODE_ALWAYS | PM3RD_VideoOverlayControl_DIRECTCOLOR_ENABLED; +} + +int VIDIX_NAME(vixConfigPlayback)(vidix_playback_t *info) +{ + unsigned int i; + u_int frame_size; + u_int vidmem_size; + u_int max_frames; + + TRACE_ENTER(); + + src_w = info->src.w; + src_h = info->src.h; + drw_w = info->dest.w; + drw_h = info->dest.h; + drw_x = info->dest.x; + drw_y = info->dest.y; + + frame_size = src_w * src_h * 2; + vidmem_size = pm3_vidmem*1024*1024; + max_frames = vidmem_size / frame_size; + if(max_frames > VID_PLAY_MAXFRAMES) + max_frames = VID_PLAY_MAXFRAMES; + + src_h--; /* ugh */ + + if(info->num_frames > max_frames) + info->num_frames = max_frames; + vidmem_size = info->num_frames * frame_size; + + /* Use end of video memory. Assume the card has 32 MB */ + vid_base = 32*1024*1024 - vidmem_size; + info->dga_addr = pm3_mem + vid_base; + + info->dest.pitch.y = 2; + info->dest.pitch.u = 0; + info->dest.pitch.v = 0; + info->offset.y = 0; + info->offset.v = 0; + info->offset.u = 0; + info->frame_size = frame_size; + + for(i = 0; i < info->num_frames; i++){ + info->offsets[i] = frame_size * i; + frames[i] = (vid_base + info->offsets[i]) >> 1; + } + + pm3_setup_overlay(info); + + video_control = READ_REG(PM3VideoControl); + int_enable = READ_REG(PM3IntEnable); TRACE_EXIT(); return 0; } -int vixPlaybackOn(void) +int VIDIX_NAME(vixPlaybackOn)(void) { TRACE_ENTER(); @@ -374,11 +408,15 @@ int vixPlaybackOn(void) WRITE_REG(PM3VideoOverlayUpdate, PM3VideoOverlayUpdate_ENABLE); + if(pm3_blank) + WRITE_REG(PM3VideoControl, + video_control | PM3VideoControl_DISPLAY_ENABLE); + TRACE_EXIT(); return 0; } -int vixPlaybackOff(void) +int VIDIX_NAME(vixPlaybackOff)(void) { RAMDAC_SET_REG(PM3RD_VideoOverlayControl, PM3RD_VideoOverlayControl_DISABLE); @@ -389,12 +427,115 @@ int vixPlaybackOff(void) RAMDAC_SET_REG(PM3RD_VideoOverlayKeyG, 0x01); RAMDAC_SET_REG(PM3RD_VideoOverlayKeyB, 0xfe); + if(video_control) + WRITE_REG(PM3VideoControl, video_control); + + if(pm3_dma) + WRITE_REG(PM3IntEnable, 0); + return 0; } -int vixPlaybackFrameSelect(unsigned int frame) +int VIDIX_NAME(vixPlaybackFrameSelect)(unsigned int frame) { WRITE_REG(PM3VideoOverlayBase0, frames[frame]); -/* WRITE_REG(PM3Aperture0, frames[frame]); */ + + return 0; +} + +struct pm3_bydma_cmd { + uint32_t bus_addr; + uint32_t fb_addr; + uint32_t mask; + uint32_t count; +}; + +struct pm3_bydma_frame { + struct pm3_bydma_cmd *cmds; + u_long bus_addr; + uint32_t count; +}; + +static struct pm3_bydma_frame * +pm3_setup_bydma(vidix_dma_t *dma) +{ + u_int size = dma->size; + u_int pages = (size + page_size-1) / page_size; + struct pm3_bydma_frame *bdf; + long baddr[pages]; + u_int i; + uint32_t dest; + + if(bm_virt_to_bus(dma->src, dma->size, baddr)) + return NULL; + + bdf = malloc(sizeof(*bdf)); + bdf->cmds = valloc(pages * sizeof(struct pm3_bydma_cmd)); + + dest = vid_base + dma->dest_offset; + for(i = 0; i < pages; i++, dest += page_size, size -= page_size){ + bdf->cmds[i].bus_addr = baddr[i]; + bdf->cmds[i].fb_addr = dest; + bdf->cmds[i].mask = ~0; + bdf->cmds[i].count = ((size > page_size)? page_size: size) / 16; + } + + bdf->count = pages; + + if(bm_virt_to_bus(bdf->cmds, page_size, &bdf->bus_addr) != 0){ + free(bdf->cmds); + free(bdf); + return NULL; + } + + return bdf; +} + +extern int +VIDIX_NAME(vixPlaybackCopyFrame)(vidix_dma_t *dma) +{ + u_int frame = dma->idx; + struct pm3_bydma_frame *bdf; + + if(dma->internal[frame]){ + bdf = dma->internal[frame]; + } else { + if(!(bdf = pm3_setup_bydma(dma))){ + return -1; + } else if(dma->flags & BM_DMA_FIXED_BUFFS){ + if(mlock(bdf->cmds, page_size) == 0){ + dma->internal[frame] = bdf; + } else { + printf(PM3_MSG" Can't lock page @ %p\n", bdf->cmds); + } + } + } + + if(dma->flags & BM_DMA_SYNC){ + WRITE_REG(PM3IntEnable, (1 << 7)); + while(READ_REG(PM3ByDMAReadMode) & PM3ByDMAReadMode_Active){ + hwirq_wait(pci_info.irq); + } + WRITE_REG(PM3IntEnable, 0); + } + + WAIT_FIFO(3); + WRITE_REG(PM3ByDMAReadCommandBase, bdf->bus_addr); + WRITE_REG(PM3ByDMAReadCommandCount, bdf->count); + WRITE_REG(PM3ByDMAReadMode, + PM3ByDMAReadMode_ByteSwap_NONE | + PM3ByDMAReadMode_Format_RAW | + PM3ByDMAReadMode_PixelSize(16) | + PM3ByDMAReadMode_Active | + PM3ByDMAReadMode_Burst(7) | + PM3ByDMAReadMode_Align); + return 0; } + +extern int +VIDIX_NAME(vixQueryDMAStatus)(void) +{ + uint32_t bdm = READ_REG(PM3ByDMAReadMode); + return (bdm & PM3ByDMAReadMode_Active)? 1: 0; +} diff --git a/src/video_out/vidix/drivers/radeon.h b/src/video_out/vidix/drivers/radeon.h index 82ab7a895..090fbf8df 100644 --- a/src/video_out/vidix/drivers/radeon.h +++ b/src/video_out/vidix/drivers/radeon.h @@ -597,9 +597,7 @@ # define SCALER_UNKNOWN_FLAG3 0x02000000L /* ??? */ # define SCALER_UNKNOWN_FLAG4 0x04000000L /* ??? */ # define SCALER_DIS_LIMIT 0x08000000L -#ifdef RAGE128 # define SCALER_PRG_LOAD_START 0x10000000L -#endif # define SCALER_INT_EMU 0x20000000L # define SCALER_ENABLE 0x40000000L # define SCALER_SOFT_RESET 0x80000000L @@ -758,6 +756,10 @@ # define CMP_MIX_OR 0x00000000L # define CMP_MIX_AND 0x00000100L #define OV0_TEST 0x04F8 +# define OV0_SCALER_Y2R_DISABLE 0x00000001L +# define OV0_SUBPIC_ONLY 0x00000008L +# define OV0_EXTENSE 0x00000010L +# define OV0_SWAP_UV 0x00000020L #define OV0_COL_CONV 0x04FC # define OV0_CB_TO_B 0x0000007FL # define OV0_CB_TO_G 0x0000FF00L diff --git a/src/video_out/vidix/drivers/radeon_vid.c b/src/video_out/vidix/drivers/radeon_vid.c index 8d8805264..7864083a8 100644 --- a/src/video_out/vidix/drivers/radeon_vid.c +++ b/src/video_out/vidix/drivers/radeon_vid.c @@ -12,6 +12,7 @@ #include <math.h> #include <inttypes.h> #include <sys/mman.h> +#include "bswap.h" #include "pci_ids.h" #include "pci_names.h" #include "vidix.h" @@ -20,16 +21,24 @@ #include "radeon.h" #ifdef RAGE128 -#define RADEON_MSG "Rage128_vid:" +#define RADEON_MSG "rage128_vid:" #define X_ADJUST 0 #else -#define RADEON_MSG "Radeon_vid:" -#define X_ADJUST 8 +#define RADEON_MSG "radeon_vid:" +#define X_ADJUST (is_shift_required ? 8 : 0) #ifndef RADEON #define RADEON #endif #endif +#define RADEON_ASSERT(msg) printf(RADEON_MSG"################# FATAL:"msg); + +#ifdef RAGE128 +#define VIDIX_STATIC rage128_ +#else +#define VIDIX_STATIC radeo_ +#endif + //#undef RADEON_ENABLE_BM /* unfinished stuff. May corrupt your filesystem ever */ #define RADEON_ENABLE_BM 1 @@ -50,12 +59,19 @@ typedef struct #define VERBOSE_LEVEL 0 static int __verbose = 0; - +#ifndef RAGE128 +static int is_shift_required=0; +#endif typedef struct bes_registers_s { /* base address of yuv framebuffer */ uint32_t yuv_base; uint32_t fourcc; + uint32_t surf_id; + int load_prg_start; + int horz_pick_nearest; + int vert_pick_nearest; + int swap_uv; /* for direct support of bgr fourccs */ uint32_t dest_bpp; /* YUV BES registers */ uint32_t reg_load_cntl; @@ -85,6 +101,7 @@ typedef struct bes_registers_s uint32_t exclusive_horz; uint32_t auto_flip_cntl; uint32_t filter_cntl; + uint32_t four_tap_coeff[5]; uint32_t key_cntl; uint32_t test; /* Configurable stuff */ @@ -112,7 +129,7 @@ typedef struct video_registers_s static bes_registers_t besr; #ifndef RAGE128 -static int IsR200=0; +static int RadeonFamily=100; #endif #define DECLARE_VREG(name) { #name, name, 0 } static video_registers_t vregs[] = @@ -256,9 +273,12 @@ static uint32_t radeon_ram_size = 0; #define INREG8(addr) GETREG(uint8_t,(uint32_t)(radeon_mmio_base),addr) #define OUTREG8(addr,val) SETREG(uint8_t,(uint32_t)(radeon_mmio_base),addr,val) -#define INREG(addr) GETREG(uint32_t,(uint32_t)(radeon_mmio_base),addr) -#define OUTREG(addr,val) SETREG(uint32_t,(uint32_t)(radeon_mmio_base),addr,val) -#define OUTREGP(addr,val,mask) \ +static inline uint32_t INREG (uint32_t addr) { + uint32_t tmp = GETREG(uint32_t,(uint32_t)(radeon_mmio_base),addr); + return le2me_32(tmp); +} +#define OUTREG(addr,val) SETREG(uint32_t,(uint32_t)(radeon_mmio_base),addr,le2me_32(val)) +#define OUTREGP(addr,val,mask) \ do { \ unsigned int _tmp = INREG(addr); \ _tmp &= (mask); \ @@ -266,6 +286,7 @@ static uint32_t radeon_ram_size = 0; OUTREG(addr, _tmp); \ } while (0) + static __inline__ uint32_t INPLL(uint32_t addr) { OUTREG8(CLOCK_CNTL_INDEX, addr & 0x0000001f); @@ -274,7 +295,7 @@ static __inline__ uint32_t INPLL(uint32_t addr) #define OUTPLL(addr,val) OUTREG8(CLOCK_CNTL_INDEX, (addr & 0x0000001f) | 0x00000080); \ OUTREG(CLOCK_CNTL_DATA, val) -#define OUTPLLP(addr,val,mask) \ +#define OUTPLLP(addr,val,mask) \ do { \ unsigned int _tmp = INPLL(addr); \ _tmp &= (mask); \ @@ -362,7 +383,7 @@ static void radeon_engine_reset( void ) radeon_engine_flush(); clock_cntl_index = INREG(CLOCK_CNTL_INDEX); - mclk_cntl = INPLL(MCLK_CNTL); + mclk_cntl = INPLL(MCLK_CNTL); OUTPLL(MCLK_CNTL, mclk_cntl | FORCE_GCP | FORCE_PIPE3D_CP); @@ -374,7 +395,7 @@ static void radeon_engine_reset( void ) gen_reset_cntl & (uint32_t)(~SOFT_RESET_GUI)); INREG(GEN_RESET_CNTL); - OUTPLL(MCLK_CNTL, mclk_cntl); + OUTPLL(MCLK_CNTL, mclk_cntl); OUTREG(CLOCK_CNTL_INDEX, clock_cntl_index); OUTREG(GEN_RESET_CNTL, gen_reset_cntl); } @@ -386,7 +407,7 @@ static __inline__ void radeon_engine_flush ( void ) /* initiate flush */ OUTREGP(RB2D_DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL, - ~RB2D_DC_FLUSH_ALL); + ~RB2D_DC_FLUSH_ALL); for (i=0; i < 2000000; i++) { if (!(INREG(RB2D_DSTCACHE_CTLSTAT) & RB2D_DC_BUSY)) @@ -464,7 +485,7 @@ static void radeon_engine_restore( void ) (pitch64 << 22)); radeon_fifo_wait(1); -#if defined(__BIG_ENDIAN) +#if defined(WORDS_BIGENDIAN) OUTREGP(DP_DATATYPE, HOST_BIG_ENDIAN_EN, ~HOST_BIG_ENDIAN_EN); #else @@ -578,19 +599,19 @@ REF_TRANSFORM trans[2] = {1.1678, 0.0, 1.7980, -0.2139, -0.5345, 2.1186, 0.0} /* BT.709 */ }; /**************************************************************************** - * SetTransform * - * Function: Calculates and sets color space transform from supplied * - * reference transform, gamma, brightness, contrast, hue and * - * saturation. * - * Inputs: bright - brightness * - * cont - contrast * - * sat - saturation * - * hue - hue * - * red_intensity - intense of red component * - * green_intensity - intense of green component * - * blue_intensity - intense of blue component * - * ref - index to the table of refernce transforms * - * Outputs: NONE * + * SetTransform * + * Function: Calculates and sets color space transform from supplied * + * reference transform, gamma, brightness, contrast, hue and * + * saturation. * + * Inputs: bright - brightness * + * cont - contrast * + * sat - saturation * + * hue - hue * + * red_intensity - intense of red component * + * green_intensity - intense of green component * + * blue_intensity - intense of blue component * + * ref - index to the table of refernce transforms * + * Outputs: NONE * ****************************************************************************/ static void radeon_set_transform(float bright, float cont, float sat, @@ -635,7 +656,7 @@ static void radeon_set_transform(float bright, float cont, float sat, CAdjBCr = sat * OvHueSin * trans[ref].RefBCb; #if 0 /* default constants */ - CAdjLuma = 1.16455078125; + CAdjLuma = 1.16455078125; CAdjRCb = 0.0; CAdjRCr = 1.59619140625; @@ -744,7 +765,7 @@ GAMMA_SETTINGS r100_def_gamma[6] = static void make_default_gamma_correction( void ) { size_t i; - if(!IsR200){ + if(RadeonFamily == 100){ OUTREG(OV0_LIN_TRANS_A, 0x12A00000); OUTREG(OV0_LIN_TRANS_B, 0x199018FE); OUTREG(OV0_LIN_TRANS_C, 0x12A0F9B0); @@ -754,24 +775,23 @@ static void make_default_gamma_correction( void ) for(i=0; i<6; i++){ OUTREG(r100_def_gamma[i].gammaReg, (r100_def_gamma[i].gammaSlope<<16) | - r100_def_gamma[i].gammaOffset); + r100_def_gamma[i].gammaOffset); } } else{ - OUTREG(OV0_LIN_TRANS_A, 0x12a00000); - OUTREG(OV0_LIN_TRANS_B, 0x1990190e); - OUTREG(OV0_LIN_TRANS_C, 0x12a0f9c0); - OUTREG(OV0_LIN_TRANS_D, 0xf3000442); - OUTREG(OV0_LIN_TRANS_E, 0x12a02040); + OUTREG(OV0_LIN_TRANS_A, 0x12a20000); + OUTREG(OV0_LIN_TRANS_B, 0x198a190e); + OUTREG(OV0_LIN_TRANS_C, 0x12a2f9da); + OUTREG(OV0_LIN_TRANS_D, 0xf2fe0442); + OUTREG(OV0_LIN_TRANS_E, 0x12a22046); OUTREG(OV0_LIN_TRANS_F, 0x175f); - /* Default Gamma, Of 18 segments for gamma cure, all segments in R200 are programmable, while only lower 4 and upper 2 segments are programmable in Radeon*/ for(i=0; i<18; i++){ OUTREG(r200_def_gamma[i].gammaReg, (r200_def_gamma[i].gammaSlope<<16) | - r200_def_gamma[i].gammaOffset); + r200_def_gamma[i].gammaOffset); } } } @@ -780,7 +800,9 @@ static void make_default_gamma_correction( void ) static void radeon_vid_make_default(void) { #ifdef RAGE128 - OUTREG(OV0_COLOUR_CNTL,0x00101000UL); /* Default brihgtness and saturation for Rage128 */ + besr.saturation = 0x0F; + besr.brightness = 0; + OUTREG(OV0_COLOUR_CNTL,0x000F0F00UL); /* Default brihgtness and saturation for Rage128 */ #else make_default_gamma_correction(); #endif @@ -795,7 +817,7 @@ static void radeon_vid_make_default(void) } -unsigned vixGetVersion( void ) { return VIDIX_VERSION; } +unsigned VIDIX_NAME(vixGetVersion)( void ) { return VIDIX_VERSION; } static unsigned short ati_card_ids[] = { @@ -845,11 +867,11 @@ static unsigned short ati_card_ids[] = DEVICE_ATI_RAGE_128_SE_4X, DEVICE_ATI_RAGE_128_SF_4X, DEVICE_ATI_RAGE_128_SG_4X, - DEVICE_ATI_RAGE_128_4X, + DEVICE_ATI_RAGE_128_SH, DEVICE_ATI_RAGE_128_SK_4X, DEVICE_ATI_RAGE_128_SL_4X, DEVICE_ATI_RAGE_128_SM_4X, - DEVICE_ATI_RAGE_128_4X2, + DEVICE_ATI_RAGE_128_4X, DEVICE_ATI_RAGE_128_PRO, DEVICE_ATI_RAGE_128_PRO2, DEVICE_ATI_RAGE_128_PRO3, @@ -858,18 +880,40 @@ static unsigned short ati_card_ids[] = DEVICE_ATI_RAGE_MOBILITY_M32 #else /* Radeons (indeed: Rage 256 Pro ;) */ - DEVICE_ATI_RADEON_8500_DV, + DEVICE_ATI_RADEON_R100_QD, + DEVICE_ATI_RADEON_R100_QE, + DEVICE_ATI_RADEON_R100_QF, + DEVICE_ATI_RADEON_R100_QG, + DEVICE_ATI_RADEON_VE_QY, + DEVICE_ATI_RADEON_VE_QZ, + DEVICE_ATI_RADEON_MOBILITY_M7, + DEVICE_ATI_RADEON_MOBILITY_M72, DEVICE_ATI_RADEON_MOBILITY_M6, DEVICE_ATI_RADEON_MOBILITY_M62, - DEVICE_ATI_RADEON_MOBILITY_M63, - DEVICE_ATI_RADEON_QD, - DEVICE_ATI_RADEON_QE, - DEVICE_ATI_RADEON_QF, - DEVICE_ATI_RADEON_QG, - DEVICE_ATI_RADEON_QL, - DEVICE_ATI_RADEON_QW, - DEVICE_ATI_RADEON_VE_QY, - DEVICE_ATI_RADEON_VE_QZ + DEVICE_ATI_RADEON_R200_BB, + DEVICE_ATI_RADEON_R200_QH, + DEVICE_ATI_RADEON_R200_QI, + DEVICE_ATI_RADEON_R200_QJ, + DEVICE_ATI_RADEON_R200_QK, + DEVICE_ATI_RADEON_R200_QL, + DEVICE_ATI_RADEON_R200_QH2, + DEVICE_ATI_RADEON_R200_QI2, + DEVICE_ATI_RADEON_R200_QJ2, + DEVICE_ATI_RADEON_R200_QK2, + DEVICE_ATI_RADEON_RV200_QW, + DEVICE_ATI_RADEON_RV200_QX, + DEVICE_ATI_RADEON_R250_ID, + DEVICE_ATI_RADEON_R250_IE, + DEVICE_ATI_RADEON_R250_IF, + DEVICE_ATI_RADEON_R250_IG, + DEVICE_ATI_RADEON_R250_LD, + DEVICE_ATI_RADEON_R250_LE, + DEVICE_ATI_RADEON_R250_LF, + DEVICE_ATI_RADEON_R250_LG, + DEVICE_ATI_RADEON_R300_ND, + DEVICE_ATI_RADEON_R300_NE, + DEVICE_ATI_RADEON_R300_NF, + DEVICE_ATI_RADEON_R300_NG #endif }; @@ -883,7 +927,7 @@ static int find_chip(unsigned chip_id) return -1; } -pciinfo_t pci_info; +static pciinfo_t pci_info; static int probed=0; vidix_capability_t def_cap = @@ -908,7 +952,7 @@ vidix_capability_t def_cap = }; -int vixProbe( int verbose,int force ) +int VIDIX_NAME(vixProbe)( int verbose,int force ) { pciinfo_t lst[MAX_PCI_DEVICES]; unsigned i,num_pci; @@ -927,18 +971,78 @@ int vixProbe( int verbose,int force ) { if(lst[i].vendor == VENDOR_ATI) { - int idx; + int idx; const char *dname; idx = find_chip(lst[i].device); if(idx == -1 && force == PROBE_NORMAL) continue; dname = pci_device_name(VENDOR_ATI,lst[i].device); dname = dname ? dname : "Unknown chip"; printf(RADEON_MSG" Found chip: %s\n",dname); -#ifndef RAGE128 +#ifndef RAGE128 if(idx != -1) - if(ati_card_ids[idx] == DEVICE_ATI_RADEON_QL || - ati_card_ids[idx] == DEVICE_ATI_RADEON_8500_DV || - ati_card_ids[idx] == DEVICE_ATI_RADEON_QW) IsR200 = 1; + { + switch(ati_card_ids[idx]) { + /* Original radeon */ + case DEVICE_ATI_RADEON_R100_QD: + case DEVICE_ATI_RADEON_R100_QE: + case DEVICE_ATI_RADEON_R100_QF: + case DEVICE_ATI_RADEON_R100_QG: + RadeonFamily = 100; + break; + + /* Radeon VE / Radeon Mobility */ + case DEVICE_ATI_RADEON_VE_QY: + case DEVICE_ATI_RADEON_VE_QZ: + case DEVICE_ATI_RADEON_MOBILITY_M6: + case DEVICE_ATI_RADEON_MOBILITY_M62: + RadeonFamily = 120; + break; + + /* Radeon 7500 / Radeon Mobility 7500 */ + case DEVICE_ATI_RADEON_RV200_QW: + case DEVICE_ATI_RADEON_RV200_QX: + case DEVICE_ATI_RADEON_MOBILITY_M7: + case DEVICE_ATI_RADEON_MOBILITY_M72: + RadeonFamily = 150; + break; + + /* Radeon 8500 */ + case DEVICE_ATI_RADEON_R200_BB: + case DEVICE_ATI_RADEON_R200_QH: + case DEVICE_ATI_RADEON_R200_QI: + case DEVICE_ATI_RADEON_R200_QJ: + case DEVICE_ATI_RADEON_R200_QK: + case DEVICE_ATI_RADEON_R200_QL: + case DEVICE_ATI_RADEON_R200_QH2: + case DEVICE_ATI_RADEON_R200_QI2: + case DEVICE_ATI_RADEON_R200_QJ2: + case DEVICE_ATI_RADEON_R200_QK2: + RadeonFamily = 200; + break; + + /* Radeon 9000 */ + case DEVICE_ATI_RADEON_R250_ID: + case DEVICE_ATI_RADEON_R250_IE: + case DEVICE_ATI_RADEON_R250_IF: + case DEVICE_ATI_RADEON_R250_IG: + case DEVICE_ATI_RADEON_R250_LD: + case DEVICE_ATI_RADEON_R250_LE: + case DEVICE_ATI_RADEON_R250_LF: + case DEVICE_ATI_RADEON_R250_LG: + RadeonFamily = 250; + break; + + /* Radeon 9700 */ + case DEVICE_ATI_RADEON_R300_ND: + case DEVICE_ATI_RADEON_R300_NE: + case DEVICE_ATI_RADEON_R300_NF: + case DEVICE_ATI_RADEON_R300_NG: + RadeonFamily = 300; + break; + default: + break; + } + } #endif if(force > PROBE_NORMAL) { @@ -993,7 +1097,7 @@ static char * GET_MON_NAME(int type) case MT_LCD: pret = "LCD"; break; case MT_CTV: pret = "CTV"; break; case MT_STV: pret = "STV"; break; - default: pret = "Unknown"; + default: pret = "Unknown"; } return pret; } @@ -1040,7 +1144,38 @@ static void radeon_get_moninfo (rinfo_t *rinfo) } } #endif -int vixInit( void ) + +typedef struct saved_regs_s +{ + uint32_t ov0_vid_key_clr; + uint32_t ov0_vid_key_msk; + uint32_t ov0_graphics_key_clr; + uint32_t ov0_graphics_key_msk; + uint32_t ov0_key_cntl; +}saved_regs_t; +static saved_regs_t savreg; + +static void save_regs( void ) +{ + radeon_fifo_wait(6); + savreg.ov0_vid_key_clr = INREG(OV0_VID_KEY_CLR); + savreg.ov0_vid_key_msk = INREG(OV0_VID_KEY_MSK); + savreg.ov0_graphics_key_clr = INREG(OV0_GRAPHICS_KEY_CLR); + savreg.ov0_graphics_key_msk = INREG(OV0_GRAPHICS_KEY_MSK); + savreg.ov0_key_cntl = INREG(OV0_KEY_CNTL); +} + +static void restore_regs( void ) +{ + radeon_fifo_wait(6); + OUTREG(OV0_VID_KEY_CLR,savreg.ov0_vid_key_clr); + OUTREG(OV0_VID_KEY_MSK,savreg.ov0_vid_key_msk); + OUTREG(OV0_GRAPHICS_KEY_CLR,savreg.ov0_graphics_key_clr); + OUTREG(OV0_GRAPHICS_KEY_MSK,savreg.ov0_graphics_key_msk); + OUTREG(OV0_KEY_CNTL,savreg.ov0_key_cntl); +} + +int VIDIX_NAME(vixInit)( const char *args ) { int err; if(!probed) @@ -1061,19 +1196,18 @@ int vixInit( void ) #ifndef RAGE128 { memset(&rinfo,0,sizeof(rinfo_t)); - switch(def_cap.device_id) + if(RadeonFamily > 100) rinfo.hasCRTC2 = 1; + + switch(RadeonFamily) { - case DEVICE_ATI_RADEON_VE_QY: - case DEVICE_ATI_RADEON_VE_QZ: - case DEVICE_ATI_RADEON_MOBILITY_M6: - case DEVICE_ATI_RADEON_MOBILITY_M62: - case DEVICE_ATI_RADEON_MOBILITY_M63: - case DEVICE_ATI_RADEON_QL: - case DEVICE_ATI_RADEON_8500_DV: - case DEVICE_ATI_RADEON_QW: - rinfo.hasCRTC2 = 1; - break; - default: break; + case 100: + case 120: + case 150: + case 250: + is_shift_required=1; + break; + default: + break; } radeon_get_moninfo(&rinfo); if(rinfo.hasCRTC2) { @@ -1095,17 +1229,19 @@ int vixInit( void ) else if(__verbose) printf(RADEON_MSG" Can't initialize busmastering: %s\n",strerror(errno)); #endif + save_regs(); return 0; } -void vixDestroy( void ) +void VIDIX_NAME(vixDestroy)( void ) { + restore_regs(); unmap_phys_mem(radeon_mem_base,radeon_ram_size); unmap_phys_mem(radeon_mmio_base,0xFFFF); bm_close(); } -int vixGetCapability(vidix_capability_t *to) +int VIDIX_NAME(vixGetCapability)(vidix_capability_t *to) { memcpy(to,&def_cap,sizeof(vidix_capability_t)); return 0; @@ -1116,29 +1252,45 @@ int vixGetCapability(vidix_capability_t *to) YUY2, UYVY, DDES, OGLT, OGL2, OGLS, OGLB, OGNT, OGNZ, OGNS, IF09, YVU9, IMC4, M2IA, IYUV, VBID, DXT1, DXT2, DXT3, DXT4, DXT5 */ -uint32_t supported_fourcc[] = -{ - IMGFMT_Y800, IMGFMT_YVU9, IMGFMT_IF09, - IMGFMT_YV12, IMGFMT_I420, IMGFMT_IYUV, - IMGFMT_UYVY, IMGFMT_YUY2, IMGFMT_YVYU, - IMGFMT_RGB15, IMGFMT_BGR15, - IMGFMT_RGB16, IMGFMT_BGR16, - IMGFMT_RGB32, IMGFMT_BGR32 +typedef struct fourcc_desc_s +{ + uint32_t fourcc; + unsigned max_srcw; +}fourcc_desc_t; + +fourcc_desc_t supported_fourcc[] = +{ + { IMGFMT_Y800, 1567 }, + { IMGFMT_YVU9, 1567 }, + { IMGFMT_IF09, 1567 }, + { IMGFMT_YV12, 1567 }, + { IMGFMT_I420, 1567 }, + { IMGFMT_IYUV, 1567 }, + { IMGFMT_UYVY, 1551 }, + { IMGFMT_YUY2, 1551 }, + { IMGFMT_YVYU, 1551 }, + { IMGFMT_RGB15, 1551 }, + { IMGFMT_BGR15, 1551 }, + { IMGFMT_RGB16, 1551 }, + { IMGFMT_BGR16, 1551 }, + { IMGFMT_RGB32, 775 }, + { IMGFMT_BGR32, 775 } }; -__inline__ static int is_supported_fourcc(uint32_t fourcc) +__inline__ static int is_supported_fourcc(uint32_t fourcc,unsigned srcw) { unsigned i; - for(i=0;i<sizeof(supported_fourcc)/sizeof(uint32_t);i++) + for(i=0;i<sizeof(supported_fourcc)/sizeof(fourcc_desc_t);i++) { - if(fourcc==supported_fourcc[i]) return 1; + if(fourcc==supported_fourcc[i].fourcc && + srcw <=supported_fourcc[i].max_srcw) return 1; } return 0; } -int vixQueryFourcc(vidix_fourcc_t *to) +int VIDIX_NAME(vixQueryFourcc)(vidix_fourcc_t *to) { - if(is_supported_fourcc(to->fourcc)) + if(is_supported_fourcc(to->fourcc,to->srcw)) { to->depth = VID_DEPTH_1BPP | VID_DEPTH_2BPP | VID_DEPTH_4BPP | VID_DEPTH_8BPP | @@ -1152,6 +1304,7 @@ int vixQueryFourcc(vidix_fourcc_t *to) return ENOSYS; } +static double H_scale_ratio; static void radeon_vid_dump_regs( void ) { size_t i; @@ -1161,6 +1314,7 @@ static void radeon_vid_dump_regs( void ) printf(RADEON_MSG"radeon_overlay_off=%08X\n",radeon_overlay_off); printf(RADEON_MSG"radeon_ram_size=%08X\n",radeon_ram_size); printf(RADEON_MSG"video mode: %ux%u@%u\n",radeon_get_xres(),radeon_get_yres(),radeon_vid_get_dbpp()); + printf(RADEON_MSG"H_scale_ratio=%8.2f\n",H_scale_ratio); printf(RADEON_MSG"*** Begin of OV0 registers dump ***\n"); for(i=0;i<sizeof(vregs)/sizeof(video_registers_t);i++) printf(RADEON_MSG"%s = %08X\n",vregs[i].sname,INREG(vregs[i].name)); @@ -1174,7 +1328,11 @@ static void radeon_vid_stop_video( void ) OUTREG(OV0_EXCLUSIVE_HORZ, 0); OUTREG(OV0_AUTO_FLIP_CNTL, 0); /* maybe */ OUTREG(OV0_FILTER_CNTL, FILTER_HARDCODED_COEF); +#ifdef RAGE128 OUTREG(OV0_KEY_CNTL, GRAPHIC_KEY_FN_NE); +#else + OUTREG(OV0_KEY_CNTL, GRAPHIC_KEY_FN_EQ); +#endif OUTREG(OV0_TEST, 0); } @@ -1235,41 +1393,18 @@ static void radeon_vid_display_video( void ) OUTREG(OV0_P23_V_ACCUM_INIT, besr.p23_v_accum_init); bes_flags = SCALER_ENABLE | - SCALER_SMART_SWITCH | + SCALER_SMART_SWITCH | SCALER_Y2R_TEMP | SCALER_PIX_EXPAND; if(besr.double_buff) bes_flags |= SCALER_DOUBLE_BUFFER; if(besr.deinterlace_on) bes_flags |= SCALER_ADAPTIVE_DEINT; + if(besr.horz_pick_nearest) bes_flags |= SCALER_HORZ_PICK_NEAREST; + if(besr.vert_pick_nearest) bes_flags |= SCALER_VERT_PICK_NEAREST; #ifdef RAGE128 bes_flags |= SCALER_BURST_PER_PLANE; #endif - switch(besr.fourcc) - { - case IMGFMT_RGB15: - case IMGFMT_BGR15: bes_flags |= SCALER_SOURCE_15BPP | 0x10000000; break; - case IMGFMT_RGB16: - case IMGFMT_BGR16: bes_flags |= SCALER_SOURCE_16BPP | 0x10000000; break; -/* - case IMGFMT_RGB24: - case IMGFMT_BGR24: bes_flags |= SCALER_SOURCE_24BPP; break; -*/ - case IMGFMT_RGB32: - case IMGFMT_BGR32: bes_flags |= SCALER_SOURCE_32BPP | 0x10000000; break; - /* 4:1:0*/ - case IMGFMT_IF09: - case IMGFMT_YVU9: bes_flags |= SCALER_SOURCE_YUV9; break; - /* 4:0:0*/ - case IMGFMT_Y800: - /* 4:2:0 */ - case IMGFMT_IYUV: - case IMGFMT_I420: - case IMGFMT_YV12: bes_flags |= SCALER_SOURCE_YUV12; break; - /* 4:2:2 */ - case IMGFMT_YVYU: - case IMGFMT_UYVY: bes_flags |= SCALER_SOURCE_YVYU422; break; - case IMGFMT_YUY2: - default: bes_flags |= SCALER_SOURCE_VYUY422; break; - } + bes_flags |= (besr.surf_id << 8) & SCALER_SURFAC_FORMAT; + if(besr.load_prg_start) bes_flags |= SCALER_PRG_LOAD_START; OUTREG(OV0_SCALE_CNTL, bes_flags); #ifndef RAGE128 if(rinfo.hasCRTC2 && @@ -1278,6 +1413,14 @@ static void radeon_vid_display_video( void ) /* TODO: suppress scaler output to CRTC here and enable TVO only */ } #endif + radeon_fifo_wait(6); + OUTREG(OV0_FILTER_CNTL,besr.filter_cntl); + OUTREG(OV0_FOUR_TAP_COEF_0,besr.four_tap_coeff[0]); + OUTREG(OV0_FOUR_TAP_COEF_1,besr.four_tap_coeff[1]); + OUTREG(OV0_FOUR_TAP_COEF_2,besr.four_tap_coeff[2]); + OUTREG(OV0_FOUR_TAP_COEF_3,besr.four_tap_coeff[3]); + OUTREG(OV0_FOUR_TAP_COEF_4,besr.four_tap_coeff[4]); + if(besr.swap_uv) OUTREG(OV0_TEST,INREG(OV0_TEST)|OV0_SWAP_UV); OUTREG(OV0_REG_LOAD_CNTL, 0); if(__verbose > VERBOSE_LEVEL) printf(RADEON_MSG"we wanted: scaler=%08X\n",bes_flags); if(__verbose > VERBOSE_LEVEL) radeon_vid_dump_regs(); @@ -1358,34 +1501,966 @@ static unsigned radeon_query_pitch(unsigned fourcc,const vidix_yuv_t *spitch) return pitch; } +static void Calc_H_INC_STEP_BY ( + int fieldvalue_OV0_SURFACE_FORMAT, + double H_scale_ratio, + int DisallowFourTapVertFiltering, + int DisallowFourTapUVVertFiltering, + uint32_t *val_OV0_P1_H_INC, + uint32_t *val_OV0_P1_H_STEP_BY, + uint32_t *val_OV0_P23_H_INC, + uint32_t *val_OV0_P23_H_STEP_BY, + int *P1GroupSize, + int *P1StepSize, + int *P23StepSize ) +{ + + double ClocksNeededFor16Pixels; + + switch (fieldvalue_OV0_SURFACE_FORMAT) + { + case 3: + case 4: /*16BPP (ARGB1555 and RGB565) */ + /* All colour components are fetched in pairs */ + *P1GroupSize = 2; + /* We don't support four tap in this mode because G's are split between two bytes. In theory we could support it if */ + /* we saved part of the G when fetching the R, and then filter the G, followed by the B in the following cycles. */ + if (H_scale_ratio>=.5) + { + /* We are actually generating two pixels (but 3 colour components) per tick. Thus we don't have to skip */ + /* until we reach .5. P1 and P23 are the same. */ + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 1; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 1; + *P1StepSize = 1; + *P23StepSize = 1; + } + else if (H_scale_ratio>=.25) + { + /* Step by two */ + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*2)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 2; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*2)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 2; + *P1StepSize = 2; + *P23StepSize = 2; + } + else if (H_scale_ratio>=.125) + { + /* Step by four */ + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*4)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 3; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*4)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 3; + *P1StepSize = 4; + *P23StepSize = 4; + } + else if (H_scale_ratio>=.0625) + { + /* Step by eight */ + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*8)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 4; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*8)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 4; + *P1StepSize = 8; + *P23StepSize = 8; + } + else if (H_scale_ratio>=0.03125) + { + /* Step by sixteen */ + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*16)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 5; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*16)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 5; + *P1StepSize = 16; + *P23StepSize = 16; + } + else + { + H_scale_ratio=0.03125; + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*16)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 5; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*16)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 5; + *P1StepSize = 16; + *P23StepSize = 16; + } + break; + case 6: /*32BPP RGB */ + if (H_scale_ratio>=1.5 && !DisallowFourTapVertFiltering) + { + /* All colour components are fetched in pairs */ + *P1GroupSize = 2; + /* With four tap filtering, we can generate two colour components every clock, or two pixels every three */ + /* clocks. This means that we will have four tap filtering when scaling 1.5 or more. */ + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 0; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 0; + *P1StepSize = 1; + *P23StepSize = 1; + } + else if (H_scale_ratio>=0.75) + { + /* Four G colour components are fetched at once */ + *P1GroupSize = 4; + /* R and B colour components are fetched in pairs */ + /* With two tap filtering, we can generate four colour components every clock. */ + /* This means that we will have two tap filtering when scaling 1.0 or more. */ + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 1; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 1; + *P1StepSize = 1; + *P23StepSize = 1; + } + else if (H_scale_ratio>=0.375) + { + /* Step by two. */ + /* Four G colour components are fetched at once */ + *P1GroupSize = 4; + /* R and B colour components are fetched in pairs */ + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*2)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 2; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*2)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 2; + *P1StepSize = 2; + *P23StepSize = 2; + } + else if (H_scale_ratio>=0.25) + { + /* Step by two. */ + /* Four G colour components are fetched at once */ + *P1GroupSize = 4; + /* R and B colour components are fetched in pairs */ + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*2)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 2; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*4)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 3; + *P1StepSize = 2; + *P23StepSize = 4; + } + else if (H_scale_ratio>=0.1875) + { + /* Step by four */ + /* Four G colour components are fetched at once */ + *P1GroupSize = 4; + /* R and B colour components are fetched in pairs */ + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*4)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 3; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*4)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 3; + *P1StepSize = 4; + *P23StepSize = 4; + } + else if (H_scale_ratio>=0.125) + { + /* Step by four */ + /* Four G colour components are fetched at once */ + *P1GroupSize = 4; + /* R and B colour components are fetched in pairs */ + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*4)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 3; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*8)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 4; + *P1StepSize = 4; + *P23StepSize = 8; + } + else if (H_scale_ratio>=0.09375) + { + /* Step by eight */ + /* Four G colour components are fetched at once */ + *P1GroupSize = 4; + /* R and B colour components are fetched in pairs */ + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*8)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 4; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*8)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 4; + *P1StepSize = 8; + *P23StepSize = 8; + } + else if (H_scale_ratio>=0.0625) + { + /* Step by eight */ + /* Four G colour components are fetched at once */ + *P1GroupSize = 4; + /* R and B colour components are fetched in pairs */ + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*16)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 5; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*16)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 5; + *P1StepSize = 16; + *P23StepSize = 16; + } + else + { + H_scale_ratio=0.0625; + *P1GroupSize = 4; + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*16)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 5; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*16)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 5; + *P1StepSize = 16; + *P23StepSize = 16; + } + break; + case 9: + /*ToDo_Active: In mode 9 there is a possibility that HScale ratio may be set to an illegal value, so we have extra conditions in the if statement. For consistancy, these conditions be added to the other modes as well. */ + /* four tap on both (unless Y is too wide) */ + if ((H_scale_ratio>=(ClocksNeededFor16Pixels=8+2+2) / 16.0) && + ((uint16_t)((1/(H_scale_ratio)) * (1<<0xc) + 0.5)<=0x3000) && + ((uint16_t)((1/(H_scale_ratio*4)) * (1<<0xc) + 0.5)<=0x2000) && + !DisallowFourTapVertFiltering && !DisallowFourTapUVVertFiltering) + { /*0.75 */ + /* Colour components are fetched in pairs */ + *P1GroupSize = 2; + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 0; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*4)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 0; + *P1StepSize = 1; + *P23StepSize = 1; + } + /* two tap on Y (because it is too big for four tap), four tap on UV */ + else if ((H_scale_ratio>=(ClocksNeededFor16Pixels=4+2+2) / 16.0) && + ((uint16_t)((1/(H_scale_ratio)) * (1<<0xc) + 0.5)<=0x3000) && + ((uint16_t)((1/(H_scale_ratio*4)) * (1<<0xc) + 0.5)<=0x2000) && + DisallowFourTapVertFiltering && !DisallowFourTapUVVertFiltering) + { /*0.75 */ + *P1GroupSize = 4; + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 1; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*4)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 0; + *P1StepSize = 1; + *P23StepSize = 1; + } + /* We scale the Y with the four tap filters, but UV's are generated + with dual two tap configuration. */ + else if ((H_scale_ratio>=(ClocksNeededFor16Pixels=8+1+1) / 16.0) && + ((uint16_t)((1/(H_scale_ratio)) * (1<<0xc) + 0.5)<=0x3000) && + ((uint16_t)((1/(H_scale_ratio*4)) * (1<<0xc) + 0.5)<=0x2000) && + !DisallowFourTapVertFiltering) + { /*0.625 */ + *P1GroupSize = 2; + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 0; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*4)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 1; + *P1StepSize = 1; + *P23StepSize = 1; + } + /* We scale the Y, U, and V with the two tap filters */ + else if ((H_scale_ratio>=(ClocksNeededFor16Pixels=4+1+1) / 16.0) && + ((uint16_t)((1/(H_scale_ratio)) * (1<<0xc) + 0.5)<=0x3000) && + ((uint16_t)((1/(H_scale_ratio*4)) * (1<<0xc) + 0.5)<=0x2000)) + { /*0.375 */ + *P1GroupSize = 4; + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 1; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*4)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 1; + *P1StepSize = 1; + *P23StepSize = 1; + } + /* We scale step the U and V by two to allow more bandwidth for fetching Y's, + thus we won't drop Y's yet. */ + else if ((H_scale_ratio>=(ClocksNeededFor16Pixels=4+.5+.5) / 16.0) && + ((uint16_t)((1/(H_scale_ratio)) * (1<<0xc) + 0.5)<=0x3000) && + ((uint16_t)((1/(H_scale_ratio*4*2)) * (1<<0xc) + 0.5)<=0x2000)) + { /*>=0.3125 and >.333333~ */ + *P1GroupSize = 4; + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 1; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*4*2)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 2; + *P1StepSize = 1; + *P23StepSize = 2; + } + /* We step the Y, U, and V by two. */ + else if ((H_scale_ratio>=(ClocksNeededFor16Pixels=2+.5+.5) / 16.0) && + ((uint16_t)((1/(H_scale_ratio*2)) * (1<<0xc) + 0.5)<=0x3000) && + ((uint16_t)((1/(H_scale_ratio*4*2)) * (1<<0xc) + 0.5)<=0x2000)) + { + *P1GroupSize = 4; + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*2)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 2; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*4*2)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 2; + *P1StepSize = 2; + *P23StepSize = 2; + } + /* We step the Y by two and the U and V by four. */ + else if ((H_scale_ratio>=(ClocksNeededFor16Pixels=2+.25+.25) / 16.0) && + ((uint16_t)((1/(H_scale_ratio)) * (1<<0xc) + 0.5)<=0x3000) && + ((uint16_t)((1/(H_scale_ratio*4*4)) * (1<<0xc) + 0.5)<=0x2000)) + { + *P1GroupSize = 4; + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*2)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 2; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*4*4)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 3; + *P1StepSize = 2; + *P23StepSize = 4; + } + /* We step the Y, U, and V by four. */ + else if ((H_scale_ratio>=(ClocksNeededFor16Pixels=1+.25+.25) / 16.0) && + ((uint16_t)((1/(H_scale_ratio*4)) * (1<<0xc) + 0.5)<=0x3000) && + ((uint16_t)((1/(H_scale_ratio*4*4)) * (1<<0xc) + 0.5)<=0x2000)) + { + *P1GroupSize = 4; + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*4)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 3; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*4*4)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 3; + *P1StepSize = 4; + *P23StepSize = 4; + } + /* We would like to step the Y by four and the U and V by eight, but we can't mix step by 3 and step by 4 for packed modes */ + + /* We step the Y, U, and V by eight. */ + else if ((H_scale_ratio>=(ClocksNeededFor16Pixels=.5+.125+.125) / 16.0) && + ((uint16_t)((1/(H_scale_ratio*8)) * (1<<0xc) + 0.5)<=0x3000) && + ((uint16_t)((1/(H_scale_ratio*4*8)) * (1<<0xc) + 0.5)<=0x2000)) + { + *P1GroupSize = 4; + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*8)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 4; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*4*8)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 4; + *P1StepSize = 8; + *P23StepSize = 8; + } + /* We step the Y by eight and the U and V by sixteen. */ + else if ((H_scale_ratio>=(ClocksNeededFor16Pixels=.5+.0625+.0625) / 16.0) && + ((uint16_t)((1/(H_scale_ratio*8)) * (1<<0xc) + 0.5)<=0x3000) && + ((uint16_t)((1/(H_scale_ratio*4*16)) * (1<<0xc) + 0.5)<=0x2000)) + { + *P1GroupSize = 4; + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*8)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 4; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*4*16)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 5; + *P1StepSize = 8; + *P23StepSize = 16; + } + /* We step the Y, U, and V by sixteen. */ + else if ((H_scale_ratio>=(ClocksNeededFor16Pixels=.25+.0625+.0625) / 16.0) && + ((uint16_t)((1/(H_scale_ratio*16)) * (1<<0xc) + 0.5)<=0x3000) && + ((uint16_t)((1/(H_scale_ratio*4*16)) * (1<<0xc) + 0.5)<=0x2000)) + { + *P1GroupSize = 4; + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*16)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 5; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*4*16)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 5; + *P1StepSize = 16; + *P23StepSize = 16; + } + else + { + H_scale_ratio=(ClocksNeededFor16Pixels=.25+.0625+.0625) / 16; + *P1GroupSize = 4; + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*16)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 5; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*4*16)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 5; + *P1StepSize = 16; + *P23StepSize = 16; + } + break; + case 10: + case 11: + case 12: + case 13: + case 14: /* YUV12, VYUY422, YUYV422, YOverPkCRCB12, YWovenWithPkCRCB12 */ + /* We scale the Y, U, and V with the four tap filters */ + /* four tap on both (unless Y is too wide) */ + if ((H_scale_ratio>=(ClocksNeededFor16Pixels=8+4+4) / 16.0) && + !DisallowFourTapVertFiltering && !DisallowFourTapUVVertFiltering) + { /*0.75 */ + *P1GroupSize = 2; + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 0; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*2)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 0; + *P1StepSize = 1; + *P23StepSize = 1; + } + /* two tap on Y (because it is too big for four tap), four tap on UV */ + else if ((H_scale_ratio>=(ClocksNeededFor16Pixels=4+4+4) / 16.0) && + DisallowFourTapVertFiltering && !DisallowFourTapUVVertFiltering) + { /*0.75 */ + *P1GroupSize = 4; + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 1; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*2)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 0; + *P1StepSize = 1; + *P23StepSize = 1; + } + /* We scale the Y with the four tap filters, but UV's are generated + with dual two tap configuration. */ + else if ((H_scale_ratio>=(ClocksNeededFor16Pixels=8+2+2) / 16.0) && + !DisallowFourTapVertFiltering) + { /*0.625 */ + *P1GroupSize = 2; + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 0; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*2)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 1; + *P1StepSize = 1; + *P23StepSize = 1; + } + /* We scale the Y, U, and V with the two tap filters */ + else if (H_scale_ratio>=(ClocksNeededFor16Pixels=4+2+2) / 16.0) + { /*0.375 */ + *P1GroupSize = 4; + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 1; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*2)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 1; + *P1StepSize = 1; + *P23StepSize = 1; + } + /* We scale step the U and V by two to allow more bandwidth for + fetching Y's, thus we won't drop Y's yet. */ + else if (H_scale_ratio>=(ClocksNeededFor16Pixels=4+1+1) / 16.0) + { /*0.312 */ + *P1GroupSize = 4; + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 1; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*2*2)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 2; + *P1StepSize = 1; + *P23StepSize = 2; + } + /* We step the Y, U, and V by two. */ + else if (H_scale_ratio>=(ClocksNeededFor16Pixels=2+1+1) / 16.0) + { + *P1GroupSize = 4; + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*2)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 2; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*2*2)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 2; + *P1StepSize = 2; + *P23StepSize = 2; + } + /* We step the Y by two and the U and V by four. */ + else if (H_scale_ratio>=(ClocksNeededFor16Pixels=2+.5+.5) / 16.0) + { + *P1GroupSize = 4; + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*2)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 2; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*2*4)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 3; + *P1StepSize = 2; + *P23StepSize = 4; + } + /* We step the Y, U, and V by four. */ + else if (H_scale_ratio>=(ClocksNeededFor16Pixels=1+.5+.5) / 16.0) + { + *P1GroupSize = 4; + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*4)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 3; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*2*4)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 3; + *P1StepSize = 4; + *P23StepSize = 4; + } + /* We step the Y by four and the U and V by eight. */ + else if ((H_scale_ratio>=(ClocksNeededFor16Pixels=1+.25+.25) / 16.0) && + (fieldvalue_OV0_SURFACE_FORMAT==10)) + { + *P1GroupSize = 4; + /* Can't mix step by 3 and step by 4 for packed modes */ + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*4)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 3; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*2*8)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 4; + *P1StepSize = 4; + *P23StepSize = 8; + } + /* We step the Y, U, and V by eight. */ + else if (H_scale_ratio>=(ClocksNeededFor16Pixels=.5+.25+.25) / 16.0) + { + *P1GroupSize = 4; + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*8)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 4; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*2*8)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 4; + *P1StepSize = 8; + *P23StepSize = 8; + } + /* We step the Y by eight and the U and V by sixteen. */ + else if ((H_scale_ratio>=(ClocksNeededFor16Pixels=.5+.125+.125) / 16.0) && (fieldvalue_OV0_SURFACE_FORMAT==10)) + { + *P1GroupSize = 4; + /* Step by 5 not supported for packed modes */ + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*8)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 4; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*2*16)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 5; + *P1StepSize = 8; + *P23StepSize = 16; + } + /* We step the Y, U, and V by sixteen. */ + else if ((H_scale_ratio>=(ClocksNeededFor16Pixels=.25+.125+.125) / 16.0) && + (fieldvalue_OV0_SURFACE_FORMAT==10)) + { + *P1GroupSize = 4; + /* Step by 5 not supported for packed modes */ + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*16)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 5; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*2*16)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 5; + *P1StepSize = 16; + *P23StepSize = 16; + } + else + { + if (fieldvalue_OV0_SURFACE_FORMAT==10) + { + H_scale_ratio=(ClocksNeededFor16Pixels=.25+.125+.125) / 16; + *P1GroupSize = 4; + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*16)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 5; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*2*16)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 5; + *P1StepSize = 16; + *P23StepSize = 16; + } + else + { + H_scale_ratio=(ClocksNeededFor16Pixels=.5+.25+.25) / 16; + *P1GroupSize = 4; + *val_OV0_P1_H_INC = (uint16_t)((1/(H_scale_ratio*8)) * (1<<0xc) + 0.5); + *val_OV0_P1_H_STEP_BY = 4; + *val_OV0_P23_H_INC = (uint16_t)((1/(H_scale_ratio*2*8)) * (1<<0xc) + 0.5); + *val_OV0_P23_H_STEP_BY = 4; + *P1StepSize = 8; + *P23StepSize = 8; + } + } + break; + default: break; + + } + besr.h_inc = (*(val_OV0_P1_H_INC)&0x3fff) | ((*(val_OV0_P23_H_INC)&0x3fff)<<16); + besr.step_by = (*(val_OV0_P1_H_STEP_BY)&0x7) | ((*(val_OV0_P23_H_STEP_BY)&0x7)<<8); +} + +/* ********************************************************* */ +/* ** Setup Black Bordering */ +/* ********************************************************* */ + +static void ComputeBorders( vidix_playback_t *config, int VertUVSubSample ) +{ + double tempBLANK_LINES_AT_TOP; + unsigned TopLine,BottomLine,SourceLinesUsed,TopUVLine,BottomUVLine,SourceUVLinesUsed; + uint32_t val_OV0_P1_ACTIVE_LINES_M1,val_OV0_P1_BLNK_LN_AT_TOP_M1; + uint32_t val_OV0_P23_ACTIVE_LINES_M1,val_OV0_P23_BLNK_LN_AT_TOP_M1; + + if (floor(config->src.y)<0) { + tempBLANK_LINES_AT_TOP = -floor(config->src.y); + TopLine = 0; + } + else { + tempBLANK_LINES_AT_TOP = 0; + TopLine = (int)floor(config->src.y); + } + /* Round rSrcBottom up and subtract one */ + if (ceil(config->src.y+config->src.h) > config->src.h) + { + BottomLine = config->src.h - 1; + } + else + { + BottomLine = (int)ceil(config->src.y+config->src.h) - 1; + } + + if (BottomLine >= TopLine) + { + SourceLinesUsed = BottomLine - TopLine + 1; + } + else + { + /*CYCACC_ASSERT(0, "SourceLinesUsed less than or equal to zero.") */ + SourceLinesUsed = 1; + } + + { + int SourceHeightInPixels; + SourceHeightInPixels = BottomLine - TopLine + 1; + } + + val_OV0_P1_ACTIVE_LINES_M1 = SourceLinesUsed - 1; + val_OV0_P1_BLNK_LN_AT_TOP_M1 = ((int)tempBLANK_LINES_AT_TOP-1) & 0xfff; + + TopUVLine = ((int)(config->src.y/VertUVSubSample) < 0) ? 0: (int)(config->src.y/VertUVSubSample); /* Round rSrcTop down */ + BottomUVLine = (ceil(((config->src.y+config->src.h)/VertUVSubSample)) > (config->src.h/VertUVSubSample)) + ? (config->src.h/VertUVSubSample)-1 : (int)ceil(((config->src.y+config->src.h)/VertUVSubSample))-1; + + if (BottomUVLine >= TopUVLine) + { + SourceUVLinesUsed = BottomUVLine - TopUVLine + 1; + } + else + { + /*CYCACC_ASSERT(0, "SourceUVLinesUsed less than or equal to zero.") */ + SourceUVLinesUsed = 1; + } + val_OV0_P23_ACTIVE_LINES_M1 = SourceUVLinesUsed - 1; + val_OV0_P23_BLNK_LN_AT_TOP_M1 = ((int)(tempBLANK_LINES_AT_TOP/VertUVSubSample)-1) & 0x7ff; + besr.p1_blank_lines_at_top = (val_OV0_P1_BLNK_LN_AT_TOP_M1 & 0xfff) | + ((val_OV0_P1_ACTIVE_LINES_M1 & 0xfff) << 16); + besr.p23_blank_lines_at_top = (val_OV0_P23_BLNK_LN_AT_TOP_M1 & 0x7ff) | + ((val_OV0_P23_ACTIVE_LINES_M1 & 0x7ff) << 16); +} + + +static void ComputeXStartEnd( + int is_400, + uint32_t LeftPixel,uint32_t LeftUVPixel, + uint32_t MemWordsInBytes,uint32_t BytesPerPixel, + uint32_t SourceWidthInPixels, uint32_t P1StepSize, + uint32_t BytesPerUVPixel,uint32_t SourceUVWidthInPixels, + uint32_t P23StepSize, uint32_t *p1_x_start, uint32_t *p2_x_start ) +{ + uint32_t val_OV0_P1_X_START,val_OV0_P2_X_START,val_OV0_P3_X_START; + uint32_t val_OV0_P1_X_END,val_OV0_P2_X_END,val_OV0_P3_X_END; + /* ToDo_Active: At the moment we are not using iOV0_VID_BUF?_START_PIX, but instead // are using iOV0_P?_X_START and iOV0_P?_X_END. We should use "start pix" and // "width" to derive the start and end. */ + + val_OV0_P1_X_START = (int)LeftPixel % (MemWordsInBytes/BytesPerPixel); + val_OV0_P1_X_END = (int)((val_OV0_P1_X_START + SourceWidthInPixels - 1) / P1StepSize) * P1StepSize; + + val_OV0_P2_X_START = val_OV0_P2_X_END = 0; + switch (besr.surf_id) + { + case 9: + case 10: + case 13: + case 14: /* ToDo_Active: The driver must insure that the initial value is */ + /* a multiple of a power of two when decimating */ + val_OV0_P2_X_START = (int)LeftUVPixel % + (MemWordsInBytes/BytesPerUVPixel); + val_OV0_P2_X_END = (int)((val_OV0_P2_X_START + + SourceUVWidthInPixels - 1) / P23StepSize) * P23StepSize; + break; + case 11: + case 12: val_OV0_P2_X_START = (int)LeftUVPixel % (MemWordsInBytes/(BytesPerPixel*2)); + val_OV0_P2_X_END = (int)((val_OV0_P2_X_START + SourceUVWidthInPixels - 1) / P23StepSize) * P23StepSize; + break; + case 3: + case 4: val_OV0_P2_X_START = val_OV0_P1_X_START; + /* This value is needed only to allow proper setting of */ + /* val_OV0_PRESHIFT_P23_TO */ + /* val_OV0_P2_X_END = 0; */ + break; + case 6: val_OV0_P2_X_START = (int)LeftPixel % (MemWordsInBytes/BytesPerPixel); + val_OV0_P2_X_END = (int)((val_OV0_P1_X_START + SourceWidthInPixels - 1) / P23StepSize) * P23StepSize; + break; + default: /* insert debug statement here. */ + RADEON_ASSERT("unknown fourcc\n"); + break; + } + val_OV0_P3_X_START = val_OV0_P2_X_START; + val_OV0_P3_X_END = val_OV0_P2_X_END; + + besr.p1_x_start_end = (val_OV0_P1_X_END&0x7ff) | ((val_OV0_P1_X_START&0x7ff)<<16); + besr.p2_x_start_end = (val_OV0_P2_X_END&0x7ff) | ((val_OV0_P2_X_START&0x7ff)<<16); + besr.p3_x_start_end = (val_OV0_P3_X_END&0x7ff) | ((val_OV0_P3_X_START&0x7ff)<<16); + if(is_400) + { + besr.p2_x_start_end = 0; + besr.p3_x_start_end = 0; + } + *p1_x_start = val_OV0_P1_X_START; + *p2_x_start = val_OV0_P2_X_START; +} + +static void ComputeAccumInit( + uint32_t val_OV0_P1_X_START,uint32_t val_OV0_P2_X_START, + uint32_t val_OV0_P1_H_INC,uint32_t val_OV0_P23_H_INC, + uint32_t val_OV0_P1_H_STEP_BY,uint32_t val_OV0_P23_H_STEP_BY, + uint32_t CRT_V_INC, + uint32_t P1GroupSize, uint32_t P23GroupSize, + uint32_t val_OV0_P1_MAX_LN_IN_PER_LN_OUT, + uint32_t val_OV0_P23_MAX_LN_IN_PER_LN_OUT) +{ + uint32_t val_OV0_P1_H_ACCUM_INIT,val_OV0_PRESHIFT_P1_TO; + uint32_t val_OV0_P23_H_ACCUM_INIT,val_OV0_PRESHIFT_P23_TO; + uint32_t val_OV0_P1_V_ACCUM_INIT,val_OV0_P23_V_ACCUM_INIT; + /* 2.5 puts the kernal 50% of the way between the source pixel that is off screen */ + /* and the first on-screen source pixel. "(float)valOV0_P?_H_INC / (1<<0xc)" is */ + /* the distance (in source pixel coordinates) to the center of the first */ + /* destination pixel. Need to add additional pixels depending on how many pixels */ + /* are fetched at a time and how many pixels in a set are masked. */ + /* P23 values are always fetched in groups of two or four. If the start */ + /* pixel does not fall on the boundary, then we need to shift preshift for */ + /* some additional pixels */ + + { + double ExtraHalfPixel; + double tempAdditionalShift; + double tempP1HStartPoint; + double tempP23HStartPoint; + double tempP1Init; + double tempP23Init; + + if (besr.horz_pick_nearest) ExtraHalfPixel = 0.5; + else ExtraHalfPixel = 0.0; + tempAdditionalShift = val_OV0_P1_X_START % P1GroupSize + ExtraHalfPixel; + tempP1HStartPoint = tempAdditionalShift + 2.5 + ((float)val_OV0_P1_H_INC / (1<<0xd)); + tempP1Init = (double)((int)(tempP1HStartPoint * (1<<0x5) + 0.5)) / (1<<0x5); + + /* P23 values are always fetched in pairs. If the start pixel is odd, then we */ + /* need to shift an additional pixel */ + /* Note that if the pitch is a multiple of two, and if we store fields using */ + /* the traditional planer format where the V plane and the U plane share the */ + /* same pitch, then OverlayRegFields->val_OV0_P2_X_START % P23Group */ + /* OverlayRegFields->val_OV0_P3_X_START % P23GroupSize. Either way */ + /* it is a requirement that the U and V start on the same polarity byte */ + /* (even or odd). */ + tempAdditionalShift = val_OV0_P2_X_START % P23GroupSize + ExtraHalfPixel; + tempP23HStartPoint = tempAdditionalShift + 2.5 + ((float)val_OV0_P23_H_INC / (1<<0xd)); + tempP23Init = (double)((int)(tempP23HStartPoint * (1<<0x5) + 0.5)) / (1 << 0x5); + val_OV0_P1_H_ACCUM_INIT = (int)((tempP1Init - (int)tempP1Init) * (1<<0x5)); + val_OV0_PRESHIFT_P1_TO = (int)tempP1Init; + val_OV0_P23_H_ACCUM_INIT = (int)((tempP23Init - (int)tempP23Init) * (1<<0x5)); + val_OV0_PRESHIFT_P23_TO = (int)tempP23Init; + } + + /* ************************************************************** */ + /* ** Calculate values for initializing the vertical accumulators */ + /* ************************************************************** */ + + { + double ExtraHalfLine; + double ExtraFullLine; + double tempP1VStartPoint; + double tempP23VStartPoint; + + if (besr.vert_pick_nearest) ExtraHalfLine = 0.5; + else ExtraHalfLine = 0.0; + + if (val_OV0_P1_H_STEP_BY==0)ExtraFullLine = 1.0; + else ExtraFullLine = 0.0; + + tempP1VStartPoint = 1.5 + ExtraFullLine + ExtraHalfLine + ((float)CRT_V_INC / (1<<0xd)); + if (tempP1VStartPoint>2.5 + 2*ExtraFullLine) + { + tempP1VStartPoint = 2.5 + 2*ExtraFullLine; + } + val_OV0_P1_V_ACCUM_INIT = (int)(tempP1VStartPoint * (1<<0x5) + 0.5); + + if (val_OV0_P23_H_STEP_BY==0)ExtraFullLine = 1.0; + else ExtraFullLine = 0.0; + + switch (besr.surf_id) + { + case 10: + case 13: + case 14: tempP23VStartPoint = 1.5 + ExtraFullLine + ExtraHalfLine + + ((float)CRT_V_INC / (1<<0xe)); + break; + case 9: tempP23VStartPoint = 1.5 + ExtraFullLine + ExtraHalfLine + + ((float)CRT_V_INC / (1<<0xf)); + break; + case 3: + case 4: + case 6: + case 11: + case 12: tempP23VStartPoint = 0; + break; + default: tempP23VStartPoint = 0xFFFF;/* insert debug statement here */ + break; + } + + if (tempP23VStartPoint>2.5 + 2*ExtraFullLine) + { + tempP23VStartPoint = 2.5 + 2*ExtraFullLine; + } + + val_OV0_P23_V_ACCUM_INIT = (int)(tempP23VStartPoint * (1<<0x5) + 0.5); + } + besr.p1_h_accum_init = ((val_OV0_P1_H_ACCUM_INIT&0x1f)<<15) |((val_OV0_PRESHIFT_P1_TO&0xf)<<28); + besr.p1_v_accum_init = (val_OV0_P1_MAX_LN_IN_PER_LN_OUT&0x3) |((val_OV0_P1_V_ACCUM_INIT&0x7ff)<<15); + besr.p23_h_accum_init= ((val_OV0_P23_H_ACCUM_INIT&0x1f)<<15) |((val_OV0_PRESHIFT_P23_TO&0xf)<<28); + besr.p23_v_accum_init= (val_OV0_P23_MAX_LN_IN_PER_LN_OUT&0x3)|((val_OV0_P23_V_ACCUM_INIT&0x3ff)<<15); +} + +typedef struct RangeAndCoefSet { + double Range; + signed char CoefSet[5][4]; +} RANGEANDCOEFSET; + +/* Filter Setup Routine */ +static void FilterSetup ( uint32_t val_OV0_P1_H_INC ) +{ + static RANGEANDCOEFSET ArrayOfSets[] = { + {0.25, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.26, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.27, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.28, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.29, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.30, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.31, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.32, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.33, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.34, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.35, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.36, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.37, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.38, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.39, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.40, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.41, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.42, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.43, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.44, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.45, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.46, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.47, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.48, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.49, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.50, {{ 7, 16, 9, 0}, { 7, 16, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 3, 13, 13, 3}, }}, + {0.51, {{ 7, 17, 8, 0}, { 6, 17, 9, 0}, { 5, 15, 11, 1}, { 4, 15, 12, 1}, { 2, 14, 14, 2}, }}, + {0.52, {{ 7, 17, 8, 0}, { 6, 17, 9, 0}, { 5, 16, 11, 0}, { 3, 15, 13, 1}, { 2, 14, 14, 2}, }}, + {0.53, {{ 7, 17, 8, 0}, { 6, 17, 9, 0}, { 5, 16, 11, 0}, { 3, 15, 13, 1}, { 2, 14, 14, 2}, }}, + {0.54, {{ 7, 17, 8, 0}, { 6, 17, 9, 0}, { 4, 17, 11, 0}, { 3, 15, 13, 1}, { 2, 14, 14, 2}, }}, + {0.55, {{ 7, 18, 7, 0}, { 6, 17, 9, 0}, { 4, 17, 11, 0}, { 3, 15, 13, 1}, { 1, 15, 15, 1}, }}, + {0.56, {{ 7, 18, 7, 0}, { 5, 18, 9, 0}, { 4, 17, 11, 0}, { 2, 17, 13, 0}, { 1, 15, 15, 1}, }}, + {0.57, {{ 7, 18, 7, 0}, { 5, 18, 9, 0}, { 4, 17, 11, 0}, { 2, 17, 13, 0}, { 1, 15, 15, 1}, }}, + {0.58, {{ 7, 18, 7, 0}, { 5, 18, 9, 0}, { 4, 17, 11, 0}, { 2, 17, 13, 0}, { 1, 15, 15, 1}, }}, + {0.59, {{ 7, 18, 7, 0}, { 5, 18, 9, 0}, { 4, 17, 11, 0}, { 2, 17, 13, 0}, { 1, 15, 15, 1}, }}, + {0.60, {{ 7, 18, 8, -1}, { 6, 17, 10, -1}, { 4, 17, 11, 0}, { 2, 17, 13, 0}, { 1, 15, 15, 1}, }}, + {0.61, {{ 7, 18, 8, -1}, { 6, 17, 10, -1}, { 4, 17, 11, 0}, { 2, 17, 13, 0}, { 1, 15, 15, 1}, }}, + {0.62, {{ 7, 18, 8, -1}, { 6, 17, 10, -1}, { 4, 17, 11, 0}, { 2, 17, 13, 0}, { 1, 15, 15, 1}, }}, + {0.63, {{ 7, 18, 8, -1}, { 6, 17, 10, -1}, { 4, 17, 11, 0}, { 2, 17, 13, 0}, { 1, 15, 15, 1}, }}, + {0.64, {{ 7, 18, 8, -1}, { 6, 17, 10, -1}, { 4, 17, 12, -1}, { 2, 17, 13, 0}, { 1, 15, 15, 1}, }}, + {0.65, {{ 7, 18, 8, -1}, { 6, 17, 10, -1}, { 4, 17, 12, -1}, { 2, 17, 13, 0}, { 0, 16, 16, 0}, }}, + {0.66, {{ 7, 18, 8, -1}, { 6, 18, 10, -2}, { 4, 17, 12, -1}, { 2, 17, 13, 0}, { 0, 16, 16, 0}, }}, + {0.67, {{ 7, 20, 7, -2}, { 5, 19, 10, -2}, { 3, 18, 12, -1}, { 2, 17, 13, 0}, { 0, 16, 16, 0}, }}, + {0.68, {{ 7, 20, 7, -2}, { 5, 19, 10, -2}, { 3, 19, 12, -2}, { 1, 18, 14, -1}, { 0, 16, 16, 0}, }}, + {0.69, {{ 7, 20, 7, -2}, { 5, 19, 10, -2}, { 3, 19, 12, -2}, { 1, 18, 14, -1}, { 0, 16, 16, 0}, }}, + {0.70, {{ 7, 20, 7, -2}, { 5, 20, 9, -2}, { 3, 19, 12, -2}, { 1, 18, 14, -1}, { 0, 16, 16, 0}, }}, + {0.71, {{ 7, 20, 7, -2}, { 5, 20, 9, -2}, { 3, 19, 12, -2}, { 1, 18, 14, -1}, { 0, 16, 16, 0}, }}, + {0.72, {{ 7, 20, 7, -2}, { 5, 20, 9, -2}, { 2, 20, 12, -2}, { 0, 19, 15, -2}, {-1, 17, 17, -1}, }}, + {0.73, {{ 7, 20, 7, -2}, { 4, 21, 9, -2}, { 2, 20, 12, -2}, { 0, 19, 15, -2}, {-1, 17, 17, -1}, }}, + {0.74, {{ 6, 22, 6, -2}, { 4, 21, 9, -2}, { 2, 20, 12, -2}, { 0, 19, 15, -2}, {-1, 17, 17, -1}, }}, + {0.75, {{ 6, 22, 6, -2}, { 4, 21, 9, -2}, { 1, 21, 12, -2}, { 0, 19, 15, -2}, {-1, 17, 17, -1}, }}, + {0.76, {{ 6, 22, 6, -2}, { 4, 21, 9, -2}, { 1, 21, 12, -2}, { 0, 19, 15, -2}, {-1, 17, 17, -1}, }}, + {0.77, {{ 6, 22, 6, -2}, { 3, 22, 9, -2}, { 1, 22, 12, -3}, { 0, 19, 15, -2}, {-2, 18, 18, -2}, }}, + {0.78, {{ 6, 21, 6, -1}, { 3, 22, 9, -2}, { 1, 22, 12, -3}, { 0, 19, 15, -2}, {-2, 18, 18, -2}, }}, + {0.79, {{ 5, 23, 5, -1}, { 3, 22, 9, -2}, { 0, 23, 12, -3}, {-1, 21, 15, -3}, {-2, 18, 18, -2}, }}, + {0.80, {{ 5, 23, 5, -1}, { 3, 23, 8, -2}, { 0, 23, 12, -3}, {-1, 21, 15, -3}, {-2, 18, 18, -2}, }}, + {0.81, {{ 5, 23, 5, -1}, { 2, 24, 8, -2}, { 0, 23, 12, -3}, {-1, 21, 15, -3}, {-2, 18, 18, -2}, }}, + {0.82, {{ 5, 23, 5, -1}, { 2, 24, 8, -2}, { 0, 23, 12, -3}, {-1, 21, 15, -3}, {-3, 19, 19, -3}, }}, + {0.83, {{ 5, 23, 5, -1}, { 2, 24, 8, -2}, { 0, 23, 11, -2}, {-2, 22, 15, -3}, {-3, 19, 19, -3}, }}, + {0.84, {{ 4, 25, 4, -1}, { 1, 25, 8, -2}, { 0, 23, 11, -2}, {-2, 22, 15, -3}, {-3, 19, 19, -3}, }}, + {0.85, {{ 4, 25, 4, -1}, { 1, 25, 8, -2}, { 0, 23, 11, -2}, {-2, 22, 15, -3}, {-3, 19, 19, -3}, }}, + {0.86, {{ 4, 24, 4, 0}, { 1, 25, 7, -1}, {-1, 24, 11, -2}, {-2, 22, 15, -3}, {-3, 19, 19, -3}, }}, + {0.87, {{ 4, 24, 4, 0}, { 1, 25, 7, -1}, {-1, 24, 11, -2}, {-2, 22, 15, -3}, {-3, 19, 19, -3}, }}, + {0.88, {{ 3, 26, 3, 0}, { 0, 26, 7, -1}, {-1, 24, 11, -2}, {-3, 23, 15, -3}, {-3, 19, 19, -3}, }}, + {0.89, {{ 3, 26, 3, 0}, { 0, 26, 7, -1}, {-1, 24, 11, -2}, {-3, 23, 15, -3}, {-3, 19, 19, -3}, }}, + {0.90, {{ 3, 26, 3, 0}, { 0, 26, 7, -1}, {-2, 25, 11, -2}, {-3, 23, 15, -3}, {-3, 19, 19, -3}, }}, + {0.91, {{ 3, 26, 3, 0}, { 0, 27, 6, -1}, {-2, 25, 11, -2}, {-3, 23, 15, -3}, {-3, 19, 19, -3}, }}, + {0.92, {{ 2, 28, 2, 0}, { 0, 27, 6, -1}, {-2, 25, 11, -2}, {-3, 23, 15, -3}, {-3, 19, 19, -3}, }}, + {0.93, {{ 2, 28, 2, 0}, { 0, 26, 6, 0}, {-2, 25, 10, -1}, {-3, 23, 15, -3}, {-3, 19, 19, -3}, }}, + {0.94, {{ 2, 28, 2, 0}, { 0, 26, 6, 0}, {-2, 25, 10, -1}, {-3, 23, 15, -3}, {-3, 19, 19, -3}, }}, + {0.95, {{ 1, 30, 1, 0}, {-1, 28, 5, 0}, {-3, 26, 10, -1}, {-3, 23, 14, -2}, {-3, 19, 19, -3}, }}, + {0.96, {{ 1, 30, 1, 0}, {-1, 28, 5, 0}, {-3, 26, 10, -1}, {-3, 23, 14, -2}, {-3, 19, 19, -3}, }}, + {0.97, {{ 1, 30, 1, 0}, {-1, 28, 5, 0}, {-3, 26, 10, -1}, {-3, 23, 14, -2}, {-3, 19, 19, -3}, }}, + {0.98, {{ 1, 30, 1, 0}, {-2, 29, 5, 0}, {-3, 27, 9, -1}, {-3, 23, 14, -2}, {-3, 19, 19, -3}, }}, + {0.99, {{ 0, 32, 0, 0}, {-2, 29, 5, 0}, {-3, 27, 9, -1}, {-4, 24, 14, -2}, {-3, 19, 19, -3}, }}, + {1.00, {{ 0, 32, 0, 0}, {-2, 29, 5, 0}, {-3, 27, 9, -1}, {-4, 24, 14, -2}, {-3, 19, 19, -3}, }} + }; + + double DSR; + + unsigned ArrayElement; + + DSR = (double)(1<<0xc)/val_OV0_P1_H_INC; + if (DSR<.25) DSR=.25; + if (DSR>1) DSR=1; + + ArrayElement = (int)((DSR-0.25) * 100); + besr.four_tap_coeff[0] = (ArrayOfSets[ArrayElement].CoefSet[0][0] & 0xf) | + ((ArrayOfSets[ArrayElement].CoefSet[0][1] & 0x7f)<<8) | + ((ArrayOfSets[ArrayElement].CoefSet[0][2] & 0x7f)<<16) | + ((ArrayOfSets[ArrayElement].CoefSet[0][3] & 0xf)<<24); + besr.four_tap_coeff[1] = (ArrayOfSets[ArrayElement].CoefSet[1][0] & 0xf) | + ((ArrayOfSets[ArrayElement].CoefSet[1][1] & 0x7f)<<8) | + ((ArrayOfSets[ArrayElement].CoefSet[1][2] & 0x7f)<<16) | + ((ArrayOfSets[ArrayElement].CoefSet[1][3] & 0xf)<<24); + besr.four_tap_coeff[2] = (ArrayOfSets[ArrayElement].CoefSet[2][0] & 0xf) | + ((ArrayOfSets[ArrayElement].CoefSet[2][1] & 0x7f)<<8) | + ((ArrayOfSets[ArrayElement].CoefSet[2][2] & 0x7f)<<16) | + ((ArrayOfSets[ArrayElement].CoefSet[2][3] & 0xf)<<24); + besr.four_tap_coeff[3] = (ArrayOfSets[ArrayElement].CoefSet[3][0] & 0xf) | + ((ArrayOfSets[ArrayElement].CoefSet[3][1] & 0x7f)<<8) | + ((ArrayOfSets[ArrayElement].CoefSet[3][2] & 0x7f)<<16) | + ((ArrayOfSets[ArrayElement].CoefSet[3][3] & 0xf)<<24); + besr.four_tap_coeff[4] = (ArrayOfSets[ArrayElement].CoefSet[4][0] & 0xf) | + ((ArrayOfSets[ArrayElement].CoefSet[4][1] & 0x7f)<<8) | + ((ArrayOfSets[ArrayElement].CoefSet[4][2] & 0x7f)<<16) | + ((ArrayOfSets[ArrayElement].CoefSet[4][3] & 0xf)<<24); +/* + For more details, refer to Microsoft's draft of PC99. +*/ +} + +/* The minimal value of horizontal scale ratio when hard coded coefficients + are suitable for the best quality. */ +/* FIXME: Should it be 0.9 for Rage128 ??? */ +const double MinHScaleHard=0.75; + static int radeon_vid_init_video( vidix_playback_t *config ) { - uint32_t i,tmp,src_w,src_h,dest_w,dest_h,pitch,h_inc,step_by,left,leftUV,top; - int is_400,is_410,is_420,is_rgb32,is_rgb,best_pitch,mpitch; + double V_scale_ratio; + uint32_t i,src_w,src_h,dest_w,dest_h,pitch,left,leftUV,top,h_inc; + uint32_t val_OV0_P1_H_INC,val_OV0_P1_H_STEP_BY,val_OV0_P23_H_INC,val_OV0_P23_H_STEP_BY; + uint32_t val_OV0_P1_X_START,val_OV0_P2_X_START; + uint32_t val_OV0_P1_MAX_LN_IN_PER_LN_OUT,val_OV0_P23_MAX_LN_IN_PER_LN_OUT; + uint32_t CRT_V_INC; + uint32_t BytesPerOctWord,LogMemWordsInBytes,MemWordsInBytes,LogTileWidthInMemWords; + uint32_t TileWidthInMemWords,TileWidthInBytes,LogTileHeight,TileHeight; + uint32_t PageSizeInBytes,OV0LB_Rows; + uint32_t SourceWidthInMemWords,SourceUVWidthInMemWords; + uint32_t SourceWidthInPixels,SourceUVWidthInPixels; + uint32_t RightPixel,RightUVPixel,LeftPixel,LeftUVPixel; + int is_400,is_410,is_420,best_pitch,mpitch; + int horz_repl_factor,interlace_factor; + int BytesPerPixel,BytesPerUVPixel,HorzUVSubSample,VertUVSubSample; + int DisallowFourTapVertFiltering,DisallowFourTapUVVertFiltering; + radeon_vid_stop_video(); left = config->src.x << 16; top = config->src.y << 16; src_h = config->src.h; src_w = config->src.w; - is_400 = is_410 = is_420 = is_rgb32 = is_rgb = 0; + is_400 = is_410 = is_420 = 0; if(config->fourcc == IMGFMT_YV12 || config->fourcc == IMGFMT_I420 || config->fourcc == IMGFMT_IYUV) is_420 = 1; if(config->fourcc == IMGFMT_YVU9 || config->fourcc == IMGFMT_IF09) is_410 = 1; if(config->fourcc == IMGFMT_Y800) is_400 = 1; - if(config->fourcc == IMGFMT_RGB32 || - config->fourcc == IMGFMT_BGR32) is_rgb32 = 1; - if(config->fourcc == IMGFMT_RGB32 || - config->fourcc == IMGFMT_BGR32 || - config->fourcc == IMGFMT_RGB24 || - config->fourcc == IMGFMT_BGR24 || - config->fourcc == IMGFMT_RGB16 || - config->fourcc == IMGFMT_BGR16 || - config->fourcc == IMGFMT_RGB15 || - config->fourcc == IMGFMT_BGR15) is_rgb = 1; best_pitch = radeon_query_pitch(config->fourcc,&config->src.pitch); mpitch = best_pitch-1; + BytesPerOctWord = 16; + LogMemWordsInBytes = 4; + MemWordsInBytes = 1<<LogMemWordsInBytes; + LogTileWidthInMemWords = 2; + TileWidthInMemWords = 1<<LogTileWidthInMemWords; + TileWidthInBytes = 1<<(LogTileWidthInMemWords+LogMemWordsInBytes); + LogTileHeight = 4; + TileHeight = 1<<LogTileHeight; + PageSizeInBytes = 64*MemWordsInBytes; + OV0LB_Rows = 96; + h_inc = 1; switch(config->fourcc) { /* 4:0:0*/ @@ -1409,25 +2484,320 @@ static int radeon_vid_init_video( vidix_playback_t *config ) config->dest.pitch.v = best_pitch; break; /* 4:2:2 */ - default: /* RGB15, RGB16, YVYU, UYVY, YUY2 */ + + default: /* RGB15, RGB16, YVYU, UYVY, YUY2 */ pitch = ((src_w*2) + mpitch) & ~mpitch; config->dest.pitch.y = config->dest.pitch.u = config->dest.pitch.v = best_pitch; break; } + besr.load_prg_start=0; + besr.swap_uv=0; + switch(config->fourcc) + { + case IMGFMT_RGB15: + besr.swap_uv=1; + case IMGFMT_BGR15: besr.surf_id = SCALER_SOURCE_15BPP>>8; + besr.load_prg_start = 1; + break; + case IMGFMT_RGB16: + besr.swap_uv=1; + case IMGFMT_BGR16: besr.surf_id = SCALER_SOURCE_16BPP>>8; + besr.load_prg_start = 1; + break; + case IMGFMT_RGB32: + besr.swap_uv=1; + case IMGFMT_BGR32: besr.surf_id = SCALER_SOURCE_32BPP>>8; + besr.load_prg_start = 1; + break; + /* 4:1:0*/ + case IMGFMT_IF09: + case IMGFMT_YVU9: besr.surf_id = SCALER_SOURCE_YUV9>>8; + break; + /* 4:0:0*/ + case IMGFMT_Y800: + /* 4:2:0 */ + case IMGFMT_IYUV: + case IMGFMT_I420: + case IMGFMT_YV12: besr.surf_id = SCALER_SOURCE_YUV12>>8; + break; + /* 4:2:2 */ + case IMGFMT_YVYU: + case IMGFMT_UYVY: besr.surf_id = SCALER_SOURCE_YVYU422>>8; + break; + case IMGFMT_YUY2: + default: besr.surf_id = SCALER_SOURCE_VYUY422>>8; + break; + } + switch (besr.surf_id) + { + case 3: + case 4: + case 11: + case 12: BytesPerPixel = 2; + break; + case 6: BytesPerPixel = 4; + break; + case 9: + case 10: + case 13: + case 14: BytesPerPixel = 1; + break; + default: BytesPerPixel = 0;/*insert a debug statement here. */ + break; + } + switch (besr.surf_id) + { + case 3: + case 4: BytesPerUVPixel = 0; + break;/* In RGB modes, the BytesPerUVPixel is don't care */ + case 11: + case 12: BytesPerUVPixel = 2; + break; + case 6: BytesPerUVPixel = 0; + break; /* In RGB modes, the BytesPerUVPixel is don't care */ + case 9: + case 10: BytesPerUVPixel = 1; + break; + case 13: + case 14: BytesPerUVPixel = 2; + break; + default: BytesPerUVPixel = 0;/* insert a debug statement here. */ + break; + + } + switch (besr.surf_id) + { + case 3: + case 4: + case 6: HorzUVSubSample = 1; + break; + case 9: HorzUVSubSample = 4; + break; + case 10: + case 11: + case 12: + case 13: + case 14: HorzUVSubSample = 2; + break; + default: HorzUVSubSample = 0;/* insert debug statement here. */ + break; + } + switch (besr.surf_id) + { + case 3: + case 4: + case 6: + case 11: + case 12: VertUVSubSample = 1; + break; + case 9: VertUVSubSample = 4; + break; + case 10: + case 13: + case 14: VertUVSubSample = 2; + break; + default: VertUVSubSample = 0;/* insert debug statment here. */ + break; + } + DisallowFourTapVertFiltering = 0; /* Allow it by default */ + DisallowFourTapUVVertFiltering = 0; /* Allow it by default */ + LeftPixel = config->src.x; + RightPixel = config->src.w-1; + if(floor(config->src.x/HorzUVSubSample)<0) LeftUVPixel = 0; + else LeftUVPixel = (int)floor(config->src.x/HorzUVSubSample); + if(ceil((config->src.x+config->src.w)/HorzUVSubSample) > config->src.w/HorzUVSubSample) + RightUVPixel = config->src.w/HorzUVSubSample - 1; + else RightUVPixel = (int)ceil((config->src.x+config->src.w)/HorzUVSubSample) - 1; + /* Top, Bottom and Right Crops can be out of range. The driver will program the hardware + // to create a black border at the top and bottom. This is useful for DVD letterboxing. */ + SourceWidthInPixels = (int)(config->src.w + 1); + SourceUVWidthInPixels = (int)(RightUVPixel - LeftUVPixel + 1); + + SourceWidthInMemWords = (int)(ceil(RightPixel*BytesPerPixel / MemWordsInBytes) - + floor(LeftPixel*BytesPerPixel / MemWordsInBytes) + 1); + /* SourceUVWidthInMemWords means Source_U_or_V_or_UV_WidthInMemWords depending on whether the UV is packed together of not. */ + SourceUVWidthInMemWords = (int)(ceil(RightUVPixel*BytesPerUVPixel / + MemWordsInBytes) - floor(LeftUVPixel*BytesPerUVPixel / + MemWordsInBytes) + 1); + + switch (besr.surf_id) + { + case 9: + case 10: if ((ceil(SourceWidthInMemWords/2)-1) * 2 > OV0LB_Rows-1) + { + RADEON_ASSERT("ceil(SourceWidthInMemWords/2)-1) * 2 > OV0LB_Rows-1\n"); + } + else if ((SourceWidthInMemWords-1) * 2 > OV0LB_Rows-1) + { + DisallowFourTapVertFiltering = 1; + } + + if ((ceil(SourceUVWidthInMemWords/2)-1) * 4 + 1 > OV0LB_Rows-1) + { + /*CYCACC_ASSERT(0, "Image U plane width spans more octwords than supported by hardware.") */ + } + else if ((SourceUVWidthInMemWords-1) * 4 + 1 > OV0LB_Rows-1) + { + DisallowFourTapUVVertFiltering = 1; + } + + if ((ceil(SourceUVWidthInMemWords/2)-1) * 4 + 3 > OV0LB_Rows-1) + { + /*CYCACC_ASSERT(0, "Image V plane width spans more octwords than supported by hardware.") */ + } + else if ((SourceUVWidthInMemWords-1) * 4 + 3 > OV0LB_Rows-1) + { + DisallowFourTapUVVertFiltering = 1; + } + break; + case 13: + case 14: if ((ceil(SourceWidthInMemWords/2)-1) * 2 > OV0LB_Rows-1) + { + RADEON_ASSERT("ceil(SourceWidthInMemWords/2)-1) * 2 > OV0LB_Rows-1\n"); + } + else if ((SourceWidthInMemWords-1) * 2 > OV0LB_Rows-1) + { + DisallowFourTapVertFiltering = 1; + } + + if ((ceil(SourceUVWidthInMemWords/2)-1) * 2 + 1 > OV0LB_Rows-1) + { + /*CYCACC_ASSERT(0, "Image UV plane width spans more octwords than supported by hardware.") */ + } + else if ((SourceUVWidthInMemWords-1) * 2 + 1 > OV0LB_Rows-1) + { + DisallowFourTapUVVertFiltering = 1; + } + break; + case 3: + case 4: + case 6: + case 11: + case 12: if ((ceil(SourceWidthInMemWords/2)-1) > OV0LB_Rows-1) + { + RADEON_ASSERT("(ceil(SourceWidthInMemWords/2)-1) > OV0LB_Rows-1\n") + } + else if ((SourceWidthInMemWords-1) > OV0LB_Rows-1) + { + DisallowFourTapVertFiltering = 1; + } + break; + default: /* insert debug statement here. */ + break; + } dest_w = config->dest.w; dest_h = config->dest.h; if(radeon_is_dbl_scan()) dest_h *= 2; besr.dest_bpp = radeon_vid_get_dbpp(); besr.fourcc = config->fourcc; - besr.v_inc = (src_h << 20) / dest_h; - if(radeon_is_interlace()) besr.v_inc *= 2; - h_inc = (src_w << 12) / dest_w; - step_by = 1; - while(h_inc >= (2 << 12)) { - step_by++; - h_inc >>= 1; + if(radeon_is_interlace()) interlace_factor = 2; + else interlace_factor = 1; + /* TODO: must be checked in doublescan mode!!! */ + horz_repl_factor = 1 << (uint32_t)((INPLL(VCLK_ECP_CNTL) & 0x300) >> 8); + H_scale_ratio = (double)ceil(((double)dest_w+1)/horz_repl_factor)/src_w; + V_scale_ratio = (double)(dest_h+1)/src_h; + if(H_scale_ratio < 0.5 && V_scale_ratio < 0.5) + { + val_OV0_P1_MAX_LN_IN_PER_LN_OUT = 3; + val_OV0_P23_MAX_LN_IN_PER_LN_OUT = 2; + } + else + if(H_scale_ratio < 1 && V_scale_ratio < 1) + { + val_OV0_P1_MAX_LN_IN_PER_LN_OUT = 2; + val_OV0_P23_MAX_LN_IN_PER_LN_OUT = 1; + } + else + { + val_OV0_P1_MAX_LN_IN_PER_LN_OUT = 1; + val_OV0_P23_MAX_LN_IN_PER_LN_OUT = 1; + } + /* N.B.: Indeed it has 6.12 format but shifted on 8 to the left!!! */ + besr.v_inc = (uint16_t)((1./V_scale_ratio)*(1<<12)*interlace_factor+0.5); + CRT_V_INC = besr.v_inc/interlace_factor; + besr.v_inc <<= 8; + { + int ThereIsTwoTapVerticalFiltering,DoNotUseMostRecentlyFetchedLine; + int P1GroupSize; + int P23GroupSize; + int P1StepSize; + int P23StepSize; + + Calc_H_INC_STEP_BY( + besr.surf_id, + H_scale_ratio, + DisallowFourTapVertFiltering, + DisallowFourTapUVVertFiltering, + &val_OV0_P1_H_INC, + &val_OV0_P1_H_STEP_BY, + &val_OV0_P23_H_INC, + &val_OV0_P23_H_STEP_BY, + &P1GroupSize, + &P1StepSize, + &P23StepSize); + + if(H_scale_ratio > MinHScaleHard) + { + h_inc = (src_w << 12) / dest_w; + besr.step_by = 0x0101; + switch (besr.surf_id) + { + case 3: + case 4: + case 6: + besr.h_inc = (h_inc)|(h_inc<<16); + break; + case 9: + besr.h_inc = h_inc | ((h_inc >> 2) << 16); + break; + default: + besr.h_inc = h_inc | ((h_inc >> 1) << 16); + break; + } + } + + P23GroupSize = 2; /* Current vaue for all modes */ + + besr.horz_pick_nearest=0; + DoNotUseMostRecentlyFetchedLine=0; + ThereIsTwoTapVerticalFiltering = (val_OV0_P1_H_STEP_BY!=0) || (val_OV0_P23_H_STEP_BY!=0); + if (ThereIsTwoTapVerticalFiltering && DoNotUseMostRecentlyFetchedLine) + besr.vert_pick_nearest = 1; + else + besr.vert_pick_nearest = 0; + + ComputeXStartEnd(is_400,LeftPixel,LeftUVPixel,MemWordsInBytes,BytesPerPixel, + SourceWidthInPixels,P1StepSize,BytesPerUVPixel, + SourceUVWidthInPixels,P23StepSize,&val_OV0_P1_X_START,&val_OV0_P2_X_START); + + if(H_scale_ratio > MinHScaleHard) + { + unsigned tmp; + tmp = (left & 0x0003ffff) + 0x00028000 + (h_inc << 3); + besr.p1_h_accum_init = ((tmp << 4) & 0x000f8000) | + ((tmp << 12) & 0xf0000000); + + tmp = (top & 0x0000ffff) + 0x00018000; + besr.p1_v_accum_init = ((tmp << 4) & OV0_P1_V_ACCUM_INIT_MASK) + |(OV0_P1_MAX_LN_IN_PER_LN_OUT & 1); + tmp = ((left >> 1) & 0x0001ffff) + 0x00028000 + (h_inc << 2); + besr.p23_h_accum_init = ((tmp << 4) & 0x000f8000) | + ((tmp << 12) & 0x70000000); + + tmp = ((top >> 1) & 0x0000ffff) + 0x00018000; + besr.p23_v_accum_init = (is_420||is_410) ? + ((tmp << 4) & OV0_P23_V_ACCUM_INIT_MASK) + |(OV0_P23_MAX_LN_IN_PER_LN_OUT & 1) : 0; + } + else + ComputeAccumInit( val_OV0_P1_X_START,val_OV0_P2_X_START, + val_OV0_P1_H_INC,val_OV0_P23_H_INC, + val_OV0_P1_H_STEP_BY,val_OV0_P23_H_STEP_BY, + CRT_V_INC,P1GroupSize,P23GroupSize, + val_OV0_P1_MAX_LN_IN_PER_LN_OUT, + val_OV0_P23_MAX_LN_IN_PER_LN_OUT); } /* keep everything in 16.16 */ @@ -1437,7 +2807,7 @@ static int radeon_vid_init_video( vidix_playback_t *config ) config->offsets[i] = config->offsets[i-1]+config->frame_size; if(is_420 || is_410 || is_400) { - uint32_t d1line,d2line,d3line; + uint32_t d1line,d2line,d3line; d1line = top*pitch; if(is_420) { @@ -1520,54 +2890,30 @@ static int radeon_vid_init_video( vidix_playback_t *config ) besr.vid_buf_base_adrs_v[i] = radeon_overlay_off + config->offsets[i] + config->offset.y; } } - - tmp = (left & 0x0003ffff) + 0x00028000 + (h_inc << 3); - besr.p1_h_accum_init = ((tmp << 4) & 0x000f8000) | - ((tmp << 12) & 0xf0000000); - - tmp = (top & 0x0000ffff) + 0x00018000; - besr.p1_v_accum_init = ((tmp << 4) & OV0_P1_V_ACCUM_INIT_MASK) - |(OV0_P1_MAX_LN_IN_PER_LN_OUT & 1); - tmp = ((left >> 1) & 0x0001ffff) + 0x00028000 + (h_inc << 2); - besr.p23_h_accum_init = ((tmp << 4) & 0x000f8000) | - ((tmp << 12) & 0x70000000); - - tmp = ((top >> 1) & 0x0000ffff) + 0x00018000; - besr.p23_v_accum_init = (is_420||is_410) ? - ((tmp << 4) & OV0_P23_V_ACCUM_INIT_MASK) - |(OV0_P23_MAX_LN_IN_PER_LN_OUT & 1) : 0; leftUV = (left >> (is_410?18:17)) & 15; left = (left >> 16) & 15; - if(is_rgb) - besr.h_inc = (h_inc)|(h_inc<<16); - else - if(is_410) - besr.h_inc = h_inc | ((h_inc >> 2) << 16); - else - besr.h_inc = h_inc | ((h_inc >> 1) << 16); - besr.step_by = step_by | (step_by << 8); besr.y_x_start = (config->dest.x+X_ADJUST) | (config->dest.y << 16); besr.y_x_end = (config->dest.x + dest_w+X_ADJUST) | ((config->dest.y + dest_h) << 16); - besr.p1_blank_lines_at_top = P1_BLNK_LN_AT_TOP_M1_MASK|((src_h-1)<<16); - if(is_420 || is_410) - { - src_h = (src_h + 1) >> (is_410?2:1); - besr.p23_blank_lines_at_top = P23_BLNK_LN_AT_TOP_M1_MASK|((src_h-1)<<16); - } - else besr.p23_blank_lines_at_top = 0; + ComputeBorders(config,VertUVSubSample); besr.vid_buf_pitch0_value = pitch; besr.vid_buf_pitch1_value = is_410 ? pitch>>2 : is_420 ? pitch>>1 : pitch; - besr.p1_x_start_end = (src_w+left-1)|(left<<16); - if(is_400) - { - besr.p2_x_start_end = 0; - besr.p3_x_start_end = 0; - } + /* ********************************************************* */ + /* ** Calculate programmable coefficients as needed */ + /* ********************************************************* */ + + /* ToDo_Active: When in pick nearest mode, we need to program the filter tap zero */ + /* coefficients to 0, 32, 0, 0. Or use hard coded coefficients. */ + if(H_scale_ratio > MinHScaleHard) besr.filter_cntl |= FILTER_HARDCODED_COEF; else { - if(is_410||is_420) src_w>>=is_410?2:1; - besr.p2_x_start_end = (src_w+left-1)|(leftUV<<16); - besr.p3_x_start_end = besr.p2_x_start_end; + FilterSetup (val_OV0_P1_H_INC); + /* ToDo_Active: Must add the smarts into the driver to decide what type of filtering it */ + /* would like to do. For now, we let the test application decide. */ + besr.filter_cntl = FILTER_PROGRAMMABLE_COEF; + if(DisallowFourTapVertFiltering) + besr.filter_cntl |= FILTER_HARD_SCALE_VERT_Y; + if(DisallowFourTapUVVertFiltering) + besr.filter_cntl |= FILTER_HARD_SCALE_VERT_UV; } return 0; } @@ -1608,14 +2954,14 @@ static void radeon_compute_framesize(vidix_playback_t *info) info->frame_size = (info->frame_size+4095)&~4095; } -int vixConfigPlayback(vidix_playback_t *info) +int VIDIX_NAME(vixConfigPlayback)(vidix_playback_t *info) { unsigned rgb_size,nfr; uint32_t radeon_video_size; - if(!is_supported_fourcc(info->fourcc)) return ENOSYS; + if(!is_supported_fourcc(info->fourcc,info->src.w)) return ENOSYS; if(info->num_frames>VID_PLAY_MAXFRAMES) info->num_frames=VID_PLAY_MAXFRAMES; if(info->num_frames==1) besr.double_buff=0; - else besr.double_buff=1; + else besr.double_buff=1; radeon_compute_framesize(info); rgb_size = radeon_get_xres()*radeon_get_yres()*((radeon_vid_get_dbpp()+7)/8); @@ -1628,7 +2974,7 @@ int vixConfigPlayback(vidix_playback_t *info) Note: probably it's ont good idea to locate them in video memory but as initial release it's OK */ radeon_video_size -= radeon_ram_size * sizeof(bm_list_descriptor) / 4096; - radeon_dma_desc_base = pci_info.base0 + radeon_video_size; + radeon_dma_desc_base = (void *) pci_info.base0 + radeon_video_size; } #endif for(;nfr>0; nfr--) @@ -1655,7 +3001,7 @@ int vixConfigPlayback(vidix_playback_t *info) return 0; } -int vixPlaybackOn( void ) +int VIDIX_NAME(vixPlaybackOn)( void ) { #ifdef RAGE128 unsigned dw,dh; @@ -1670,13 +3016,13 @@ int vixPlaybackOn( void ) return 0; } -int vixPlaybackOff( void ) +int VIDIX_NAME(vixPlaybackOff)( void ) { radeon_vid_stop_video(); return 0; } -int vixPlaybackFrameSelect(unsigned frame) +int VIDIX_NAME(vixPlaybackFrameSelect)(unsigned frame) { uint32_t off[6]; int prev_frame= (frame-1+besr.vid_nbufs) % besr.vid_nbufs; @@ -1718,7 +3064,7 @@ vidix_video_eq_t equal = , 0, 0, 0, 0, 0, 0, 0, 0 }; -int vixPlaybackGetEq( vidix_video_eq_t * eq) +int VIDIX_NAME(vixPlaybackGetEq)( vidix_video_eq_t * eq) { memcpy(eq,&equal,sizeof(vidix_video_eq_t)); return 0; @@ -1727,13 +3073,13 @@ int vixPlaybackGetEq( vidix_video_eq_t * eq) #ifndef RAGE128 #define RTFSaturation(a) (1.0 + ((a)*1.0)/1000.0) #define RTFBrightness(a) (((a)*1.0)/2000.0) -#define RTFIntensity(a) (((a)*1.0)/2000.0) -#define RTFContrast(a) (1.0 + ((a)*1.0)/1000.0) +#define RTFIntensity(a) (((a)*1.0)/2000.0) +#define RTFContrast(a) (1.0 + ((a)*1.0)/1000.0) #define RTFHue(a) (((a)*3.1416)/1000.0) #define RTFCheckParam(a) {if((a)<-1000) (a)=-1000; if((a)>1000) (a)=1000;} #endif -int vixPlaybackSetEq( const vidix_video_eq_t * eq) +int VIDIX_NAME(vixPlaybackSetEq)( const vidix_video_eq_t * eq) { #ifdef RAGE128 int br,sat; @@ -1743,7 +3089,7 @@ int vixPlaybackSetEq( const vidix_video_eq_t * eq) if(eq->cap & VEQ_CAP_BRIGHTNESS) equal.brightness = eq->brightness; if(eq->cap & VEQ_CAP_CONTRAST) equal.contrast = eq->contrast; if(eq->cap & VEQ_CAP_SATURATION) equal.saturation = eq->saturation; - if(eq->cap & VEQ_CAP_HUE) equal.hue = eq->hue; + if(eq->cap & VEQ_CAP_HUE) equal.hue = eq->hue; if(eq->cap & VEQ_CAP_RGB_INTENSITY) { equal.red_intensity = eq->red_intensity; @@ -1778,7 +3124,7 @@ int vixPlaybackSetEq( const vidix_video_eq_t * eq) return 0; } -int vixPlaybackSetDeint( const vidix_deinterlace_t * info) +int VIDIX_NAME(vixPlaybackSetDeint)( const vidix_deinterlace_t * info) { unsigned sflg; switch(info->flags) @@ -1816,7 +3162,7 @@ int vixPlaybackSetDeint( const vidix_deinterlace_t * info) return 0; } -int vixPlaybackGetDeint( vidix_deinterlace_t * info) +int VIDIX_NAME(vixPlaybackGetDeint)( vidix_deinterlace_t * info) { if(!besr.deinterlace_on) info->flags = CFG_NON_INTERLACED; else @@ -1841,12 +3187,29 @@ static void set_gr_key( void ) switch(dbpp) { case 15: +#ifndef RAGE128 + if(RadeonFamily > 100) + besr.graphics_key_clr= + ((radeon_grkey.ckey.blue &0xF8)) + | ((radeon_grkey.ckey.green&0xF8)<<8) + | ((radeon_grkey.ckey.red &0xF8)<<16); + else +#endif besr.graphics_key_clr= ((radeon_grkey.ckey.blue &0xF8)>>3) | ((radeon_grkey.ckey.green&0xF8)<<2) | ((radeon_grkey.ckey.red &0xF8)<<7); break; case 16: +#ifndef RAGE128 + /* This test may be too general/specific */ + if(RadeonFamily > 100) + besr.graphics_key_clr= + ((radeon_grkey.ckey.blue &0xF8)) + | ((radeon_grkey.ckey.green&0xFC)<<8) + | ((radeon_grkey.ckey.red &0xF8)<<16); + else +#endif besr.graphics_key_clr= ((radeon_grkey.ckey.blue &0xF8)>>3) | ((radeon_grkey.ckey.green&0xFC)<<3) @@ -1874,7 +3237,7 @@ static void set_gr_key( void ) besr.ckey_cntl = VIDEO_KEY_FN_TRUE|GRAPHIC_KEY_FN_NE|CMP_MIX_AND; #else besr.graphics_key_msk=besr.graphics_key_clr; - besr.ckey_cntl = VIDEO_KEY_FN_TRUE|GRAPHIC_KEY_FN_EQ|CMP_MIX_AND; + besr.ckey_cntl = VIDEO_KEY_FN_TRUE|CMP_MIX_AND|GRAPHIC_KEY_FN_EQ; #endif } else @@ -1890,13 +3253,13 @@ static void set_gr_key( void ) OUTREG(OV0_KEY_CNTL,besr.ckey_cntl); } -int vixGetGrKeys(vidix_grkey_t *grkey) +int VIDIX_NAME(vixGetGrKeys)(vidix_grkey_t *grkey) { memcpy(grkey, &radeon_grkey, sizeof(vidix_grkey_t)); return(0); } -int vixSetGrKeys(const vidix_grkey_t *grkey) +int VIDIX_NAME(vixSetGrKeys)(const vidix_grkey_t *grkey) { memcpy(&radeon_grkey, grkey, sizeof(vidix_grkey_t)); set_gr_key(); @@ -1933,7 +3296,7 @@ printf("RADEON_DMA_TABLE[%i] %X %X %X %X\n",i,list[i].framebuf_offset,list[i].sy return 0; } -static int radeon_transfer_frame( void ) +static int radeon_transfer_frame( void ) { unsigned i; radeon_engine_idle(); @@ -1960,7 +3323,7 @@ static int radeon_transfer_frame( void ) } -int vixPlaybackCopyFrame( vidix_dma_t * dmai ) +int VIDIX_NAME(vixPlaybackCopyFrame)( vidix_dma_t * dmai ) { int retval; if(mlock(dmai->src,dmai->size) != 0) return errno; @@ -1970,7 +3333,7 @@ int vixPlaybackCopyFrame( vidix_dma_t * dmai ) return retval; } -int vixQueryDMAStatus( void ) +int VIDIX_NAME(vixQueryDMAStatus)( void ) { int bm_active; #if 1 //def RAGE128 diff --git a/src/video_out/vidix/vidix.h b/src/video_out/vidix/vidix.h index c601e92f7..6e1104bb2 100644 --- a/src/video_out/vidix/vidix.h +++ b/src/video_out/vidix/vidix.h @@ -33,8 +33,10 @@ extern unsigned vixGetVersion( void ); device_id (danger but useful for new devices) Returns 0 if ok else errno */ extern int vixProbe( int verbose, int force ); - /* Initializes driver. Returns 0 if ok else errno */ -extern int vixInit( void ); + /* Initializes driver. + args - specifies driver specific parameters + Returns 0 if ok else errno */ +extern int vixInit( const char *args ); /* Destroys driver */ extern void vixDestroy( void ); @@ -72,7 +74,9 @@ extern int vixGetCapability(vidix_capability_t *); typedef struct vidix_fourcc_s { - unsigned fourcc; + unsigned fourcc; /* input: requested fourcc */ + unsigned srcw; /* input: hint: width of source */ + unsigned srch; /* input: hint: height of source */ #define VID_DEPTH_NONE 0x0000 #define VID_DEPTH_1BPP 0x0001 #define VID_DEPTH_2BPP 0x0002 @@ -83,7 +87,7 @@ typedef struct vidix_fourcc_s #define VID_DEPTH_16BPP 0x0040 #define VID_DEPTH_24BPP 0x0080 #define VID_DEPTH_32BPP 0x0100 - unsigned depth; + unsigned depth; /* output: screen depth for given fourcc */ #define VID_CAP_NONE 0x0000 #define VID_CAP_EXPAND 0x0001 /* if overlay can be bigger than source */ #define VID_CAP_SHRINK 0x0002 /* if overlay can be smaller than source */ @@ -96,7 +100,7 @@ typedef struct vidix_fourcc_s #define VID_CAP_COLORKEY_ISOVERLAY 0x0100 /* colorkey is checked against overlay */ #define VID_CAP_ALPHAKEY_ISMAIN 0x0200 /* alphakey is checked against framebuffer */ #define VID_CAP_ALPHAKEY_ISOVERLAY 0x0400 /* alphakey is checked against overlay */ - unsigned flags; + unsigned flags; /* output: capability */ }vidix_fourcc_t; /* Returns 0 if ok else errno */ @@ -150,7 +154,7 @@ typedef struct vidix_playback_s /* memory model */ unsigned frame_size; /* driver -> app: destinition frame size */ unsigned num_frames; /* app -> driver: after call: driver -> app */ -#define VID_PLAY_MAXFRAMES 64 /* reasonable limitation for decoding ahead */ +#define VID_PLAY_MAXFRAMES 1024 /* unreal limitation */ unsigned offsets[VID_PLAY_MAXFRAMES]; /* driver -> app */ vidix_yuv_t offset; /* driver -> app: relative offsets within frame for yuv planes */ void* dga_addr; /* driver -> app: linear address */ @@ -290,6 +294,12 @@ extern int vixGetOemEffect( vidix_oem_fx_t * ); /* Returns 0 if ok else errno */ extern int vixSetOemEffect( const vidix_oem_fx_t * ); +#ifdef VIDIX_BUILD_STATIC +#define VIDIX_NAME(name) VIDIX_STATIC##name +#else +#define VIDIX_NAME(name) name +#endif + #ifdef __cplusplus } #endif diff --git a/src/video_out/vidix/vidixlib.c b/src/video_out/vidix/vidixlib.c index 66154fff8..2c57eb4f5 100644 --- a/src/video_out/vidix/vidixlib.c +++ b/src/video_out/vidix/vidixlib.c @@ -25,14 +25,10 @@ #include <dlfcn.h> /* GLIBC specific. Exists under cygwin too! */ #include <dirent.h> -#if defined(__OpenBSD__) && !defined(__ELF__) -#define dlsym(h,s) dlsym(h, "_" s) -#endif - #include "vidixlib.h" #include "bswap.h" -static char drv_name[FILENAME_MAX]; +#define t_vdl(p) (((vdl_stream_t *)p)) typedef struct vdl_stream_s { @@ -43,7 +39,7 @@ typedef struct vdl_stream_s int (*playback_on)( void ); int (*playback_off)( void ); /* Functions below can be missed in driver ;) */ - int (*init)(void); + int (*init)(const char *); void (*destroy)(void); int (*frame_sel)( unsigned frame_idx ); int (*get_eq)( vidix_video_eq_t * ); @@ -59,34 +55,65 @@ typedef struct vdl_stream_s int (*set_fx)( const vidix_oem_fx_t * ); }vdl_stream_t; -#define t_vdl(p) (((vdl_stream_t *)p)) +static char drv_name[FILENAME_MAX]; +static int dl_idx = -1; +/* currently available driver for static linking */ +static const char* const drv_snames[] = { +#ifdef VIDIX_BUILD_STATIC + "genfb_", + "mach64_", + "mga_crtc2_", + "mga_", + "nvidia_", + "pm2_", + "pm3_", + "radeo_", + "rage128_", +#endif + NULL +}; extern unsigned vdlGetVersion( void ) { return VIDIX_VERSION; } +static void* dlsymm(void* handle, const char* fce) +{ + char b[100]; +#if defined(__OpenBSD__) && !defined(__ELF__) + b[0] = '_'; + b[1] = 0; +#else + b[0] = 0; +#endif + if (dl_idx >= 0) strcat(b, drv_snames[dl_idx]); + strcat(b, fce); + //printf("Handle %p %s\n", handle, b); + return dlsym(handle, b); +} + static int vdl_fill_driver(VDL_HANDLE stream) { - t_vdl(stream)->init = dlsym(t_vdl(stream)->handle,"vixInit"); - t_vdl(stream)->destroy = dlsym(t_vdl(stream)->handle,"vixDestroy"); - t_vdl(stream)->get_caps = dlsym(t_vdl(stream)->handle,"vixGetCapability"); - t_vdl(stream)->query_fourcc = dlsym(t_vdl(stream)->handle,"vixQueryFourcc"); - t_vdl(stream)->config_playback= dlsym(t_vdl(stream)->handle,"vixConfigPlayback"); - t_vdl(stream)->playback_on = dlsym(t_vdl(stream)->handle,"vixPlaybackOn"); - t_vdl(stream)->playback_off = dlsym(t_vdl(stream)->handle,"vixPlaybackOff"); - t_vdl(stream)->frame_sel = dlsym(t_vdl(stream)->handle,"vixPlaybackFrameSelect"); - t_vdl(stream)->get_eq = dlsym(t_vdl(stream)->handle,"vixPlaybackGetEq"); - t_vdl(stream)->set_eq = dlsym(t_vdl(stream)->handle,"vixPlaybackSetEq"); - t_vdl(stream)->get_gkey = dlsym(t_vdl(stream)->handle,"vixGetGrKeys"); - t_vdl(stream)->set_gkey = dlsym(t_vdl(stream)->handle,"vixSetGrKeys"); - t_vdl(stream)->get_deint = dlsym(t_vdl(stream)->handle,"vixPlaybackGetDeint"); - t_vdl(stream)->set_deint = dlsym(t_vdl(stream)->handle,"vixPlaybackSetDeint"); - t_vdl(stream)->copy_frame = dlsym(t_vdl(stream)->handle,"vixPlaybackCopyFrame"); - t_vdl(stream)->query_dma = dlsym(t_vdl(stream)->handle,"vixQueryDMAStatus"); - t_vdl(stream)->get_num_fx = dlsym(t_vdl(stream)->handle,"vixQueryNumOemEffects"); - t_vdl(stream)->get_fx = dlsym(t_vdl(stream)->handle,"vixGetOemEffect"); - t_vdl(stream)->set_fx = dlsym(t_vdl(stream)->handle,"vixSetOemEffect"); + t_vdl(stream)->init = dlsymm(t_vdl(stream)->handle,"vixInit"); + t_vdl(stream)->destroy = dlsymm(t_vdl(stream)->handle,"vixDestroy"); + t_vdl(stream)->get_caps = dlsymm(t_vdl(stream)->handle,"vixGetCapability"); + t_vdl(stream)->query_fourcc = dlsymm(t_vdl(stream)->handle,"vixQueryFourcc"); + t_vdl(stream)->config_playback= dlsymm(t_vdl(stream)->handle,"vixConfigPlayback"); + t_vdl(stream)->playback_on = dlsymm(t_vdl(stream)->handle,"vixPlaybackOn"); + t_vdl(stream)->playback_off = dlsymm(t_vdl(stream)->handle,"vixPlaybackOff"); + t_vdl(stream)->frame_sel = dlsymm(t_vdl(stream)->handle,"vixPlaybackFrameSelect"); + t_vdl(stream)->get_eq = dlsymm(t_vdl(stream)->handle,"vixPlaybackGetEq"); + t_vdl(stream)->set_eq = dlsymm(t_vdl(stream)->handle,"vixPlaybackSetEq"); + t_vdl(stream)->get_gkey = dlsymm(t_vdl(stream)->handle,"vixGetGrKeys"); + t_vdl(stream)->set_gkey = dlsymm(t_vdl(stream)->handle,"vixSetGrKeys"); + t_vdl(stream)->get_deint = dlsymm(t_vdl(stream)->handle,"vixPlaybackGetDeint"); + t_vdl(stream)->set_deint = dlsymm(t_vdl(stream)->handle,"vixPlaybackSetDeint"); + t_vdl(stream)->copy_frame = dlsymm(t_vdl(stream)->handle,"vixPlaybackCopyFrame"); + t_vdl(stream)->query_dma = dlsymm(t_vdl(stream)->handle,"vixQueryDMAStatus"); + t_vdl(stream)->get_num_fx = dlsymm(t_vdl(stream)->handle,"vixQueryNumOemEffects"); + t_vdl(stream)->get_fx = dlsymm(t_vdl(stream)->handle,"vixGetOemEffect"); + t_vdl(stream)->set_fx = dlsymm(t_vdl(stream)->handle,"vixSetOemEffect"); /* check driver viability */ if(!( t_vdl(stream)->get_caps && t_vdl(stream)->query_fourcc && t_vdl(stream)->config_playback && t_vdl(stream)->playback_on && @@ -114,22 +141,34 @@ static int vdl_probe_driver(VDL_HANDLE stream,const char *path,const char *name, strcpy(drv_name,path); strcat(drv_name,name); if(verbose) printf("vidixlib: PROBING: %s\n",drv_name); - if(!(t_vdl(stream)->handle = dlopen(drv_name,RTLD_LAZY|RTLD_GLOBAL))) + { - if(verbose) printf("vidixlib: %s not driver: %s\n",drv_name,dlerror()); - return 0; + const char* slash = strrchr(drv_name, '/'); + if (slash) { + for (dl_idx = 0; drv_snames[dl_idx]; dl_idx++) { + if (!strncmp(slash + 1, drv_snames[dl_idx], strlen(drv_snames[dl_idx]))) + break; // locate the name + } + if (!drv_snames[dl_idx]) dl_idx = -1; + } } - _ver = dlsym(t_vdl(stream)->handle,"vixGetVersion"); - _probe = dlsym(t_vdl(stream)->handle,"vixProbe"); - _cap = dlsym(t_vdl(stream)->handle,"vixGetCapability"); - if(_ver) + if (dl_idx < 0) + if(!(t_vdl(stream)->handle = dlopen(drv_name,RTLD_LAZY|RTLD_GLOBAL))) { + if(verbose) printf("vidixlib: %s not driver: %s\n",drv_name,dlerror()); + return 0; + } + _ver = dlsymm(t_vdl(stream)->handle,"vixGetVersion"); + _probe = dlsymm(t_vdl(stream)->handle,"vixProbe"); + _cap = dlsymm(t_vdl(stream)->handle,"vixGetCapability"); + if(_ver) { - if((*_ver)() != VIDIX_VERSION) - { + if((*_ver)() != VIDIX_VERSION) + { if(verbose) printf("vidixlib: %s has wrong version\n",drv_name); err: dlclose(t_vdl(stream)->handle); t_vdl(stream)->handle = 0; + dl_idx = -1; return 0; } } @@ -161,10 +200,10 @@ static int vdl_find_driver(VDL_HANDLE stream,const char *path,unsigned cap,int v while(!done) { name = readdir(dstream); - if(name) - { + if(name) + { if(name->d_name[0] != '.') - if(vdl_probe_driver(stream,path,name->d_name,cap,verbose)) break; + if(vdl_probe_driver(stream,path,name->d_name,cap,verbose)) break; } else done = 1; } @@ -175,6 +214,7 @@ static int vdl_find_driver(VDL_HANDLE stream,const char *path,unsigned cap,int v VDL_HANDLE vdlOpen(const char *path,const char *name,unsigned cap,int verbose) { vdl_stream_t *stream; + const char *drv_args=NULL; int errcode; if(!(stream = malloc(sizeof(vdl_stream_t)))) return NULL; memset(stream,0,sizeof(vdl_stream_t)); @@ -183,29 +223,39 @@ VDL_HANDLE vdlOpen(const char *path,const char *name,unsigned cap,int verbose) unsigned (*ver)(void); int (*probe)(int,int); unsigned version = 0; + unsigned char *arg_sep; + arg_sep = strchr(name,':'); + if(arg_sep) { *arg_sep='\0'; drv_args = &arg_sep[1]; } strcpy(drv_name,path); strcat(drv_name,name); - if(!(t_vdl(stream)->handle = dlopen(drv_name,RTLD_NOW|RTLD_GLOBAL))) { - if (verbose) - printf("vidixlib: dlopen error: %s\n", dlerror()); - err: - free(stream); - return NULL; + const char* slash = strrchr(drv_name, '/'); + if (slash) { + for (dl_idx = 0; drv_snames[dl_idx]; dl_idx++) { + if (!strncmp(slash + 1, drv_snames[dl_idx], strlen(drv_snames[dl_idx]))) + break; // locate the name + } + if (!drv_snames[dl_idx]) dl_idx = -1; + } } - ver = dlsym(t_vdl(stream)->handle,"vixGetVersion"); + if (dl_idx < 0) + if(!(t_vdl(stream)->handle = dlopen(drv_name,RTLD_NOW|RTLD_GLOBAL))) + { + if (verbose) + printf("vidixlib: dlopen error: %s\n", dlerror()); + err: + vdlClose(stream); + return NULL; + } + ver = dlsymm(t_vdl(stream)->handle,"vixGetVersion"); if(ver) version = (*ver)(); if(version != VIDIX_VERSION) - { - drv_err: - if(t_vdl(stream)->handle) dlclose(t_vdl(stream)->handle); goto err; - } - probe = dlsym(t_vdl(stream)->handle,"vixProbe"); - if(probe) { if((*probe)(verbose,PROBE_FORCE)!=0) goto drv_err; } - else goto drv_err; + probe = dlsymm(t_vdl(stream)->handle,"vixProbe"); + if(probe) { if((*probe)(verbose,PROBE_FORCE)!=0) goto err; } + else goto err; fill: - if(!vdl_fill_driver(stream)) goto drv_err; + if(!vdl_fill_driver(stream)) goto err; goto ok; } else @@ -213,18 +263,18 @@ VDL_HANDLE vdlOpen(const char *path,const char *name,unsigned cap,int verbose) { if(verbose) printf("vidixlib: will use %s driver\n",drv_name); goto fill; - } + } else goto err; ok: if(t_vdl(stream)->init) { if(verbose) printf("vidixlib: Attempt to initialize driver at: %p\n",t_vdl(stream)->init); - if((errcode=t_vdl(stream)->init())!=0) + if((errcode=t_vdl(stream)->init(drv_args))!=0) { if(verbose) printf("vidixlib: Can't init driver: %s\n",strerror(errcode)); - goto drv_err; + goto err; } - } + } if(verbose) printf("vidixlib: '%s'successfully loaded\n",drv_name); return stream; } @@ -232,9 +282,10 @@ VDL_HANDLE vdlOpen(const char *path,const char *name,unsigned cap,int verbose) void vdlClose(VDL_HANDLE stream) { if(t_vdl(stream)->destroy) t_vdl(stream)->destroy(); - dlclose(t_vdl(stream)->handle); + if(t_vdl(stream)->handle) dlclose(t_vdl(stream)->handle); memset(stream,0,sizeof(vdl_stream_t)); /* <- it's not stupid */ free(stream); + dl_idx = -1; } int vdlGetCapability(VDL_HANDLE handle, vidix_capability_t *cap) |