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author | Alan Barrett <apb@NetBSD.org> | 2014-05-19 10:06:20 +0300 |
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committer | Alan Barrett <apb@NetBSD.org> | 2014-05-19 10:06:20 +0300 |
commit | f6aaa4c1e321c6657d20b8fe43693e451fa56d71 (patch) | |
tree | eacf9342cc908fce6a384f1e8aa8e0d1d260246d /src | |
parent | bbf74c1d5bd0b26874cbda9d7f047b422c04fb0b (diff) | |
download | xine-lib-f6aaa4c1e321c6657d20b8fe43693e451fa56d71.tar.gz xine-lib-f6aaa4c1e321c6657d20b8fe43693e451fa56d71.tar.bz2 |
Require less GPRs for asm parameters.
In affine_1d_MMX(), move the initialisation of %mm3 and %mm4 registers
into a separate asm statement, to give the compiler more freedom
for register allocation. Fixes a problem with gcc-4.5.4 on NetBSD/i386.
Diffstat (limited to 'src')
-rw-r--r-- | src/post/planar/eq2.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/src/post/planar/eq2.c b/src/post/planar/eq2.c index 867699b3d..06d8cd3fd 100644 --- a/src/post/planar/eq2.c +++ b/src/post/planar/eq2.c @@ -126,8 +126,12 @@ void affine_1d_MMX (eq2_param_t *par, unsigned char *dst, unsigned char *src, while (h-- > 0) { asm volatile ( - "movq (%5), %%mm3 \n\t" - "movq (%6), %%mm4 \n\t" + "movq (%0), %%mm3 \n\t" + "movq (%1), %%mm4 \n\t" + : + : "r" (brvec), "r" (contvec) + ); + asm volatile ( "pxor %%mm0, %%mm0 \n\t" "movl %4, %%eax\n\t" ASMALIGN(4) @@ -149,7 +153,7 @@ void affine_1d_MMX (eq2_param_t *par, unsigned char *dst, unsigned char *src, "decl %%eax \n\t" "jnz 1b \n\t" : "=r" (src), "=r" (dst) - : "0" (src), "1" (dst), "r" (w >> 3), "r" (brvec), "r" (contvec) + : "0" (src), "1" (dst), "r" (w >> 3) : "%eax" ); |